Method for stabilizing the surface of a semiconductor material

Abstract

The present invention relates to a method for stabilizing the surface of a semiconductor material, in particular a monocrystalline semiconductor material, against the formation of terraces and / or beads, said method comprising forming on said surface a glassy carbon layer (30) in the gas phase at a pressure of 80 kPa (800 mbar) or more.

Description

[Technical Field]

[0001] The present invention relates to a method for stabilizing the surface of a semiconductor material, in particular a monocrystalline semiconductor material. The present invention further relates to a method for heat treatment and a method for manufacturing a semiconductor structure, which includes a step of stabilizing the surface of a semiconductor material, in particular a monocrystalline semiconductor material. [Background technology]

[0002] Semiconductor materials, especially silicon carbide (SiC), are widely used in the manufacture of power or high-frequency components. Some applications use solid single-crystal SiC substrates, substrates with single-crystal SiC surface layers, or substrates containing other semiconductor materials, such as aluminum nitride (AlN), gallium nitride (GaN), alloys of these nitrides, indium phosphide (InP), or gallium arsenide (GaAs). In some cases, the semiconductor substrate or semiconductor layer is polycrystalline.

[0003] Substrates for electronic applications often require heat treatment during their manufacture, such as annealing to repair defects in the crystal lattice caused during implantation of ionic species or to modify the crystal structure of the substrate. Such treatments are often carried out at high temperatures that can reach 2000°C.

[0004] However, the surfaces of the semiconductor materials considered are prone to destabilization under the influence of high temperatures, which can be manifested by a degradation of the surface, in particular by a change in its morphology and / or composition.

[0005] In particular, as shown in Figure 1, smooth SiC surfaces are sensitive to high-temperature processing, typically from about 1300°C. Without proper surface protection, the morphology rearranges to minimize surface energy, forming terraces. This effect is known as step bunching. The rearrangement of the surface 222 results from the diffusion of atoms on the surface when the surface is exposed to high temperatures. The rearrangement further depends on the atmosphere and pressure to which the surface is exposed. The rearrangement also depends on the misorientation angle of the surface relative to the high symmetry axis of the semiconductor material's crystal. Such misorientation facilitates 4H polytype control during subsequent epitaxy of single-crystal SiC and is used to prevent polytype change during single-crystal SiC growth. In such epitaxy processes, an angle of 4° is often selected. However, the greater this angle of inclination, the higher the step height between the terraces.

[0006] Such misorientation can also occur spontaneously on polycrystalline SiC surfaces where the grains are randomly oriented.

[0007] Surfaces of other semiconductor materials may have similar steps. On surfaces containing GaN, gallium beads may appear on the surface during exposure to high temperatures.

[0008] Therefore, to obtain a smooth surface, it is desirable to prevent the formation of terraces or to remove them in a later step, and if necessary, to prevent the appearance of beads of gallium or other material.

[0009] For example, mechanical polishing or chemical mechanical polishing (CMP) may be performed after the heat treatment. However, if the height of the formed terraces is too large, e.g., more than 80 nm between two consecutive plates, the thickness to be removed becomes too large, resulting in a time-consuming and labor-intensive process. Furthermore, the remaining thickness is often too thin for the intended application.

[0010] Another method is to use very fast annealing lamps to limit the appearance of terraces. This method requires a very rapid temperature increase of about 400 °C per minute, and is therefore not compatible with industrial furnaces.

[0011] Alternatively, a silane overpressure can be applied to limit the sublimation of silicon into the SiC, thereby avoiding the formation of terraces. This method is described in a paper by R. Zhang et al. However, this method requires the introduction of SiH4 gas and the equipment required to generate the overpressure. Furthermore, at temperatures above 1600 °C, silicon droplets may appear on the SiC surface.

[0012] Another possibility to prevent the formation of terraces is the use of a protective layer. J. Bao et al. propose a protective layer of carbon obtained by centrifuging a resin on the SiC surface. The resin is annealed at 750-900 °C to form a carbon film approximately 1 μm thick. This technique involves an additional step in the formation process, the use of additional equipment, and the risk of contaminating the substrate with the resin.

[0013] In some cases, the protective layer can also be made of aluminum nitride (AlN), however this material is difficult to remove, especially after heat treatment at high temperatures. Summary of the Invention

[0014] One object of the present invention is to provide a method for stabilizing a substrate having a surface of a semiconductor material, in particular to prevent the formation of terraces and / or beads by means of an easy-to-implement step. This stabilization treatment should be easy to integrate into the manufacturing process of a substrate comprising a surface of a semiconductor material and should not involve the risk of contamination of such substrates.

[0015] To this end, the invention proposes a method for stabilizing the surface of a semiconductor material, in particular a monocrystalline semiconductor material, against the formation of terraces and / or beads, said method comprising forming on said surface a glassy carbon layer in the gas phase at a pressure of 80 kPa (800 mbar) or more.

[0016] In this context, the surface sought to be stabilised is the free surface of the semiconductor material, ie the outer surface of the substrate comprising said semiconductor material that forms the interface with the external environment.

[0017] Advantageously, the semiconductor material is silicon carbide.

[0018] Advantageously, the formation of the carbon layer is carried out at a temperature comprised between 1000° C. and 1200° C. Advantageously, the method further comprises a step of thickening the carbon layer at a temperature above the carbon layer formation temperature.

[0019] Preferably, the carbon layer has a thickness comprised between 5 nm and 500 nm, preferably between 50 nm and 150 nm.

[0020] In some embodiments, the carbon layer is deposited in a gas flow comprising a carbon-containing gas and a carrier gas, the carrier gas preferably being argon or a mixture of argon and hydrogen.

[0021] In another embodiment, the carbon layer is deposited by evaporating a carbon-containing gas from a solid carbon source.

[0022] In some embodiments, the carbon layer is formed in a substrate annealing furnace, preferably comprising an inner wall and a support member configured to hold at least one substrate, and wherein the inner wall, support, and gas within the annealing furnace have the same temperature.

[0023] Advantageously, the annealing furnace accommodates a plurality of substrates comprising a surface of said semiconductor material, said substrates being stacked vertically with a vertical space between two adjacent substrates, and a carbon layer being formed on the surface of the semiconductor material of each of said substrates.

[0024] In another embodiment, the carbon layer is deposited in a chemical vapor deposition chamber.

[0025] The invention also relates to a method for treating a substrate having a free surface of semiconductor material, in particular monocrystalline semiconductor material, comprising a method for stabilizing said surface as described above and a thermal treatment of said substrate after stabilizing said surface.

[0026] Advantageously, at least part of the heat treatment is carried out at a temperature above 1700°C.

[0027] In some embodiments, the deposition of the carbon layer and the heat treatment are carried out in the same substrate annealing furnace. Preferably, the heat treatment comprises successively a first stage, comprising the formation of the carbon layer, carried out at a temperature comprised between 1000 and 1200°C, and at least a second stage, carried out at a temperature above 1200°C, preferably above 1700°C, the carbon layer formed during the first stage limiting the rearrangement of the surface into semiconductor material in the form of terraces. Advantageously, the method further comprises, after the heat treatment, a step of removing the carbon layer by reactive ion etching or by plasma etching. Advantageously, the method comprises a step of injecting oxygen into the furnace to generate a reactive plasma during the step of removing the carbon layer.

[0028] The present invention also relates to a method for manufacturing a semiconductor structure, the method comprising the steps of: forming a weakened region by implanting ionic species into a donor substrate made of a semiconductor material, in particular a monocrystalline semiconductor material; bonding the donor substrate to a support substrate; peeling the donor substrate along the weakened region to transfer the layer of semiconductor material onto the support substrate; a process for repairing defects caused in a layer of semiconductor material during implantation of ionic species, wherein a carbon layer is formed on the free surface of the layer of semiconductor material transferred to a support substrate; Includes:

[0029] Preferably, the donor substrate is made from silicon carbide.

[0030] Other features and advantages of the present invention will become apparent from the following detailed description, which refers to the accompanying drawings. [Brief explanation of the drawings]

[0031] [Figure 1] 1A-1C illustrate the formation of terraces on the front surface of a single-crystalline semiconductor material. [Figure 2] 1 shows a substrate including a portion made of a monocrystalline semiconductor material on the front side of the substrate. [Figure 3] FIG. 3 shows the substrate of FIG. 2 after deposition of a carbon layer. [Figure 4] FIG. 4 shows the substrate of FIG. 3 after ablation of the carbon layer. [Figure 5A] 1 shows a substrate including a portion made of a single crystal semiconductor material on the front side of the substrate. [Figure 5B] 1 shows a substrate including a portion made of a single crystal semiconductor material on the front side of the substrate. [Figure 5C] 1 shows a substrate including a portion made of a single crystal semiconductor material on the front side of the substrate. [Figure 6] FIG. 1 shows a thermal profile used in the method according to the invention. [Figure 7] FIG. 1 shows terrace-induced roughness as a function of annealing temperature for different substrates. [Figure 8] FIG. 1 illustrates an annealing furnace suitable for forming a carbon layer according to a preferred embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0032] 2 shows a substrate 10 that includes a support substrate 11 and a portion 20 of a single-crystal semiconductor material on the front side of the substrate 10. The support substrate 11 may be any type of support substrate suitable for depositing or transferring the portion 20 made of a single-crystal semiconductor material, for example a support substrate made of a polycrystalline semiconductor material.

[0033] Alternatively, substrate 10 may be a solid substrate made of a single crystal semiconductor material, ie, support substrate 11 and portion 20 together constitute a single portion made of a solid single crystal semiconductor material.

[0034] It should be noted that the semiconductor material forming the front surface of substrate 10, and therefore constituting either portion 20 (in the case of substrate 10 including support substrate 11 and portion 20) or substrate 10 (in the case of a solid substrate), may be a polycrystalline material.

[0035] In the following description, the case of substrate 10 including support substrate 11 and single crystal portion 20 will be described in detail, and the material constituting portion 20 will be referred to as a "single crystal semiconductor material" to distinguish it from the material constituting support substrate 11. However, the method described below is also applicable to the case of polycrystalline semiconductor material, in which case each crystal grain can be considered to be single crystal.

[0036] According to a preferred embodiment, the single crystal semiconductor material is silicon carbide.

[0037] According to another embodiment, the monocrystalline semiconductor material is aluminum nitride (AlN), gallium nitride (GaN), or alloys of these nitrides, AlN, where x is a number between 0 and 1. x GA (1-x) N, indium phosphide (InP), or gallium arsenide (GaAs).

[0038] Typically, the surface 200 of the portion 20 made of single crystal semiconductor material, or, if applicable, the surface of a substrate made of solid single crystal semiconductor material, is slightly misaligned. For example, if the semiconductor material is SiC, the surface may be misaligned relative to the crystalline structure of the SiC to facilitate control of the 4H polytype during growth.

[0039] In the case of polycrystalline semiconductor materials, some of the grains may have such misalignment with respect to the crystalline structure of SiC. For example, after cutting or polishing substrate 10 to reveal a particular plane of substrate 10, randomly oriented grains will become misaligned with respect to this plane.

[0040] Formation of a protective layer Referring to FIG. 3, a carbon layer 30 is then formed on the surface 200 of the part 20 made of monocrystalline semiconductor material.

[0041] Preferably, the carbon layer 30 is made from glassy carbon. Alternatively, the carbon layer 30 may be another form of carbon, such as amorphous carbon, graphene, or diamond.

[0042] The carbon layer is continuous and covers the entire surface to be protected, i.e. the front surface of the single crystal material.

[0043] The carbon layer protects the surface of the substrate from terrace formation when heated to high temperatures. Thus, the carbon layer stabilizes the crystalline structure of the surface. The carbon layer is removed after the high-temperature treatment to obtain a clean surface of the single-crystalline semiconductor material with good crystalline quality. The thickness of the carbon layer is preferably less than 200 nm to allow for easy removal at the end of the high-temperature process.

[0044] In the case of glassy carbon layers, glassy properties are achieved from carbon thicknesses of a few nanometers; at smaller thicknesses, the carbon is in the form of one or two monolayers of graphene. When the thickness is sufficient to produce glassy carbon, the protective layer has a long-range, disordered, three-dimensional structure that is stable over the entire temperature range to which the surface is exposed during processing, allowing for full coverage of the substrate surface. The uniformity of the glassy carbon layer is easier to control across the surface area of ​​the substrate.

[0045] Advantageously, the thickness of the protective carbon layer is comprised between 50 nm and 150 nm.

[0046] Advantageously, the formation of the carbon layer is carried out in a deposition chamber as described below. The carbon layer 30 is formed in the gas phase, i.e., the carbon is present in gaseous form in the deposition chamber. The substrate is heated in the deposition chamber to the deposition temperature of the protective layer, and the carbon gas phase is converted to solid carbon by reaction with the hot surface of the substrate.

[0047] The temperature and pressure of the gas in the deposition chamber are selected so as not to cause degradation of the surface to be protected during the deposition of the carbon layer.

[0048] Advantageously, the carbon source is a carbon-containing gas, such as propane (C3H8) or acetylene (C2H4) gas mixed with a carrier gas, such as argon or a mixture of argon and hydrogen. The flow rate of such a carbon source can be easily controlled and adjusted to the deposition conditions of the carbon layer. The carrier gas is a neutral gas that does not participate in the chemical reaction of the layer formation. The use of such a gas makes it possible to increase the pressure in the deposition chamber to values ​​of 80 kPa (800 mbar) or more, which limits surface recombination during the deposition of the carbon layer and therefore prevents the formation of terraces during the deposition of the carbon layer.

[0049] The use of high pressure and high flow rate of the carrier gas also achieves better carbon uniformity and better temperature uniformity inside the deposition chamber, allowing for uniform deposition on multiple stacked substrates in the same deposition chamber. During carbon layer deposition, the atmosphere in the deposition chamber is oxygen-free. Furthermore, unlike known deposition processes, this process does not use either a primary or secondary vacuum step. Therefore, this process is faster and simpler than processes requiring such a vacuum because it does not require pumping time for the chamber, facilitates heat exchange therein, and does not require complex equipment.

[0050] The carbon-containing gas is mixed with the carrier gas at a ratio of 0.01% to 10%, ideally 0.1% to 1%. For example, propane diluted in 1% argon carrier gas can be used. Such a relatively low concentration prevents the deposition chamber atmosphere from becoming saturated, thereby allowing for better control of the thickness of the deposited carbon layer. Therefore, even if an additional source of carrier gas is present to achieve the desired pressure, only a low concentration of carbon-containing gas, such as propane or acetylene, is used, which poses less risk of contamination and is less harmful to the deposition chamber and substrate.

[0051] Alternatively, the carbon layer can be deposited from another carbon source, for example a solid source located in the same chamber as the substrate. For example, such a solid source is a quantity of resin that is deposited on a substrate made of semiconductor material and then crosslinked in a furnace or on a heated plate. In this case, the evaporation of the carbon-containing gas or gases present in the resin in the deposition chamber is sufficient to generate in the atmosphere the concentration necessary to cause the appearance of a carbon layer on the surface made of semiconductor material.

[0052] The carbon layer may be characterized by surface analysis techniques such as Atomic Force Microscopy (AFM), X-Ray Reflectometry (XRR), Raman spectroscopy or Low Energy Electron Microscopy (LEEM).

[0053] The carbon layer is stable up to temperatures of at least 2000° C. and limits the formation of terraces during exposure of the substrate to temperatures above the terrace formation temperature.

[0054] High temperature steps requiring a protective layer After the formation of the carbon layer, further steps may be performed on the substrate at temperatures higher than the terrace formation temperature. Such steps are, for example, annealing to repair defects in the crystal lattice caused during the implantation of ionic species, to modify the crystalline structure of the substrate, or to activate dopants. During these steps, the surface of the monocrystalline semiconductor material is protected by the carbon layer, preventing the formation of terraces on said surface. The annealing steps are performed at temperatures comprised between 1300°C and 2000°C, usually above 1700°C.

[0055] Removal of the protective layer At the end of the annealing step, the temperature is reduced to a temperature below the terracing temperature, i.e., below 1300°C. Advantageously, the temperature is reduced to 900°C for ablation of the carbon layer. The carbon layer can then be removed, since the temperature is low enough that no terracing occurs on the surface of the semiconductor material. The low thickness of the carbon layer facilitates rapid and residue-free removal on the substrate.

[0056] The carbon layer can be removed by a reactive plasma, for example an oxygen plasma, according to the following reaction:

[0057] C (solid) + O2 (gas) → CO2 (gas) In some cases, removal can be performed in the same deposition chamber in which the steps forming the protective carbon layer and / or the high temperature steps were performed. However, if elements of the deposition chamber are made of unprotected graphite or other materials that can be damaged by contact with a reactive plasma, it is preferable to transfer the substrate to a separate chamber for carbon layer removal.

[0058] Alternatively, the carbon layer can be removed by reactive ion etching (RIE), for example with oxygen ions or a mixture of oxygen and sulfur hexafluoride.

[0059] In some cases, the carbon layer is removed during a substrate finishing step, such as a mechanical polishing step, without a specific removal step.

[0060] An appropriate chemical mechanical polishing step may be performed after removal of the carbon layer in order to remove any carbon residues and / or to ensure good quality of the surface of the monocrystalline semiconductor material.

[0061] At the end of this step, referring to Figure 4, the substrate 11 is finished and the carbon layer is removed. The substrate 11 and the free surface of the monocrystalline semiconductor material can now be used for epitaxial growth of a layer of monocrystalline semiconductor material (either the same as or different from the monocrystalline semiconductor material of the substrate 11) and / or for the fabrication of power or high frequency components.

[0062] Implementing a manufacturing method for a semiconductor structure DETAILED DESCRIPTION OF THE INVENTION A method is described herein for fabricating semiconductor structures for electronic applications having single crystal silicon carbide surfaces.

[0063] A single crystal silicon carbide donor substrate 220 is provided from which a single crystal silicon carbide surface layer is to be formed. Referring to Figure 5A, ionic species such as hydrogen and / or helium are implanted in the donor substrate 220, as shown schematically by the arrows, to form weakened regions 21, which define the layer 20 of single crystal silicon carbide to be transferred.

[0064] 5B, the donor substrate 220 thus implanted is bonded to the base substrate 11. The donor substrate may be bonded directly to the base substrate as shown in FIG. 5B, or may be bonded via one or more intermediate layers (not shown) that may be disposed on the donor substrate and / or on the base substrate prior to bonding.

[0065] 5C, the donor substrate 220 is then peeled along the weakened regions 21, thereby transferring the single crystal silicon carbide layer onto the base substrate 11, thus forming the support substrate 10 as shown in FIG. 2. The peeled portion 221 of the donor substrate can be reused to transfer other single crystal silicon carbide layers onto other base substrates.

[0066] A treatment process is then carried out which successively includes steps of stabilizing the surface by forming a protective carbon layer, a high temperature anneal aimed at repairing defects created in the single crystal silicon carbide layer during the implantation of ionic species, and subsequent removal of the protective carbon layer.

[0067] In some embodiments, the method for treating a substrate having a single-crystal silicon carbide surface is carried out in a single annealing furnace. In this case, the carbon layer is also deposited in the annealing furnace. Therefore, during the ongoing process, the transfer from the deposition chamber dedicated to the deposition of the protective layer to the annealing furnace is avoided, thus resulting in a simpler and faster process without the risk of substrate contamination.

[0068] Figure 6 shows the temperature profile for such a process in an annealing furnace as a function of elapsed time. Three main process sequences can be distinguished, corresponding to the formation of the protective carbon layer (S1), the high-temperature anneal (S2), i.e., the temperature above which the formation of the terraces begins, and the step of removing the protective carbon layer (S3).

[0069] The gases injected into the top of the furnace are exhausted under a flow of carrier gas and exhausted through the bottom of the furnace during all sequences of the process.

[0070] The first sequence S1 starts at time t0. The substrate is at room temperature, typically about 20°C, or at a temperature below the terrace formation temperature. The substrate is introduced into the deposition chamber. Heating of the substrate begins up to the carbon layer deposition temperature T1, which is comprised between 1000°C and 1200°C. T1 is therefore below the temperature at which the formation of the terraces begins, i.e., about 1300°C at a pressure of 101 kPa (1 atm).

[0071] The deposition temperature T1 is kept constant and the carbon layer is deposited while the pressure in the furnace is maintained at 80 kPa (800 mbar) or 100 kPa (1 bar).

[0072] The duration of the formation of the carbon layer is usually between 10 and 30 minutes. The flow rate of the propane injected to obtain the carbon-containing gas depends on the volume of the chamber and is, for example, about 10 SCCM. These parameters can be adjusted to obtain a carbon layer of the desired thickness and uniformity suitable for optimal protection during the subsequent sequence, in a time short enough to optimize the process in terms of time and cost.

[0073] The deposition of the carbon layer begins at time t1.

[0074] In some cases (not shown), the deposition of the carbon layer is followed by a step of thickening the carbon layer at a temperature higher than T1. Step S1 therefore comprises several different temperature steps. The use of a first step makes it possible to obtain a protective layer at a temperature where the formation of terraces is very low and therefore negligible. The use of a second step at a higher temperature allows for a faster growth of the thickened carbon layer.

[0075] At the end of sequence S1, the supply of the carbon-containing gas is stopped, and the remainder of the carbon-containing gas is exhausted under the flow of carrier gas.

[0076] At time t2, once the deposition of the carbon layer is completed, a second sequence S2 is performed. The second sequence S2 comprises heating from the deposition temperature T1 to an annealing temperature T2 and a temperature plateau of a duration typically comprised between 30 and 120 minutes. The annealing temperature T2 and the duration of the treatment are selected according to the state of the substrate before the ongoing process and the substrate, as well as the expected crystalline structure of the substrate. Typically, the annealing is performed at a temperature T2 comprised between 1600 °C and 2000 °C.

[0077] At the end of sequence S2, the substrate is cooled to preserve the crystalline properties obtained during annealing. At time t3, the substrate reaches a third temperature T3 of 900°C.

[0078] A third sequence S3 is then performed, during which the protective carbon layer is removed by oxidation as described above. During this step, the temperature T3 = 900 °C is kept constant. The duration of the removal is typically between 10 and 120 seconds, with a removal rate of approximately 100 nm per minute. The total duration of sequence S3, which also includes the stabilization of the furnace, is between 5 and 60 minutes. At time t4, when the carbon layer has been completely removed, the substrate is cooled in order to be removed from the furnace.

[0079] Alternatively, the protective layer can be deposited in a chemical vapor deposition chamber, with the addition of a transfer step from the deposition chamber to a substrate annealing furnace at time t2, which typically involves cooling and then heating the substrate.

[0080] In some embodiments, if the components of the annealing furnace should not be exposed to an oxygen atmosphere, an additional step is to transfer the substrate from the annealing furnace to a protective layer removal chamber. The removal chamber may be designed to remove the layer by reactive ion etching or plasma etching. Such a step includes cooling the substrate at t3 and heating it to the removal temperature at the beginning of sequence S3.

[0081] If the substrate processing process includes a transfer step, the different sequences may be performed separately in time.

[0082] Effect of protective layer on terrace formation Figure 7 shows the root mean square (RMS) values ​​of the surface roughness caused by the formation of terraces on the single-crystal SiC surface as measured by AFM. In this example, the presence of a carbon protective layer was confirmed by Raman spectroscopy.

[0083] Bar 50 corresponds to the reference measurement of a monocrystalline SiC layer, with the orientation of the crystallographic axis C offset by 4° to the direction of the silicon carbide crystal [11-20], not covered with a carbon layer, and not subjected to any heat treatment that would tend to produce terraces. All other measurements were made on samples of the same orientation and crystalline quality of SiC.

[0084] Bars 51 and 52 correspond to single-crystal SiC samples without a protective carbon layer. The sample corresponding to bar 51 was annealed at 1635°C, and the sample corresponding to bar 52 was annealed at 1765°C. All anneals were 30 minutes long. The formation of stepped terraces was observed, resulting in surface roughness exceeding 11 nm RMS or 15 nm RMS, respectively, which can be problematic for the fabrication of electronic components.

[0085] The conditions for forming the carbon layer are summarized in Table 1. [Table 1] Bars 53A to 58C correspond to samples on which a protective carbon layer was deposited according to the parameters shown in Table 1. For bars 53A to 58C, the duration of the process is 10 minutes. For bars 58A to 58C, the duration of the process is 30 minutes.

[0086] Bars 53A, 54A, 55A, 56A, 57A, and 58A correspond to different samples on which a protective carbon layer was deposited and then removed.

[0087] These samples were not annealed. For measurements 53A, 54A, and 55A, the terrace formation is slightly greater than the reference measurements, however, the roughness remains below 1 nm RMS. Measurements 56A, 57A, and 58A have roughness comparable to the reference roughness.

[0088] For bars 53B, 54B, 55B, 56B, 57B, and 58B, a protective carbon layer was deposited on the single-crystal SiC surface according to the conditions in Table 1 and annealed at 1700 °C. The annealing lasted for 30–60 minutes. The carbon layer was then removed for RMS measurements. For all samples, the roughness was less than 2 nm RMS.

[0089] For bars 53C, 54C, 55C, 56C, 57C, and 58C, a protective carbon layer was deposited on the single-crystal SiC surface according to the conditions in Table 1 and annealed at 1800 °C. The carbon layer was then removed for RMS measurements. All samples had an RMS roughness of less than 5 nm.

[0090] Thus, a significant reduction in terrace formation was observed for all carbon layers deposited. The best results were obtained for samples 58A-58C, where the deposition time of the carbon-containing layer was 30 minutes, exceeding the deposition time of the other protective layers. Depending on the need to reduce step bunching, the expected process duration and annealing temperature, and the required annealing duration, the parameters of the protective layer deposition can be adjusted to minimize the appearance of terraces without unnecessarily prolonging the process.

[0091] In another example, the GaN layer is transferred onto a support substrate, such as polycrystalline silicon carbide, polycrystalline aluminum nitride, or another semiconductor support substrate. A protective carbon layer is deposited on the free surface of the GaN layer by the process described above. Because gallium bead formation is likely to occur at temperatures of 850°C under a nitrogen atmosphere at atmospheric pressure, the carbon layer is deposited at temperatures below 800°C, for example. However, higher temperature depositions are also possible under certain circumstances, for example, when a high gallium partial pressure limits the appearance of gallium beads.

[0092] A thermal treatment can then be performed to activate dopants present in the GaN layer and / or to strengthen the bond after transfer of the GaN layer, during which the GaN surface is protected from terrace formation and gallium bead formation.

[0093] The carbon layer is then removed by reactive ion or plasma etching and / or chemical mechanical polishing.

[0094] Furnace Description To make the process for processing multiple substrates efficient and fast, it is preferable to use an annealing furnace capable of processing the largest number of substrates simultaneously under the same conditions, which is conventionally referred to in the microelectronics field as a batch annealing furnace.

[0095] Figure 8 shows a furnace designed to accommodate a load of 120-150 substrates in the annealing chamber. The substrates 10 are positioned horizontally in the furnace and stacked vertically to process as many substrates as possible with the same hot gas flow 73. Free space is maintained between each substrate 10 and adjacent substrates 10 to optimize gas flow and facilitate carbon layer formation.

[0096] Such furnaces use a top-flow configuration, i.e., the gas stream is conveyed into the furnace through the top 71, passes through the furnace, and then exits through an outlet 79 at the bottom of the furnace. Typically, a gas stream, called a carrier gas, transports a carbon-containing gas (usually propane) for the formation of the carbon-containing layer. In certain cases, other gases, such as a catalytic gas to promote decomposition of the carbon-containing gas, are added to the furnace.

[0097] When a solid source is used, the solid source is located, for example, at the top of the furnace, whereby a carrier gas transports the carbon-containing gas to the substrate to be coated, which is located downstream from the solid source. However, the location of the solid source can vary.

[0098] All components of the annealing chamber inside the furnace, i.e., the inner wall 75, the substrate holders for holding the substrates in horizontal and vertical stacked positions, and the gases contained in the annealing chamber, except for external elements such as the outer wall 76 and the end of the gas inlet pipe, are at the same temperature during use of the furnace. By same temperature, we mean that the temperature difference between the top end 74 of the furnace and the bottom end 78 of the furnace is minimal, typically a few degrees Celsius, e.g., less than 3 degrees Celsius for furnace temperatures comprised between 800 and 1200 degrees Celsius.

[0099] The substrate is heated primarily by conduction through the walls of the furnace, and the gas stream is injected at the same temperature as the temperature inside the furnace.

[0100] Annealing furnaces are not intended for layer deposition, but rather for the application of heat treatments to substrates placed therein. Therefore, these furnaces are optimized for high-temperature uniformity of the substrates received therein, but not for optimizing material deposition, particularly for ensuring uniformity of gas flow over the substrate surface. Placing substrates one on top of the other has a particularly negative effect on this uniformity, since gases have a greater difficulty reaching the center of the substrate than its edge. However, this type of furnace is nevertheless particularly suitable for depositing carbon layers to protect the surface of semiconductor materials from the formation of terraces, since the thickness uniformity of the carbon layer is not a determining factor, as long as the entire surface to be protected is covered. The temporary use of the carbon layer does not require high uniformity of this layer. However, it is necessary to control the thickness so that a sufficient thickness is obtained over the surface area of ​​all substrates placed in the furnace.

[0101] Unlike epitaxy chambers, such furnaces allow multiple substrates to be processed simultaneously through a vertically stacked arrangement. Furthermore, such furnaces allow the carbon layer deposition and annealing steps to be performed in the same chamber, thereby avoiding the risk of contamination during transfer between two different chambers. The transfer step between the carbon layer deposition chamber and the annealing furnace is therefore avoided, thus avoiding the need for manpower for cooling and transfer between each step, thereby avoiding the loss of time and efficiency.

[0102] References R. Zhang et al., "Growth of large domains of epitaxial graphene on the C-face of SiC," J. of App. Phys. 2012, 112(10); doi:10.1063 / 1.4765666 J. Bao et al., "Sequential Control of Step-Bunching During Graphene Growth on SiC(0001)," App.Phys.Lett.2016, 109(8);doi:10.1063 / 1.4961630

Claims

1. 1. A method for stabilizing the surface of a semiconductor material, in particular a monocrystalline semiconductor material, against the formation of terraces and / or beads, said method comprising forming a glassy carbon layer (30) on said surface in the gas phase at a pressure of 80 kPa (800 mbar) or more.

2. 10. The stabilization method of claim 1, wherein the semiconductor material is silicon carbide.

3. 3. The stabilization method according to claim 1, wherein said formation of said carbon layer is carried out at a carbon layer formation temperature comprised between 1000°C and 1200°C.

4. The stabilization method of claim 3, further comprising thickening the carbon layer (30) at a temperature higher than the carbon layer formation temperature (T1).

5. Stabilization method according to any one of claims 1 to 4, wherein the carbon layer (30) has a thickness comprised between 5 nm and 500 nm, preferably between 50 nm and 150 nm.

6. 6. The stabilization method according to claim 1, wherein the carbon layer is deposited in a gas flow comprising a carbon-containing gas and a carrier gas, the carrier gas being preferably argon or a mixture of argon and hydrogen.

7. 6. The stabilization method of claim 1, wherein the carbon layer is deposited by evaporating a carbon-containing gas from a solid carbon source.

8. The stabilization method according to any one of claims 1 to 7, wherein the carbon layer (30) is formed in a substrate annealing furnace (70).

9. 9. The stabilization method of claim 8, wherein the annealing furnace (70) includes an inner wall (75) and a support member configured to hold at least one substrate (10), and the inner wall (75), the support, and the gas within the annealing furnace (70) are at the same temperature.

10. 10. The stabilization method of claim 8 or 9, wherein the annealing furnace (70) accommodates a plurality of substrates including a surface of the semiconductor material, the substrates being stacked vertically with a vertical space provided between two adjacent substrates, and a carbon layer (30) being formed on the surface of the semiconductor material of each of the substrates.

11. The stabilization method of any one of claims 1 to 8, wherein the carbon layer (30) is formed in a chemical vapor deposition chamber.

12. 12. A method for treating a substrate having a free surface of semiconductor material, in particular monocrystalline semiconductor material, comprising a method for stabilizing the surface according to any one of claims 1 to 11 and a thermal treatment of the substrate after stabilizing the surface.

13. 13. The method of claim 12, wherein at least a portion of the heat treatment is performed at a temperature above 1700°C.

14. The processing method of any one of claims 12 to 13 in combination with claim 6, wherein the deposition and the heat treatment of the carbon layer (30) are performed in the same substrate annealing furnace.

15. 15. The method of claim 14, wherein the heat treatment comprises successively a first stage carried out at a temperature comprised between 1000 and 1200°C, including the formation of the carbon layer (30), and at least a second stage carried out at a temperature above 1200°C, preferably above 1700°C, the glassy carbon layer (30) formed during the first stage limiting the rearrangement of the surface into semiconductor material in the form of terraces.

16. 16. The method of any one of claims 14 to 15, further comprising the step of removing the carbon layer (30) after the heat treatment by reactive ion etching or plasma etching.

17. 17. The method of claim 16, further comprising injecting oxygen into the furnace to generate a reactive plasma during the step of removing the carbon layer (30).

18. 18. The method of any one of claims 12 to 17, further comprising a chemical mechanical polishing step designed to remove said carbon layer (30).

19. A method for manufacturing a semiconductor structure, comprising at least the following steps: forming a weakened region (21) by implanting ionic species into a donor substrate (220) made of a semiconductor material, in particular a monocrystalline semiconductor material; bonding the donor substrate (220) to a support substrate (11); peeling the donor substrate (220) along the weakened regions (21) to transfer a layer (20) of semiconductor material onto the support substrate (11); 16. A process according to any one of claims 11 to 15 for repairing defects caused in said layer (20) of semiconductor material during implantation of ionic species, wherein said carbon layer (30) is formed on said free surface (200) of said layer (20) of semiconductor material transferred to said support substrate; A method of manufacturing a semiconductor structure, comprising:

20. The method of claim 19, wherein the donor substrate (220) is silicon carbide.

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