Plasma-assisted damage engineering during ion implantation.

Abstract

A method for processing a semiconductor substrate, the method including exposing a substrate surface of the semiconductor substrate to plasma cleaning and exposing the substrate surface to a hydrogen treatment from a plasma source in a beam-line ion implanter. The method may further include exposing the substrate to an implantation process in the beam-line ion implanter after forming hydrogen passivation. The substrate is maintained under vacuum throughout the plasma cleaning, hydrogen treatment, and implantation process.

Description

[Technical Field]

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of priority to U.S. Patent Application No. 17 / 908,905, filed November 4, 2022. The contents of the prior application are incorporated herein by reference in their entirety.

[0002]

[0002] The present embodiments relate to implant damage engineering in semiconductor substrates, and more particularly to plasma-assisted processing in beam-line ion implantation. [Background technology]

[0003]

[0003] As the dimensions of semiconductor devices, such as logic and memory devices, decrease, the use of conventional processes and materials for fabricating semiconductor devices becomes increasingly problematic. For example, known ion implantation processes can cause excessive damage that poses problems for fabricating transistors formed with three-dimensional structures (e.g., horizontal gate all around structures (HGAA) in which the active region is formed using so-called nanowires). For dopant ion implantation, achieving very high dopant activity and shallow junction depths while minimizing implantation damage are all useful. Similarly, for preamorphization implantation (PAI), minimizing residual substrate damage after recrystallization of the amorphous layer can be beneficial.

[0004]

[0004] It is with respect to these considerations and others that this disclosure is presented. Summary of the Invention

[0005] This Summary is provided to introduce in a simplified form a selection of concepts that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended as an aid in determining the scope of the claimed subject matter.

[0006] In one embodiment, a method for processing a semiconductor substrate includes exposing a substrate surface of the semiconductor substrate to a plasma cleaning and exposing the substrate surface to a hydrogen treatment from a plasma source in a beam-line ion implanter. The method may further include, after the hydrogen treatment, exposing the substrate to an implantation process in the beam-line ion implanter. The substrate may be maintained under vacuum during the plasma cleaning, hydrogen treatment, and implantation process.

[0007] In another embodiment, a method for doping a substrate is provided. The method may include providing a single-crystal semiconductor material on a surface of the substrate, exposing the substrate surface to a hydrogen treatment from a plasma source of a beam-line ion implanter, and, after the hydrogen treatment, exposing the substrate to an implantation process in the beam-line ion implanter. In this manner, the implantation process may introduce dopant species into the substrate. The substrate is maintained under vacuum throughout the process, covering the hydrogen treatment and the implantation process.

[0008] In a further embodiment, a beamline ion implantation system is provided that may include an ion source that generates an ion beam, a beamline that directs the ion beam to an end station, a substrate platen that supports the substrate while in the end station, and a plasma source communicatively coupled to the end station and positioned to direct hydrogen species to the substrate. [Brief explanation of the drawings]

[0009] [Figure 1A-C] 1 illustrates exemplary operations involved in processing a substrate according to an embodiment of the present disclosure. [Figure 2A-D] 4 illustrates exemplary operations involved in processing a substrate according to a further embodiment of the present disclosure. [Figure 3A-B] 10 illustrates experimental results showing the effect on dopant profiles and residual damage on semiconductor substrates caused by processing of the substrates, according to the present embodiments. [Figure 3C] 1 shows an experimental electron microscopy analysis illustrating the effect of treating a substrate according to the present embodiments on solid phase epitaxial regrowth within the substrate. [Figure 4] 1 illustrates an exemplary ion implanter according to some embodiments of the present disclosure. [Figure 5] 10 shows a histogram graph illustrating a comparison of residual substrate damage after ion implantation for multiple substrates implanted with the same total ion dose under various process cycle conditions. [Figure 6] 1 illustrates an exemplary process flow. DETAILED DESCRIPTION OF THE INVENTION

[0010]

[0016] The present embodiments will now be described more fully with reference to the accompanying drawings, which show several embodiments. The subject matter of this disclosure may be embodied in a variety of different forms and should not be construed as limited to the embodiments set forth herein. These embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the subject matter to those skilled in the art. Like numbers refer to like elements throughout the drawings.

[0011]

[0017] In the present embodiment, the inventors have recognized a novel approach to facilitate improved defect control and reduce post-implant defects in implanted semiconductor substrates, such as single-crystal semiconductor materials. In various non-limiting embodiments, suitable semiconductor structures include silicon, silicon-germanium alloy (SiGe), or silicon-phosphorus alloy. The approach detailed below is generally referred to as plasma-assisted damage engineering, in which a plasma process is performed in conjunction with ion implantation.

[0012]

[0018] 1A-C illustrate exemplary operations related to processing a substrate, according to embodiments of the present disclosure. With particular reference to FIG. 1A, a first example is shown in which a semiconductor substrate 100 is provided within an ion implanter 102 or system. The ion implanter 102 may represent a beamline ion implanter in some non-limiting embodiments, or may represent other equipment suitable for performing ion implantation. The ion implanter 102 may include one or more chambers or locations that house the semiconductor substrate 100 during various processes being performed.

[0013]

[0019] It will be appreciated that high vacuum conditions are maintained while the semiconductor substrate 100 is disposed within the ion implanter 102. For example, during ion implantation of the semiconductor substrate 100, a vacuum level of less than 10 torr may be maintained within the end station housing the semiconductor substrate 100. During other processing operations, such as plasma-based operations, a vacuum level of less than 10 torr may be maintained, while during idle periods, a vacuum level of less than 10 torr may be maintained according to non-limiting embodiments of the present disclosure. Additionally, exposure to ambient gas species outside the ion implanter 102 may be prevented during the operations illustrated in FIGS. 1A-C. In FIG. 1A, the semiconductor substrate 100 may represent a single crystal semiconductor substrate, such as silicon, silicon-germanium alloy (SiGe), silicon-phosphorus alloy, or other based semiconductor.

[0014]

[0020] It should be noted that during processing of a single-crystal semiconductor substrate, an oxide layer may be present or formed on the outer surface of the single-crystal semiconductor substrate. At the stage depicted in FIG. 1A , the semiconductor substrate 100 may be placed in an ion implanter 102 after undergoing processing through multiple operations to synthesize a device (e.g., a logic device, a memory device, or other device that undergoes implantation processing for doping purposes). In the depicted example, the semiconductor substrate 100 includes a substrate base 104 formed from a single-crystal semiconductor material. In some embodiments, the semiconductor substrate 100 may further include a native oxide layer 106 disposed on an outer surface (e.g., a first major surface) of the semiconductor substrate 100 defined by a substrate surface 105. As depicted in FIG. 1A , the substrate base 104 and native oxide layer 106 may represent any suitable portion of a semiconductor substrate, including patterned regions of semiconductor devices such as source / drain regions, according to various embodiments of the present disclosure. The native oxide layer 106 may represent a layer formed after processing to remove any other material from the surface of the substrate base 104. The formation of native oxides on silicon and similar semiconductors is well known and will not be discussed in detail herein. However, even if single crystal silicon is processed to remove any oxides or non-silicon materials from its exterior surface, native oxides may still form when exposed to an oxygen-containing atmosphere (including water vapor) (e.g., the ambient air of a vacuum processing tool). Furthermore, the thickness of the native oxide tends to be self-limiting, and in some non-limiting embodiments, the thickness of the native oxide layer 106 may be estimated to be no more than 4 nm to 8 nm.

[0015]

[0021] 1B, an operation is shown in which a substrate surface 105 of a semiconductor substrate 100 is exposed to a hydrogen treatment operation (also referred to as hydrogen processing). Initially, the substrate surface 105 may be covered with up to a few nanometers of native oxide, as represented by native oxide layer 106. In some embodiments, the hydrogen treatment operation may utilize a plasma source 110 located within the ion implanter 102. The plasma source 110 may represent any suitable device for generating a plasma. In some implementations, it may represent a radical source. In either case, the plasma source 110 may generate hydrogen species 112, which may represent a combination of ions and neutrals or energetic neutrals, including radicals.

[0016]

[0022] For hydrogen species 112 comprising ions or high-energy neutrons, the energy of the ions and neutrons during hydrogen processing may be maintained below 100 eV (e.g., in the range of a few eV to 50 eV) in some non-limiting embodiments. At this relatively low energy, the hydrogen species 112 can selectively etch the native oxide layer 106 relative to the substrate base 104. Thus, due to not only the low energy of the hydrogen species 112 but also the low mass of the hydrogen species 112, the native oxide layer 106 may be removed from the substrate base 104 with little or no etching of or damage to the substrate base 104.

[0017]

[0023] In certain embodiments, hydrogen processing may include generating hydrogen species 112 in a plasma chamber of the plasma source 110 and directing the hydrogen species 112 to the substrate surface 105 while the substrate is at a processing temperature below 100° C. (e.g., between room temperature and 100° C.). The hydrogen species may be generated, for example, by supplying H gas to the plasma chamber. Thus, the substrate surface 105 may represent a “clean” semiconductor surface that provides silicon species to the environment within the ion implanter 102, with minimal or no foreign species, such as oxygen or carbon, present on the substrate surface 105. Furthermore, after native oxide removal, the substrate surface 105 may be terminated with hydrogen species, with hydrogen bonded to the semiconductor substrate 100, which is shown as a hydrogen passivation layer or hydrogen passivation 116. As used herein, the term hydrogen passivation may refer to hydrogen species that stabilize the silicon material of the silicon surface from chemical reaction through the formation of hydrogen-silicon bonds.

[0018]

[0024] 1C , a subsequent example is shown in which the semiconductor substrate 100 is exposed to an implantation process on the substrate surface 105 after the formation of the hydrogen passivation 116. According to various embodiments of the present disclosure, the semiconductor substrate 100 is maintained under vacuum throughout the hydrogen treatment and implantation processes. Note that the ion species 118 provided for implantation may be provided as an ion beam, for example, in a beamline ion implanter. In some examples, the ion species 118 may be provided as an analyzed ion beam. In various embodiments, the ion species 118 may be a dopant element (e.g., boron, phosphorus, arsenic) that is implanted into the semiconductor substrate 100 to dope the substrate.

[0019]

[0025] 1C may be a pre-amorphization implant that produces an amorphous layer that extends below the substrate surface 105. In some embodiments, the implantation process of FIG. 1C may be a pre-amorphization implant in which ionic species 118 may be used to produce an amorphous layer in the substrate 100. Thus, the ionic species 118 need not be a dopant species, but may include species such as, for example, inert gas ions, or other non-dopant ions.

[0020]

[0026] In certain embodiments in which ion species 118 are used for a pre-amorphization implant, a further ion implantation process may introduce dopants into the substrate 100, for example, following that process of FIG. 1C. Thus, the dopant implant may implant species into the semiconductor substrate 100 while an amorphous layer is present. The amorphous layer may therefore act to prevent excessive channeling of dopant ions during implantation, potentially resulting in a more desirable dopant profile after a subsequent activation annealing procedure is performed.

[0021]

[0027] 1C , the implantation of the ionic species 118 results in the formation of an altered layer 120 in the substrate 100. The altered layer 120 may therefore represent a drain region of the substrate 100, an amorphized region of the substrate 100, or other altered region. In accordance with embodiments of the present disclosure, the characteristics of the altered layer 120, and the regions in the semiconductor substrate 100 subsequently formed from the altered layer 120, are determined at least in part by the hydrogen treatment shown in FIG.

[0022]

[0028] It should be noted that the ion dose and ion energy of the ion species 118 may be selected at an appropriate dose and ion energy depending on the type of implant being performed and the characteristics of the target substrate. For example, for some dopant applications, such as boron or phosphorus implants, the ion energy ranges from 500 eV to 7 keV. For pre-amorphization implants, the ion dose and ion energy are selected to produce an amorphous layer of a desired thickness, and may be less than 10 keV in some applications.

[0023]

[0029] 2A-D illustrate exemplary operations related to processing a substrate, according to embodiments of the present disclosure. With particular reference to FIG. 2A, the case may be similar to the stage illustrated in FIG. 1A, where, as previously described, like elements are labeled the same. With reference to FIG. 2B, a subsequent case is illustrated in which a substrate surface 105 of a semiconductor substrate 100 is exposed to a plasma cleaning operation. Initially, the substrate surface 105 may be covered with the native oxide layer 106 described above. In some embodiments, the plasma cleaning operation may utilize a plasma source 114 located within the ion implanter 102. The plasma source 114 may represent any suitable device for generating a plasma. In some cases, it may represent a radical source. In either case, the plasma source 114 may generate cleaning species 108, which may represent a combination of ions and neutrals, including radicals.

[0024]

[0030] For cleaning species 108, including ions during plasma cleaning operations, the energy of the ions may be maintained below 100 eV (e.g., in the range of a few eV to 30 eV) in some non-limiting embodiments. In some embodiments, the cleaning species 108 may represent known reactive species that tend to chemically react to etch the native oxide layer 106, even if the energy of such reactive species is on the order of a few eV. In various embodiments, the cleaning species 108 may selectively etch the native oxide layer 106 relative to the substrate base 104. Thus, due to the low energy of the cleaning species 108, the plasma source 114 may function as a plasma etching source to remove the native oxide layer 106 from the substrate base 104 with little or no etching of or little or no damage to the substrate base 104.

[0025]

[0031] According to some embodiments, the plasma cleaning operation of FIG. 2B can be achieved by generating hydrogen species in the plasma chamber of the plasma source 110 and directing the hydrogen species to the substrate surface 105 when the substrate is at a cleaning temperature between room temperature and 100° C. The hydrogen species can be generated, for example, by supplying H gas to the plasma chamber. Thus, the substrate surface 105 may represent a “clean” semiconductor surface, providing silicon species to the environment within the ion implanter 102, with minimal or no foreign species, such as oxygen or carbon, present on the substrate surface 105. An advantage of using non-hydrogen species to perform the plasma cleaning operation of FIG. 2B is that the non-hydrogen species can be selected to provide faster removal of the native oxide layer 106. For example, according to some non-limiting embodiments, a highly selective and isotropic plasma cleaning using a mixture of NF3 / NH3 can be performed as the plasma cleaning to remove the oxide layer, or alternatively, ion sputtering cleaning can be used as the plasma cleaning.

[0026]

[0032] 2C, an operation is shown in which the substrate surface 105 of the semiconductor substrate 100 is exposed to a hydrogen treatment operation (also referred to as hydrogen processing). Similar to the embodiment of FIG. 1B, the hydrogen treatment operation may utilize a plasma source 110 located within the ion implanter 102 to generate hydrogen species 112. The species may represent a combination of ions and neutral particles or energetic neutral particles, including radicals.

[0027]

[0033] It should be noted that in various embodiments, the hydrogen treatment of FIG. 2C may utilize different plasma chemistries than the plasma cleaning operation of FIG. 2B and may optionally be performed using a different plasma source (plasma source 110) than the plasma source 114 used to perform the plasma cleaning operation. Furthermore, because the operation of FIG. 2C follows the plasma cleaning operation of FIG. 2B, most or all of the native oxide layer 106 may be absent at the time of the hydrogen treatment operation. In either case, the plasma source 110 may generate hydrogen species 112, which may represent a combination of ions and neutrals or energetic neutrals, including radicals. Thus, as in the embodiment of FIG. 2B, the substrate surface 105 may be terminated by the hydrogen species 112, with the hydrogen bonded to the semiconductor substrate 100, which is shown as a hydrogen passivation layer or hydrogen passivation 116.

[0028]

[0034] 2D, there is shown a subsequent example in which the semiconductor substrate 100 is exposed to an implantation process on the substrate surface 105 after the formation of the hydrogen passivation 116. This procedure may be generally the same as the procedure of FIG. 1C and will not be further described herein.

[0029]

[0035] To illustrate the advantages provided by this embodiment, Figure 3A shows a comparison of the dopant profiles of a sample implanted according to this embodiment and a sample implanted according to known procedures. Curve 302 shows a dopant profile of 1E15 / cm 23A represents the dopant profile of a silicon substrate sample exposed to a 2 keV phosphorus implant at a dose of 0 nm without post-implant annealing. Prior to ion implantation, the sample corresponding to curve 302 was further treated with a plasma cleaning operation to remove native oxide and a hydrogen treatment to generate hydrogen passivation on the substrate surface, as generally described above. Curve 304 represents the dopant profile of a silicon substrate exposed to the same phosphorus ion implantation as the sample of curve 302 (except that in the case of curve 304, no hydrogen treatment was performed prior to ion implantation). The graph of FIG. 3A plots phosphorus concentration as a function of depth. Curve 302 differs from curve 304 in at least two ways. In one aspect, the dopant concentration within a few nanometers of the surface (=0 nm depth) is higher in curve 302. In another aspect, the junction depth of curve 302 is several nanometers shallower than the junction depth of curve 304.

[0030]

[0036] As shown by the insert in FIG. 3A, this result is counterintuitive in that the sample of curve 304 naturally includes a native oxide layer or a chemical oxide layer (a layer that is regrown in the environment after the semiconductor surface is cleaned) on the outer surface of the silicon substrate. Furthermore, the thickness of this native oxide layer is estimated to be on the order of at least 1 nm. Therefore, the phosphorus ions of the implant performed on the sample of curve 304 must penetrate the oxide layer before entering the silicon substrate. Note that the hydrogen passivation 116 may essentially comprise a submonolayer to monolayer of hydrogen on the substrate surface, and the low mass and amount of hydrogen on the surface results in negligible attenuation of the implanted phosphorus ions. In various non-limiting embodiments, the hydrogen passivation 116 may cover 50% to 100% of the silicon outer surface, and in certain embodiments, the hydrogen may cover 50% to 75% of the silicon outer surface.

[0031]

[0037] In light of this fact, it is expected that the junction depth of the sample of curve 304 should be shallower than that of the sample of curve 302, perhaps by more than 1 nm, which is the exact opposite of the observed results. Thus, the plasma cleaning and hydrogen treatment of the present embodiment results in an unexpected and significant reduction in the post-implant junction depth compared to substrates implanted using known procedures.

[0032]

[0038] Referring now to FIG. 3B, a microscopic comparison of the structure of a sample implanted according to the present embodiment and a sample implanted according to known procedures is shown. The image on the left represents a cross-sectional transmission electron microscope image of a silicon substrate subjected to ion implantation after a plasma cleaning operation to remove native oxide and a hydrogen treatment to generate hydrogen passivation on the substrate surface, as generally described above. The image on the right represents a cross-sectional transmission electron microscope image of a silicon substrate subjected to ion implantation without any plasma cleaning or hydrogen treatment prior to ion implantation. In both cases, a post-implantation anneal at a temperature of 900°C was performed on the recrystallized region of each silicon substrate damaged by the implantation procedure. As is evident in the image on the left, there is no visible lattice damage after implantation and annealing. The image on the right shows the first 20 nm or so below the outer surface of the silicon substrate. Therefore, the use of in situ plasma cleaning (meaning plasma cleaning within the beamline ion implanter) and in situ hydrogen treatment prior to ion implantation can be effective in reducing or eliminating residual damage caused by ion implantation, which may otherwise be irreversible even after the post-implantation annealing procedure.

[0033]

[0039] 3C shows experimental electron microscopy analysis demonstrating the effect of substrate treatment according to the present invention on solid phase epitaxial regrowth (SPER) within the substrate. The substrate of interest in both the left and right images is a single-crystalline silicon substrate on which a layer stack consisting of a low Ge concentration crystalline SiGe buffer layer and a high Ge concentration (~50%) crystalline layer has been grown.

[0034]

[0040] The image on the left is 6E14 / cm 2 After implanting 3 keV Ge ions at a dose of 1 keV and 5E15 / cm 2 1 is a cross-sectional view of the substrate described above, implanted with B ions at a dose of 0.01 μm. Furthermore, after implantation, a solid phase epitaxial anneal was performed at 600°C for 15 seconds. As can be seen, various regions or layers are present in the illustrated substrate. Region D represents a bulk monocrystalline silicon region, region C represents a SiGe buffer layer, region B represents a damaged SiGe layer, while region A represents an amorphous SiGe layer. While the initially amorphized layer has regrown, certain residual damage remains, including an amorphous SiGe layer in region A having a thickness of approximately 5 nm, and a damaged but crystalline SiGe layer in region B.

[0035]

[0041] The image on the right is 6E14 / cm 2 After implanting 3 keV Ge ions at a dose of 1 keV and 5E15 / cm 2 Figure 1 shows a cross-sectional view of a substrate similar to the one on the left, implanted with B ions at a dose of 0.01 μm. The implant was followed by the same solid phase epitaxial annealing at 600°C for 15 seconds. In this case, an in-situ plasma clean and hydrogen treatment to form hydrogen passivation were performed before the implant, in accordance with the present embodiment. The initially amorphized layer also regrown, resulting in less residual damage. In this case, the amorphous layer in region A is only about 2 nm thick, while the crystalline SiGe layer in region B, which is on top of the buffer layer (region C), shows almost no damage. From these results, it can be estimated that for the illustrated silicon / SiGe system, applying an in-situ plasma clean and hydrogen treatment to a semiconductor substrate exposed to an amorphization implant can improve the SPER by approximately 2.5 times compared to a semiconductor substrate exposed to the same amorphization implant without the in-situ plasma clean and hydrogen treatment. Other silicon, SiGe, or Si / SiGe systems can also produce similar improvements in SPER using the in situ plasma cleaning and hydrogen treatment of this embodiment.

[0036]

[0042] Thus, the use of in situ plasma cleaning (meaning plasma cleaning within the beamline ion implanter) and hydrogen treatment prior to ion implantation can be effective in improving the amorphized / crystalline interface for amorphization implantation, which can enable enhanced recrystallization rates at relatively low temperatures (<650°C).

[0037]

[0043] Referring to FIG. 4, a block diagram of an exemplary ion implantation system architecture, designated ion implanter 400, is shown in accordance with an embodiment of the present disclosure. The ion implanter 400 includes an ion source 402 that generates an ion beam 418 for implanting ion species 118, as described above. The ion implanter 400 may include various components for accelerating, decelerating, shaping, and filtering the ion beam, as known in the art. These components are designated as a beam line 404. Downstream of the beam line 404 is an end station 406 for receiving the substrate 100 during ion implantation. The ion implanter 400 may include a plasma cleaning chamber 408 as well as a hydrogen treatment chamber 410. These chambers may be a single chamber or separate chambers communicatively coupled to the end station 406. This allows the semiconductor substrate 100 to be transferred between different chambers while being maintained in a vacuum environment for processing, as generally illustrated in FIGS. 1A-1C. In other embodiments, one or more of plasma source 110 and plasma source 114 may be included within end station 406. In any of these configurations of plasma chamber and ion source, semiconductor substrate 100 may be maintained under vacuum conditions during operations such as plasma cleaning, hydrogen treatment, and ion implantation. Because semiconductor substrate 100 is maintained under vacuum conditions during the period from plasma cleaning to ion implantation, semiconductor substrate 100 may not experience the formation of native oxides, carbon contamination, or other surface contamination, at least during the period of ion implantation.

[0038]

[0044] Without being limited to any particular theory, the improved defect engineering achieved in accordance with the present embodiments (reduced residual substrate damage, better control of junction depth after dopant implantation, and other effects) may result in part from preserving a semiconductor surface with little or no native oxide located thereon. During the ion implantation process, many silicon interstitials are created in the bulk of the semiconductor substrate being implanted. These silicon interstitials migrate within the semiconductor substrate, even at room temperature. If native oxide is present, the interstitials can reflect back into the bulk of the semiconductor substrate, causing defects and passivation, resulting in a large number of remaining interstitials after implantation is complete. The multi-process substrate processing disclosed herein addresses this issue as follows: Plasma cleaning within the ion implanter removes native oxide from the surface of the semiconductor substrate, while maintaining the semiconductor substrate under high vacuum conditions tends to keep the semiconductor surface free of native oxide until dopant deposition is performed. This native oxide-free surface may expose a rich layer of silicon dangling bonds, at least some of which may be terminated with hydrogen after hydrogen treatment. This condition allows silicon interstitials to terminate at the surface. In other words, the annihilation rate of interstitials at the surface may be increased, which may reduce defects, enhance dopant activation, reduce interstitial-enhanced diffusion of dopant species after implantation, and improve recrystallization after amorphization implantation.

[0039]

[0045] Specifically, these results are possible because the entire process sequence, including plasma cleaning, hydrogen treatment, and ion implantation, was completed in an integrated beamline architecture that maintained the substrate under a common vacuum. In this regard, hydrogen treatment, performed after plasma cleaning to remove the oxide layer, resulted in hydrogen passivation of, say, 50% to 100% of the outer silicon surface, preventing or retarding reactions with any ambient species, such as organics, HO, or oxygen, thereby retarding the (re)formation of an oxide layer on the silicon surface. Furthermore, by maintaining the substrate under vacuum after hydrogen passivation formation, the flux of unwanted species, such as oxygen and HO, is significantly reduced compared to, for example, exposing the substrate to ambient conditions at 1 atmosphere. Therefore, the preservation of the hydrogen passivation is significantly improved, and oxide layer regrowth is significantly suppressed.

[0040]

[0046] According to various embodiments, the operations of Figures 1B-1C and 2B-2D can be periodically repeated to achieve a target implant dose in the substrate. In certain embodiments, the hydrogen treatment and implant process of Figures 1B and 1C are each performed as an implant cycle, and the implant cycle is repeated one or more times to implant the target implant dose level into the substrate. In further embodiments, the plasma cleaning operation, hydrogen treatment, and implant process of Figures 2B, 2C, and 2D are each performed as a separate implant cycle, and the separate implant cycle is repeated one or more times to implant the target implant dose level into the substrate.

[0041]

[0047] The inventors have discovered that for a given total implant dose of ions implanted into a substrate, residual damage can be reduced by performing multiple cycles, where each cycle involves a hydrogen treatment followed by an ion implant, and where each cycle exposes the substrate to a fraction of the total implant dose. Figure 5 shows the results for the same total ion dose (in this case 5e14 / cm). 2Figure 1 shows a histogram graph illustrating a comparison of residual substrate damage after ion implantation for substrates implanted with (B implant). The various bars (trial numbers) on the histogram graph represent different numbers of cycles performed to achieve a total ion dose and different durations of hydrogen treatment. The vertical axis shows the relative intensity of the thermal wave (TW) measurements for the various samples, with higher values ​​indicating greater substrate damage.

[0042]

[0048] The bar for Trial No. 1 shows the measured substrate damage after one 8 minute hydrogen treatment followed by one ion implantation step, which is 5e14 / cm after just one cycle including one ion implantation step. 2 This means that a total ion dose of B is implanted. The bar for Trial No. 2 shows the measured substrate damage after one 40 minute hydrogen treatment followed by one ion implantation procedure. In this example, one cycle is performed, but the hydrogen treatment time is much longer. As can be seen, the residual damage in the sample treated with 40 minutes of hydrogen is slightly less than the damage in the sample treated with 8 minutes of hydrogen. In other words, 5e14 / cm 2 When a one-cycle procedure (one ion implantation exposure) is used to implant the total ion dose of B, a 40-minute hydrogen treatment appears to be sufficient to cause the least residual damage.

[0043]

[0049] In the other trials in the series (trials 3-5), 5e14 / cm 2 Multiple cycles were performed to implant a total ion dose of B, and the total time of hydrogen treatment across all cycles was kept constant at 40 minutes. For trial number 3, a total of four cycles were performed, with each cycle delivering 1.25e14 / cm after 10 minutes of hydrogen treatment. 2A B dose of 1.25e14 / cm2 was implanted in each cycle after 8 minutes of hydrogen treatment. For trial number 4, a total of 5 cycles were performed, with a B dose of 1.25e14 / cm2 implanted in each cycle after 8 minutes of hydrogen treatment. For trial number 5, a total of 6 cycles were performed, with a B dose of 1.25e14 / cm2 implanted in each cycle after 8 minutes of hydrogen treatment. For trial number 6, a total of 6 cycles were performed, with a B dose of 8.33e13 / cm2 implanted in each cycle after 6 minutes and 40 seconds of hydrogen treatment. 2 A B dose was implanted. In this trial, the TW value did not decrease from 3985, indicating approximately the same damage level as in Trial No. 4, which used five cycles. Accordingly, in this embodiment of the ion implantation procedure, multiple cycles may be utilized to implant a target dose into a substrate. Here, the partial implant dose and hydrogen treatment duration of a given cycle may be adjusted to minimize residual substrate damage after implantation. In this regard, referring again to FIG. 4 , an ion implanter 400 may include a controller 420 coupled to at least the plasma source 110 and other components, such as the beamline 404 and end station 406. Thus, the controller 420 may direct multiple implantation cycles. Each implantation cycle alternates between exposing the substrate to hydrogen species from the plasma source 110 and exposing the substrate to the ion beam 418.

[0044]

[0050] 6 illustrates an exemplary process flow 600 according to an embodiment of the present disclosure. In block 602, a semiconductor substrate is provided in an ion implanter, the semiconductor substrate including a single-crystal semiconductor material on a first surface (meaning an outer surface of the semiconductor substrate).

[0045]

[0051] At block 604, the semiconductor substrate is exposed to a plasma cleaning process while positioned within the ion implanter to remove native oxide from the substrate surface. In some embodiments, the plasma cleaning operation may utilize a plasma source located within the ion implanter. The plasma source may represent any suitable device for generating plasma. In some cases, it may represent a radical source. In either case, the plasma source may generate cleaning species, which may represent a combination of ions and neutrals, including radicals.

[0046]

[0052] In block 606, the semiconductor substrate is exposed to a hydrogen treatment from a plasma source disposed within the ion implanter. Thus, hydrogen passivation may be formed on the substrate surface. In various embodiments, the hydrogen treatment may be performed by inducing hydrogen species into the substrate at a temperature less than 100° C. (e.g., between room temperature and 100° C.). The hydrogen species may be generated, for example, by supplying H gas to the plasma chamber. Thus, the substrate surface may represent a “clean” semiconductor surface that brings silicon species into the environment within the ion implanter, with minimal or no foreign species, such as oxygen or carbon, present on the substrate surface. Furthermore, after the native oxide is removed, the hydrogen species may terminate the substrate surface with hydrogen bonded to the semiconductor substrate, forming hydrogen passivation.

[0047]

[0053] After the hydrogen passivation is formed, the substrate is exposed to an implantation process at block 608. According to various embodiments, the implantation process may be a dopant implantation process, a pre-amorphization implantation process, or other process.

[0048]

[0054] In view of the above, the present disclosure provides at least the following advantages. First, implant-induced substrate defects, such as interstitial damage, are reduced compared to known implantation procedures that do not employ in-situ hydrogen treatment or plasma cleaning of the substrate prior to beamline ion implantation. This damage reduction can manifest as a shallower implant profile of the implanted dopant and / or a higher dopant concentration at the surface. Another advantage of the present embodiments is that this damage reduction can be maintained even after post-implant annealing, as evidenced by a defect-free lattice after recrystallization. Specifically, embodiments of the present disclosure can improve solid-phase epitaxial regrowth that occurs as a result of post-implant annealing by employing in-situ plasma cleaning and hydrogen treatment.

[0049]

[0055] The present disclosure should not be limited in scope by the specific embodiments described herein. Indeed, various other embodiments of the present disclosure and modifications thereof, in addition to the embodiments described herein, will be apparent to those skilled in the art from the foregoing description and the accompanying drawings. Accordingly, such other embodiments and modifications are intended to be included within the scope of the present disclosure. Furthermore, although the present disclosure is described herein in the context of particular implementations in particular environments for particular purposes, those skilled in the art will recognize that the usefulness of the present embodiments is not limited to such contexts, and that the present embodiments may be beneficially implemented in any number of environments for any number of purposes. Therefore, the claims set forth below should be construed in light of the full scope and nature of the present disclosure as described herein.

Claims

1. 1. A method for processing a semiconductor substrate, comprising: exposing a substrate surface of the semiconductor substrate to plasma cleaning; exposing the substrate surface to a hydrogen treatment from a plasma source; exposing the semiconductor substrate to an implantation process after the hydrogen treatment; Including, The method wherein the semiconductor substrate is maintained under vacuum during the plasma cleaning, hydrogen treatment, and implantation processes.

2. 10. The method of claim 1, wherein the implantation process includes introducing a dopant element into the semiconductor substrate.

3. the implantation process includes an amorphization implant that creates an amorphous layer in the semiconductor substrate, and the method comprises:

3. The method of claim 2, further comprising annealing the semiconductor substrate at a temperature of 650° C. or less, whereby solid phase epitaxial regrowth of the amorphous layer occurs.

4. 10. The method of claim 1, wherein the implantation process comprises a pre-amorphization implant, the method further comprising performing a dopant implantation process after the pre-amorphization implant to introduce dopants into the semiconductor substrate.

5. The method of claim 1 , wherein the substrate surface includes a native oxide prior to the plasma cleaning, and the native oxide is removed after the plasma cleaning.

6. The plasma cleaning removing the native oxide by plasma etching; exposing the substrate surface to the hydrogen treatment after the native oxide is removed; The method of claim 5 , comprising:

7. The hydrogen treatment generating hydrogen species in a plasma chamber; directing the hydrogen species to the substrate surface when the semiconductor substrate is at a processing temperature of less than 100°C; 10. The method of claim 1, wherein the substrate surface is terminated with a hydrogen passivation after the plasma cleaning.

8. The method of claim 1 , wherein the plasma cleaning comprises cleaning species having an energy of 50 eV or less and the hydrogen treatment comprises hydrogen species having an energy of 50 eV or less.

9. 10. The method of claim 1, wherein the hydrogen treatment and the implantation process are performed as an implantation cycle, and the implantation cycle is repeated one or more times to implant a target implantation dose level into the semiconductor substrate.

10. 10. The method of claim 1, wherein the plasma cleaning, the hydrogen treatment, and the implant process are performed as an implant cycle, and the implant cycle is repeated one or more times to implant a target implant dose level into the semiconductor substrate.

11. 1. A method of doping a substrate, comprising: providing a single crystal semiconductor material on a substrate surface of the substrate; exposing the substrate surface to a hydrogen treatment from a plasma source of a beamline ion implanter; exposing the substrate to an implantation process in the beam-line ion implanter after the hydrogen treatment; wherein the implantation process introduces dopant species into the substrate; The method wherein the substrate is maintained under vacuum during the process, including the hydrogen treatment and the implantation process.

12. 12. The method of claim 11, wherein the implantation process comprises a pre-amorphization implant, the method further comprising performing a dopant implantation process after the pre-amorphization implant to introduce dopants into the substrate.

13. The method of claim 11 , wherein the substrate surface comprises a native oxide prior to the hydrogen treatment, and the native oxide is removed after the hydrogen treatment.

14. The method of claim 13 , further comprising removing the native oxide by a plasma etching process from a plasma etching source prior to the hydrogen treatment.

15. 15. The method of claim 14, wherein the hydrogen treatment removes the native oxide and provides hydrogen passivation to the substrate surface after the plasma etching process.

16. The hydrogen treatment generating hydrogen species in a plasma chamber; directing the hydrogen species having an energy of 50 eV or less to the substrate surface when the substrate is at a processing temperature of less than 100° C.; The method of claim 11 , wherein the substrate surface is terminated with hydrogen passivation after the hydrogen treatment.

17. 12. The method of claim 11, wherein the hydrogen treatment and the implantation process are performed as an implantation cycle, and the implantation cycle is repeated one or more times to implant a target implantation dose level into the substrate.

18. 1. A beamline ion implantation system comprising: an ion source for generating an ion beam; a beamline that guides the ion beam to an end station; a substrate platen for supporting the substrate while in the end station; and a plasma source communicatively coupled to the end station and positioned to direct hydrogen species to the substrate; 1. A beamline ion implantation system comprising:

19. The beam-line ion implantation system of claim 18 , wherein the plasma source is located within the end station.

20. 20. The beamline ion implantation system of claim 18, further comprising a controller for directing a plurality of implantation cycles, the plurality of implantation cycles comprising alternating exposure of the substrate to the hydrogen species from the plasma source and exposure of the substrate to an ion beam.

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