Device manufacturing method, device, and deposition device

Abstract

The present invention relates to a method for manufacturing a device (10) including a non-twinned epitaxial layer (30) of one or more semiconductor materials deposited on a surface (22) of a single crystal sapphire substrate (20) in a deposition apparatus (40). The present invention also relates to a device (10) including a non-twinned epitaxial layer (30) of one or more semiconductor materials deposited on a surface (22) of a single crystal sapphire substrate (20). The present invention also relates to a deposition apparatus (40) for manufacturing the device (10), the deposition apparatus (40) comprising a reaction chamber (42) sealable from the ambient atmosphere (70) for disposing the single crystal sapphire substrate (20), a gas system (44) for providing an adjustable atmosphere to the reaction chamber (42), a heating means (50) for heating the substrate (20), and deposition means (60) for depositing the epitaxial layer (30) of one or more semiconductor materials on the surface (22) of the substrate (20).

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a device including a non-twinned epitaxial layer of one or more semiconductor materials deposited on the surface of a single crystal sapphire substrate in a vapor deposition apparatus. The present invention also relates to a device including a non-twinned epitaxial layer of one or more semiconductor materials deposited on the surface of a single crystal sapphire substrate. The present invention also relates to a vapor deposition apparatus for manufacturing the device, the vapor deposition apparatus comprising: a reaction chamber for placing the single crystal sapphire substrate, which is sealable from the surrounding atmosphere; a gas system for supplying an adjustable atmosphere to the reaction chamber; heating means for heating the substrate; and vapor deposition means for depositing an epitaxial layer of the one or more semiconductor materials on the surface of the substrate. [Background technology]

[0002] Devices containing epitaxial layers of one or more semiconductor materials deposited on a substrate form the foundation of modern electronics and computer technology. However, the quality of these epitaxial layers is highly dependent on the surface finish of the substrate used for epitaxial growth of the semiconductor layers. For example, the increasing miniaturization of electronic devices toward quantum components (e.g., qubits) requires that deposited epitaxial layers have an extremely low density of structural defects within them and at their interfaces with layers above and below, especially at their interface with the underlying substrate.

[0003] Sapphire (Al2O3) is a highly suitable material for use as a universal substrate in microelectronics and nanofabrication. However, because sapphire's chemical structure is a single crystal based on two elements, most commonly used semiconductor materials, such as silicon (Si), grow with two energetically equivalent crystallographic orientations on a given surface of a sapphire substrate, and these crystallographic orientations are arbitrarily selected. As a result, regions of these orientations form with uncontrollable sizes during epitaxial growth, and the boundaries of these regions act as defects, limiting the practical utility of the fabricated devices.

[0004] In summary, to improve the practicality of devices containing semiconductor layers deposited on single crystal sapphire substrates, it is advantageous to grow the so-called "untwinned" semiconductor epitaxial layers in only one of these energetically equivalent crystallographic orientations. Summary of the Invention [Problem to be solved by the invention]

[0005] In light of the above, it is an object of the present invention to provide an improved method for manufacturing a device including an epitaxial layer of one or more semiconductor materials deposited on a surface of a single crystal sapphire substrate in a deposition apparatus, a device manufactured by the method, and a deposition apparatus constructed by the method, which is capable of forming an epitaxial layer as a non-twinned epitaxial layer.

[0006] The object of the present invention is achieved by each independent claim. In particular, the object of the present invention is achieved by a method for manufacturing an apparatus according to claim 1, an apparatus according to claim 26, and a deposition apparatus for manufacturing an apparatus according to claim 27. The dependent claims describe preferred embodiments of the invention. Details and advantages explained for the method according to the first aspect of the present invention also apply, where technically meaningful, to the apparatus according to the second aspect of the present invention and to the deposition apparatus for manufacturing said apparatus according to the third aspect of the present invention, and vice versa. [Means for solving the problem]

[0007] According to a first aspect of the present invention, the object is achieved by a method for manufacturing a device comprising a non-twinned epitaxial layer of one or more semiconductor materials deposited on a surface of a single crystal sapphire substrate in a deposition apparatus, the method comprising: a) providing a sapphire substrate having a miscut angle selected in the range of 0.001° to 1° relative to the (0001) plane of single crystal sapphire; b) placing the sapphire substrate provided in step a) in a reaction chamber of the deposition device, then sealing the reaction chamber from the surrounding atmosphere, and supplying a preparation atmosphere into the reaction chamber; c) heating the sapphire substrate to provide the sapphire substrate with a preparation temperature selected in the range of 1400°C to 2000°C; d) heating the sapphire substrate to provide the sapphire substrate with a deposition temperature selected from the range of 300°C to 1400°C, which is different from the preparation temperature; e) depositing the epitaxial layer on the surface of the substrate in the reaction chamber, thereby further heating the substrate to continuously provide the deposition temperature; Includes.

[0008] The method according to the first aspect of the present invention enables the fabrication of a device including a non-twinned epitaxial layer of one or more semiconductor materials. The epitaxial layer is deposited on the surface of single-crystal sapphire in a deposition apparatus. The deposition apparatus according to the present invention is any device capable of evaporating and / or sublimating materials and then depositing them on the surface of the sapphire substrate. The evaporated and / or sublimated materials are appropriately selected to coat the respective epitaxial layers on the surface. In this sense, epitaxial layers consisting solely of evaporated and / or sublimated materials, as well as epitaxial layers containing evaporated and / or sublimated materials plus other material components (e.g., those provided by an appropriately selected reaction atmosphere), can be produced by carrying out the method according to the present invention.

[0009] As mentioned above, simply providing a single crystal sapphire substrate is insufficient to ensure the growth of a non-twinned epitaxial layer of one or more semiconductor materials. Therefore, the method according to the present invention comprises the following steps for preparing a surface of a sapphire substrate and then controlling the coating of said surface with an epitaxial layer of said one or more semiconductor materials:

[0010] In a first step a) of the method according to the invention, a positively selected miscut is formed in the sapphire substrate, the miscut having a miscut angle selected in the range of 0.001° to 1° relative to the (0001) plane of the single crystal sapphire.

[0011] When cutting a substrate from a bulk single crystal, the cutting plane may be oriented slightly away from the crystal plane. In this invention, the (0001) plane of the sapphire crystal is used as the reference plane. Depending on this so-called "miscut angle," the surface of the prepared substrate will have terraces, and the width and direction of the terraces are determined by the cutting direction and can therefore be controlled arbitrarily. In other words, the miscut angle is the angle at which the single crystal is cut from the bulk substrate. Depending on this miscut angle, the pre-prepared surface will have terrace widths and directions that depend on the cutting direction.

[0012] Not only the absolute value of the miscut but also its direction is important, because the direction in which the surface steps are oriented with respect to the periodic arrangement of the crystal they form defines a symmetry break that allows the selection of different, energetically equivalent in-plane surface reconstruction directions. In the method of the present invention, the crystallographic direction in the (0001) plane of single crystal sapphire is used to define the orientation of the miscut angle, because the (0001) plane best represents the hexagonal symmetry of the single crystal sapphire.

[0013] After preparing the sapphire substrate with a defined miscut angle, the next step b) of the method according to the invention is to place the sapphire substrate in a reaction chamber of a deposition apparatus. The reaction chamber can be sealed against the surrounding atmosphere, allowing the remaining steps of the method according to the invention to be continued in a controlled environment, in particular an environment controlled according to the atmosphere present on the surface of the sapphire substrate to be coated. In particular, step b) also involves providing a preparation atmosphere appropriately selected for the following measures to prepare the surface of the sapphire substrate, in particular according to the pressure and / or composition of the preparation atmosphere.

[0014] The reaction chamber preferably houses all the means necessary for both the surface preparation of the sapphire substrate and the subsequent coating of the sapphire substrate, allowing the reaction chamber to be sealed from the surrounding atmosphere to minimize contamination of the fabricated devices due to interaction with the environment.

[0015] As already explained above, after providing a sapphire substrate having a selected and defined miscut in step a), terraces are formed on the surface of the sapphire substrate. Since sapphire is Al2O3, a material containing two different elemental components, namely aluminum and oxygen, these terraces have a structure in which surfaces containing these two elemental components are arranged alternately. Since the selection of the respective crystal orientations for growing one or more semiconductor materials on the terraces is strongly influenced by the actual elemental composition of the surface of the substrate, when an epitaxial layer is directly deposited on the otherwise untreated terraced surface of the sapphire substrate, regions of these crystal orientations will occur in the grown epitaxial layer.

[0016] Therefore, in order to further prepare the surface of the sapphire substrate, in the next step c) of the method according to the invention, the substrate is heated in order to provide the substrate, and in particular its surface, with a preparation temperature selected in the range of 1400° C. to 2000° C. Any suitable method for heating the substrate can be used, such as, for example, direct contact heating or radiative heating.

[0017] The heating has several advantages: first, it can evaporate impurities on the substrate surface, and, if a preparation atmosphere containing oxygen is used, it can also oxidize the substrate surface.

[0018] Furthermore, heating the substrate may also induce an annealing process, which may not only reduce the number of missing or additional atoms at the substrate surface, but may also repair symmetry discontinuities present at the substrate surface or in its bulk.

[0019] Finally, the substrate temperature selected for heating in step c) of the method according to the present invention, in the range of 1400°C to 2000°C, is high enough to sublimate oxygen, the most volatile component of the crystal, from the surface. This exposes the much more reactive aluminum reconstruction layer on the sapphire surface, facilitating the deposition of the epitaxial layer. On the other hand, all of the aforementioned terraces, resulting from a properly selected miscut during the preparation of the sapphire substrate surface, have the same termination. Therefore, the respective crystal orientations selected for the growth of one or more semiconductor materials on these terraces are identical for all terraces.

[0020] In other words, after step c), the surface of the single crystal sapphire substrate is appropriately prepared for the deposition of a non-twinned epitaxial layer or layers of semiconductor materials, essentially based on a miscut relative to the (0001) plane of the single crystal sapphire when cutting the actual sapphire substrate, and subsequent heating of the substrate to anneal the surface and provide a single surface termination for all terraces formed on the surface of the substrate.

[0021] As mentioned above, the substrate is heated in step c) to a preparation temperature that is optimal for preparing the surface of the sapphire substrate, but that is inappropriate for the subsequent deposition of epitaxial layers of one or more semiconductor materials.

[0022] Therefore, in the next step d) of the method according to the invention, the substrate is again heated, but to a deposition temperature appropriately selected for the subsequent coating, which is different from the preparation temperature, in particular lower than it. Essentially, the deposition temperature is selected in the range of 300°C to 1400°C. The deposition temperature is preferably selected so that, on the one hand, the heating effects on the substrate (e.g. annealing processes, sublimation of volatile constituents of the substrate, etc.) are minimized, and, on the other hand, the mobility of the material deposited on the substrate surface to form the epitaxial layer is sufficiently high to allow the epitaxial layer to grow substantially defect-free.

[0023] After the deposition temperature of the substrate has been reached, the actual deposition of the epitaxial layer of one or more semiconductor materials is carried out in the final step e) of the method according to the invention by relative cooling from the preparation temperature and subsequent heating to maintain the deposition temperature, or by cooling to a temperature below the deposition temperature, e.g., for surface analysis, and then reheating the substrate to the deposition temperature. Essentially, any deposition method can be used for this deposition. In fact, the deposition method most suited to each of the semiconductor materials can be used. During deposition, the substrate is further heated to continuously maintain the appropriately selected deposition temperature. This ensures the highest quality of the deposited epitaxial layer, providing an untwinned and substantially defect-free epitaxial layer.

[0024] In summary, the method of the present invention allows for the formation of substantially defect-free, non-twinned epitaxial layers of one or more semiconductor materials on a single-crystal sapphire substrate. Such layers enable the integration of semiconductor-based microelectronics, such as silicon-based microelectronic circuits, on the sapphire substrate. This allows for the use of sapphire as a universal substrate for the heterogeneous integration of a variety of materials.

[0025] This method is also characterized in that in step a), the miscut angle is selected in the range of 0.01° to 0.1°, particularly in the range of 0.03° to 0.07°, and preferably the miscut angle is 0.05°. By selecting the miscut angle, the height and width of the terraces formed on the surface of the substrate can be adjusted. It has been found that a miscut angle selected in the range of 0.01° to 0.1°, particularly in the range of 0.03° to 0.07°, and preferably a miscut angle of 0.05°, is particularly suitable for providing sufficient terrace steps on the surface to actively break the hexagonal symmetry of the (0001) plane of single crystal sapphire, while simultaneously maximizing the size of the terraces.

[0026] Furthermore, in the method according to the present invention, the preparation atmosphere may be 10 -8 hPa to 10 -12 Alternatively, the preparation atmosphere may be configured to provide a vacuum atmosphere at a pressure selected in the range of 10 4 hPa to 10 -6 Oxygen, in particular O2 and / or O3, at a pressure selected in the range of 10 hPa, preferably 10 4 hPa to 10 -6 The preparation atmosphere may be configured to consist of oxygen, particularly O2 and / or O3, at a pressure selected in the range of 1000 kPa (1000 psi). Providing the preparation atmosphere as a vacuum atmosphere has the advantage of providing a very pure environment during preparation of the surface of the sapphire substrate. However, since sapphire is essentially an oxide of aluminum, a preparation atmosphere containing oxygen, particularly O2 and / or O3, is also useful, as it allows for additional oxidation of the surface. In either case, a substrate surface having a uniform surface termination on all terraces can be provided.

[0027] According to another embodiment of the method of the present invention, in step c) and / or step d) and / or step e), the sapphire substrate is heated by irradiation with laser light, particularly laser light having a wavelength selected from the range of 1 μm to 20 μm, preferably laser light provided by a CO laser source. Lasers are advantageous for heating the substrate to a desired, defined temperature and are relatively easy to use. The substrate can be heated to the desired preparation and / or deposition temperature by irradiating the backside with a laser. Because sapphire is transparent in the visible wavelength range and highly absorbent in the long-wavelength infrared range, a CO laser with a wavelength around 10 μm may be used. Preferably, the temperature may be controlled, for example, by a pyrometer aimed at the backside of the wafer. Preferably, the single-crystal sapphire substrate may be prepared with a roughened surface on the backside to facilitate absorption of laser radiation. Therefore, the back surface of the substrate either does not undergo any further grinding or polishing steps after cleaving from the bulk crystal, or is roughened by roughening or other surface roughening procedures (procedures that create surface roughness with large local deviations from the average surface on length scales comparable to or greater than the wavelength of the heating laser).

[0028] Furthermore, the method according to the present invention may be configured to hold the sapphire substrate at the preparation temperature for 200 seconds or more in step c). The annealing and sublimation processes in the surface preparation of the sapphire substrate are not instantaneous but require a certain amount of time. It has been found that 200 seconds is essentially sufficient time for the necessary preparation processes. This time interval should be set as short as possible to improve process efficiency. On the other hand, it must be long enough so that uncertainties in defining the start and end points of the time interval (such as timing errors, stabilization processes, control transients, and transients due to the thermal capacity of the substrate) do not substantially affect the reproducibility of the heating procedure. In general, the required time for these processes depends on the actual preparation temperature; the higher the preparation temperature, the shorter the time.

[0029] The method according to the invention is also characterized in that in step c) the preparation temperature is selected in the range of 1600° C. to 1800° C., preferably the preparation temperature is 1700° C. As mentioned above, the preparation temperature must be selected to be sufficiently high to ensure that the necessary processes occur during the preparation of the surface of the substrate. It has been found that a preparation temperature selected in the range of 1600° C. to 1800° C., preferably a preparation temperature of 1700° C., meets this requirement while limiting the demands on the heating means for heating the substrate in step c) of the method according to the invention.

[0030] In another embodiment of the method according to the present invention, in steps d) and e), the deposition temperature is selected in the range of 700°C to 1200°C, in particular in the range of 900°C to 1100°C, preferably 1000°C, and in step e), the epitaxial layer comprises silicon (Si), preferably consisting of silicon (Si) as a semiconductor material. Silicon is one of the most widely used semiconductor materials in modern microelectronics. By selecting a deposition temperature in the range of 700°C to 1200°C, in particular in the range of 900°C to 1100°C, preferably 1000°C, it is possible to deposit a non-twinned silicon epitaxial layer on a sapphire substrate with the lowest defect density, and in fact to provide a silicon-containing epitaxial layer, preferably consisting of silicon, substantially free of defects.

[0031] Furthermore, the method according to the present invention is characterized in that, after providing the preparation atmosphere in step b), the reaction chamber is continuously kept sealed from the ambient atmosphere until the deposition is completely completed in step e). In other words, all steps from step c) to step e) are performed sequentially in the same reaction chamber, and the sealed state from the ambient atmosphere is maintained throughout the entire process. Therefore, all steps from step c) to step e) in the method according to the present invention are performed in a sealed state. This makes it possible to prevent the substrate and the subsequently formed device from coming into contact with external influences, particularly the ambient atmosphere.

[0032] Furthermore, the method according to the invention may be configured so that after step e) the epitaxial layer has a thickness of 50 nm or more, preferably 3 μm or more.Various thicknesses can be provided, in particular thicknesses appropriately selected depending on the respective purpose of the device manufactured using the method according to the invention.

[0033] According to another embodiment of the method according to the invention, during the deposition of the epitaxial layer in step e), an additional material for doping the epitaxial layer is deposited on the epitaxial layer. By doping a semiconductor material with an additional material, its intrinsic properties with regard to electrical conductivity and other physical characteristics can be specifically modified. This significantly expands the industrial applicability of the devices produced in this way.

[0034] Furthermore, the method according to the present invention may be configured to use semiconductor materials from two or more different material groups during the deposition of the epitaxial layer in step e), each material group comprising one or more semiconductor materials, and to use the two or more material groups to continuously and / or stepwise and / or repeatedly adjust the composition of the epitaxial layer. Microelectronic devices such as transistors are typically constructed based on the interaction between layers of different semiconductor materials. Therefore, using two or more different material groups for the deposition of the epitaxial layer in step e) can make the device manufactured by the method according to the present invention applicable to a variety of microelectronic devices.

[0035] Furthermore, the method according to the invention is characterized in that the deposition device uses one or more of the following deposition methods: -Thermal Laser Epitaxy (TLE) -Pulsed Laser Deposition (PLD) -Physical Vapor Deposition (PVD) -Electron beam physical vapor deposition (EBPVD) -Sputter deposition -Molecular beam epitaxy (MBE) -Chemical vapor deposition (CVD) - Metal Organic Chemical Vapor Deposition (MOCVD) This list is not limiting, and other suitable deposition methods can also be used in the respective deposition apparatus, in particular the most suitable deposition method can be selected for the semiconductor material or materials used to deposit the epitaxial layer in step e) of the method according to the invention.

[0036] The method may also be configured to supply a deposition atmosphere suitable for depositing the epitaxial layer in step e) into the reaction chamber after step c) and before step e). Some of the semiconductor materials used for epitaxial layer deposition may require a special deposition atmosphere. This is the case when the semiconductor material is a compound material containing compound elements that can only be provided as a gas and not as a solid target. For example, when using nitrides (such as GaN or InN) as semiconductor materials, a nitrogen-containing deposition atmosphere can be used. In short, providing a deposition atmosphere can expand the variety of semiconductor materials that can be used in the method of the present invention.

[0037] The method according to the present invention further comprises the steps of: -6 From 10 1 hPa range, especially 10 -4 From 10 1 hPa range, especially 10 -4 From 10 -2 Having a pressure selected in the range of 0.15 MPa allows for improvements, in particular for each device to be manufactured, and in particular for the epitaxial layer(s) of semiconductor material deposited in step e), to be selected for the most appropriate pressure of the deposition atmosphere, which allows for an improvement in the quality of the devices manufactured.

[0038] According to another improved embodiment of the method of the present invention, the deposition atmosphere comprises a process gas selected from the group consisting of oxygen (O), ozone (O), plasma-activated oxygen (O), nitrogen (N), plasma-activated nitrogen (N), phosphorus (P), sulfur (S), selenium (Se), mercury (Hg), NH, NO, CH, and combinations thereof. This list is not limiting, and other suitable process gases can be used in each deposition system. This allows for a wide range of semiconductor materials, requiring a deposition atmosphere appropriately selected depending on the epitaxial layer of the device being manufactured.

[0039] Furthermore, the method according to the invention is characterized in that one of the one or more semiconductor materials is an elemental semiconductor. Elemental semiconductors are the simplest semiconductor materials consisting of a single chemical element and therefore require only a single source of material during the deposition of the epitaxial layer in step e) of the method according to the invention. Furthermore, elemental semiconductors such as silicon are particularly widely used semiconductor materials in modern microelectronics.

[0040] The method of the present invention can be further improved by selecting as the elemental semiconductor any metalloid selected from the group consisting of silicon (Si), germanium (Ge), diamond-like carbon (C), arsenic (As), boron (B), sulfur (S), selenium (Se), and tellurium (Te). This list is not intended to be limiting, and other suitable elemental semiconductors can also be used. This provides a wide range of semiconductor materials that can be appropriately selected depending on the purpose of the device to be fabricated.

[0041] Alternatively, or in addition, the method of the present invention may be configured such that one of the one or more semiconductor materials is silicon carbide (SiC). SiC is used, for example, in semiconductor electronic devices that operate at high temperatures and / or high voltages. Thus, by using silicon carbide as one of the one or more semiconductor materials, the method of the present invention can be used to fabricate devices suitable for high temperatures or high voltages.

[0042] The method according to the present invention is also characterized in that one of the one or more semiconductor materials is a III-V compound semiconductor containing one or more group III elements and one or more group V elements, where the one or more group III elements are selected from the group including boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (Tl), and the one or more group V elements are selected from the group including nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi). Compared to elemental semiconductors, III-V compound semiconductors have the advantage that their band gaps can be varied, often continuously and / or over a wide range, depending on the material composition. This allows the electrical properties of devices containing epitaxial layers containing III-V compound semiconductors as semiconductor materials to be tailored to specific needs. Such devices containing III-V compound semiconductors are primarily used in optical devices such as detectors, light-emitting diodes, and lasers, but are also increasingly being used in high-power electronics.

[0043] The method of the present invention can be further improved by providing the III-V compound semiconductor as a binary compound consisting of one group III element and one group V element, specifically selected from the group including GaN, AlN, InN, BN, GaP, AlP, InP, BP, GaAs, AlAs, InAs, BaAs, GaSb, AlSb, and InSb. This list is not exhaustive, and other suitable binary III-V compound semiconductors can be used. This provides a wide range of semiconductor materials appropriately selected depending on the purpose of the device to be manufactured. Binary compound semiconductors require only two material sources during the deposition of the epitaxial layer in step e) of the method of the present invention. For example, in the case of nitrides and / or phosphides, one of the material sources can be provided from an appropriately selected deposition atmosphere.

[0044] Alternatively, the method according to the present invention may be such that the III-V compound semiconductor is a multi-element compound consisting of a mixture of three or more group III elements and group V elements, and in particular, the III-V compound semiconductor is selected from the group consisting of InGaN, InGaP, AlGaAs, InGaAs, AlGaSb, InGaSb, and Ga 1-x In x As 1-y P y This list is not limiting, and other suitable multi-element III-V compound semiconductors can be used. Multi-element compounds are one option for nearly continuously varying the band gap of semiconductors over a wide energy range. This provides a wide range of semiconductor materials that can be appropriately selected depending on the purpose of the device being manufactured.

[0045] According to another embodiment, the method of the present invention is characterized in that one of the one or more semiconductor materials is a II-VI compound semiconductor containing one or more group II elements and one or more group VI elements, where the one or more group II elements are selected from the group including beryllium (Be), zinc (Zn), cadmium (Cd), and mercury (Hg), and the one or more group VI elements are selected from the group including oxygen (O), sulfur (S), selenium (Se), and tellurium (Te). Similar to III-V compound semiconductors, II-VI compound semiconductors have the advantage over elemental semiconductors that their band gaps can be varied by material composition. This allows for tailored modification of the electrical properties of devices containing epitaxial layers using II-VI compound semiconductors as semiconductor materials. Such devices containing II-VI compound semiconductors typically exhibit large direct bandgaps, making them popular for short-wavelength applications in optoelectronics.

[0046] The method of the present invention can also be improved by using a binary compound of one group II element and one group VI element, specifically by selecting the II-VI compound semiconductor from the group including ZnO, ZnS, CdS, ZnSe, CdSe, BeTe, ZnTe, and CdTe. This list is not intended to be limiting, and other suitable binary II-VI compound semiconductors can be used. This provides a wide range of semiconductor materials appropriately selected depending on the purpose of the device to be manufactured. Binary compound semiconductors require only two material sources during the deposition of the epitaxial layer in step e) of the method of the present invention. For example, in the case of oxides and / or sulfides, one of the material sources can be provided from an appropriately selected deposition atmosphere.

[0047] Alternatively, the method of the present invention can be improved by using a multi-element compound of three or more group II and group VI elements as the II-VI compound semiconductor. Specifically, the II-VI compound semiconductor can be selected from the group consisting of (Zn,Cd)Se, (Be,Zn)Se, (Be,Cd)Se, and Zn(S,Se). This list is not intended to be limiting, and other suitable multi-element II-VI compound semiconductors can also be used. Multi-element compounds are one option for achieving a nearly continuous change in the band gap of a semiconductor over a wide energy range. This provides a wide range of semiconductor materials that can be appropriately selected depending on the purpose of the device to be manufactured.

[0048] According to a further refinement of the method of the present invention, one of the one or more semiconductor materials is an alloy of two or more semiconductor materials, in particular, the two or more semiconductor materials are selected from the group consisting of elemental semiconductors, III-V compound semiconductors, and II-VI compound semiconductors. In other words, a combination of two or more different semiconductor materials that form an alloy can also be used as part of the epitaxial layer. This further expands the range of possible compositions of the non-twinned epitaxial layer deposited on the sapphire substrate.

[0049] According to a second aspect of the present invention, the objects of the present invention are achieved by a device comprising a twin-free epitaxial layer of one or more semiconductor materials deposited on the surface of a single crystal sapphire substrate. The device according to the second aspect of the present invention is characterized in that it is a device obtained by the method according to the first aspect of the present invention. In other words, the device according to the second aspect of the present invention is produced by carrying out the method according to the first aspect of the present invention. Therefore, the device according to the second aspect of the present invention has all of the features and advantages described above with respect to the method according to the first aspect of the present invention.

[0050] According to a third aspect of the present invention, the objects of the present invention are achieved by a deposition apparatus for manufacturing the device according to the second aspect of the present invention, comprising a reaction chamber for placing the single crystal sapphire substrate, the reaction chamber being sealable against the ambient atmosphere, a gas system for supplying an adjustable atmosphere to the reaction chamber, heating means for heating the substrate, and deposition means for depositing an epitaxial layer of one or more semiconductor materials on the surface of the substrate. The deposition apparatus according to the third aspect of the present invention is characterized in that it is configured to carry out the method according to the present invention for manufacturing the device according to the second aspect of the present invention.

[0051] The deposition apparatus according to the present invention can be configured to perform a deposition method selected from, but not limited to, TLE, PLD, PVD, EBPVD, sputter deposition, MBE, CVD, and / or MOCVD. Each single crystal sapphire substrate to be coated can be placed in a reaction chamber of the deposition apparatus that can be sealed against the surrounding atmosphere. The substrate can then be heated by heating means appropriately provided in the deposition apparatus. The gas system of the deposition apparatus ensures an appropriately adjustable atmosphere in the reaction chamber, i.e., a preparation atmosphere and, if necessary, a deposition atmosphere.

[0052] In summary, the deposition apparatus according to the third aspect of the present invention is configured to carry out the method according to the first aspect of the present invention, and in particular the method for manufacturing the apparatus according to the second aspect of the present invention, and provides all of the features and advantages described above in relation to the method according to the first aspect of the present invention and the apparatus according to the second aspect of the present invention.

[0053] The present invention will be described in detail below based on embodiments and with reference to the drawings. In particular, the drawings are as follows: [Brief explanation of the drawings]

[0054] [Figure 1] 1 illustrates a method according to the invention for manufacturing a device according to the invention; [Figure 2] 1 shows a deposition apparatus according to the invention during the implementation of a method according to the invention; [Figure 3] FIG. 1 shows two measurement results of a device according to the invention. [Figure 4] 1A and 1B show two top views of a device according to the invention. DETAILED DESCRIPTION OF THE INVENTION

[0055] Figure 2 shows, in Figures 2A and 2B, a deposition apparatus 40 at different stages of the method according to the invention shown in Figure 1. Figures 1 and 2 are therefore discussed together in the following.

[0056] The deposition apparatus 40 according to the present invention may be configured to include deposition means 60 for performing a deposition method selected from, but not limited to, TLE, PLD, PVD, EBPVD, sputter deposition, MBE, CVD, and / or MOCVD. Preferably, the deposition apparatus 40 may be configured as a TLE system 46, as shown in FIG. 2 .

[0057] The deposition apparatus 40 includes a reaction chamber 42. The reaction chamber 42 is sealable from the surrounding atmosphere 70. A gas system 44 of the deposition apparatus 40 can provide adjustable atmospheres 72, 74 within the reaction chamber 42. A positioning means (not shown) is used to position the substrate 20 within the reaction chamber 42 and then apply a coating to the surface 22 of the substrate 20.

[0058] According to the method of the present invention, the substrate 20 is provided in step a)A of the method of the present invention as a single crystal sapphire substrate 20 having a miscut angle selected in the range of 0.001° to 1° relative to the (0001) plane of the single crystal sapphire. More preferably, the miscut angle is selected in the range of 0.01° to 0.1°, in particular in the range of 0.03° to 0.07°, with a preferred miscut angle being 0.05°. The substrate 20 is placed in a reaction chamber 42.

[0059] In the following step b)B of the method according to the invention, the reaction chamber 42 is sealed against the surrounding atmosphere 70, e.g. -8 hPa to 10 -12 a vacuum atmosphere at a pressure selected in the range of 10 hPa or 4 hPa to 10 -6 Oxygen, in particular O2 and / or O3, at a pressure selected in the range of 10 hPa, preferably 10 4 hPa to 10 -6 The deposition apparatus 40 is filled with a suitably selected preparation atmosphere 72, such as an atmosphere consisting of oxygen, in particular O2 and / or O3, at a selected pressure in the range of 1000 kPa. The preparation atmosphere 72 is supplied by the gas system 44 of the deposition apparatus 40.

[0060] As shown in FIG. 2A, in a subsequent step c)C of the method according to the present invention, the substrate 20 is heated to a preparation temperature selected in the range of 1400°C to 2000°C to prepare the surface 22 of the substrate 20. To effectively prepare the surface 22 of the substrate, the heating time of the substrate 20 is 200 seconds or more. In particular, the preparation temperature is selected in the range of 1600°C to 1800°C, and preferably, the preparation temperature is 1700°C. As shown, the heating means 50 for heating the substrate may be a substrate heating laser 52 that irradiates the substrate 20, particularly the backside of the substrate 20, with a laser beam. Since the substrate 20 is made of single-crystal sapphire, a laser beam with a wavelength selected in the range of 1 μm to 20 μm can be used. Preferably, the substrate heating laser 52 includes a CO laser source.

[0061] The heating has several advantages. First, it evaporates impurities on the surface 22 of the substrate 20. Furthermore, if an oxygen-containing preparation atmosphere 72 is used, oxidation of the surface is also possible. Heating the substrate 20 also triggers an annealing process. Finally, oxygen, the most volatile component of the crystal, sublimes from the surface 22 of the substrate 20. This exposes the much more reactive aluminum reconstructed layer on the sapphire surface 22, facilitating the deposition of the epitaxial layer. Furthermore, the entire surface 22 of the sapphire substrate 20 is provided with the same reconstructed layer and is therefore terminated. This allows for untwinned growth of one or more semiconductor materials that form the epitaxial layer 30 (see FIG. 2B).

[0062] In summary, after step c), the surface 22 of the single crystal sapphire substrate 20 is suitably prepared for the deposition of a non-twinned epitaxial layer 30 of one or more semiconductor materials. The preparation is based on miscutting the single crystal sapphire substrate 20 relative to the (0001) plane when cutting the sapphire, and then heating the substrate 20 to anneal the surface 22, which imparts a single surface termination to the entire surface 22 of the substrate 20.

[0063] After preparing the substrate 20 in steps a)A to c)C of the method according to the present invention, the substrate 20 remains at the preparation temperature, which is usually not optimal and in some cases inappropriate for the subsequent step of coating the surface 22 with an epitaxial layer 30. Therefore, in the subsequent step d)D of the method according to the present invention, the temperature of the substrate 20 is changed to a more appropriately selected deposition temperature different from the preparation temperature. Depending on the given semiconductor material or materials used for the epitaxial layer 30, this deposition temperature is selected in the range of 300°C to 1400°C, e.g., in the case of silicon as the semiconductor material, in the range of 700°C to 1200°C, particularly in the range of 900°C to 1100°C, and preferably up to 1000°C. A source heating laser 52, particularly a CO2 laser, can be preferably used to heat the substrate 20. The deposition temperature may be changed during the deposition process, for example, to prepare a specific gradient of defects, such as dislocations, or a heterostructure consisting of layers 30 of different semiconductor materials.

[0064] The heating in step d)D is maintained in the subsequent step e)E of the method of the present invention to continuously prepare the surface 22 of the substrate 20 during deposition of the epitaxial layer 30, as shown in FIG. 2B. The illustrated deposition apparatus 40 is a TLE system 46, and each deposition means 60 includes a source heating laser 66 (indicated by an arrow representing a laser beam provided from the source heating laser 66) for evaporating and / or sublimating a source material 64 provided as a source 62 in the reaction chamber 42. The evaporated and / or sublimated source material 64 impinges on the surface 22 prepared in the first steps a) through c) of the method of the present invention, forming a non-twinned epitaxial layer 30. Continuously providing the substrate 20 at the deposition temperature ensures a high-quality deposited epitaxial layer 30. This allows the epitaxial layer 30 to be provided in a non-twinned and substantially defect-free state.

[0065] The reaction chamber 42 preferably remains sealed from the ambient atmosphere throughout the entire process of the present invention, from sealing in step b)B until the end of coating the substrate 20 in step e)E, thereby avoiding any harmful effects that may result from contact of the epitaxial layer 30 with the ambient atmosphere.

[0066] The sealing of the reaction chamber 42 during the method of the present invention allows the reaction chamber 42 to be filled with a deposition atmosphere 74 suitable for the epitaxial layer 30 to be deposited on the surface 22 of the substrate 20 after step c)C. The deposition atmosphere 74 may comprise, for example, a process gas selected from the group consisting of oxygen (O), ozone (O), plasma activated oxygen (O), nitrogen (N), plasma activated nitrogen (N), phosphorus (P), sulfur (S), selenium (Se), mercury (Hg), NH, NO, CH, and combinations thereof. Additionally or alternatively, the ... -6 From 10 1 hPa range, especially 10 -4 From 10 1 hPa range, especially 10 -4 From 10 -2 It may have a pressure selected in the range of hPa.

[0067] 2B, epitaxial layer 30 is shown schematically. Epitaxial layer 30 may have a thickness of, for example, 50 nm or more, preferably 3 μm or more. Additional materials may be deposited onto epitaxial layer 30 to dope it. Alternatively, or in addition, sub-layers containing different semiconductor materials may be used to adjust the composition of epitaxial layer 30 continuously and / or stepwise and / or repeatedly.

[0068] Additionally, a variety of different semiconductor materials may be used to form the epitaxial layer 30. The range of materials that may be used includes, for example, elemental semiconductors such as silicon and germanium, III-V compound semiconductors such as GaN, GaAs, and InGaN, and / or II-VI compound semiconductors such as ZnO, CdSe, and (Zn,Cd)Se. Combinations and / or alloys of the above materials may also be used.

[0069] In summary, by implementing the method of the present invention and / or using the deposition apparatus 40 of the present invention, a substantially defect-free non-twinned epitaxial layer 30 of one or more semiconductor materials can be formed on a single crystal sapphire substrate 20. Such an epitaxial layer 30 has the potential to enable the integration of semiconductor-based microelectronics, such as silicon-based microelectronic circuits, on the sapphire substrate 20. This allows sapphire to be used as a universal substrate 20 for heterogeneous integration of a variety of materials.

[0070] 3 and 4 show actual measurement results of a non-twinned epitaxial layer 30 of silicon produced on a single crystal sapphire substrate 20 in a deposition apparatus 40 according to the present invention (see FIG. 2, in particular FIG. 2B) by carrying out the method according to the present invention (see FIG. 1).

[0071] Because only one of the two possible rotational domains is uniformly selected on the sapphire surface 22 of the sapphire substrate 20, silicon nucleates and grows in only one crystallographic orientation during deposition of the epitaxial layer 30 without twinning or related defects. This is confirmed by the X-ray analysis of the silicon layer on sapphire (0001) shown in Figure 3A. Two X-ray diffraction scans are shown: the silicon epitaxial layer 30 in the top panel and the underlying sapphire substrate 20 in the bottom panel. As can be seen, the silicon peaks repeat every 120°. This is only true if there is a single in-plane orientation of silicon in the (111) orientation. In the case of a twinned layer, six peaks would be measured per rotation instead of three.

[0072] 3B shows an X-ray θ-2θ scan of the same sample containing a silicon epitaxial layer 30 on a sapphire substrate 20. The X-ray θ-2θ scan confirms the uniform (111) orientation of the silicon-containing epitaxial layer 30. Only the silicon-related (111) and (333) reflections are found parallel to the -A2O3 (0006) and (000.12) planes, which are perpendicular to the surface 22 (excluding miscuts) in the growth direction of the epitaxial layer 30.

[0073] These two measurements, shown in FIG. 3, confirm that the silicon epitaxial layer 30 is untwinned and has a single crystallographic orientation relative to the substrate 20.

[0074] 4 shows top views of two samples of epitaxial layer 30 on sapphire substrate 20. The difference between the two samples is the thickness of epitaxial layer 30, which is 300 nm in FIG. 4A and 1.3 μm in FIG. 4B.

[0075] Silicon epitaxial layer 30 still has some defects due to its imperfect lattice mismatch with substrate 20, at 32.8%, meaning that three Al2O3 lattice constants and two silicon lattice constants are nearly identical (ideally 33.333...%). However, as the thickness of epitaxial layer 30 increases, these defects appear to significantly disappear.

[0076] As noted above, Figure 4A shows epitaxial layer 30 having a thickness of approximately 300 nm, which corresponds to approximately one-third of the image size scale at the top left of the image. At this stage, the surface of epitaxial layer 30 is still very rough, with the lowest portions potentially reaching all the way down to or very close to surface 22 of substrate 20.

[0077] However, as shown in FIG. 4B, thicker epitaxial layer 30 exhibits a closed surface of epitaxial layer 30. The thickness of epitaxial layer 30 shown is approximately the distance between the horizontal scale marks. The maximum and minimum points in the scan are within a range equivalent to 1 / 20 of the total thickness of epitaxial layer 30, as indicated by the numbers on the scale. The flat terraces extend laterally over several micrometers. With thicker layers, further uniformity and improvement in the crystalline quality of the surface are realized, particularly enabling the use of layers and devices fabricated in accordance with the present invention in silicon-based devices and nanostructures. [Explanation of symbols]

[0078] 10 equipment 20 PCB 22 Surface 30 Epitaxial layer 40 Vapor deposition equipment 42 Reaction Chamber 44 Gas System 46 TLE system 50 Heating means 52 Substrate heating laser 60 Vapor deposition means 62 Source 64 raw materials 66 Source Heating Laser 70 Surrounding Atmosphere 72 Preparation Atmosphere 74 Deposition atmosphere A Process a) B process b) C process c) D process d) E process e)

Claims

1. 1. A method for manufacturing a device (10) comprising a non-twinned epitaxial layer (30) of one or more semiconductor materials deposited on a surface (22) of a single crystal sapphire substrate (20) in a deposition apparatus (40), comprising: a) providing a sapphire substrate (20) having a miscut angle selected in the range of 0.001° to 1° relative to the (0001) plane of single crystal sapphire; b) placing the sapphire substrate (20) provided in step a) in a reaction chamber (42) of the deposition device (40), then sealing the reaction chamber (42) from the surrounding atmosphere (70), and supplying a preparation atmosphere (72) into the reaction chamber (42); c) heating the sapphire substrate (20) to provide the sapphire substrate (20) with a preparation temperature selected in the range of 1400°C to 2000°C; d) heating the sapphire substrate (20) to provide the sapphire substrate (20) with a deposition temperature selected in the range of 300°C to 1400°C, which is different from the preparation temperature; e) depositing the epitaxial layer (30) on the surface (22) of the substrate (20) in the reaction chamber (42), thereby further heating the substrate (20) to continuously provide the deposition temperature; A manufacturing method comprising:

2. 2. The method of claim 1, wherein in step a) the miscut angle is selected in the range of 0.01° to 0.1°, in particular in the range of 0.03° to 0.07°, preferably the miscut angle is 0.05°.

3. The preparation atmosphere (72) is 10 -8 hPa to 10 -12 A vacuum atmosphere is provided at a pressure selected in the range of 10 hPa, or the preparation atmosphere (72) is 4 hPa to 10 -6 Oxygen, especially O, at a pressure selected in the range of 1000 kPa. 2 and / or O 3 and preferably 10 4 hPa to 10 -6 Oxygen, especially O, at a pressure selected in the range of 1000 kPa. 2 and / or O 3 The method according to claim 1 or 2, comprising:

4. In step c) and / or step d) and / or step e), the sapphire substrate (20) is irradiated with laser light, in particular with a wavelength selected in the range of 1 μm to 20 μm, preferably CO 2 The method according to claim 1 , wherein the heating is performed by irradiating the material with a laser beam supplied from a laser light source.

5. The manufacturing method according to claim 1 , wherein in the step c), the sapphire substrate (20) is held at the preparation temperature for 200 seconds or more.

6. 6. The method according to claim 1, wherein in step c) the preparation temperature is selected in the range of 1600°C to 1800°C, preferably the preparation temperature is 1700°C.

7. 7. The method according to claim 1, wherein in steps d) and e) the deposition temperature is selected in the range of 700°C to 1200°C, in particular in the range of 900°C to 1100°C, preferably the deposition temperature is 1000°C, and in step e) the epitaxial layer (30) comprises silicon (Si), preferably consists of silicon (Si) as semiconductor material.

8. 8. The method of claim 1, wherein after providing the preparation atmosphere in step b), the reaction chamber is continuously kept sealed from the ambient atmosphere until the deposition is completely completed in step e).

9. The method according to any one of the preceding claims, wherein after step e), the epitaxial layer (30) has a thickness of 50 nm or more, preferably 3 μm or more.

10. 10. The method of claim 1, wherein during the deposition of the epitaxial layer (30) in step e), an additional material for doping the epitaxial layer (30) is deposited on the epitaxial layer (30).

11. 11. The method according to claim 1, wherein during the deposition of the epitaxial layer in step e), semiconductor materials from two or more different material groups are used, each material group comprising one or more semiconductor materials, and the two or more material groups are used to continuously and / or stepwise and / or repeatedly stepwise adjust the composition of the epitaxial layer (30).

12. The vapor deposition device (40) is configured to perform the following vapor deposition method: - Thermal Laser Epitaxy (TLE) (46) - Pulsed Laser Deposition (PLD) Physical Vapor Deposition (PVD) - Electron beam physical vapor deposition (EBPVD) - Sputter deposition -Molecular beam epitaxy (MBE) -Chemical vapor deposition (CVD) - Metal Organic Chemical Vapor Deposition (MOCVD) The method of any one of claims 1 to 11, wherein one or more of the following is used:

13. 13. The method of claim 1, wherein after step c) and before step e), a deposition atmosphere (74) suitable for depositing the epitaxial layer (30) in step e) is provided in the reaction chamber (42).

14. The deposition atmosphere (74) is 10 -6 From 10 1 hPa range, especially 10 -4 From 10 1 hPa range, especially 10 -4 From 10 -2 14. The method of claim 13, wherein the pressure is selected in the range of 0.5 to 1.0 hPa.

15. The deposition atmosphere (74) is oxygen (O), ozone (O 3 ), plasma activated oxygen (O), nitrogen (N), plasma activated nitrogen (N), phosphorus (P), sulfur (S), selenium (Se), mercury (Hg), NH 3 , N 2 O, CH 4 15. The method of claim 13 or 14, comprising a process gas selected from the group consisting of:

16. 16. The method of any one of claims 1 to 15, wherein one of the one or more semiconductor materials is an elemental semiconductor.

17. 17. The method according to claim 16, wherein the elemental semiconductor is any metalloid selected from the group consisting of silicon (Si), germanium (Ge), diamond-like carbon (C), arsenic (As), boron (B), sulfur (S), selenium (Se), and tellurium (Te).

18. 18. The method of any one of claims 1 to 17, wherein one of the one or more semiconductor materials is silicon carbide (SiC).

19. 19. The method of claim 1, wherein one of the one or more semiconductor materials is a III-V compound semiconductor containing one or more group III elements and one or more group V elements, the one or more group III elements being selected from the group containing boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (Tl), and the one or more group V elements being selected from the group containing nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi).

20. 20. The method of claim 19, wherein the III-V compound semiconductor is a binary compound consisting of one group III element and one group V element, and in particular, the III-V compound semiconductor is selected from the group including GaN, AlN, InN, BN, GaP, AlP, InP, BP, GaAs, AlAs, InAs, BAs, GaSb, AlSb, and InSb.

21. The III-V group compound semiconductor is a multi-element compound consisting of a mixture of three or more group III elements and a group V element, and in particular, the III-V group compound semiconductor is InGaN, InGaP, AlGaAs, InGaAs, AlGaSb, InGaSb, and Ga 1-x In x As 1-y P y The method of claim 19, wherein the compound is selected from the group comprising:

22. 22. The method of claim 1, wherein one of the one or more semiconductor materials is a II-VI compound semiconductor containing one or more group II elements and one or more group VI elements, the one or more group II elements being selected from the group including beryllium (Be), zinc (Zn), cadmium (Cd), and mercury (Hg), and the one or more group VI elements being selected from the group including oxygen (O), sulfur (S), selenium (Se), and tellurium (Te).

23. 23. The method according to claim 22, wherein the II-VI compound semiconductor is a binary compound consisting of one group II element and one group VI element, and in particular, the II-VI compound semiconductor is selected from the group including ZnO, ZnS, CdS, ZnSe, CdSe, BeTe, ZnTe, and CdTe.

24. 23. The method according to claim 22, wherein the II-VI compound semiconductor is a multi-element compound consisting of a mixture of three or more group II elements and three or more group VI elements, and in particular, the II-VI compound semiconductor is selected from the group including (Zn,Cd)Se, (Be,Zn)Se, (Be,Cd)Se, and Zn(S,Se).

25. 25. The method according to any one of claims 16 to 24, wherein one of the one or more semiconductor materials is an alloy of two or more semiconductor materials, in particular the two or more semiconductor materials are selected from the group comprising elemental semiconductors, III-V compound semiconductors, and II-VI compound semiconductors.

26. 1. A device (10) comprising a non-twinned epitaxial layer (30) of one or more semiconductor materials deposited on a surface (22) of a single crystal sapphire substrate (20), comprising: Produced by the production method according to any one of claims 1 to 25. Apparatus (10).

27. 27. A deposition apparatus (40) for manufacturing the device (10) of claim 26, comprising: a reaction chamber (42) for placing said single crystal sapphire substrate (20), said reaction chamber (42) being sealable against the ambient atmosphere (70); a gas system (44) for supplying a tunable atmosphere to the reaction chamber (42); a heating means (50) for heating the substrate (20); a deposition means (60) for depositing the epitaxial layer (30) of one or more semiconductor materials on the surface (22) of the substrate (20); 26. A method for producing a device (10) according to claim 1, wherein the method is adapted to carry out a method for producing a device (10) according to claim 1. Vapor deposition device (40).

Images