Semiconductor device, power conversion apparatus, and method of manufacturing semiconductor device

Abstract

To provide a semiconductor device in which variation in thickness of a solder resist of a metal base circuit board is reduced.SOLUTION: The semiconductor device includes a conductor circuit pattern 13, a resist height holding part 14, and a solder resist layer 15. A conductor circuit pattern 13 is provided on the upper surface of a metal base plate 11 for heat radiation through an insulating layer 12. The resist height holding portion 14 is selectively provided on a portion of the insulating layer 12 where the conductor circuit pattern 13 is not present. The solder resist layer 15 covers the insulating layer 12, a part of the conductor circuit pattern 13, and the resist height holding portion 14. The resist height holding portion 14 is provided along the peripheral edge of the metal base plate 11.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device. [Background technology]

[0002] Semiconductor devices are mounted in power conversion devices such as inverters and servo amplifiers installed in FA (Factory Automation) equipment, etc. The main circuit board of a semiconductor device uses a metal-based circuit board in which an insulating layer, a conductor circuit pattern, and a solder resist are laminated on a metal substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2003-309351 Summary of the Invention [Problem to be solved by the invention]

[0004] In the manufacture of metal base circuit boards, in order to ensure efficient production, a large metal base plate on which a plurality of individual pieces are arranged is subjected to a process of forming a conductor circuit pattern and a process of applying a solder resist, and finally, an exterior processing process such as pressing is performed to punch out the large metal base plate into individual pieces of a desired size, i.e., the product size.

[0005] In the contour processing process, in order to punch a thick metal base plate cleanly, it is necessary to clamp the metal base circuit board with a high load. If there is variation in the thickness of the solder resist on the metal base plate, the punching load will be concentrated in the areas where the resist is thick, causing damage such as cracks in the insulating layer directly below the solder resist. As a result, there is a problem of reduced yield in voltage resistance tests of semiconductor devices including singulated metal base circuit boards. To prevent this, it is necessary to reduce the variation in the thickness of the solder resist.

[0006] In order to solve the above-mentioned problems, an object of the present disclosure is to provide a semiconductor device in which variations in the thickness of the solder resist of a metal-based circuit board are reduced. [Means for solving the problem]

[0007] The semiconductor device according to the present disclosure includes a conductor circuit pattern, a resist height maintaining portion, and a solder resist layer. The conductor circuit pattern is provided on the upper surface of a metal base plate for heat dissipation via an insulating layer. The resist height maintaining portion is selectively provided on a portion of the insulating layer where there is no conductor circuit pattern. The solder resist layer covers the insulating layer, a portion of the conductor circuit pattern, and the resist height maintaining portion. The resist height maintaining portion is provided along the periphery of the metal base plate. [Effects of the Invention]

[0008] According to the present disclosure, a semiconductor device is provided in which variations in the thickness of the solder resist of a metal-based circuit board are reduced.

[0009] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a cross-sectional view showing a configuration of a semiconductor device in a first embodiment. [Figure 2]3 is a plan view showing the configuration of a resist height maintaining unit in the first embodiment. FIG. [Figure 3] 3 is a flowchart showing a method for manufacturing the semiconductor device in the first embodiment. [Figure 4] 1 is a cross-sectional view showing the configuration of a large metal base plate on which insulating layers and conductive foils are laminated in accordance with the first embodiment. [Figure 5] 1 is a cross-sectional view showing the configuration of a large-sized metal base plate on which a conductor circuit pattern and a resist height maintaining portion are formed in accordance with the first embodiment. [Figure 6] 3 is a plan view showing the configuration of a resist height maintaining section formed on a large-sized metal base plate in the first embodiment. FIG. [Figure 7] 1 is a cross-sectional view showing the configuration of a large-sized metal base plate on which a solder resist layer is formed in the first embodiment. [Figure 8] FIG. 10 is a plan view showing a step of applying a solder resist layer using a printing squeegee in the first embodiment. [Figure 9] 10 is a cross-sectional view showing a state in a solder resist layer application step when a resist height maintaining portion according to the first embodiment is not provided. FIG. [Figure 10] 10A and 10B are cross-sectional views showing a state of a solder resist layer application process when a resist height maintaining portion is provided in the first embodiment. [Figure 11] 10 is a cross-sectional view showing a clamped state when a resist height maintaining section is not provided in the first embodiment. FIG. [Figure 12] 10 is a cross-sectional view showing a clamped state when a resist height maintaining section is provided in the first embodiment. FIG. [Figure 13] FIG. 10 is a cross-sectional view showing the configuration of a semiconductor device according to a second embodiment. [Figure 14] FIG. 10 is a cross-sectional view showing the configuration of a semiconductor device according to a second embodiment. [Figure 15] FIG. 11 is a cross-sectional view showing the configuration of a large-sized metal base plate on which a resist height maintaining portion is formed in the third embodiment. [Figure 16]FIG. 11 is a plan view showing the configuration of a resist height maintaining section formed on a large metal base plate in the third embodiment. [Figure 17] FIG. 11 is a plan view showing a step of applying a solder resist layer using a printing squeegee in the third embodiment. [Figure 18] FIG. 11 is a cross-sectional view showing a state of a solder resist layer application process when a resist height maintaining portion is not provided in the third embodiment. [Figure 19] FIG. 11 is a cross-sectional view showing a state of a solder resist layer application process when a resist height maintaining portion is not provided in the third embodiment. [Figure 20] 11A and 11B are cross-sectional views showing a state of a solder resist layer application process when a resist height maintaining portion is provided in the third embodiment. [Figure 21] 11A and 11B are cross-sectional views showing a state of a solder resist layer application process when a resist height maintaining portion is provided in the third embodiment. [Figure 22] FIG. 10 is an enlarged cross-sectional view showing a configuration of a part of a power conversion device according to a fourth embodiment. [Figure 23] FIG. 10 is a block diagram showing a configuration of a power conversion system including a power conversion device according to a fourth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Embodiment 1 1 is a cross-sectional view showing the configuration of a semiconductor device 101 according to embodiment 1. The semiconductor device 101 includes a metal base circuit board 1, a semiconductor element 2, a case 3, electrode terminals 4, metal wiring 5, and a sealing material 6. The metal base circuit board 1 includes a metal base plate 11, an insulating layer 12, a conductor circuit pattern 13, a resist height maintaining portion 14, and a solder resist layer 15.

[0012] The metal base plate 11 is a metal plate for heat dissipation and is made of a metal with high heat dissipation properties, such as copper (Cu) or aluminum (Al).

[0013] The insulating layer 12 is provided on the metal base plate 11. The insulating layer 12 is formed of a resin containing an insulating filler such as aluminum nitride (AlN) or boron nitride (BN).

[0014] Conductive circuit patterns 13 are selectively provided on the upper surface of metal base plate 11 via insulating layer 12. Conductive circuit patterns 13 are formed of metal such as Cu or Al. A plating layer of Ni, Au, or the like may be formed on the surface of conductor circuit patterns 13.

[0015] The resist height maintaining portion 14 is selectively provided in a portion of the insulating layer 12 where the conductive circuit pattern 13 is not present. FIG. 2 is a plan view showing the configuration of the resist height maintaining portion 14. In FIG. 2, components other than the metal base plate 11 and the resist height maintaining portion 14 are not shown. The resist height maintaining portion 14 is provided along the periphery of the metal base plate 11, inside the periphery. The resist height maintaining portion 14 in the first embodiment does not form a closed loop shape, but is divided at least in one place in a plan view. Furthermore, the resist height maintaining portion 14 in the first embodiment is formed of the same material as the conductive circuit pattern 13. By avoiding a closed loop shape, it is possible to prevent the resist height maintaining portion 14 from becoming a source of noise when the metal base circuit board 1 is incorporated into and used in a semiconductor device 101.

[0016] The solder resist layer 15 covers the insulating layer 12, a portion of the conductor circuit pattern 13, and the resist height maintaining portion 14. In other words, the solder resist layer 15 is formed on the entire upper surface of the metal base circuit board 1 except for openings provided on the conductor circuit pattern 13. The semiconductor element 2 and metal wiring 5, which will be described later, are bonded to the openings provided on the conductor circuit pattern 13. The solder resist layer 15 is formed of, for example, a thermosetting resin or a photocurable resin. The photocurable resin is, for example, a UV (ultraviolet) curable resin.

[0017] The semiconductor element 2 is mounted on the conductor circuit pattern 13 with a bonding material 7. The semiconductor element 2 is formed of Si or a wide bandgap semiconductor. The wide bandgap semiconductor is any of silicon carbide, gallium nitride-based materials, and diamond. The semiconductor element 2 includes an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), an RC-IGBT (Reverse Conducting IGBT), a diode, etc.

[0018] The bonding material 7 is a solder, a sintered bonding material, a conductive adhesive, etc. The sintered bonding material contains nanoparticles of Ag, for example.

[0019] The case 3 is fixed onto an end portion of the metal base circuit board 1 with an adhesive 8. The case 3 has a rectangular frame in a plan view. The case 3 houses the semiconductor element 2 and other components inside the frame. The case 3 is made of a thermoplastic resin or a thermosetting resin. Examples of thermoplastic resins include PPS (Polyphenylene Sulfide) resin and LCP (Liquid Crystal Polymer) resin.

[0020] The adhesive 8 is made of an insulating material and may be a resin such as epoxy or acrylic, or a ceramic containing SiO2 or the like.

[0021] The electrode terminals 4 are conductors configured to be connectable to an external circuit (not shown). The electrode terminals 4 are integrated with the case 3, and for example, a portion of the electrode terminals 4 is embedded and fixed in the case 3. The electrode terminals 4 are made of Cu, Al, or the like. A plating layer of Ni, for example, may be formed on the surface of the electrode terminals 4.

[0022] The metal wiring 5 electrically connects the electrode terminals 4, the conductor circuit pattern 13, and the semiconductor element 2. The metal wiring 5 is, for example, an aluminum wire. The aluminum wire may be a wire made of pure aluminum, or may be an aluminum alloy wire or a Cu wire whose mechanical strength is improved by adding a small amount of additive elements. The metal wiring 5 may be an aluminum ribbon formed into a band shape. The metal wiring 5 may also be a bus bar made of Cu, Al, or the like. The bus bar is joined to the semiconductor element 2 or the like with a joining material such as solder.

[0023] The sealing material 6 fills the space inside the case 3. The sealing material 6 covers and seals the semiconductor element 2 and the metal wiring 5. The sealing material 6 is silicone gel, epoxy resin, or the like. A lid (not shown) may be placed above the sealing material 6.

[0024] Next, a method for manufacturing the semiconductor device 101 will be described. Fig. 3 is a flowchart showing a method for manufacturing the semiconductor device 101 in the first embodiment. In the manufacturing method in the first embodiment, the semiconductor device 101 is manufactured using a large metal base plate that will ultimately yield the required number of metal base circuit boards 1. This allows the following manufacturing steps to be performed collectively, thereby improving productivity.

[0025] In step S1, an insulating layer 12 and a conductor foil 13A are laminated on the upper surface of a large-sized metal base plate. FIG. 4 is a cross-sectional view showing the configuration of a large-sized metal base plate 10 on which the insulating layer 12 and the conductor foil 13A are laminated. A plurality of individual parts 20 are defined on the large-sized metal base plate 10, and one individual part corresponds to the metal base plate 11 included in one semiconductor device 101. The insulating layer 12 is formed on the upper surface of the large-sized metal base plate 10, and the conductor foil 13A is formed on the insulating layer 12.

[0026] In step S2, the conductor circuit pattern 13 and the resist height maintaining portion 14 are formed. First, an etching resist (not shown) is formed on the conductor foil 13A attached to the insulating layer 12. The etching resist is used to etch away unnecessary portions of the conductor foil 13A, thereby forming the conductor circuit pattern 13 and the resist height maintaining portion 14. FIG. 5 is a cross-sectional view showing the configuration of a large-sized metal base plate 10 on which the conductor circuit pattern 13 and the resist height maintaining portion 14 are formed. In the first embodiment, the resist height maintaining portion 14 is formed from the same conductor foil 13A as the conductor circuit pattern 13. Therefore, the process of forming the conductor circuit pattern 13 and the process of forming the resist height maintaining portion 14 are performed simultaneously.

[0027] Furthermore, the conductor circuit pattern 13 and the resist height maintaining section 14 are formed in each of the plurality of individual portions 20. FIG. 6 is a plan view showing the configuration of the resist height maintaining section 14 formed on the large-sized metal base plate 10. The plurality of individual portions 20 defined on the large-sized metal base plate 10 are arranged in a matrix. Although the conductor circuit pattern 13 is not shown in FIG. 6, the conductor circuit pattern 13 is formed on the upper surface of the metal base plate 11 in each of the plurality of individual portions 20 via an insulating layer 12. As shown in FIG. 6, the resist height maintaining section 14 is formed along the periphery of each of the plurality of individual portions 20, inside the periphery. Furthermore, the resist height maintaining section 14 of the first embodiment is divided at least at one location in a plan view so as not to form a closed loop shape.

[0028] In step S3, a solder resist layer 15 is formed to cover the insulating layer 12, part of the conductor circuit pattern 13, and the resist height maintaining portion 14. Figure 7 is a cross-sectional view showing the configuration of a large-sized metal base plate 10 on which the solder resist layer 15 has been formed. In later steps, the solder resist is not applied to areas where components such as semiconductor elements 2 will be mounted or where metal wiring such as wire bonds will be connected. In other words, the solder resist layer 15 has openings, and the conductor circuit pattern 13 is exposed through these openings.

[0029] FIG. 8 is a plan view showing the process of applying the solder resist layer 15 using a printing squeegee 31. The printing squeegee 31 moves while being pressed against a printing mask (not shown in FIG. 8). This causes the solder resist to be supplied onto the insulating layer 12 through the openings in the printing mask. Since the printing squeegee 31 needs to follow the deflection of the printing mask caused by the conductive circuit pattern 13, the printing squeegee 31 is made of a flexible material. The printing squeegee 31 has, for example, a shape with a thin tip. The printing squeegee 31 is made of, for example, a resin such as silicone, or a metal such as stainless steel with a thin tip.

[0030] Fig. 9 is a cross-sectional view showing the state of the application process of the solder resist layer 15 when the resist height maintaining portion 14 is not provided. Fig. 10 is a cross-sectional view showing the state of the application process of the solder resist layer 15 when the resist height maintaining portion 14 is provided. Figs. 9 and 10 show cross sections taken along A-A' in Fig. 8.

[0031] In the application process of the solder resist layer 15, the printing squeegee 31 comes into contact with the printing mask 32. The solder resist is supplied onto the insulating layer 12 through the openings in the printing mask 32 and fills up to the height of the printing squeegee 31. If the resist height maintaining portion 14 is not provided, the tip of the printing squeegee 31 will bend due to the printing pressure at the openings in the printing mask 32, as shown in FIG. 9. In areas with large opening areas, particularly in areas between adjacent individual portions 20, the thickness of the solder resist layer 15 will be thinner than the surrounding thickness. In contrast, if the resist height maintaining portion 14 is provided, the printing squeegee 31 will come into contact with the resist height maintaining portion 14, as shown in FIG. 10, and the printing squeegee 31 will not bend further downward. Therefore, the solder resist layer 15 is applied uniformly to a thickness equivalent to that of the resist height maintaining portion 14.

[0032] In step S4, the solder resist layer 15 is hardened. This step S4 is a resist curing process. In the resist curing process, a hardening method suited to the material properties of the solder resist is applied.

[0033] In step S5, the large metal base plate 10 is cut to separate the plurality of individual portions 20 into individual portions. At this time, the large metal base plate 10 is cut between the resist height maintaining portion 14 in the first individual portion 20A (see FIG. 7) and the resist height maintaining portion 14 in the second individual portion 20B (see FIG. 7) that are adjacent to each other among the plurality of individual portions 20. In the first embodiment, the large metal base plate 10 is clamped by a punching die and punched out.

[0034] Fig. 11 is a cross-sectional view showing a clamped state when the resist height maintaining section 14 is not provided, and Fig. 12 is a cross-sectional view showing a clamped state when the resist height maintaining section 14 is provided.

[0035] Without the resist height maintaining portion 14, the thickness of the solder resist layer 15 becomes thinner as it moves away from the conductive circuit pattern 13, as shown in FIG. 11 . The punching dies 32A (inside the individual piece) and 32B (outside the individual piece) do not contact the solder resist layer 15 parallel to each other, and the clamp load is concentrated in the thicker portions of the solder resist layer 15. This may result in several times the pressure being applied to the thicker portions of the solder resist layer 15. If cracks or other damage occur in the insulating layer 12 directly below the solder resist layer 15 due to the localized high pressure, the yield of the semiconductor device 101 in the insulation performance test will decrease. On the other hand, if the clamp load is low, there is a concern that burrs or warpage will occur in the metal base circuit board 1. Alternatively, there is a concern that the insulating layer 12 or the solder resist layer 15 will peel off. As a result, the yield will decrease due to defective dimensions or poor appearance.

[0036] In contrast, when the resist height maintaining portion 14 is provided, the flatness of the surface of the solder resist layer 15 is improved, as shown in Fig. 12. Since the punching dies 32A and 32B contact the solder resist layer 15 parallel to each other, the metal base circuit board 1 can bear the load over a large area. Since it is possible to set a high clamp load, warping or undulation of the metal base circuit board 1 after singulation is reduced. Furthermore, a decrease in yield due to deviation from the outer dimensions is also reduced.

[0037] After step S5, predetermined processes are performed to form the semiconductor device 101. For example, the semiconductor element 2 is mounted on the conductive circuit pattern 13 of the metal base circuit board 1 via a bonding material 7. The metal base circuit board 1 is then fixed to the case 3 with an adhesive 8. The electrode terminals 4 provided on the case 3, the conductive circuit pattern 13, and the semiconductor element 2 are electrically connected by metal wiring 5 such as aluminum wire. Thereafter, a sealing material 6 is filled into the space inside the case 3, and the semiconductor element 2, the metal wiring 5, etc. are sealed with the sealing material 6. A lid may be placed over the sealing material 6.

[0038] In the above manufacturing process, when the metal base circuit board 1 is fixed to the case 3, the metal base circuit board 1 is fitted into the case 3 in a positional relationship such that the back surface of the metal base plate 11 protrudes downward below the bottom surface of the case 3. As a result, when the semiconductor device 101 is fixed to a cooling heat sink (not shown) via thermal grease, the back surface of the metal base plate 11 is in reliable contact with the heat sink, so the thickness of the thermal grease can be kept to a minimum.

[0039] However, if there is variation in the thickness of the solder resist layer 15 at the mating portion between the metal base circuit board 1 and the case 3, or if there is waviness in the metal base circuit board 1, the amount of protrusion of the metal base plate 11 will vary at the four corners of the semiconductor device 101. This may result in the semiconductor device 101 being attached at an angle to the heat sink, or being fixed with one of the corners not in contact with the heat sink. As a result, thick portions of the thermal grease are created, deteriorating heat dissipation.

[0040] In contrast, in the semiconductor device 101 of the first embodiment, the resist height maintaining portion 14 flattens the solder resist layer 15 at the mating portion between the metal base circuit board 1 and the case 3. Furthermore, waviness of the metal base circuit board 1 is reduced. This makes the protrusion amount of the metal base plate 11 uniform, reducing the inclination of the semiconductor device 101 relative to the heat sink. As a result, the thickness of the thermal grease is made uniform, improving heat dissipation.

[0041] To summarize the above, semiconductor device 101 in embodiment 1 includes conductor circuit pattern 13, resist height maintaining portion 14, and solder resist layer 15. Conductive circuit pattern 13 is provided on the upper surface of metal base plate 11 for heat dissipation via insulating layer 12. Resist height maintaining portion 14 is provided on insulating layer 12. Solder resist layer 15 covers insulating layer 12, part of conductor circuit pattern 13, and resist height maintaining portion 14. Resist height maintaining portion 14 is provided along the periphery of metal base plate 11.

[0042] In such a semiconductor device 101, variations in the thickness of the solder resist layer 15 of the metal base circuit board 1 are reduced. It is also possible to apply the solder resist layer 15 uniformly and thinly to the minimum necessary thickness. Since the solder resist layer 15 in the portion clamped in the singulation process is flattened, damage to the insulating layer 12 due to uneven clamp pressure is reduced. As a result, the yield of the semiconductor device 101 in the insulation performance test is improved. Furthermore, warping or waviness of the metal base circuit board 1 after singulation is reduced.

[0043] Resist height maintaining portion 14 in embodiment 1 is formed from the same material as conductive circuit pattern 13. The process of forming conductive circuit pattern 13 and the process of forming resist height maintaining portion 14 are carried out simultaneously, thereby improving productivity.

[0044] Furthermore, the resist height maintaining portion 14 is divided at least at one location in plan view. This configuration prevents the resist height maintaining portion 14 from becoming a noise source when the metal base circuit board 1 is incorporated into the semiconductor device 101 and used.

[0045] Furthermore, the semiconductor element 2 is made of a wide bandgap semiconductor, which reduces the power loss of the semiconductor device 101.

[0046] In Patent Document 1, after forming a conductor pattern by plating, the plating resist is left in place without being removed, thereby forming a flat surface with the plating resist and conductor pattern. This makes it possible to form a uniform and thin solder resist. However, this manufacturing method limits the conductor pattern formation method to plating. Plating requires a large burden in terms of chemical concentration management, waste liquid disposal, and safety management. Furthermore, plating is time-consuming and costly when forming a thick-film conductor pattern for high-current applications.

[0047] One method for forming thick-film conductor patterns quickly and at low cost involves attaching a conductor foil several hundred micrometers thick to an insulating layer and then removing unnecessary portions by etching to form a circuit. In this method, after the conductor pattern is formed, a solder resist must be applied using a method such as screen printing. However, the unevenness of the conductor pattern causes the printing mask to bend, resulting in unevenness in the thickness of the applied resist. This results in variations in the thickness of the resist in the area clamped by the punching die when the board is punched into individual pieces. The clamping load is biased toward areas with thick resist, which can damage the insulating layer directly below the resist. This results in a decrease in yield during product insulation performance testing.

[0048] In contrast, the resist height maintaining unit 14 of the first embodiment enables the solder resist layer 15 to be formed uniformly, reducing bias in the clamp pressure, thereby improving the yield of the semiconductor device 101 in the insulation performance test.

[0049] Next, a modification of the first embodiment will be described. The resist height maintaining portion 14 may be formed of an insulator. When the resist height maintaining portion 14 is formed of an insulator, the resist height maintaining portion 14 may have a loop shape without being divided.

[0050] Furthermore, if the resist height maintaining portion 14 is made of an insulating material, the discharge path becomes complicated on the surface of the metal base circuit board 1. Therefore, the outer dimensions of the board can be made small while maintaining the required voltage resistance performance.

[0051] When the resist height maintaining portion 14 is made of an insulating material, the step of forming the resist height maintaining portion 14 is carried out after the step of forming the conductive circuit pattern 13.

[0052] Embodiment 2 13 is a cross-sectional view showing the configuration of a first semiconductor device 102A in embodiment 2. While the semiconductor device 101 in embodiment 1 is a case-type semiconductor device, the semiconductor device 102A in embodiment 2 is a transfer mold-type semiconductor device.

[0053] The electrode terminals 4 of the semiconductor device 102A are frame-shaped leads, for example, metal sheets formed by processing a flat metal plate into a predetermined shape. The leads are mainly made of Cu, Cu alloy, Al, or the like. The sealing material 6 is a molded sealing material 6A, which is a thermosetting resin such as epoxy resin.

[0054] A transfer molding type sealing process is applied to the manufacturing method of the semiconductor device 102A of the second embodiment. First, the metal base circuit board 1 is placed in a mold. Then, resin is injected into the metal base circuit board 1 while the outer periphery of the metal base circuit board 1 is clamped by the mold. If a gap occurs between the metal base circuit board 1 and the mold when the resin is injected, the resin will leak from the gap. To prevent this, the metal base circuit board 1 is clamped by the mold with a clamping pressure of several tens to several hundreds of MPa. In the second embodiment, as in the first embodiment, the solder resist layer 15 in the clamping portion is flattened by the resist height maintaining section 14. This reduces variations in the clamping pressure during molding, reducing the occurrence of defects such as resin leakage.

[0055] 14 is a cross-sectional view showing the configuration of a second semiconductor device 102B in accordance with Embodiment 2. Like the above-described semiconductor device 102A, the semiconductor device 102B is a transfer mold type semiconductor device.

[0056] The mold sealing material 6A of the semiconductor device 102B seals the side surfaces and outer periphery of the metal base plate 11. In other words, the side surfaces and outer periphery of the metal base circuit board 1 are enclosed in the mold sealing material 6A. On the back surface of the semiconductor device 102B, only the back surface of the metal base plate 11 is exposed.

[0057] The manufacturing method of the semiconductor device 102B also employs a transfer molding process. Resin is injected into the metal base circuit board 1 while the outer periphery of the board is enclosed in a mold. During this process, a molded sealing material 6A is formed to cover the side surfaces and outer periphery of the metal base plate 11. Covering the side surfaces and outer periphery of the metal base circuit board 1 with the molded sealing material 6A ensures an insulation distance between the leads and the metal base plate 11. This allows the leads of the semiconductor device 102B to be positioned closer to the metal base circuit board 1 than in the semiconductor device 102A, enabling a thinner and more compact module. Furthermore, reduced warping and waviness of the individualized metal base circuit boards 1 improves contact between the sealing surface 16 of the metal base circuit board 1 and the mold. As a result, resin leakage defects during the sealing process are reduced.

[0058] Embodiment 3 Fig. 15 is a cross-sectional view showing the configuration of a large-sized metal base plate 10 on which a resist height maintaining portion 14 is formed in embodiment 3. Fig. 16 is a plan view showing the configuration of a resist height maintaining portion 14 formed on a large-sized metal base plate 10.

[0059] In step S2 shown in FIG. 3 , the resist height maintaining portions 14 of the third embodiment are formed between adjacent pieces 20 along the periphery of each of the plurality of pieces 20. In other words, the resist height maintaining portions 14 are formed outside the periphery of each piece 20. The area between the adjacent pieces 20 corresponds to the portion that will ultimately be punched out by the mold. Here, the resist height maintaining portions 14 are formed in a lattice pattern, and are formed so as to straddle the plurality of pieces 20. The arrangement pattern of the resist height maintaining portions 14 is not necessarily limited to a lattice pattern, and it is sufficient that the resist height maintaining portions 14 are formed so as to extend at least in a direction perpendicular to the direction in which the squeegee moves when printing the solder resist layer 15.

[0060] FIG. 17 is a plan view showing the step of applying the solder resist layer 15 using a printing squeegee 31. FIGS. 18 and 19 are cross-sectional views showing the state of the step of applying the solder resist layer 15 when the resist height maintaining section 14 is not provided. FIGS. 20 and 21 are cross-sectional views showing the state of the step of applying the solder resist layer 15 when the resist height maintaining section 14 is provided. Also, FIGS. 18 and 20 show a cross section taken along line B-B' in FIG. 17. Cross section B-B' is a cross section that crosses the individual portion 20. FIGS. 19 and 21 show a cross section taken along line C-C' in FIG. 17. Cross section C-C' is a cross section that runs between adjacent individual portions 20.

[0061] 18 and 20, in cross section B-B', a conductor circuit pattern 13 is formed at a predetermined position in each individual part 20. A printing mask 32 is positioned on the conductor circuit pattern 13, and a printing squeegee 31 is in contact with the printing mask 32. Meanwhile, in areas where there is no printing mask 32, solder resist is filled up to the height of the printing squeegee 31.

[0062] As shown in Figures 19 and 21, the conductor circuit pattern 13 is not formed in the cross section C-C'. Furthermore, if the resist height maintaining portion 14 is not formed, the printing squeegee 31 will bend, as shown in Figure 19. Since there are no structures on the insulating layer 12 between adjacent individual portions 20, the thickness of the applied solder resist layer 15 will be thin. In contrast, if the resist height maintaining portion 14 is formed, the printing squeegee 31 will be in contact with the resist height maintaining portion 14, as shown in Figure 21. The printing squeegee 31 will not bend any further. The solder resist layer 15 is applied uniformly with a thickness equivalent to that of the resist height maintaining portion 14.

[0063] Embodiment 4 Fig. 22 is an enlarged cross-sectional view showing the configuration of a portion of a power converter 200 according to embodiment 4. The power converter 200 has a semiconductor device 101 mounted with the metal base circuit board 1 shown in embodiment 1. Fig. 22 shows only the portion of the power converter 200 related to the semiconductor device 101.

[0064] The semiconductor device 101 is fixed onto a heat sink 40 for heat dissipation via a heat dissipation material 41. The heat dissipation material 41 may be heat dissipation grease, a thermally conductive sheet, or a PCTIM (Phase Change Thermal Interface Material) that utilizes phase transition. The electrode terminals 4 of the semiconductor device 101 are connected to a control circuit board 42, and the semiconductor device 101 operates in accordance with control signals provided from the control circuit board 42.

[0065] The power conversion device 200 is not limited to a specific power conversion device, but the following description will be given of a case where the power conversion device 200 is applied to a three-phase inverter.

[0066] 23 is a block diagram showing the configuration of a power conversion system including a power conversion device 200. The power conversion system is composed of a power supply 100, the power conversion device 200, and a load 300. The power supply 100 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 100 can be composed of various power supplies. For example, the power supply 100 may be composed of a DC system, a solar cell, or a storage battery, or may be composed of a rectifier circuit or an AC / DC converter connected to an AC system. The power supply 100 may also be composed of a DC / DC converter that converts DC power output from a DC system into predetermined power.

[0067] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300. The power conversion device 200 converts DC power supplied from the power source 100 into AC power and supplies the AC power to the load 300. The power conversion device 200 includes a main conversion circuit 201 that converts input DC power into AC power and outputs the AC power, and a control circuit 203 that outputs a control signal to the main conversion circuit 201 for controlling the main conversion circuit 201.

[0068] The load 300 is a three-phase electric motor driven by AC power supplied from the power conversion device 200. The load 300 is not limited to a specific application and is an electric motor mounted on various types of electrical equipment. The load 300 is, for example, an electric motor for a hybrid vehicle, an electric vehicle, a railcar, an elevator, or an air conditioning device.

[0069] The power conversion device 200 will be described in detail below. The main conversion circuit 201 includes a switching element (not shown) and a free wheel diode (not shown). When the switching element is switched, the DC power supplied from the power source 100 is converted into AC power, and the AC power is supplied to the load 300.

[0070] The main conversion circuit 201 may have a variety of specific circuit configurations, but the main conversion circuit 201 of the fourth embodiment is a two-level, three-phase full-bridge circuit. The main conversion circuit 201 is composed of six switching elements and six freewheeling diodes connected in anti-parallel to each switching element. Each switching element of the main conversion circuit 201 is formed by a semiconductor module 202 to which the semiconductor device 101 shown in the first embodiment is applied. The six switching elements form upper and lower arms, with every two switching elements connected in series. Each upper and lower arm forms one phase (U phase, V phase, W phase) of the full-bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 201, are connected to a load 300.

[0071] The main conversion circuit 201 includes a drive circuit (not shown) that drives each switching element. The drive circuit may be built into the semiconductor module 202 or may be provided separately from the semiconductor module 202. The drive circuit generates drive signals that drive the switching elements of the main conversion circuit 201 and supplies the drive signals to the control electrodes of the switching elements of the main conversion circuit 201. Specifically, the drive circuit outputs a drive signal that turns the switching element on and a drive signal that turns the switching element off to the control electrodes (not shown) of each switching element in accordance with a control signal from a control circuit 203 (described later). When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) that is greater than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) that is smaller than the threshold voltage of the switching element.

[0072] The control circuit 203 controls the switching elements of the main conversion circuit 201 so that a desired power is supplied to the load 300. Specifically, the control circuit 203 calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 300. For example, the control circuit 203 controls the main conversion circuit 201 by PWM (Pulse Width Modulation) control, which modulates the on time of the switching elements according to the voltage to be output. The control circuit 203 then outputs a control command (control signal) to a drive circuit included in the main conversion circuit 201 so that an on signal is output to a switching element that should be in the on state at a certain point in time, and an off signal is output to a switching element that should be in the off state. In accordance with this control signal, the drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element.

[0073] In the power conversion device 200 as described above, the semiconductor device 101 having the metal base circuit board 1 shown in embodiment 1 is applied as the switching element of the main conversion circuit 201, thereby improving the reliability of the insulation performance of the power conversion device 200.

[0074] In the fourth embodiment, an example has been described in which the semiconductor device 101 having the metal base circuit board 1 shown in the first embodiment is applied to a two-level three-phase inverter, but the configuration of the power conversion device 200 is not limited to this. The power conversion device 200 may be a three-level or multi-level power conversion device. The power conversion device 200 may be a single-phase inverter that supplies power to a single-phase load. The power conversion device 200 may be a DC / DC converter or an AC / DC converter that supplies power to a DC load or the like. In this way, the semiconductor device 101 having the metal base circuit board 1 shown in the first embodiment is applicable to various power conversion devices 200.

[0075] Furthermore, the load 300 connected to the power conversion device 200 is not limited to an electric motor. The power conversion device 200 may be applied to, for example, an electric discharge machine, a laser processing machine, an induction heating cooker, or a power supply device for a contactless power supply system. Alternatively, the power conversion device 200 may be applied to a power conditioner for a solar power generation system, a power storage system, or the like.

[0076] In the present disclosure, the embodiments can be freely combined, and the embodiments can be modified or omitted as appropriate.

[0077] Various aspects of the present disclosure are summarized below as appendices.

[0078] (Appendix 1) a conductor circuit pattern provided on an upper surface of a metal base plate for heat dissipation via an insulating layer; a resist height maintaining portion selectively provided on a portion of the insulating layer where the conductor circuit pattern is not present; a solder resist layer that covers the insulating layer, a portion of the conductor circuit pattern, and the resist height maintaining portion, The resist height maintaining portion is provided along the periphery of the metal base plate.

[0079] (Appendix 2) 2. The semiconductor device according to claim 1, wherein the resist height maintaining portion is formed of the same material as the conductor circuit pattern.

[0080] (Appendix 3) 2. The semiconductor device according to claim 1, wherein the resist height maintaining portion is formed of an insulating material.

[0081] (Appendix 4) 3. The semiconductor device according to claim 1, wherein the resist height maintaining portion is divided at least at one location in a plan view.

[0082] (Appendix 5) a metal base circuit board including the metal base plate, the conductor circuit pattern, the resist height maintaining portion, and the solder resist layer; a semiconductor element bonded to the conductor circuit pattern; a case that houses the semiconductor element and is fixed onto an end of the metal base circuit board; 5. The semiconductor device according to claim 1, further comprising: metal wiring that electrically connects an electrode terminal provided on the case, the conductive circuit pattern, and the semiconductor element.

[0083] (Appendix 6) a sealing material that seals the semiconductor element bonded to the conductor circuit pattern, 6. The semiconductor device according to claim 1, wherein the sealing material seals a side surface of the metal base plate.

[0084] (Appendix 7) a semiconductor element bonded to the conductor circuit pattern, 7. The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide bandgap semiconductor.

[0085] (Appendix 8) 8. The semiconductor device according to claim 7, wherein the wide band gap semiconductor is any one of silicon carbide, a gallium nitride-based material, and diamond.

[0086] (Appendix 9) a main conversion circuit including the semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 8, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

[0087] (Appendix 10) a step of forming a conductor circuit pattern on an upper surface of a large metal base plate having a plurality of individual sections arranged in a matrix, the metal base plate being a part of the plurality of individual sections, with an insulating layer interposed therebetween; selectively forming a resist height maintaining portion on the insulating layer in a portion where the conductor circuit pattern is not present; forming a solder resist layer that covers the insulating layer, a portion of the conductor circuit pattern, and the resist height maintaining portion; A method for manufacturing a semiconductor device, wherein the resist height maintaining portion is formed along the periphery of each of the plurality of individual portions.

[0088] (Appendix 11) the step of forming the conductor circuit pattern and the step of forming the resist height maintaining portion are carried out simultaneously, 11. The method for manufacturing a semiconductor device according to claim 10, wherein the resist height maintaining portion is formed of the same material as the conductor circuit pattern.

[0089] (Appendix 12) further comprising a step of encapsulating the semiconductor element bonded to the conductor circuit pattern with an encapsulant; 12. The method for manufacturing a semiconductor device according to claim 10 or 11, wherein the step of encapsulating the semiconductor element is a transfer molding encapsulation step, and includes clamping the solder resist layer planarized by the resist height maintaining portion with a mold.

[0090] (Appendix 13) further comprising a step of encapsulating the semiconductor element bonded to the conductor circuit pattern with an encapsulant; the step of encapsulating the semiconductor element is an encapsulation step using a transfer mold method, 12. The method for manufacturing a semiconductor device according to claim 10, wherein the sealing material seals the side surface and the outer periphery of the metal base plate. [Explanation of symbols]

[0091] 1 metal base circuit board, 2 semiconductor element, 3 case, 4 electrode terminal, 5 metal wiring, 6 sealing material, 6A mold sealing material, 7 bonding material, 8 adhesive material, 10 large metal base plate, 11 metal base plate, 12 insulating layer, 13 conductor circuit pattern, 13A conductor foil, 14 resist height maintaining portion, 15 solder resist layer, 16 sealing surface, 20 piece portion, 20A first piece portion, 20B second piece portion, 31 printing squeegee, 32 printing mask, 32A punching die, 32B punching die, 40 heat sink, 41 heat dissipation material, 42 control circuit board, 100 power supply, 101 semiconductor device, 102A semiconductor device, 102B semiconductor device, 200 power conversion device, 201 main conversion circuit, 202 semiconductor module, 203 control circuit, 300 load.

Claims

1. a conductor circuit pattern provided on an upper surface of a metal base plate for heat dissipation via an insulating layer; a resist height maintaining portion selectively provided on a portion of the insulating layer where the conductor circuit pattern is not present; a solder resist layer that covers the insulating layer, a portion of the conductor circuit pattern, and the resist height maintaining portion, The resist height maintaining portion is provided along the periphery of the metal base plate.

2. 2. The semiconductor device according to claim 1, wherein said resist height maintaining portion is formed from the same material as said conductor circuit pattern.

3. 2. The semiconductor device according to claim 1, wherein said resist height maintaining portion is formed of an insulating material.

4. 2. The semiconductor device according to claim 1, wherein said resist height maintaining portion is divided at least at one location in a plan view.

5. a metal base circuit board including the metal base plate, the conductor circuit pattern, the resist height maintaining portion, and the solder resist layer; a semiconductor element bonded to the conductor circuit pattern; a case that houses the semiconductor element and is fixed onto an end of the metal base circuit board; 2. The semiconductor device according to claim 1, further comprising: metal wiring electrically connecting electrode terminals provided on said case, said conductive circuit pattern, and said semiconductor element.

6. a sealing material that seals the semiconductor element bonded to the conductor circuit pattern, The semiconductor device according to claim 1 , wherein the sealing material seals the side surfaces of the metal base plate.

7. a semiconductor element bonded to the conductor circuit pattern, 2. The semiconductor device according to claim 1, wherein said semiconductor element is formed of a wide bandgap semiconductor.

8. 8. The semiconductor device according to claim 7, wherein said wide band gap semiconductor is any one of silicon carbide, a gallium nitride based material, and diamond.

9. a main conversion circuit including the semiconductor device according to claim 1, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

10. a step of forming a conductor circuit pattern on an upper surface of a large metal base plate having a plurality of individual sections arranged in a matrix, the metal base plate being a part of the plurality of individual sections, with an insulating layer interposed therebetween; selectively forming a resist height maintaining portion on the insulating layer in a portion where the conductor circuit pattern is not present; forming a solder resist layer that covers the insulating layer, a portion of the conductor circuit pattern, and the resist height maintaining portion; A method for manufacturing a semiconductor device, wherein the resist height maintaining portion is formed along the periphery of each of the plurality of individual portions.

11. the step of forming the conductor circuit pattern and the step of forming the resist height maintaining portion are carried out simultaneously, The method for manufacturing a semiconductor device according to claim 10 , wherein the resist height maintaining portion is formed of the same material as the conductive circuit pattern.

12. further comprising a step of encapsulating the semiconductor element bonded to the conductor circuit pattern with an encapsulant; 11. The method for manufacturing a semiconductor device according to claim 10, wherein the step of encapsulating the semiconductor element is a transfer molding encapsulation step, and includes clamping the solder resist layer planarized by the resist height maintaining portion with a mold.

13. further comprising a step of encapsulating the semiconductor element bonded to the conductor circuit pattern with an encapsulant; the step of encapsulating the semiconductor element is an encapsulation step using a transfer mold method, The method for manufacturing a semiconductor device according to claim 10 , wherein the sealing material seals the side surfaces and the outer periphery of the metal base plate.

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