Method for producing laminate

Abstract

To provide a laminate electrically connected to a circuit pattern on both surfaces or an inner layer, which has high adhesion between a base material and a conductor circuit without lowering conductivity due to damage of a conductive silver nanoparticle layer in a micro-etching process, has less undercut, and can form wiring having a rectangular cross-sectional shape excellent as circuit wiring, and to provide a printed wiring board using the laminate.SOLUTION: In the laminate, a resinous layer (B), a plating base layer (C) containing a conductive material (c1) and a dispersing agent (c2), and a copper layer (D) are sequentially laminated on at least one surface of a support (A). It has been found that by the step of selectively removing the copper layer (D) with an etching solution, it is possible to form a printed wiring board having high adhesion between the substrate and the conductor circuit, less undercut, good design reproducibility, a good rectangular cross-sectional shape as a circuit wiring, and being electrically connected to a circuit pattern on both sides or an inner layer, and the present invention has been completed.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a printed wiring board, a high-frequency transmission printed wiring board, a rigid printed wiring board, a package substrate, an interposer, an antenna, a semiconductor chip, etc. [Background technology]

[0002] As electronic devices become smaller and faster, there is a demand for higher density and performance in printed wiring boards. To meet this demand, there is a need for a wiring formation method that uses a sufficiently thin metal layer with a smooth surface.

[0003] There are three methods for forming wiring on printed wiring boards: subtractive, semi-additive (SAP), and modified SAP (MSAP), of which SAP and MSAP are suitable for high-frequency transmission applications and for forming fine wiring. SAP and MSAP share a common wiring formation method: a resist pattern is formed on the non-wiring areas on a plating underlayer (a thin conductive layer), and the plating underlayer is used as an electrode (conductive seed) for electrolytic plating. After plating is thickened on the circuit pattern areas where no resist is formed, the resist is peeled off, and the unnecessary plating underlayer on the non-wiring areas is removed by etching.

[0004] Known problems with printed wiring boards caused by the etching process of the plating underlayer include reduced circuit insulation reliability due to etching residue, increased electrical resistance of the circuit due to a reduction in wiring width (side etching) caused by excessive etching, and reduced adhesive strength between the wiring and substrate due to excessive etching of the plating underlayer in the wiring area (undercut).For this reason, the etching process of the plating underlayer requires that there be no residue of the plating underlayer, that the side etching is small, and that there is no undercut of the plating underlayer.

[0005] Furthermore, when the plating base layer and the conductive layer of the circuit pattern are formed of the same metal, such as in the combination of a copper plating base layer and a copper circuit pattern conductive layer, when the plating base layer in the non-pattern forming area is removed, the conductive layer of the circuit pattern is also etched at the same time, which is known to result in the circuit pattern becoming narrower and thinner and also increase the surface roughness of the conductive layer of the circuit pattern, and this has been a problem that needed to be solved in the manufacture of high-density wiring and wiring for high-frequency transmission. In response to these problems, the present inventors have invented a technology for forming printed wiring boards having a smooth circuit layer surface with good design reproducibility, by using a substrate having a conductive silver particle layer formed on the surface of an insulating substrate as a substrate for semi-additive processing, without causing the circuit pattern to become thinner or thinner in the seed layer etching step (Non-Patent Documents 1 and 2). This technology is capable of forming circuits not only on one side but also on both sides. However, when double-sided connection is performed by forming holes in a semi-additive substrate having conductive silver particle layers on both sides of an insulating substrate in order to connect double-sided circuits, if a double-sided electrical connection process is performed using a conventional direct plating method, the conductive silver particle layer is damaged and its conductivity is reduced in the micro-etching process that removes conductive substances such as palladium, conductive polymers, and carbon that have been adsorbed on the plating base layer, making it difficult to use the resulting substrate as a plating base layer for forming a circuit pattern. [Prior art documents] [Patent documents]

[0006] [Non-Patent Document 1] Akira Murakawa, Norimasa Fukazawa, Wataru Fujikawa, Jun Shiraga: "Copper Pattern Formation Technology Using Semi-Additive Method with Silver Nanoparticles as a Substrate", Proceedings of the 28th Microelectronics Symposium, pp. 285-288, 2018. [Non-patent document 2] Akira Murakawa, Shota Shinbayashi, Norimasa Fukazawa, Wataru Fujikawa, Jun Shiraga: "Formation of Copper Wiring by Semi-Additive Method Using Silver Seed Layer", Proceedings of the 33rd Japan Institute of Electronics Packaging Spring Conference, 11B2-03, 2019. Summary of the Invention [Problem to be solved by the invention]

[0007] The problem to be solved by the present invention is to provide a laminate electrically connected to a circuit pattern on both sides or an inner layer, which can form wiring having a rectangular cross-sectional shape suitable for circuit wiring, with high adhesion between the substrate and the circuit pattern, little undercut, and good design reproducibility, without damaging the conductive silver particle layer and reducing conductivity in a microetching process, and a circuit board using the laminate; a method for manufacturing a circuit board using the laminate; and printed wiring boards, package substrates, interposers, and electromagnetic wave seeding films manufactured using these manufacturing methods. [Means for solving the problem]

[0008] As a result of intensive research to solve the above-mentioned problems, the present inventors have found that in a method for producing a laminate in which a resin layer (B), a conductive plating underlayer (C) containing a conductive material (c1) and a dispersant (c2), and a copper layer (D) are sequentially laminated on at least one surface of a support (A), by a step of selectively removing the copper layer (D) with an etching solution, it is possible to form a circuit board that has high adhesion between the substrate and the circuit pattern, little undercut, good design reproducibility, and a rectangular cross-sectional shape that is suitable for circuit wiring, and is electrically connected to circuit patterns on both sides or inner layers, and have completed the present invention.

[0009] That is, the present invention provides: 1. A method for producing a laminate in which a resin layer (B), a conductive plating underlayer (C) containing a conductive substance (c1) and a dispersant (c2), and a copper layer (D) are sequentially laminated on at least one surface of a support (A), the method comprising a step of selectively removing the copper layer (D) with an etching solution. 2. The method for producing a laminate according to 1, wherein the etching solution has a ratio of the rate at which the etching solution etches copper to the rate at which the etching solution etches silver (copper etching rate / silver etching rate) of 5 or more. 3. The method for producing a laminate according to 2, wherein the etching solution is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate. 4. The method for producing a laminate according to 3, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass% sulfuric acid, 1 to 10 mass% hydrogen peroxide, 0.1 to 5 mass% organic additives, and 55 to 97.9 mass% water in the total etching solution. 5. The method for producing a laminate according to 3, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution. 6. The method for producing a laminate according to 3, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution. 7. The method for producing a laminate according to 1, wherein the support (A) is made of one or more materials selected from the group consisting of a rigid substrate, a film, a build-up film, ceramics, glass, a silicon wafer, and a metal. 8. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film manufactured using a laminate obtained by the method for manufacturing a laminate described in 1. 9. A method for producing a circuit board using a laminate as a base material, in which conductive layers are formed on both sides of a planar support (A), at least one of which is a conductive layer formed by sequentially laminating a resin layer (B), a conductive plating base layer (C), and a copper layer (D), Step 1: forming through holes penetrating both surfaces of the laminate; a step 2 of providing palladium, a conductive polymer, or carbon on the walls of the through holes of the support (A) and on the surface of the copper layer (D) to make the surfaces of the through holes conductive; Step 3: selectively removing the copper layer (D) with an etching solution to expose the conductive plating underlayer (C); Step 4: forming a pattern resist on the conductive plating underlayer (C); Step 5: electrically connecting both surfaces of the substrate by electrolytic copper plating and forming a conductive layer (E) of the circuit pattern; Step 6: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising: 10. A method for producing a circuit board according to claim 9, wherein the conductive layers on both sides of the support (A) are made of a laminate as a base material, the laminate being a conductive layer formed by sequentially laminating the resin layer (B), the plating base layer (C), and the copper layer (D) on both sides. 11. The method for producing a circuit board according to claim 9, wherein the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the copper etching rate to the silver etching rate (copper etching rate / silver etching rate) of 5 or more. 12. The method for producing a circuit board according to 11, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate. 13. The method for producing a circuit board according to 11, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass% sulfuric acid, 1 to 10 mass% hydrogen peroxide, 0.1 to 5 mass% organic additives, and 55 to 97.9 mass% water in the total etching solution. 14. The method for producing a circuit board according to 11, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution. 15. The method for producing a circuit board according to 11, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution. 16. The method for producing a circuit board according to 9, wherein the support (A) is one or more selected from the group consisting of a rigid substrate, a film, a build-up film, ceramic, glass, a silicon wafer, and a metal. 17. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board described in 9. 18. A method for producing a circuit board using a laminate as a base material, in which a support (A), a resin layer (B), a conductive plating base layer (C), and a copper layer (D) are sequentially laminated on at least one surface of a substrate on which a conductive pattern has been formed, Step 1: forming a blind hole for connecting the surface of the laminate and the conductive pattern formed inside by lamination; a step 2 of providing palladium, a conductive polymer, or carbon on the walls of the non-penetrating pores of the support (A) and on the surface of the copper layer (D) to make the surfaces of the non-penetrating pores conductive; Step 3: selectively removing the copper layer (D) with an etching solution to expose the conductive plating underlayer (C); Step 4: forming a pattern resist on the conductive plating underlayer (C); Step 5: electrically connecting the surface of the laminate and the conductive pattern of the inner layer by electrolytic copper plating and forming a conductive layer (E) of the circuit pattern; Step 6: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising: 19. A method for manufacturing a circuit board according to claim 18, characterized in that the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the copper etching rate to the silver etching rate (copper etching rate / silver etching rate) of 5 or more. 20. The method for producing a circuit board according to 19, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate. 21. The method for producing a circuit board according to claim 20, characterized in that the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass% sulfuric acid, 1 to 10 mass% hydrogen peroxide, 0.1 to 5 mass% organic additives, and 55 to 97.9 mass% water in the total etching solution. 22. The method for producing a circuit board according to claim 20, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution. 23. The method for producing a circuit board according to claim 20, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution. 24. The method for producing a circuit board according to 18, wherein the support (A) is one or more types selected from the group consisting of a rigid substrate, a film, and a build-up film. 25. A printed wiring board, package substrate, interposer, or electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board according to 18. 26. A method for producing a circuit board using a laminate as a base material, in which conductive layers are formed on both sides of a planar support (A), at least one of which is a conductive layer formed by sequentially laminating the resin layer (B), a conductive plating base layer (C), and a copper layer (D), Step 1: forming through holes that penetrate both surfaces of the laminate; a step 2 of forming a first conductive copper layer (F) on the walls of the through holes of the support (A) and on the surface of the copper layer (D) by electroless copper plating, which electrically connects both surfaces; Step 3: forming a second conductive copper layer (G1) on the first conductive copper layer (F1) on the surface of the through hole by electrolytic copper plating to fill the hole in the through hole; a step 4 of selectively removing the first conductive copper layer (F2), the second conductive copper layer (G2), and the copper layer (D) formed on the copper layer (D) in the electroless copper plating and electrolytic copper plating steps with an etching solution to expose the conductive plating base layer (C); Step 5: forming a pattern resist on the conductive plating underlayer (C); Step 6: forming a conductive layer (E) of a circuit pattern by electrolytic copper plating; Step 7: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising: 27. A method for manufacturing a circuit board according to claim 26, characterized in that the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the copper etching rate to the silver etching rate (copper etching rate / silver etching rate) of 5 or more. 28. The method for producing a circuit board according to 27, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate. 29. The method for producing a circuit board according to claim 28, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass% sulfuric acid, 1 to 10 mass% hydrogen peroxide, 0.1 to 5 mass% organic additives, and 55 to 97.9 mass% water in the total etching solution. 30. The method for producing a circuit board according to 28, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution. 31. The method for producing a circuit board according to claim 28, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution. 32. The method for producing a circuit board according to claim 26, wherein the support (A) is one or more selected from the group consisting of a rigid substrate, a film, a build-up film, ceramic, glass, a silicon wafer, and a metal. 33. A printed wiring board, package substrate, interposer, or electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board according to 26. 34. A method for producing a circuit board using a laminate as a base material, in which a support (A), a resin layer (B), a conductive plating base layer (C), and a copper layer (D) are sequentially laminated on at least one surface of a substrate on which a conductive pattern has been formed, Step 1: forming a non-through hole for connecting the surface of the laminate and the conductive pattern formed inside by lamination; a step 2 of forming a first conductive copper layer (F) by electroless copper plating on the walls of the non-through holes of the support (A) and on the surface of the copper layer (D), which electrically connects the surface of the laminate and the conductive pattern of the inner layer; a step 3 of forming a copper layer (G1) filling the holes in the non-through holes by electrolytic copper plating on the first conductive copper layer (F1) on the surface of the non-through holes; a step 4 of selectively removing the first conductive copper layer (F2) and the second conductive copper layer (G2) formed on the copper layer (D) in the electroless copper plating and electrolytic copper plating steps with an etching solution to expose the conductive plating base layer (C); Step 5: forming a pattern resist on the conductive plating underlayer (C); Step 6: forming a conductive layer (E) of a circuit pattern by electrolytic copper plating; Step 7: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising: 35. A method for manufacturing a circuit board according to claim 34, characterized in that the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the copper etching rate to the silver etching rate (copper etching rate / silver etching rate) of 5 or more. 36. The method for producing a circuit board according to 35, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate. 37. A method for producing a circuit board, characterized in that the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass% sulfuric acid, 1 to 10 mass% hydrogen peroxide, 0.1 to 5 mass% organic additives, and 55 to 97.9 mass% water in the total etching solution. 38. The method for producing a circuit board according to 36, characterized in that the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution. 39. The method for producing a circuit board according to 36, characterized in that the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution. 40. The method for producing a circuit board according to 34, wherein the support (A) is one or more types selected from the group consisting of a rigid substrate, a film, and a build-up film. 41. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board according to 34. [Effects of the Invention]

[0010] By using the manufacturing method of the present invention, it is possible to manufacture, with good design reproducibility, circuit boards in which circuit wiring having a good rectangular cross section, which has a smooth surface and high adhesion, is electrically connected to one another on various smooth supports (A) via the insulating supports (A). Therefore, by using the technology of the present invention, it is possible to provide multilayered circuit boards with high density, high performance, and high frequency transmission.

[0011] The circuit pattern manufacturing method of the present invention can be suitably used for electronic components such as printed wiring boards, rigid printed wiring boards, flexible printed wiring boards, package substrates, ceramic substrates, glass substrates, silicon wafers, metal substrates, conductive films for touch panels, metal meshes for touch panels, organic solar cells, organic EL elements, organic transistors, RFIDs such as contactless IC cards, electromagnetic wave shields, LED lighting substrates, digital signage, etc. In particular, it is ideal for rigid printed wiring boards and flexible printed wiring boards.

[0012] Furthermore, by applying it to molded products, it can be suitably used for decoration of electronic components such as molded circuit boards (MIDs), connectors for connecting wiring for optical communications, electrical components, peripheral components for electric motors, and battery components; decorative components for automobiles, lamp reflectors, mobile phones, personal computers, mirrors, containers, home appliances, various switches, faucet components, shower heads, etc. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a process diagram for producing the laminate according to claim 1. [Figure 2] 11 is a process diagram for producing the circuit board according to claim 10. FIG. [Figure 3] 19 is a process diagram for producing the circuit board according to claim 18. [Figure 4] 27 is a process diagram for producing the circuit board according to claim 26. [Figure 5] 35 is a process diagram for producing the circuit board according to claim 34. DETAILED DESCRIPTION OF THE INVENTION

[0014] This is a method for producing a laminate in which a resin layer (B), a conductive plating underlayer (C) containing a conductive material (c1) and a dispersant (c2), and a copper layer (D) are sequentially laminated on at least one surface of a support (A), and is characterized by including a step of selectively removing the copper layer (D) with an etching solution.

[0015] Examples of materials for the support (A) include polyimide resins, modified polyimide resins (MPI), polyamideimide resins, polyamide resins, polyethylene terephthalate resins, polybutylene terephthalate resins, polyethylene naphthalate resins, polycarbonate resins, acrylonitrile-butadiene-styrene (ABS) resins, polyarylate resins, polyacetal resins, acrylic resins such as poly(methyl meth)acrylate, polyvinylidene fluoride resins, polytetrafluoroethylene resins, polyvinyl chloride resins, polyvinylidene chloride resins, vinyl chloride resins graft-copolymerized with acrylic resins, polyvinyl alcohol resins, polyethylene resins, polypropylene resins, urethane resins, and silicone resins. Examples of materials that can be used include olefin resin, polystyrene, liquid crystal polymer (LCP), polyether ether ketone (PEEK) resin, polyphenylene sulfide (PPS), polyphenylene sulfone (PPSU), polyphenylene ether (PPE), bismaleimide-triazine resin (BT resin), fluororesin composite polyimide resin (a film with a fluororesin layer formed on the surface of a polyimide resin), thermoplastic polyimide resin composite polyimide resin (a film with a thermoplastic polyimide resin layer formed on the surface of a polyimide resin), cellulose nanofiber, silicone, silicone carbide, gallium nitride, sapphire, ceramics, glass, diamond-like carbon (DLC), and alumina.

[0016] Furthermore, a resin substrate containing a thermosetting resin and an inorganic filler can also be suitably used as the support (A). Examples of the thermosetting resin include epoxy resins, phenolic resins, unsaturated imide resins, cyanate resins, isocyanate resins, benzoxazine resins, oxetane resins, amino resins, unsaturated polyester resins, allyl resins, dicyclopentadiene resins, silicone resins, triazine resins, melamine resins, liquid crystal polymers (LCPs), polyether ether ketone (PEEK) resins, polyphenylene sulfide (PPS), polyphenylene sulfone (PPSU), and polyphenylene ether (PPE). Examples of the inorganic filler include silica, alumina, talc, mica, aluminum hydroxide, magnesium hydroxide, calcium carbonate, aluminum borate, and borosilicate glass. These thermosetting resins and inorganic fillers can be used alone or in combination of two or more.

[0017] The inorganic filler may be in the form of powder, flakes, fibers, or the like.

[0018] The support (A) may be in the form of a planar flexible material, a rigid material, or a rigid-flexible material. More specifically, the support (A) may be a commercially available material formed into a film, sheet, or plate, or may be a material formed into a planar shape from a solution, melt, or dispersion of the above-mentioned resin. The support (A) may also be a substrate in which the above-mentioned resin material is formed on a conductive material such as a metal, or a substrate in which the above-mentioned resin material is laminated on a substrate on which a circuit pattern is formed.

[0019] For flexible wiring boards, polyimide resin, modified polyimide resin (MPI), polytetrafluoroethylene resin, cycloolefin resin, polystyrene, liquid crystal polymer (LCP), polyphenylene sulfide (PPS), fluororesin composite polyimide resin (film with a fluororesin layer formed on the surface of polyimide resin, multilayer film with polyimide resin and fluororesin alternately laminated), thermoplastic polyimide resin composite polyimide resin (film with a thermoplastic polyimide resin layer formed on the surface of polyimide resin), etc. can be used.

[0020] When the support (A) is in the form of a film or sheet, the thickness is not particularly limited, but in consideration of flexibility and bendability, it is usually about 1 to 5,000 μm, more preferably 1 to 500 μm, and even more preferably 1 to 200 μm.

[0021] For rigid wiring boards, composite substrates of glass fiber and epoxy resin (glass epoxy resin, FR-4, FR-5), composite substrate of paper and epoxy resin (FR-3), composite substrate of glass nonwoven fabric and epoxy resin (CEM-3), composite substrate of paper, glass nonwoven fabric and epoxy resin (CEM-1), composite substrate of paper and phenolic resin (paper phenolic resin, FR-1, FR-2), composite substrate of glass fiber and PPE resin (e.g., Panasonic's Megtron 6, Megtron 7, Megtron 8), composite substrate of glass fiber and maleimide resin, bismaleimide triazine resin (BT resin), composite substrate of ceramic and fluororesin (e.g., Roger Examples of materials that can be used include: a composite substrate of silica and epoxy resin (for example, Ajinomoto Co.'s build-up film), polyimide, liquid crystal polymer, polyether ether ketone, polyphenylene sulfide, polystyrene, polycarbonate, polyester resin, polypropylene, polyethylene, acrylic resin, urethane resin, cycloolefin polymer, silicone, silicone carbide, gallium nitride, gallium oxide, sapphire, ceramics, alumina ceramic, alumina, glass, diamond-like carbon (DLC), aluminum, stainless steel, copper, silver, gold, iron, and nickel.

[0022] Examples of the support (A) include synthetic fibers such as polyester fibers, polyamide fibers, and polyaramid fibers, inorganic fibers such as carbon fibers, and natural fibers such as cellulose nanofibers.

[0023] The surface of the support (A) is preferably smooth for circuit boards requiring high-frequency transmission. In fifth-generation mobile communication systems (5G) and millimeter-wave communications, the frequency of alternating current is increasing due to high-speed communication. As the frequency increases, a skin effect occurs in which current flows through the surface layer of copper wiring. Therefore, if the surface roughness of the outermost copper wiring through which the current flows is large, resistance increases, resulting in high transmission loss. Therefore, the surface of the support (A) is preferably smooth, and the surface roughness (maximum height Sz) measured with a laser microscope is preferably in the range of 0.001 to 50 μm, more preferably 0.01 to 20 μm, and more preferably 0.05 to 10 μm. The surface roughness (maximum height Sz) is measured using the evaluation method specified in ISO 25178 and represents the distance from the highest point to the lowest point on the surface.

[0024] Methods for smoothing the support (A) include physical smoothing of the surface of the support (A) and chemical smoothing. Physical smoothing methods include calendaring, cutting, grinding, abrasive polishing, electrical discharge machining, laser machining, and water jet machining, in which the support (A) is passed between two smooth rolls to smooth the surface. Chemical smoothing methods include electrolytic polishing and etching polishing.

[0025] Furthermore, when the support (A) is an uncured or semi-cured thermosetting resin or thermoplastic resin, smooth metal foils such as copper foil or aluminum foil, or heat-resistant films such as smooth polyimide films or fluororesin films can be used as the smoothing treatment substrate, and the smooth surface can be attached to the surface of the support (A) by thermocompression bonding, followed by peeling to transfer the smooth surface to the surface of the support (A). In particular, when the support (A) is a substrate for a rigid substrate containing a thermosetting resin such as an epoxy resin or polyphenylene ether resin, glass fiber, or inorganic filler, the smooth surface of the copper foil can be thermocompression bonded to the substrate using a press or the like, and then the copper foil can be removed by etching with cupric chloride or ferric chloride to smooth the substrate surface. The surface roughness of the smoothing treatment substrate affects the surface roughness of the support (A) that is ultimately desired to be smooth. Therefore, the surface roughness of the smoothing-treated substrate is preferably smooth, and the surface roughness (maximum height Sz) measured with a laser microscope is preferably in the range of 0.001 to 50 μm, more preferably 0.01 to 20 μm, and more preferably 0.05 to 10 μm. The surface roughness (maximum height Sz) is measured using the evaluation method described in ISO 25178 and represents the distance from the highest point to the lowest point on the surface.

[0026] Furthermore, since this can improve the adhesion between the support (A) and the resin layer (B) described below, the surface of the support (A) may be subjected to a surface treatment such as forming fine irregularities, cleaning off dirt adhering to the surface, or introducing functional groups such as hydroxyl groups, carbonyl groups, or carboxyl groups. Specifically, the surface may be subjected to a dry treatment such as corona discharge treatment, plasma discharge treatment, or ultraviolet treatment, or a wet treatment using water, an aqueous solution of an acid or alkali, or an organic solvent.

[0027] Next, the resin layer (B) will be described. The resin layer (B) is responsible for adhesion with the conductive plating underlayer (C) described later, thereby enabling strong adhesion between the conductive layer (E) of the circuit pattern described later and the support (A).

[0028] The resin layer (B) can be formed by applying a resin solution to a part or the whole of the surface of the support (A) and then removing the solvent, such as an aqueous medium or an organic solvent, contained in the resin solution.

[0029] Examples of methods for applying the resin layer (B) onto the surface of the support (A) include gravure, coating, screen, roller, rotary, and spray methods.

[0030] The surface of the resin layer (B) is preferably surface-treated, for example, by a plasma discharge treatment such as a corona discharge treatment, a dry treatment such as an ultraviolet treatment, or a wet treatment using water, an acidic or alkaline chemical solution, an organic solvent, or the like, in order to further improve adhesion to the conductive plating underlayer (C) described below.

[0031] After the resin layer (B) is applied to the surface of the support (A), the solvent contained in the coating layer is generally removed by, for example, drying using a dryer to volatilize the solvent. The drying temperature may be set within a range that allows the solvent to volatilize and does not adversely affect the support (A), such as thermal deformation.

[0032] The thickness of the resin layer (B) varies depending on the application of the laminate of the present invention, but is preferably in a range that further improves adhesion between the support (A) and the conductive plating underlayer (C) described below, and the thickness of the resin layer (B) is preferably in the range of 0.01 μm to 100 μm, preferably in the range of 0.03 μm to 50 μm, more preferably in the range of 0.05 μm to 30 μm, and even more preferably in the range of 0.1 μm to 5 μm.

[0033] As described above, the surface of the resin layer (B) is preferably smooth. Therefore, the surface roughness (maximum height Sz) measured with a laser microscope is preferably in the range of 0.001 to 30 μm, more preferably 0.01 to 20 μm, and more preferably 0.05 to 10 μm. The surface roughness (maximum height Sz) is measured by the evaluation method described in ISO 25178 and represents the distance from the highest point to the lowest point on the surface.

[0034] The resin composition (b) for the resin layer used to form the resin layer (B) may contain various resins and a solvent.

[0035] Examples of the resin (b) include urethane resins, acrylic resins, core-shell composite resins with a urethane resin shell and an acrylic resin core, epoxy resins, phenoxy resins, imide resins, amide resins, melamine resins, phenolic resins, urea-formaldehyde resins, blocked isocyanate polyvinyl alcohol obtained by reacting polyisocyanate with a blocking agent such as phenol, and polyvinylpyrrolidone. Core-shell composite resins with a urethane resin shell and an acrylic resin core can be obtained, for example, by polymerizing acrylic monomers in the presence of the urethane resin. These resins can be used alone or in combination of two or more.

[0036] The aminotriazine-modified novolac resin is a novolac resin in which an aminotriazine ring structure and a phenol structure are bonded via a methylene group. The aminotriazine-modified novolac resin can be obtained, for example, by co-condensing an aminotriazine compound such as melamine, benzoguanamine, or acetoguanamine with a phenol compound such as phenol, cresol, butylphenol, bisphenol A, phenylphenol, naphthol, or resorcinol and formaldehyde at near-neutral pH in the presence of a weak alkaline catalyst such as an alkylamine or without a catalyst, or by reacting an alkyl ether of an aminotriazine compound such as methyl-etherified melamine with the phenol compound.

[0037] The aminotriazine-modified novolak resin preferably contains substantially no methylol groups. The aminotriazine-modified novolak resin may contain molecules in which only aminotriazine structures are methylene-linked, molecules in which only phenol structures are methylene-linked, or the like, which are produced as by-products during the production of the aminotriazine-modified novolak resin. Furthermore, the aminotriazine-modified novolak resin may contain a small amount of unreacted raw materials.

[0038] Examples of the phenol structure include a phenol residue, a cresol residue, a butylphenol residue, a bisphenol A residue, a phenylphenol residue, a naphthol residue, and a resorcinol residue. The term "residue" as used herein refers to a structure in which at least one hydrogen atom bonded to a carbon atom of an aromatic ring has been removed. For example, in the case of phenol, this refers to a hydroxyphenyl group.

[0039] Examples of the triazine structure include structures derived from aminotriazine compounds such as melamine, benzoguanamine, and acetoguanamine.

[0040] The phenol structure and the triazine structure can be used alone or in combination of two or more thereof. In addition, the phenol structure is preferably a phenol residue, and the triazine structure is preferably a structure derived from melamine, because these structures can further improve adhesion.

[0041] The hydroxyl value of the aminotriazine-modified novolak resin is preferably in the range of 50 to 200 mgKOH / g, more preferably in the range of 80 to 180 mgKOH / g, and even more preferably in the range of 100 to 150 mgKOH / g, since this can further improve adhesion.

[0042] The aminotriazine-modified novolak resins can be used alone or in combination of two or more.

[0043] When an aminotriazine-modified novolak resin is used as the compound having an aminotriazine ring, it is preferable to use an epoxy resin in combination.

[0044] Examples of the epoxy resin include bisphenol A epoxy resin, bisphenol F epoxy resin, biphenyl epoxy resin, cresol novolac epoxy resin, phenol novolac epoxy resin, bisphenol A novolac epoxy resin, alcohol ether epoxy resin, tetrabromobisphenol A epoxy resin, naphthalene epoxy resin, phosphorus-containing epoxy compound having a structure derived from a 9,10-dihydro-9-oxa-10-phosphaphenanthrene-10-oxide derivative, epoxy resin having a structure derived from a dicyclopentadiene derivative, and epoxidized oils and fats such as epoxidized soybean oil. These epoxy resins can be used alone or in combination of two or more.

[0045] Among the epoxy resins, bisphenol A epoxy resins, bisphenol F epoxy resins, biphenyl epoxy resins, cresol novolac epoxy resins, phenol novolac epoxy resins, bisphenol A novolac epoxy resins, and naphthalene epoxy resins are preferred because they can further improve adhesion, and bisphenol A epoxy resins are particularly preferred. The epoxy group of the epoxy resin reacts with a basic nitrogen atom-containing group contained in the conductive plating underlayer (C) described below to form a covalent bond, thereby improving the adhesion at the interface between the conductive plating underlayer (C) described below and the resin layer (B).

[0046] The epoxy equivalent of the epoxy resin is preferably in the range of 100 to 300 g / equivalent, more preferably in the range of 120 to 250 g / equivalent, and even more preferably in the range of 150 to 200 g / equivalent, since this allows for further improvement in adhesion.

[0047] When the resin layer (B) is a layer containing an aminotriazine-modified novolac resin and an epoxy resin, the molar ratio [(x) / (y)] of the phenolic hydroxyl group in the aminotriazine-modified novolac resin to the epoxy group in the epoxy resin is preferably in the range of 0.1 to 5, more preferably in the range of 0.2 to 3, and even more preferably in the range of 0.3 to 2, in order to further improve adhesion.

[0048] A curing accelerator may be used in combination to accelerate the reaction between the aminotriazine-modified novolac resin and the epoxy resin. Examples of the curing accelerator include amine compounds having a primary, secondary, or tertiary amino group. The amine compound may be any of aliphatic, alicyclic, and aromatic compounds. The curing accelerator may also include mercaptans, acid anhydrides, boron acid fluorides, boric acid esters, organic acid hydrazides, Lewis acids, organometallic compounds, onium salts, and cationic compounds.

[0049] It is also preferable to use one containing a phenoxy resin. The resin layer (B) has the function of improving adhesion between the support (A) and the conductive plating underlayer (C) described below. In the present invention, it is preferable to use a phenoxy resin having a weight average molecular weight in the range of 10,000 to 100,000. By using a high-molecular-weight phenoxy resin for the resin layer (B), it is possible to improve the elongation of the polymer and further improve adhesion.

[0050] Phenoxy resins are polyhydroxypolyethers obtained by reacting a divalent phenol compound with epichlorohydrin or a divalent epoxy compound with a divalent phenol compound. Examples of divalent phenol compounds include bisphenols. Examples of phenoxy resins include phenoxy resins having a bisphenol A structure (skeleton), phenoxy resins having a bisphenol F structure, phenoxy resins having a bisphenol S structure, phenoxy resins having a bisphenol M structure, phenoxy resins having a bisphenol P structure, and phenoxy resins having a bisphenol Z structure. Other examples include phenoxy resins having a skeletal structure such as a novolac structure, anthracene structure, fluorene structure, dicyclopentadiene structure, norbornene structure, naphthalene structure, biphenyl structure, and adamantane structure. These phenoxy resins may be used alone or in combination of two or more. Among these, those having a bisphenol structure are preferred, with bisphenol A, bisphenol F, and bisphenol S skeletons being more preferred. The terminal of the phenoxy resin may be any functional group such as a phenolic hydroxyl group or an epoxy group.

[0051] In the present invention, the weight-average molecular weight of the phenoxy resin used is preferably in the range of 10,000 to 100,000. A molecular weight of 10,000 or more improves plating adhesion after long-term heat resistance testing, while a molecular weight of 100,000 or less improves solubility in organic solvents, resulting in an appropriate viscosity of the coating solution used to form the resin layer (B), improving handling. The weight-average molecular weight of the phenoxy resin is preferably 20,000 to 80,000, more preferably 22,000 to 50,000. The weight-average molecular weight of the phenoxy resin can be adjusted by the molar ratio of the epoxy resin to the phenolic resin and the reaction time during the reaction. In this specification, the weight-average molecular weight is measured by gel permeation chromatography (GPC), as described below, and converted into standard polystyrene. For the GPC measurements, a high-speed GPC system (HLC-8420GPC, manufactured by Tosoh Corporation) was used as the measuring device, and TSKgel G5000HxL / G4000HxL / G3000HxL / G2000HxL (manufactured by Tosoh Corporation) columns were connected in series, with tetrahydrofuran as the eluent and measurements were performed using an RI detector. Furthermore, while phenoxy resin generally refers to a high-molecular-weight epoxy resin, in this specification, "epoxy resin" refers to one with a weight-average molecular weight of less than 10,000, and is to be distinguished from the above-mentioned phenoxy resin.

[0052] As the phenoxy resin, commercially available products may be used. For example, Mitsubishi Chemical Corporation's 1256, 4250 (all phenoxy resins containing a bisphenol A skeleton), 4275 (bisA / bisF mixed type), YL6794, YL7213, YL7290, YL7482, YL7553, YX8100 (phenoxy resins containing a bisphenol S skeleton), X6954 (phenoxy resins containing a bisphenol acetophenone skeleton), YX7200 (phenoxy resin containing a cyclohexane skeleton), YP-70 (bisphenol F type phenoxy resin), ZX356-2 (phenoxy resin containing bisphenol A and bisphenol F skeletons), YPB-40PXM40 (bromine-containing phenoxy resin), ERF-001M30 (phosphorus-containing phenoxy resin), FX-280, FX-293, FX-310 (phenoxy resin containing a fluorene skeleton), and PKHA, PKHB, PKHB+, PKHC, PKHH, PKHJ, and PKFE manufactured by Gabriel Phenoxies.

[0053] In the present invention, the resin layer (B) preferably contains an epoxy resin in combination with the phenoxy resin. The combined use of the phenoxy resin and the epoxy resin further improves the adhesion to the conductive layer (E) of the circuit pattern (described later) under normal conditions and after a long-term heat resistance test.

[0054] Examples of epoxy resins include bisphenol A epoxy resins, bisphenol F epoxy resins, biphenyl epoxy resins, cresol novolac epoxy resins, phenol novolac epoxy resins, bisphenol A novolac epoxy resins, alcohol ether epoxy resins, tetrabromobisphenol A epoxy resins, naphthalene epoxy resins, phosphorus-containing epoxy compounds having a structure derived from a 9,10-dihydro-9-oxa-10-phosphaphenanthrene-10-oxide derivative, epoxy resins having a structure derived from a dicyclopentadiene derivative, and epoxidized oils and fats such as epoxidized soybean oil. These epoxy resins may be used alone or in combination of two or more.

[0055] As the epoxy resin to be used in combination with the phenoxy resin, aromatic epoxy resins such as bisphenol A type epoxy resin, bisphenol F type epoxy resin, biphenyl type epoxy resin, cresol novolac type epoxy resin, phenol novolac type epoxy resin, bisphenol A novolac type epoxy resin and naphthalene type epoxy resin are preferred, as they can further improve the adhesion of the conductive layer (E) of the circuit pattern described below, and liquid epoxy resins are more preferred, with bisphenol A type epoxy resins being particularly preferred.

[0056] The epoxy equivalent of the epoxy resin is preferably 100 to 5,000 g / equivalent, more preferably 120 to 2,000 g / equivalent, and even more preferably 120 to 250 g / equivalent, as this allows for further improved adhesion.

[0057] When the resin layer (B) further contains an epoxy resin in addition to the phenoxy resin, the blending ratio of the phenoxy resin to the epoxy resin is preferably 90:10 to 10:90, more preferably 85:15 to 15:80, on a mass basis.

[0058] The resin layer (B) is preferably made of a thermoplastic resin having excellent heat resistance, which can conform to the conductive layer (E) of the circuit pattern described below when the conductive layer (E) of the circuit pattern described below deforms under load such as heat. Examples of preferred resin layers include phenoxy resin, urethane resin, acrylic resin, core-shell composite resin with a urethane resin as the shell and an acrylic resin as the core, polyimide resin, polyphenylene ether resin, aromatic polyamide resin, polycarbonate resin, polyacetal resin, polybutylene terephthalate resin, polyphenylene sulfide resin, polysulfone resin, polyetherimide resin, polyethersulfone resin, polyamideimide resin, polyetheretherketone resin, and polytetrafluoroethylene resin.

[0059] The resin layer (B) may be a single layer or may be two or more layers. When two or more resin layers (B) are formed, for example, the layer closest to the conductive plating base layer (C) described below improves adhesion to the conductive plating base layer (C), while the resin layer (B) closest to the support (A) can improve adhesion to the support (A). Furthermore, the first resin layer (B) closest to the conductive plating base layer (C) described below becomes the layer closest to the conductive plating base layer (C) described below and the conductive layer (E) of the circuit pattern described below, and becomes the part closest to the copper wiring when the circuit pattern is formed. Therefore, a resin composition for the resin layer (B) can be selected and formed for the purpose of improving insulation reliability.

[0060] Furthermore, since the coating material for the resin layer (B) is to be applied to the surface of the support (A), it is preferable to blend an organic solvent to achieve a viscosity that facilitates application. Examples of the organic solvent include ethyl acetate, methyl ethyl ketone, methyl isobutyl ketone, cyclohexanone, isopropyl alcohol, diacetone alcohol, ethylene glycol, and toluene. These solvents can be used alone or in combination of two or more.

[0061] If necessary, known additives such as film-forming aids, leveling agents, thickeners, water repellents, antifoaming agents, and antioxidants may be added to the coating material for the resin layer (B).

[0062] Examples of methods for applying the coating material for the resin layer (B) include gravure, coating, screen, roller, rotary, spray, capillary, and doctor roll methods.

[0063] After forming the coating material of the resin layer (B) on the surface of the support (A), a common method for removing the organic solvent contained in the coating layer is, for example, to dry it using a dryer and volatilize the organic solvent.

[0064] The drying temperature for the resin layer (B) is preferably in the range of 50 to 400°C, more preferably in the range of 80 to 340°C, preferably in the range of 120 to 280°C, and further preferably in the range of 150 to 200°C.

[0065] Next, the conductive plating underlayer (C) will be described. The conductive plating underlayer (C) is a layer containing a dispersant (c1) and a conductive substance (c2).

[0066] The conductive plating underlayer (C) contains the conductive substance (c2) in a range of 80 mass % to 99.9 mass % and the dispersant (c1) in a range of 0.1 mass % to 20 mass % relative to the entire conductive plating underlayer (C), and more preferably in a range of 0.1 mass % to 10 mass %.

[0067] A compound having a basic nitrogen atom-containing group or a phosphate ester group can be used as the dispersant (c1) contained in the conductive plating underlayer (C) and reacted with the functional group of the compound (b) contained in the resin layer (B) to form a chemical bond. The basic nitrogen atom-containing group or the phosphate ester group may react partially or completely with the functional group to form a chemical bond.

[0068] Examples of the basic nitrogen atom-containing group include an imino group, a primary amino group, and a secondary amino group.

[0069] When a dispersant (c1) having a plurality of basic nitrogen atom-containing groups in its molecule is used, it is preferable that one of the basic nitrogen atom-containing groups is involved in bonding with the functional group of the compound (b) contained in the resin layer (B) when the conductive plating underlayer (C) is formed, and the other contributes to interaction with the conductive material (c2) such as silver in the conductive plating underlayer (C), in order to improve adhesion between the conductive plating underlayer (C) and the resin layer (B).

[0070] The dispersant (c1) having a basic nitrogen-containing group is preferably a polymeric dispersant because it can make the conductive plating underlayer (C) porous, thereby improving the adhesion between the conductive plating underlayer (C) and the conductive layer (E) of the circuit pattern described below. Examples of such polymeric dispersants include polyalkyleneimines such as polyethyleneimine and polypropyleneimine, and compounds in which polyoxyalkylene groups are added to the polyalkyleneimines. Compared to low-molecular-weight dispersants, the use of a polymeric dispersant can remove the dispersant from the conductive plating underlayer (C) to make it porous, thereby increasing the void size and forming voids on the nano to submicron order. This facilitates the filling of these voids with the metal constituting the conductive layer (E) of the circuit pattern described below. The filled metal acts as an anchor, significantly improving the adhesion between the conductive plating underlayer (C) and the conductive layer (E) of the circuit pattern described below.

[0071] When using a dispersant (c1) having a phosphate ester group in the molecule, it is preferable to use an acrylic resin, which is easy to introduce a phosphate ester group into. When introducing a phosphate ester group into an acrylic resin, a monomer having a phosphate ester group is used as a raw material for the acrylic resin. Examples of monomers having a phosphate ester group include 2-((meth)acryloyloxy)ethyl phosphate, 2-((meth)acryloyloxy)propyl phosphate, diphenyl(2-acryloyloxyethyl) phosphate, diphenyl(2-methacryloyloxyethyl)phosphate, and phenyl(2-acryloyloxyethyl)phosphate.

[0072] In addition, it is preferable to use a functional group other than the phosphate ester group in the dispersant (c1) in order to improve the adhesion between the conductive plating underlayer (C) and the resin layer (B). Examples of functional groups include a carboxyl group, an isocyanate group, a blocked isocyanate group, an epoxy group, a hydroxyl group, an oxazoline group, an N-methylol group, an N-alkoxymethyl group, an amino group, and an alkoxysilyl group. The dispersant (c1) may have two or more of these functional groups.

[0073] The content of the functional group in the dispersion material (c1) is preferably in the range of 0.001 to 5 mmol / g, more preferably in the range of 0.01 to 3 mmol / g, and even more preferably in the range of 0.01 to 2 mmol / g, since this can further improve adhesion to the resin layer (B).

[0074] The conductive material (c2) constituting the conductive plating underlayer (C) includes transition metals or their compounds, with ionic transition metals being preferred. Examples of such ionic transition metals include copper, silver, gold, nickel, palladium, platinum, and cobalt. Among these, silver and copper are preferred because they are easy to form the conductive layer (E) of the circuit pattern described below, and silver is more preferred because it reduces the surface resistance of the conductive plating underlayer (C). Furthermore, because magnetic metals such as nickel and cobalt degrade the transmission characteristics required for high-frequency transmission, silver and copper are preferred, with silver being more preferred.

[0075] The conductive material (c2) used to form the conductive plating underlayer (C) is preferably in the form of particles or fibers. When the conductive material (c2) is particulate, its size is preferably nano-sized. Specifically, the average particle size is preferably in the range of 1 to 100 nm, more preferably 1 to 50 nm, because this allows for a denser coating film and a lower resistance. A Nanotrac UPA-150 manufactured by Microtrac can be used to measure the average particle size.

[0076] On the other hand, when the conductive substance (c2) is in the form of fibers, the diameter of the fibers is preferably 5 to 100 nm, more preferably 5 to 50 nm, in order to form a denser coating film and further reduce the resistance value, and the length of the fibers is preferably 0.1 to 100 μm, more preferably 0.1 to 30 μm.

[0077] The conductive plating underlayer (C) can be formed by preparing a fluid containing the dispersant (c1) and the conductive substance (c2) and applying the fluid. The content of the conductive substance (b2) in the fluid is preferably in the range of 1 to 90 mass%, more preferably in the range of 1 to 60 mass%, and even more preferably in the range of 1 to 10 mass%.

[0078] Components that may be blended into the fluid include dispersants and solvents for dispersing the conductive substance (c2) in a solvent, and, if necessary, surfactants, leveling agents, viscosity modifiers, film-forming aids, antifoaming agents, preservatives, etc., which will be described later.

[0079] A dispersant may be used in combination to disperse the conductive substance (c2) in the solvent. Examples of the dispersant include dodecanethiol, 1-octanethiol, triphenylphosphine, dodecylamine, polyethylene glycol, polyvinylpyrrolidone, polyethyleneimine, polyvinylpyrrolidone; fatty acids such as myristic acid, octanoic acid, and stearic acid; polycyclic hydrocarbon compounds having a carboxyl group such as cholic acid, glycyrrhizic acid, and abietic acid; urethane resins; acrylic resins; and compounds of the urethane resins or acrylic resins containing a phosphate group.

[0080] The amount of the dispersant used to disperse the conductive substance (c2) is preferably in the range of 0.01 to 50 parts by mass, more preferably in the range of 0.01 to 10 parts by mass, per 100 parts by mass of the conductive substance (c2).

[0081] Furthermore, when the dispersant is removed by firing to form a porous conductive plating underlayer (C) for the purpose of further improving the adhesion between the conductive plating underlayer (C) and the conductive layer (E) of the circuit pattern described below, the content of the dispersant is preferably in the range of 0.1 to 10 parts by mass, more preferably in the range of 0.1 to 5 parts by mass, per 100 parts by mass of the metal particles (c).

[0082] The solvent used for the fluid may be an aqueous medium or an organic solvent. Examples of the aqueous medium include distilled water, ion-exchanged water, pure water, and ultrapure water. Examples of the organic solvent include alcohol compounds, ether compounds, ester compounds, and ketone compounds.

[0083] Examples of the alcohol compound include methanol, ethanol, n-propanol, isopropyl alcohol, n-butanol, isobutyl alcohol, sec-butanol, tert-butanol, heptanol, hexanol, octanol, nonanol, decanol, undecanol, dodecanol, tridecanol, tetradecanol, pentadecanol, stearyl alcohol, allyl alcohol, cyclohexanol, terpineol, terpineol, dihydroterpineol, ethylene glycol monomethyl ether, ethylene glycol monoethyl ether, ethylene glycol monobutyl ether, diethylene glycol monoethyl ether, diethylene glycol monomethyl ether, diethylene glycol monobutyl ether, tetraethylene glycol monobutyl ether, propylene glycol monomethyl ether, dipropylene glycol monomethyl ether, tripropylene glycol monomethyl ether, propylene glycol monopropyl ether, dipropylene glycol monopropyl ether, propylene glycol monobutyl ether, dipropylene glycol monobutyl ether, and tripropylene glycol monobutyl ether.

[0084] In addition to the solvent, the fluid may contain ethylene glycol, diethylene glycol, 1,3-butanediol, isoprene glycol, glycerin, or the like, if necessary.

[0085] As the surfactant, a common surfactant can be used, and examples thereof include di-2-ethylhexyl sulfosuccinate, dodecylbenzenesulfonate, alkyldiphenyletherdisulfonate, alkylnaphthalenesulfonate, and hexametaphosphate.

[0086] As the leveling agent, a general leveling agent can be used, and examples thereof include silicone-based compounds, acetylene diol-based compounds, and fluorine-based compounds.

[0087] As the viscosity modifier, a general thickener can be used, and examples thereof include acrylic polymers and synthetic rubber latexes that can be thickened by adjusting the pH to alkaline, urethane resins that can be thickened by molecular association, hydroxyethyl cellulose, carboxymethyl cellulose, methyl cellulose, polyvinyl alcohol, hydrated castor oil, amide wax, oxidized polyethylene, metal soaps, and dibenzylidene sorbitol.

[0088] As the film-forming aid, a general film-forming aid can be used, for example, anionic surfactants (such as dioctyl sulfosuccinate sodium salt), hydrophobic nonionic surfactants (such as sorbitan monooleate), polyether-modified siloxane, silicone oil, etc.

[0089] As the defoaming agent, a general defoaming agent can be used, and examples thereof include silicone-based defoaming agents, nonionic surfactants, polyethers, higher alcohols, and polymer-based surfactants.

[0090] As the preservative, a general preservative can be used, and examples thereof include isothiazolinone-based preservatives, triazine-based preservatives, imidazole-based preservatives, pyridine-based preservatives, azole-based preservatives, and pyrithione-based preservatives.

[0091] The viscosity of the fluid (measured at 25°C using a Brookfield viscometer) is preferably in the range of 0.1 to 500,000 mPa·s, and more preferably in the range of 0.2 to 10,000 mPa·s. When the fluid is to be coated (printed) by inkjet printing, letterpress reverse printing, or other methods described below, the viscosity is preferably in the range of 5 to 20 mPa·s.

[0092] Examples of methods for coating or printing the fluid onto the resin layer (B) include inkjet printing, reverse printing, screen printing, offset printing, spin coating, spray coating, bar coating, die coating, slit coating, roll coating, dip coating, pad printing, gravure printing, and flexographic printing.

[0093] Among these coating methods, when forming the conductive plating underlayer (C) patterned in fine lines of about 0.01 to 100 μm, which is required to realize high density electronic circuits, etc., it is preferable to use inkjet printing or reverse printing.

[0094] The inkjet printing method can be performed using a printer generally known as an inkjet printer, such as Konica Minolta EB100 or XY100 (manufactured by Konica Minolta IJ Co., Ltd.), or Dimatics Material Printer DMP-3000 or Dimatics Material Printer DMP-2831 (manufactured by Fujifilm Corporation).

[0095] Furthermore, as a reverse printing method, a letterpress reverse printing method and an intaglio reverse printing method are known. For example, a method in which the fluid is applied to the surface of various blankets, which are brought into contact with a plate having protruding non-image areas, and the fluid corresponding to the non-image areas is selectively transferred to the surface of the plate to form the pattern on the surface of the blanket, etc., and then the pattern is transferred onto the top (surface) of the support (A) can be mentioned.

[0096] Furthermore, when the support (A) is a molded product, pad printing is known as a method for printing a pattern. In this method, ink is placed on an intaglio plate, and the ink is squeegeeed to uniformly fill the recesses, and a pad made of silicone rubber or urethane rubber is pressed against the ink-carrying plate to transfer the pattern onto the pad, which is then transferred to the molded product.

[0097] The conductive plating underlayer (C) may be one layer or two or more layers. When two or more conductive plating underlayers (C) are formed, for example, a coating defect occurring in the first conductive plating underlayer (C) can be covered by the second conductive plating underlayer (C), thereby eliminating the coating defect.

[0098] The drying temperature after coating or printing the fluid is preferably in the range of 50°C to 400°C, more preferably in the range of 80°C to 340°C, preferably in the range of 120°C to 320°C, preferably in the range of 150°C to 300°C, and even more preferably in the range of 180°C to 280°C.

[0099] The mass per unit area of ​​the conductive plating underlayer (C) is 1 to 10,000 mg / m 2 The range is preferably 1 to 5,000 mg / m 2 When electroless plating is performed on the conductive plating underlayer (C), the conductive plating underlayer (C) is used as a catalyst, so the thickness of the conductive plating underlayer (C) may be thin, specifically, in the range of 1 to 5,000 mg / m 2 is preferred, and 10 to 1,000 mg / m 2 is preferred, and 10 to 500 mg / m2 is preferred, and 50 to 500 mg / m 2 On the other hand, when electrolytic plating is performed on the conductive plating underlayer (C), it is preferable that the conductive plating underlayer (C) has conductivity and low resistance, and therefore the thicker the film, the better, and the thickness is preferably 100 to 10,000 mg / m 2 is preferred, and 300 to 5,000 mg / m 2 is preferred, and in order to ensure adhesion between the conductive layer (E) of the circuit pattern described later and the conductive plating underlayer (C) and to reduce the cost by making the conductive plating underlayer (C) thinner, the concentration is preferably 500 to 2,000 mg / m 2 is more preferred.

[0100] When electrolytic plating is performed on the conductive plating underlayer (C), the surface resistance of the conductive plating underlayer (C) is preferably low in order to form a uniform electrolytic plating. The surface resistance is preferably in the range of 0.01 to 10,000 Ω / □, more preferably 0.03 to 1,000 Ω / □, more preferably 0.05 to 500 Ω / □, more preferably 0.1 to 100 Ω / □, more preferably 0.1 to 10 Ω / □, and even more preferably 0.1 to 5 Ω / □.

[0101] As described above, the surface of the conductive plating underlayer (C) is preferably smooth. Therefore, the surface roughness (maximum height Sz) measured with a laser microscope is preferably in the range of 0.001 to 30 μm, more preferably 0.01 to 20 μm, and more preferably 0.05 to 10 μm. The surface roughness (maximum height Sz) is measured by the evaluation method described in ISO 25178 and represents the distance from the highest point to the lowest point on the surface.

[0102] In addition, as a method for forming the resin layer (B) and the conductive plating base layer (C) on the support (A), there is a method in which the conductive plating base layer (C) and the resin layer (B) are sequentially laminated on a temporary support (H) to produce a transfer laminate, and the surface of the resin layer (B) of the transfer laminate is bonded to at least one surface of the support (A).

[0103] The transfer lamination method is a simple method that allows the resin layer (B) and the conductive plating underlayer (C) to be formed simultaneously on the support (A) by thermocompression bonding, compared to existing methods of applying a coating to the support (A) by a sputtering method or a wet process, and therefore has excellent productivity and reduces manufacturing costs. Furthermore, the application of pressure by thermocompression bonding is preferable from the viewpoint of strengthening the adhesion at the interface between the resin layer (B) and the conductive plating underlayer (C), by embedding the conductive plating underlayer (C) in the resin layer (B).

[0104] Since the temporary support (H) must be finally peeled off after the transfer laminate is bonded, it is preferable to select one that can be easily peeled off at the interface between the temporary support (H) and the conductive plating underlayer (C). For example, examples of polymer films include aromatic polyesters such as polyethylene terephthalate, polybutylene terephthalate (PBT), polyethylene naphthalate, and polybutylene naphthalate; fluorine-based resins such as polytetrafluoroethylene, tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, tetrafluoroethylene-hexafluoropropylene copolymer, tetrafluoroethylene-ethylene copolymer, vinylidene fluoride resin, trifluorochloroethylene resin, trifluorochloroethylene-ethylene copolymer, tetrafluoroethylene-perfluorodioxol copolymer, vinyl fluoride resin, and polyvinylidene fluoride; polymethylpentene (TPX), polypropylene (PP) [including biaxially oriented polypropylene (OPP) and nonaxially oriented polypropylene (CPP)], and polyethylene (PE) [high density poly]. Examples of suitable materials include olefin resins such as ethylene (HDPE), low-density polyethylene (LDPE), and linear low-density polyethylene (LLDPE); polystyrene (PS); polyimide resins such as polyvinyl chloride (PVC), polyimide, and transparent polyimide; polyamide resins such as polyamideimide and polyamide; polycarbonate, acrylonitrile-butadiene-styrene (ABS) resin, polymer alloys of ABS and polycarbonate, acrylic resins such as polymethyl (meth)acrylate, polyvinyl chloride, polyvinylidene chloride, polyvinyl alcohol, polycarbonate, polyethylene, polypropylene, polyurethane, liquid crystal polymer (LCP), polyether ether ketone (PEEK), polyphenylene sulfide (PPS), polyphenylene sulfone (PPSU), and epoxy resins. Among these, aromatic polyester, polyethylene, olefin resin, fluorine-based resin, polyimide resin, LCP, polyphenylene sulfide, and polystyrene are preferably used as the temporary support (H).

[0105] The temporary support (H) can be made of a metal, such as copper, aluminum, an aluminum alloy, titanium, stainless steel, beryllium copper, phosphor bronze, nickel, nichrome, a nickel alloy, tin, zinc, lead, gold, tantalum, molybdenum, niobium, iron, or silver. Other inorganic substrates that can be used for the temporary support (H) include silicone, ceramics, and glass.

[0106] The shape of the temporary support (H) is not particularly limited, but a film or sheet shape is easy to handle. The film thickness of the temporary support (H) is usually preferably in the range of 1 to 5,000 μm, more preferably in the range of 1 to 300 μm, more preferably in the range of 1 to 200 μm, more preferably in the range of 1 to 100 μm, and even more preferably in the range of 1 to 50 μm. The temporary support (H) is attached to the support (A) and becomes unnecessary after the conductive plating underlayer (C) and resin layer (B) are transferred and laminated onto the support (A), so it is preferably thin enough to not impair workability.

[0107] The surface of the temporary support (H) is preferably smooth to facilitate the transfer of the conductive plating underlayer (C) and resin layer (B) from the transfer laminate. Specifically, the surface roughness (maximum height Sz) measured with a laser microscope is preferably in the range of 0.001 to 50 μm, more preferably 0.01 to 20 μm, and more preferably 0.05 to 10 μm. The surface roughness (maximum height Sz) is measured using the evaluation method described in ISO 25178 and represents the distance from the highest point to the lowest point on the surface.

[0108] Furthermore, a release layer may be formed on the surface of the temporary support (H). The release layer can be formed by applying a silicone-based or non-silicone-based release agent to the temporary support (H). Examples of non-silicone-based release agents that can be used include alkyd resins, melamine resins, acrylic resins, cellulose resins, urea resins, polyolefins, paraffins, silica-composite acrylic resins, silica-composite melamine resins, silica-composite urethane resins, silica-composite epoxy-based resins, silica-composite phenolic resins, silica-composite poval resins, silica-composite polystyrene-based resins, silica-composite polyvinyl acetate-based resins, silica-composite polyimide-based resins, and silica-composite polyamide-imide-based resins. When the temporary support (H) of the transfer laminate is peeled off, the silicone resin release layer migrates to the surface of the conductive plating underlayer (C). This inhibits adhesion between the conductive plating underlayer (C) and the conductive layer (E) of the circuit pattern (described later) when the conductive plating underlayer (C) is formed on the conductive plating underlayer (C). Therefore, it is preferable to use a non-silicone release agent for the release layer, and it is preferable to use polyolefin, acrylic resin, melamine resin, urethane resin, silica composite acrylic resin, silica composite melamine resin, silica composite urethane resin, silica composite epoxy resin, silica composite phenol resin, silica composite poval resin, silica composite polystyrene resin, silica composite polyvinyl acetate resin, silica composite polyimide resin, or silica composite polyamideimide resin.

[0109] The thickness of the release layer is not particularly limited as long as it can ensure releasability, but it is preferably a thin film to prevent the release layer from adhering to the surface of the conductive plating underlayer (C). Specifically, the thickness is preferably 0.01 to 50 μm, more preferably 0.01 to 10 μm, and even more preferably 0.01 to 1 μm.

[0110] Metal is preferably used as the temporary support (H). When forming the conductive plating underlayer (C) using metal nanoparticles on the surface of the temporary support (H) described below, using a metal allows drying at a higher temperature than when using a polymer film. This reduces the surface resistance of the conductive plating underlayer (C), thereby increasing the conductivity of the plating underlayer itself. Furthermore, after laminating the surface of the resin layer (B) of the transfer laminate described below to the support (A), through holes penetrating both surfaces of the temporary support (H) or non-through holes to the conductive pattern of the inner layer are formed using a drill or laser. However, when a polymer film is used as the temporary support (H), polymer smearing occurs during the hole drilling process, which can lead to plating deposition problems during the process of making the through holes or non-through holes conductive. On the other hand, using a metal allows the application of conventional drilling methods for printed circuit boards using drills or lasers, and copper is preferably used as the temporary support (H).

[0111] When applying the conductive plating underlayer (C) to the temporary support (H), the surface of the temporary support (H) may be subjected to a surface treatment, if necessary, to facilitate wetting of the coating material. Specific examples include plasma discharge treatments such as corona discharge treatment, dry treatments such as ultraviolet treatment, and wet treatments using water, aqueous solutions of acids or alkalis, or organic solvents. If the temporary support (H) is subjected to an excessive surface treatment, peeling at the interface between the temporary support (H) and the conductive plating underlayer (C) becomes difficult, so it is preferable to perform the surface treatment appropriately.

[0112] Examples of methods for coating or printing the conductive plating underlayer (C) on the temporary support (H) include inkjet printing, reverse printing, screen printing, offset printing, gravure printing, flexographic printing, pad printing, spin coating, spray coating, bar coating, die coating, slit coating, roll coating, dip coating, rotary coating, capillary coating, microgravure coating, and doctor roll methods.

[0113] When the conductive plating underlayer (C) is coated or printed on the temporary support (H), the conductive plating underlayer (C) may be one layer or two or more layers. When two or more conductive plating underlayers (C) are formed, for example, coating defects occurring in the first conductive plating underlayer (C) can be covered by the second conductive plating underlayer (C), thereby eliminating the coating defects.

[0114] When the conductive plating underlayer (C) is applied onto the temporary support (H), the drying temperature after coating or printing is preferably in the range of 50°C to 400°C, more preferably in the range of 80°C to 340°C, preferably in the range of 120°C to 320°C, preferably in the range of 150°C to 300°C, and even more preferably in the range of 180°C to 280°C.

[0115] The resin layer (B) can be formed by coating the resin layer (B) on part or all of the conductive plating underlayer (C) formed on the surface of the temporary support (H), and removing the organic solvent contained in the coating material for the resin layer (B).

[0116] Examples of methods for applying the coating material for the resin layer (B) include gravure, coating, screen, roller, rotary, spray, capillary, and doctor roll methods.

[0117] After the coating material for the resin layer (B) is applied to the surface of the conductive plating underlayer (C) formed on the surface of the temporary support (H), the organic solvent contained in the coating layer is generally removed by, for example, drying using a dryer to volatilize the organic solvent. The drying temperature must be set within a range that allows the organic solvent to volatilize.

[0118] The drying temperature for the resin layer (B) is preferably in the range of 50 to 400°C, more preferably in the range of 80 to 340°C, preferably in the range of 120 to 280°C, and further preferably in the range of 150 to 200°C.

[0119] Next, a method for transferring the transfer laminate onto the support (A) will be described. As a transfer method, a method of laminating the surface of the resin layer (B) of the transfer laminate to the support (A) using heat and pressure can be used. There is no particular limitation, but for example, a thermal lamination method, a solventless lamination method, an extrusion lamination method, a wet lamination method, a hot roll transfer method, an in-mold transfer method, a pressing method, a vacuum pressing method, a hydraulic transfer method, etc. can be used.

[0120] When the support (A) is a flexible roll film, it is preferable to use a hot roll lamination method, a solventless lamination method, an extrusion lamination method, or a wet lamination method. The hot roll lamination method is more preferable because it is particularly easy to process. On the other hand, when the support (A) is a rigid material, it is often thermocompressed in sheet form, so it is preferable to use a press method, a vacuum press method, or a vacuum thermal lamination method.

[0121] Regarding the thermocompression bonding conditions, the heating conditions are preferably in the range of 50° C. to 400° C., more preferably in the range of 80° C. to 350° C., more preferably in the range of 80° C. to 280° C., more preferably in the range of 100° C. to 200° C., and more preferably in the range of 120° C. to 180° C. The pressure conditions are preferably in the range of 0.05 MPa to 35 MPa, more preferably in the range of 0.3 MPa to 20 MPa.

[0122] In the case of hot roll lamination, the processing time for thermocompression bonding is within 1 second because the thermocompression bonding is performed by the linear pressure of the rolls while the film is being conveyed. On the other hand, in the case of sheet-by-sheet pressing, vacuum pressing, or vacuum thermal lamination, the processing time is preferably in the range of 1 second to 120 minutes, more preferably 30 seconds to 60 minutes, and more preferably 30 seconds to 15 minutes, and from the viewpoint of productivity, it is preferably in the range of 1 minute to 5 minutes.

[0123] Furthermore, when thermocompression bonding is performed, air may get trapped between the transfer laminate and the support (A), or gas generated from the support (A) or the transfer laminate may accumulate between the transfer laminate and the support (A), reducing the transfer rate. Therefore, thermocompression bonding is preferably performed under vacuum using a vacuum press. The vacuum conditions are preferably an absolute pressure of 100 hPa or less, more preferably 50 hPa or less, and even more preferably 13 hPa or less. The heating and pressure conditions are preferably the same as those described above.

[0124] Next, a method for laminating the surface of the resin layer (B) of the transfer laminate to the support (A) and peeling off the temporary support (H) will be described. The method for peeling off the temporary support (H) is not particularly limited. However, if the adhesion between the support (A) and the resin layer (B) is low during the thermocompression bonding (temporarily bonded state), the resin layer (B) and the conductive plating underlayer (C) may not be sufficiently transferred to the support (A), and some of them may remain on the transfer laminate side. Therefore, the peeling direction and speed of the temporary support (H) during peeling are important. Specifically, it is preferable to peel it at an angle of 90 to 180 degrees relative to the support (A), preferably 120 to 180 degrees, and more preferably 150 to 180 degrees. When peeling, it is preferable to peel the temporary support (H) side at the above-mentioned angle, not the support (A) side. The peeling speed is preferably in the range of 0.01 m / min to 20 m / min, more preferably in the range of 0.05 to 10 m / min, and even more preferably in the range of 0.5 to 5 m / min.

[0125] Next, the post-treatment of the laminate after laminating the surface of the resin layer (B) of the transfer laminate to the support (A) and then peeling off the temporary support (H) of the transfer laminate will be described. Heat treatment may be performed to further improve the adhesion between the support (A) and the resin layer (B). Heat treatment conditions are preferably in the range of 80°C to 400°C, more preferably 100°C to 350°C, more preferably 120°C to 325°C, and even more preferably 150°C to 300°C. Heat treatment time is preferably in the range of 1 second to 168 hours, more preferably 30 seconds to 72 hours, and even more preferably 1 minute to 30 minutes from the viewpoint of productivity.

[0126] In the next step, a cleaning treatment is preferably performed to remove components that reduce adhesion to the surface of the conductive plating underlayer (C), since the conductive layer (E) of the circuit pattern (described later) or a pattern resist is formed on the surface of the conductive plating underlayer (C). Examples of components that reduce adhesion include oligomer components present in the film and bleeding to the film surface when the temporary support (H) is a resin film; components of the release agent that migrate to the conductive plating underlayer (C) when a release layer is formed on the temporary support (H); and a metal oxide film on the temporary support when the temporary support (H) is metallic. Examples of cleaning treatments include oxidative decomposition of organic matter present on the surface of the conductive plating underlayer (C) by heating; plasma discharge treatments such as corona discharge treatments; dry treatments such as ultraviolet treatments; and wet treatments using water, aqueous solutions of acids or alkalis, water containing ozone (ozone nanobubbles), or organic solvents. stomach.

[0127] Next, as a manufacturing method of the present invention, a method of selectively removing only the copper layer (D) from a laminate of a copper layer (D) on a conductive plating underlayer (C) using an etching solution will be described.

[0128] The copper layer (D) is laminated on the conductive plating base layer (C) to protect the conductive plating base layer (C) in the etching step for removing palladium, conductive polymer, and carbon adsorbed on areas other than the inner wall surfaces of the through holes in the circuit board manufacturing method described below.

[0129] In the manufacturing method of the present invention, the copper layer (D) can be formed by laminating it on the conductive plating base layer (C) by copper plating on the conductive plating base layer (C).

[0130] The copper plating method may be, for example, electroless copper plating using the conductive underlayer (C) as a plating catalyst, electrolytic copper plating, or a combination of electroless copper plating and electrolytic copper plating. Electrolytic plating is advantageous in that it increases the plating deposition rate, thereby increasing production efficiency.

[0131] The copper plating method for forming the copper layer (D) on the conductive plating underlayer (C) is not particularly limited, and any known and commonly used copper plating method can be suitably used, whether it is an electroless copper plating method, an electrolytic copper plating method, or a combination of electroless copper plating and electrolytic copper plating.

[0132] The copper plating is preferably carried out by forming copper layers (D) of the same thickness on the conductive plating underlayers (C) on both sides of the laminate.

[0133] In the step of forming the copper layer (D) by the copper plating method, the surface of the conductive plating underlayer (C) may be subjected to a surface treatment, if necessary. Examples of such surface treatments include cleaning treatment with an acidic or alkaline cleaning solution, corona treatment, plasma treatment, UV treatment, gas-phase ozone treatment, liquid-phase ozone treatment, and treatment with a surface treatment agent, provided that the surface of the conductive plating underlayer (C) and the formed resist pattern are not damaged. These surface treatments can be performed by one method or by a combination of two or more methods.

[0134] The thickness of the copper layer (D) formed by the copper plating is preferably 0.1 μm to 2 μm, and more preferably 0.5 μm to 1.5 μm, from the viewpoint of efficiently exposing the conductive plating base layer (C) without damaging it in the step of etching the copper layer (D) to expose the conductive plating base layer (C) in the circuit board manufacturing method described below.

[0135] In the manufacturing method of the present invention, a method for laminating and forming the copper layer (D) on the conductive plating base layer (C) is to use copper foil as the temporary support (H), and to attach a transfer laminate in which the conductive plating base layer (C) and the resin layer (B) are sequentially formed on the temporary support (H) to the support (A), thereby forming the temporary support (H) as the copper layer (D).

[0136] When the temporary support (H) is used as the copper layer (D), the copper layer (D) may be subjected to a thin film treatment by etching.

[0137] The method of thin film treatment by etching is not particularly limited, as long as it efficiently etches the copper layer (D) without damaging the underlying conductive plating base layer (C), since the copper layer (D) plays a role in protecting the surface of the conductive plating base layer (C). For example, an etching solution containing ferric chloride, an etching solution containing cupric chloride, an aqueous sulfuric acid / hydrogen peroxide solution, or a persulfate etching solution can be used.

[0138] Alternatively, a plurality of the above etching solutions may be used for thin film etching. For example, by using an etching solution containing cupric chloride, which has a high etching rate for copper, and then using an aqueous solution of sulfuric acid and hydrogen peroxide, which has a low etching rate for copper, the thickness of the copper layer (D) can be precisely controlled.

[0139] When the temporary support (H) is used as the copper layer (D), the thinner the film thickness when subjected to thin-film etching, the more efficiently the conductive plating base layer (C) can be exposed without being damaged in the step of etching the copper layer (D) to expose the conductive plating base layer (C), which is a method for producing a circuit board described below. On the other hand, if the film thickness is too thin, it becomes difficult to uniformly protect the conductive plating base layer (C) with the copper layer (D), so the film thickness of the copper layer (D) is preferably 0.5 μm to 10 μm, more preferably 1.0 μm to 5 μm.

[0140] The thin film treatment by etching is preferably carried out so that copper layers (D) of the same thickness are formed on the conductive underlayers (C) on both sides of the laminate.

[0141] As a method for manufacturing the circuit board of the present invention, when the conductive plating base layer (C) on the front and back surfaces or the circuit pattern of the inner layer and the conductive plating base layer (C) are electrically connected, a process for forming through holes or blind holes penetrating both surfaces of a laminate in which the resin layer (B), the conductive plating base layer (C), and the copper layer (D) are sequentially laminated on at least one surface of the support (A) will be described.

[0142] The method for forming the through holes may be appropriately selected from known and commonly used methods, such as drilling, laser processing, a processing method that combines drilling holes in the copper layer by laser processing with chemical etching of the support (A) using an oxidizing agent, an alkaline chemical, an acidic chemical, etc., and a processing method that combines hole pattern etching of the copper foil using a resist with chemical etching of the support (A) using an oxidizing agent, an alkaline chemical, an acidic chemical, etc.

[0143] The method for forming the non-through holes may be appropriately selected from known and commonly used methods, and examples thereof include laser processing, a processing method that combines laser processing to drill holes in the copper layer with chemical etching of the support (A) using an oxidizing agent, an alkaline chemical, an acidic chemical, etc., and a processing method that combines hole pattern etching of the copper foil using a resist with chemical etching of the support (A) using an oxidizing agent, an alkaline chemical, an acidic chemical, etc.

[0144] The hole size (diameter) of the holes formed by the drilling process is preferably in the range of 0.01 to 1 mm, more preferably in the range of 0.02 to 0.5 mm, and even more preferably in the range of 0.03 to 0.1 mm.

[0145] Organic and inorganic debris (smear) generated during drilling may cause poor plating deposition, reduced plating adhesion, and impaired plating appearance in the plating process for forming the electrical connection of the circuit patterns on both sides or inner layers, and the first conductive layer (F), the second conductive layer (G), and the conductive layer (E) of the circuit pattern, as described below, and therefore it is preferable to remove the debris (desmear). Desmearing methods include, for example, dry processes such as plasma treatment and reverse sputtering, and wet processes such as cleaning with an aqueous solution of an oxidant such as potassium permanganate, cleaning with an aqueous solution of an alkali or acid, and cleaning with an organic solvent.

[0146] Next, the step of making the surfaces of the through holes or non-through holes on the surface of the support (A) having through holes or non-through holes conductive will be described.

[0147] The surface of the through holes or non-through holes can be made conductive by, for example, referring to the method described as "Direct Plating" by Toyonaga Minoru in Circuit Technology, Vol. 8, No. 1 (1993) pp. 47-59.

[0148] The method for making the surface of the through holes or non-through holes conductive may be any of the four methods described in the literature: (1) a palladium-tin colloid system, (2) a tin-free palladium system, (3) a conductive polymer system, or (4) a graphite system.

[0149] The method of making the surface of the through holes or non-through holes conductive using palladium-tin colloid is carried out by treating the surface of the laminate with a cleaner-conditioner, then adsorbing tin-palladium colloid on the surface, and then removing the tin by accelerator treatment. Alternatively, a method of further converting palladium to palladium sulfide to increase the conductivity can be used.

[0150] Furthermore, a method of making the surface of the through-holes or non-through-holes conductive with a conductive polymer can be a method of oxidatively polymerizing a pyrrole derivative monomer. The surface of the laminate with through-holes formed thereon is treated with a conditioner, and then treated with a permanganate aqueous solution to form MnO2 on the surface of the through-holes formed in the support (A). The substrate surface is immersed in a monomer aqueous solution containing a high-boiling point alcohol, and then immersed in a dilute sulfuric acid aqueous solution. Polymerization proceeds on the MnO2-coated surface, forming a conductive polymer and making the surface conductive.

[0151] Furthermore, a method for making the surface of the through holes or non-through holes conductive with graphite can be carried out by treating the surface of the support (A) on which the through holes or non-through holes are formed with a solution of suspended carbon black to adsorb carbon onto the entire surface of the substrate. By treating the surface of the laminate on which the through holes or non-through holes are formed with a conditioner, the surface of the support (A) is positively charged, and then negatively charged carbon black is adsorbed onto the surface, thereby ensuring conductivity.

[0152] In addition, as a method for making the surface of the through holes or non-through holes conductive, a method can also be used in which palladium is applied as a catalyst, and then a first conductive layer (F) is formed by electroless copper plating, and then a second conductive layer (G) is formed by electrolytic copper plating, thereby filling the inside of the hole with the first conductive layer (F) and the second conductive layer (G).

[0153] The conductive treatment method using electroless copper plating can be adapted from conventional processes that use copper as a plating base, which reduces the time required to switch manufacturing methods and change over setups during production, thereby reducing process costs.

[0154] The thicknesses of the first conductive layer (F) and the second conductive layer (G) formed on the surface of the copper layer (D) vary depending on the diameter of the through holes or non-through holes and the amount of copper plating layer deposited to fill the holes. Therefore, taking into consideration the productivity of the step of removing the copper layer (D) described below and the ability to fill the insides of through holes or non-through holes, the thicknesses of the first conductive layer (F) and the second conductive layer (G) are preferably in the range of 2 to 300 μm, more preferably in the range of 4 to 150 μm, and even more preferably in the range of 6 to 30 μm.

[0155] The method for making the surface of the through holes or non-through holes conductive can be any of the methods using palladium, conductive polymers, or carbon, and commercially available, known, and commonly used processes can be used. For example, in the tin-palladium process, a method known as the Crimson process can be used, and in the graphite system, a process known as the Black Hole process can be used. Of these methods, it is preferable to use the method of making the surface of the through holes or non-through holes conductive from the viewpoints of materials and process costs.

[0156] Next, the step of etching the copper layer (D) to expose the conductive plating underlayer (C) will be described. This step exposes the conductive plating underlayer (C), which will serve as a plating seed layer for forming the conductive layer (E) of the circuit pattern in a subsequent step, and also aims to remove the palladium, conductive polymer, and carbon used to make the through-holes conductive from the plating seed. In this step, it is necessary to selectively etch only the copper layer (D) under conditions that do not dissolve the conductive plating underlayer (C).

[0157] As an etching solution for selectively removing the copper layer (D), it is preferable to use an etching solution having a large ratio (copper etching rate / silver etching rate) of the rate at which copper in the copper layer (D) is etched to the rate at which silver in the conductive plating base layer (C) is etched, in order to efficiently etch the copper layer (D) and prevent damage to the underlying conductive plating base layer (C). Specifically, the ratio is preferably 5 or more, more preferably 10 or more, and even more preferably 100 or more. On the other hand, if the etching rate is less than 5, the conductive plating base layer (C) will dissolve in the etching solution, making it impossible to selectively etch the copper layer (D). Furthermore, if the conductive plating base layer (C) dissolves in the etching solution, components of the conductive plating base layer (C) will become impurities, changing the etching rate of the copper layer (D), resulting in the problem of the copper layer (D) not being etched uniformly. The etching rate is calculated as the rate of change in the film thickness (unit: μm) of the conductive plating underlayer (C) or copper layer (D) before and after etching relative to the etching treatment time, as the etching rate ((film thickness before etching−film thickness after etching) / etching treatment time).

[0158] The chemical used to etch and remove the copper layer (D) laminated on the conductive plating base layer (C) can be a copper microetchant or soft etchant, which efficiently etches the copper layer (D) without damaging the underlying conductive plating base layer (C). The etching solution for the copper layer (D) can be a sulfuric acid / hydrogen peroxide solution or an aqueous solution of a persulfate, such as ammonium persulfate, sodium persulfate, or potassium persulfate. Among these, sulfuric acid / hydrogen peroxide solutions, sodium persulfate solutions, and potassium persulfate solutions are preferred, as they have a high ratio of copper etching rate to silver etching rate.

[0159] In order to increase the ratio (copper etching rate / silver etching rate) of the rate at which copper in the copper layer (D) is etched to the rate at which silver in the conductive plating underlayer (C) is etched using the etching solution, the concentration of the etching solution, the temperature of the etching solution, and the etching method can be appropriately changed.

[0160] The sulfuric acid / hydrogen peroxide aqueous solution contains sulfuric acid, hydrogen peroxide, and an organic additive in an amount that allows efficient etching of the copper layer (D) and suppresses dissolution of the metal used in the conductive plating underlayer (C) so as not to damage the underlying conductive plating underlayer (C). The sulfuric acid content of the present invention is preferably in the range of 1 to 30% by mass, more preferably 1 to 20% by mass. The hydrogen peroxide content of the etching solution of the present invention is preferably in the range of 1 to 10% by mass, more preferably 1 to 8% by mass. The organic additive content, used for purposes such as reducing the surface tension of the etching solution, is preferably in the range of 0.1 to 5% by mass, more preferably 0.5 to 3% by mass. The water content of the etching solution of the present invention is preferably in the range of 55 to 97.9% by mass, more preferably 70 to 90% by mass, in order to stably dissolve as much copper as possible.

[0161] Surfactants can be used as the organic additive, including, for example, nonionic surfactants such as polyoxyethylene nonylphenyl ether, polyoxyethylene lauryl ether, polyoxyethylene styrylphenyl ether, polyoxyethylene sorbitol tetraoleate, ethylene glycol monobutyl ether, and polyoxyethylene-polyoxypropylene copolymer; anionic surfactants such as fatty acid salts such as sodium oleate, alkyl sulfate ester salts, alkylbenzenesulfonates, alkyl sulfosuccinates, naphthalenesulfonates, polyoxyethylene alkyl sulfates, sodium alkanesulfonates, and sodium alkyldiphenylethersulfonates; and cationic surfactants such as alkylamine salts, alkyltrimethylammonium salts, and alkyldimethylbenzylammonium salts.

[0162] Furthermore, the etching solution for the conductive plating underlayer (C) of the present invention may contain an additive such as a basic compound, for example, sodium hydroxide, potassium hydroxide, or aqueous ammonia, to suppress pH fluctuations, as needed.

[0163] Furthermore, organic compounds such as antifoaming agents, preservatives, and chelating agents may be added as needed.

[0164] As the defoaming agent, a general defoaming agent can be used, and examples thereof include silicone-based defoaming agents, nonionic surfactants, polyethers, higher alcohols, polymer-based surfactants, and the like.

[0165] The sodium persulfate, sulfuric acid, and water contents of the aqueous sodium persulfate solution are preferably in the range of 1 to 20% by mass, more preferably 3 to 8% by mass, so as to efficiently etch the copper layer (D) and suppress dissolution of the metal used in the conductive plating underlayer (C) so as not to damage the underlying conductive plating underlayer (C). The sulfuric acid content in the etching solution of the present invention is preferably in the range of 0.1 to 10% by mass, more preferably 3 to 8% by mass. The water content in the etching solution of the present invention is preferably in the range of 70 to 98.9% by mass, more preferably 75 to 95% by mass, so as to stably dissolve as much copper as possible.

[0166] The potassium persulfate, sulfuric acid, and water contents of the potassium persulfate aqueous solution are preferably in the range of 1 to 10 mass%, more preferably 3 to 8 mass%, to efficiently etch the copper layer (D) and suppress dissolution of the metal used in the conductive plating underlayer (C) so as not to damage the underlying conductive plating underlayer (C). The sulfuric acid content in the etching solution of the present invention is preferably in the range of 0.1 to 10 mass%, more preferably 3 to 8 mass%. The water content in the etching solution of the present invention is preferably in the range of 80 to 98.9 mass%, more preferably 85 to 95 mass%, to stably dissolve as much copper as possible.

[0167] Examples of commercially available etching solutions that can be used to etch away the copper layer (D) laminated on the conductive plating base layer (C) include "GB-1400, 1000F, 200" manufactured by Shikoku Chemical Industry Co., Ltd., "BH671" manufactured by MacDermid, and "MEOX" manufactured by Murata Corporation.

[0168] The etching solution is preferably used at a temperature in the range of 20 to 55°C, and more preferably at a temperature in the range of 30 to 45°C in order to increase the reaction rate, decrease the surface tension, and maintain a stable etching rate due to evaporation of water in the etching solution.

[0169] The copper layer (D) can be removed with an etching solution by immersion or spraying with a spray or the like.

[0170] When the copper layer (D) is removed using an etching apparatus, for example, all components of the etching solution may be adjusted to have a predetermined composition and then supplied to the etching apparatus, or each component of the etching solution may be supplied separately to the etching apparatus, and the components may be mixed in the apparatus to adjust to have a predetermined composition.

[0171] The manufacturing conditions for removing the copper layer (D) using the etching solution may be appropriately selected depending on the film thickness of the copper layer (D) of the laminate, the design of the manufacturing equipment, etc., but it is preferable to set the etching rate of the copper layer in the process to be less than 2 μm / min, and more preferably to set the etching rate to 0.1 μm / min to 1.5 μm / min from the viewpoints of efficiently removing the copper layer (D) and preventing damage to the conductive plating base layer (C), which is the base layer.

[0172] When the through holes or non-through holes are made conductive using the electroless plating and electrolytic copper plating, the thickness of the copper layer (D) becomes thicker than the first conductive layer (F) and the second conductive layer (G), so two types of etching solutions may be used to increase productivity. For example, by etching with a ferric chloride aqueous solution or a cupric chloride aqueous solution, which have a high etching rate, followed by the use of a sulfuric acid / hydrogen peroxide aqueous solution or a salt peroxide aqueous solution, the copper layer (D) can be efficiently removed while preventing damage to the conductive plating base layer (C), which is the base layer.

[0173] The thickness of the copper after etching the copper layer (D), the first conductive layer (F) and the second conductive layer (G) with the ferric chloride aqueous solution or the cupric chloride aqueous solution is preferably 0.5 μm to 10 μm, and more preferably 1.0 μm to 5 μm.

[0174] Next, in the method for producing a circuit board, a pattern resist of a conductive layer (E) of a circuit pattern is formed on the conductive plating base layer (C) from which the upper copper layer (D) has been removed. Prior to resist formation, the surface of the conductive plating base layer (C) may be subjected to a surface treatment, such as cleaning with an acidic or alkaline cleaning solution, corona treatment, plasma treatment, UV treatment, gas-phase ozone treatment, liquid-phase ozone treatment, or treatment with a surface treatment agent, in order to improve adhesion to the resist layer. These surface treatments can be performed by a single method or by a combination of two or more methods.

[0175] Examples of the treatment with the surface treatment agent include a treatment method using a rust inhibitor comprising a triazole compound, a silane coupling agent, and an organic acid, as described in JP-A-7-258870; a treatment method using an organic acid, a benzotriazole rust inhibitor, and a silane coupling agent, as described in JP-A-2000-286546; a treatment method using a substance having a structure in which a nitrogen-containing heterocycle such as triazole or thiadiazole is bonded to a silyl group such as a trimethoxysilyl group or a triethoxysilyl group via an organic group having a thioether (sulfide) bond, as described in JP-A-2002-363189; and a treatment method using a compound having a structure in which a triazine ring and an amino group are bonded to each other, as described in WO2013 / 186941. A method of treating with a silane compound having a group, a method of treating with an imidazole silane compound obtained by reacting a formyl imidazole compound with an aminopropyl silane compound, as described in JP 2015-214743 A, a method of treating with an azole silane compound, as described in JP 2016-134454 A, a method of treating with an aromatic compound having an amino group and an aromatic ring in one molecule, a polybasic acid having two or more carboxyl groups, and a solution containing halide ions, as described in JP 2017-203073 A, a method of treating with a surface treatment agent containing a triazole silane compound, as described in JP 2018-16865 A, and the like can be used.

[0176] In the method for producing a circuit board of the present invention, to form a conductive layer (E) of a circuit pattern on the surface of the support (A), the photosensitive resist is exposed to actinic light through a photomask or by using a direct exposure machine. The exposure dose can be appropriately set as needed. The exposure machine can be a contact exposure machine, a proximity exposure machine, a projection exposure machine, a stepper exposure machine, or the like. The pattern resist is formed by removing the latent image formed in the photosensitive resist by exposure using a developer.

[0177] The developer may be a dilute aqueous alkali solution of 0.3 to 2% by mass of sodium carbonate, potassium carbonate, or the like. A surfactant, an antifoaming agent, or a small amount of an organic solvent to promote development may be added to the dilute aqueous alkali solution. Furthermore, development is carried out by immersing the exposed support (A) in the developer or spraying the developer onto the resist with a spray or the like, and this development can form a patterned resist in which the pattern-forming portion has been removed.

[0178] When forming a pattern resist, resist residues such as footings formed at the boundary between the cured resist and the substrate and resist deposits remaining on the surface of the substrate may be removed by plasma descum treatment or by using a commercially available resist residue remover.

[0179] The photosensitive resist used in the present invention may be a commercially available resist ink, liquid resist, or dry film resist, and may be appropriately selected depending on the desired pattern resolution, the type of exposure machine used, the type and pH of the chemical solution used in the subsequent plating process, etc.

[0180] Examples of commercially available resist inks include "Plating Resist MA-830" and "Etching Resist X-87" manufactured by Taiyo Ink Mfg. Co., Ltd.; etching resists and plating resists manufactured by NAZDAR; and the "Etching Resist PLAS FINE PER" series and "Plating Resist PLAS FINE PPR" series manufactured by GOO Chemical Industry Co., Ltd. Examples of electrodeposition resists include the "Eagle Series" and "Peper Series" manufactured by The Dow Chemical Company. Examples of commercially available dry films include the "Photec" series manufactured by Hitachi Chemical Co., Ltd.; the "ALPHO" series manufactured by Nikko Materials Co., Ltd.; the "Sunfort" series manufactured by Asahi Kasei Corporation; and the "Riston" series manufactured by DuPont.

[0181] For efficient circuit board manufacturing, it is convenient to use a dry film resist, and particularly when forming fine circuits, a dry film for semi-additive processing can be used. Commercially available dry films for this purpose include, for example, "ALFO LDF500" and "NIT2700" manufactured by Nikko Materials Co., Ltd., "Sunfort UFG-258" manufactured by Asahi Kasei Corporation, "RD Series (RD-2015, 1225)" and "RY Series (RY-5125, 5319, 5325)" manufactured by Hitachi Chemical Co., Ltd., and "PlateMaster Series (PM200, 300)," "DI Series (DI5100, 6100, 6125)," and "SD Series (SD1000, SD2000, SD2007)" manufactured by DuPont.

[0182] In the method for producing a circuit board of the present invention, to form a circuit pattern on the support (A), the conductive plating base layer (C) is used as a cathode electrode for electrolytic copper plating, and the conductive plating base layer (C) exposed by development in the above step is treated by electrolytic copper plating, thereby connecting the through holes of the laminate with copper plating and simultaneously forming the conductive layer (E) of the circuit pattern.

[0183] Before forming the conductive layer (E) of the circuit pattern by the electrolytic copper plating method, the surface of the conductive plating underlayer (C) may be subjected to a surface treatment, if necessary. Examples of such surface treatments include cleaning treatment with an acidic or alkaline cleaning solution, corona treatment, plasma treatment, UV treatment, gas-phase ozone treatment, liquid-phase ozone treatment, and treatment with a surface treatment agent, provided that the surface of the conductive plating underlayer (C) and the formed resist pattern are not damaged. These surface treatments can be performed by one method or by a combination of two or more methods.

[0184] When the laminate of the present invention is used to form a conductive layer (E) of a circuit pattern on a support (A), annealing may be performed after plating for the purpose of relieving stress in the plating film and improving adhesion. Annealing may be performed before the etching step described below, after the etching step, or before or after the etching.

[0185] The annealing temperature may be selected appropriately within the range of 40 to 300°C depending on the heat resistance of the support (A) used and the intended use, but is preferably in the range of 40 to 250°C, and more preferably in the range of 40 to 200°C to prevent oxidative degradation of the plating film. The annealing time is preferably 10 minutes to 10 days when the temperature is in the range of 40 to 200°C, and 5 minutes to 10 hours when annealing at a temperature above 200°C. When annealing the plating film, a rust inhibitor may be applied to the surface of the plating film as appropriate.

[0186] In the method for producing a circuit board of the present invention, a conductive layer (E) of a circuit pattern is formed by plating on the support (A) of the laminate, and then the pattern resist formed using the photosensitive resist is peeled off, and the conductive plating base layer (C) in the non-pattern forming area is removed with an etching solution.

[0187] The pattern resist may be stripped under the recommended conditions described in the catalog, specifications, etc. of the photosensitive resist used. The resist stripping solution used to strip the pattern resist may be a commercially available resist stripper or a 1.5 to 3 mass % aqueous solution of sodium hydroxide or potassium hydroxide set at 45 to 60°C. The resist may be stripped by immersing the support (A) on which the conductive layer (E) of the circuit pattern is formed in the stripping solution, or by spraying the stripping solution with a spray or the like.

[0188] The etching solution used to remove the conductive plating underlayer (C) from the non-pattern forming portion is preferably one that selectively etches only the conductive plating underlayer (C) but does not etch the copper that forms the conductive layer (E) of the circuit pattern. Examples of such an etching solution include a mixture of carboxylic acid and hydrogen peroxide.

[0189] Examples of the carboxylic acid include acetic acid, formic acid, propionic acid, butyric acid, valeric acid, caproic acid, enanthic acid, caprylic acid, pelargonic acid, capric acid, lauric acid, myristic acid, palmitic acid, margaric acid, stearic acid, oleic acid, linoleic acid, linolenic acid, arachidonic acid, eicosapentaenoic acid, docosahexaenoic acid, oxalic acid, malonic acid, succinic acid, benzoic acid, salicylic acid, phthalic acid, isophthalic acid, terephthalic acid, gallic acid, mellitic acid, cinnamic acid, pyruvic acid, lactic acid, malic acid, citric acid, fumaric acid, maleic acid, aconitic acid, glutaric acid, adipic acid, and amino acids. These carboxylic acids can be used alone or in combination. Among these carboxylic acids, acetic acid is preferably used primarily because it is easy to produce and handle as an etching solution.

[0190] When a mixture of carboxylic acid and hydrogen peroxide is used as an etching solution, it is believed that the hydrogen peroxide reacts with the carboxylic acid to produce percarboxylic acid (peroxycarboxylic acid). The produced percarboxylic acid is presumed to preferentially dissolve the silver constituting the conductive plating underlayer (C) while suppressing the dissolution of the copper constituting the conductive layer (E) of the circuit pattern.

[0191] The mixing ratio of the mixture of the carboxylic acid and hydrogen peroxide is preferably in the range of 2 to 100 moles of hydrogen peroxide per mole of carboxylic acid, more preferably in the range of 2 to 50 moles of hydrogen peroxide, since this can suppress dissolution of copper in the conductive layer (E) of the circuit pattern.

[0192] The mixture of carboxylic acid and hydrogen peroxide is preferably an aqueous solution diluted with water, and the content of the mixture of carboxylic acid and hydrogen peroxide in the aqueous solution is preferably in the range of 2 to 65 mass %, more preferably in the range of 2 to 30 mass %, since this can suppress the effect of a temperature rise in the etching solution.

[0193] The water used for the dilution is preferably water from which ionic substances and impurities have been removed, such as ion-exchanged water, pure water, or ultrapure water.

[0194] The etching solution may further contain a protective agent for protecting the copper of the conductive layer (E) of the circuit pattern and suppressing dissolution. As the protective agent, an azole compound is preferably used.

[0195] Examples of the azole compound include imidazole, pyrazole, triazole, tetrazole, oxazole, thiazole, selenazole, oxadiazole, thiadiazole, oxatriazole, and thiatriazole.

[0196] Specific examples of the azole compound include 2-methylbenzimidazole, aminotriazole, 1,2,3-benzotriazole, 4-aminobenzotriazole, 1-bisaminomethylbenzotriazole, aminotetrazole, phenyltetrazole, 2-phenylthiazole, benzothiazole, etc. These azole compounds can be used alone or in combination of two or more.

[0197] The concentration of the azole compound in the etching solution is preferably in the range of 0.001 to 2% by mass, more preferably in the range of 0.01 to 0.2% by mass.

[0198] Furthermore, it is preferable to add polyalkylene glycol as a protective agent to the etching solution, since this can suppress dissolution of copper in the conductive layer (E) of the circuit pattern.

[0199] Examples of the polyalkylene glycol include water-soluble polymers such as polyethylene glycol, polypropylene glycol, and polyoxyethylene-polyoxypropylene block copolymers. Among these, polyethylene glycol is preferred. The number-average molecular weight of the polyalkylene glycol is preferably in the range of 200 to 20,000.

[0200] The concentration of the polyalkylene glycol in the etching solution is preferably in the range of 0.001 to 2% by mass, more preferably in the range of 0.01 to 1% by mass.

[0201] In order to suppress pH fluctuations, additives such as sodium salts, potassium salts, and ammonium salts of organic acids may be added to the etching solution as needed.

[0202] In the method for producing a circuit board of the present invention, the conductive plating base layer (C) in the non-pattern forming portion can be removed by forming the conductive layer (E) of the circuit pattern, and then immersing the support (A) from which the pattern resist formed using the photosensitive resist has been peeled off in the etching solution, or by spraying the etching solution onto the support (A) with a spray or the like.

[0203] When the conductive plating underlayer (C) in the non-circuit pattern forming portion is removed using an etching device, for example, all components of the etching solution may be adjusted to a predetermined composition and then supplied to the etching device, or each component of the etching solution may be supplied separately to the etching device, and the components may be mixed in the device to adjust to a predetermined composition.

[0204] The etching solution is preferably used in a temperature range of 10 to 45°C, and particularly when an etching solution containing hydrogen peroxide is used, it is preferably used in a temperature range of 20 to 40°C, since this can suppress decomposition of hydrogen peroxide.

[0205] After the conductive plating underlayer (C) has been removed with the etching solution, a cleaning operation may be performed in addition to rinsing with water to prevent silver components dissolved in the etching solution from adhering to and remaining on the circuit board. For the cleaning operation, a cleaning solution that dissolves silver oxide, silver sulfide, and silver chloride but hardly dissolves silver is preferably used. Specifically, it is preferable to use an aqueous solution containing thiosulfate or tris(3-hydroxyalkyl)phosphine, or an aqueous solution containing mercaptocarboxylic acid or its salt as the cleaning chemical.

[0206] Examples of the thiosulfates include ammonium thiosulfate, sodium thiosulfate, potassium thiosulfate, etc. Examples of the tris(3-hydroxyalkyl)phosphines include tris(3-hydroxymethyl)phosphine, tris(3-hydroxyethyl)phosphine, tris(3-hydroxypropyl)phosphine, etc. These thiosulfates or tris(3-hydroxyalkyl)phosphines can be used either individually or in combination of two or more.

[0207] When using an aqueous solution containing a thiosulfate, the concentration may be appropriately set depending on the process time, the characteristics of the cleaning device used, etc., but is preferably in the range of 0.1 to 40 mass %, and more preferably in the range of 1 to 30 mass % from the viewpoints of cleaning efficiency and stability of the chemical solution during continuous use.

[0208] Furthermore, when an aqueous solution containing tris(3-hydroxyalkyl)phosphine is used, the concentration may be appropriately set depending on the process time, the characteristics of the cleaning device used, etc., but is preferably in the range of 0.1 to 50 mass %, and more preferably in the range of 1 to 40 mass % from the viewpoints of cleaning efficiency and stability of the chemical solution during continuous use.

[0209] Examples of the mercaptocarboxylic acid include thioglycolic acid, 2-mercaptopropionic acid, 3-mercaptopropionic acid, thiomalic acid, cysteine, N-acetylcysteine, etc. Examples of the salt of the mercaptocarboxylic acid include alkali metal salts, ammonium salts, and amine salts.

[0210] When using an aqueous solution of mercaptocarboxylic acid or a salt thereof, the concentration is preferably in the range of 0.1 to 20% by mass, and more preferably in the range of 0.5 to 15% by mass from the viewpoint of cleaning efficiency and process costs when treating a large amount.

[0211] Examples of methods for carrying out the above-mentioned cleaning operation include a method of immersing the circuit board obtained by etching away the conductive plating underlayer (C) of the non-pattern forming portion in the cleaning solution, a method of spraying the cleaning solution onto the circuit board with a spray, etc. The temperature of the cleaning solution can be set at room temperature (25°C), but it may also be set at, for example, 30°C, since this allows for stable cleaning without being affected by the outside temperature.

[0212] The step of removing the conductive plating underlayer (C) from the non-pattern forming portion with an etching solution and the washing operation can be repeated as necessary.

[0213] After the conductive plating underlayer (C) in the non-pattern-forming areas has been removed with the etching solution, the circuit board of the present invention may be further washed, if necessary, to further improve the insulating properties of the non-pattern-forming areas. For example, an alkaline permanganate solution prepared by dissolving potassium permanganate or sodium permanganate in an aqueous solution of potassium hydroxide or sodium hydroxide can be used for this washing operation.

[0214] The cleaning using the alkaline permanganate solution can be performed by immersing the circuit board obtained by the above method in an alkaline permanganate solution set at 20 to 60°C, or by spraying the alkaline permanganate solution onto the circuit board using a spray or the like. The circuit board may be treated by contacting it with a water-soluble organic solvent having an alcoholic hydroxyl group before cleaning in order to improve the wettability of the alkaline permanganate solution to the surface of the support (A) and thereby improve cleaning efficiency. Examples of the organic solvent include methyl alcohol, ethyl alcohol, n-propyl alcohol, and isopropyl alcohol. These organic solvents can be used alone or in combination of two or more.

[0215] The concentration of the alkaline permanganate solution may be appropriately selected as needed, but is preferably 0.1 to 10 parts by mass of potassium permanganate or sodium permanganate dissolved in 100 parts by mass of a 0.1 to 10% by mass aqueous solution of potassium hydroxide or sodium hydroxide, and from the viewpoint of cleaning efficiency, more preferably 1 to 6 parts by mass of potassium permanganate or sodium permanganate dissolved in 100 parts by mass of a 1 to 6% by mass aqueous solution of potassium hydroxide or sodium hydroxide.

[0216] When cleaning with the alkaline permanganate solution, it is preferable to treat the cleaned circuit board with a solution having a neutralizing or reducing effect after cleaning with the alkaline permanganate solution. Examples of the solution having a neutralizing or reducing effect include an aqueous solution containing 0.5 to 15% by mass of dilute sulfuric acid or an organic acid. Examples of the organic acid include formic acid, acetic acid, oxalic acid, citric acid, ascorbic acid, and methionine.

[0217] The cleaning with the alkaline permanganate solution may be carried out after cleaning for the purpose of preventing silver components dissolved in the etching solution from adhering to and remaining on the circuit board, or alternatively, cleaning with the alkaline permanganate solution alone may be carried out instead of cleaning for the purpose of preventing silver components dissolved in the etching solution from adhering to and remaining on the circuit board.

[0218] Furthermore, the circuit board produced by the production method of the present invention may be appropriately and optionally subjected to lamination of a coverlay film on the circuit pattern, formation of a solder resist layer, and nickel / gold plating, nickel / palladium / gold plating, or palladium / gold plating as a final surface treatment of the circuit pattern.

[0219] By using the manufacturing method of the present invention described above, it is possible to manufacture, with good design reproducibility, circuit boards on various smooth supports (A) in which circuit wiring with a good rectangular cross-section, having a smooth surface and high adhesion, is electrically connected via the support (A). Therefore, by using the technology of the present invention, it is possible to provide multilayered circuit boards with high density, high performance, and high frequency transmission. Therefore, high-density, high-performance circuit boards of various shapes and sizes can be provided. Furthermore, the circuit board manufacturing method of the present invention can also be used to manufacture printed wiring boards and various components having a patterned metal layer on the surface of the support (A), such as connectors, electromagnetic wave shields, antennas for RFID and the like, and film capacitors. [Example]

[0220] The present invention will be described in detail below with reference to examples, but the present invention is not limited to the following examples.

[0221] [Preparation Example 1: Preparation of Coating Solution (1) for Forming Conductive Plating Underlayer (C)] Under a nitrogen atmosphere, a chloroform (30 ml) solution containing 9.6 parts by mass of p-toluenesulfonic acid chloride was added dropwise to a mixture containing 20 parts by mass of methoxypolyethylene glycol (number average molecular weight 2,000), 8.0 parts by mass of pyridine, and 20 ml of chloroform while stirring on ice for 30 minutes, and then the mixture was stirred at a bath temperature of 40°C for 4 hours, and 50 ml of chloroform was added. The resulting product was then washed with 100 ml of a 5 mass % aqueous hydrochloric acid solution, then washed with 100 ml of a saturated aqueous sodium hydrogencarbonate solution, and then washed with 100 ml of a saturated saline solution, then dried over anhydrous magnesium sulfate, filtered, concentrated under reduced pressure, washed several times with hexane, filtered, and dried at 80°C under reduced pressure to obtain a methoxypolyethylene glycol having a p-toluenesulfonyloxy group.

[0222] 5.39 parts by mass of methoxypolyethylene glycol having a p-toluenesulfonyloxy group, 20 parts by mass of polyethyleneimine (manufactured by Aldrich, molecular weight 25,000), 0.07 parts by mass of potassium carbonate, and 100 ml of N,N-dimethylacetamide were mixed and stirred at 100°C for 6 hours under a nitrogen atmosphere. Next, 300 ml of a mixed solution of ethyl acetate and hexane (ethyl acetate / hexane volume ratio = 1 / 2) was added, and after vigorously stirring at room temperature, the product solid was filtered. The solid was washed with 100 ml of a mixed solution of ethyl acetate and hexane (ethyl acetate / hexane volume ratio = 1 / 2) and then dried under reduced pressure to obtain a compound in which polyethylene glycol was bound to polyethyleneimine.

[0223] 138.8 parts by mass of an aqueous solution containing 0.592 parts by mass of the resulting compound in which polyethylene glycol is bound to polyethyleneimine was mixed with 10 parts by mass of silver oxide and stirred for 30 minutes at 25° C. Next, 46 parts by mass of dimethylethanolamine was gradually added with stirring, and the mixture was stirred for 30 minutes at 25° C. Subsequently, 15.2 parts by mass of a 10% by mass aqueous ascorbic acid solution was gradually added with stirring, and stirring was continued for 20 hours to obtain a silver dispersion.

[0224] A mixed solvent of 200 ml of isopropyl alcohol and 200 ml of hexane was added to the resulting silver dispersion and stirred for 2 minutes, followed by centrifugal concentration at 3000 rpm for 5 minutes. After removing the supernatant, a mixed solvent of 50 ml of isopropyl alcohol and 50 ml of hexane was added to the precipitate and stirred for 2 minutes, followed by centrifugal concentration at 2000 rpm for 10 minutes. After removing the supernatant, 20 parts by mass of water was added to the precipitate and stirred for 2 minutes, and the organic solvent was removed under reduced pressure. After adding 10 parts by mass of water and stirring and dispersing, the dispersion was left to freeze in a freezer at -40°C for 24 hours, and then treated in a freeze dryer (FDU-2200, manufactured by Tokyo Rikakikai Co., Ltd.) to obtain silver particles containing a dispersant having a basic nitrogen atom-containing group, consisting of flake-shaped clusters with a gray-green metallic luster.

[0225] The resulting powder of silver particles containing a dispersant having a basic nitrogen atom-containing group was dispersed in a mixed solvent of 45 parts by mass of ethanol and 55 parts by mass of ion-exchanged water to prepare a 5% by mass coating solution (1) for forming a conductive plating underlayer (C). The resulting silver particles were heated in an electric furnace at 500°C for 1 hour, and the dispersant content was calculated from the ash content, which was confirmed to be 5% by mass relative to 100% by mass of silver solids.

[0226] [Preparation Example 2: Preparation of Coating Liquid (1) for Forming Resin Layer (B)] 60 parts by mass of phenoxy resin 4250 (Mitsubishi Chemical Corporation, bisphenol A / bisphenol F mixed type, molecular weight 60,000, solid content 100% by mass), 33 parts by mass of aminotriazine novolak resin (DIC Corporation, "Phenolite LA-7052", solid content 60% by mass), 17 parts by mass of epoxy resin (DIC Corporation, "EPICLON EXA-830CRP"; bisphenol F type epoxy resin, epoxy group equivalent 162 g / equivalent), 3 parts by mass of trimellitic anhydride, 16 parts by mass of "DPE" manufactured by Seika Corporation as a curing agent, and 0.5 parts by mass of "TBZ" manufactured by Shikoku Kasei Co., Ltd. as a curing catalyst were mixed, diluted with cyclohexanone to a non-volatile content of 2% by mass, and mixed uniformly to obtain a coating liquid (1) for forming the resin layer (B).

[0227] [Preparation Example 3: Preparation of Transfer Laminate (1)] The coating solution (1) for forming the conductive plating underlayer (C) obtained in Preparation Example 1 was applied to the shiny surface of a copper foil (F2-WS manufactured by Furukawa Electric Co., Ltd., copper foil; thickness: 18 μm) using a small desktop coater (K ​​Printing Profer manufactured by RK Print Coat Instruments Co., Ltd.), and dried at 150°C for 5 minutes to coat a silver particle layer corresponding to the conductive plating underlayer (C) to a thickness of 0.2 μm after drying. Thereafter, the coating liquid (1) for forming the resin layer (B) obtained in Preparation Example 2 was applied using a small desktop coater (RK Print Coat Instruments' "K Printing Profer") and dried at 180°C for 3 minutes, thereby coating a layer corresponding to the resin layer (B) so that the thickness after drying was 0.3 μm. As a result, a conductive plating base layer (C) and a resin layer (B) were formed on the surface of the copper foil that would become the temporary support (H), and a transfer laminate (1) was obtained.

[0228] [Preparation Example 4: Preparation of Etching Solution (1) of Sulfuric Acid / Hydrogen Peroxide Aqueous Solution] 31.9 parts by mass of 47% by mass sulfuric acid was added to 59.4 parts by mass of ion-exchanged water, and then 5.7 parts by mass of 35% by mass hydrogen peroxide solution was added, followed by 3.0 parts by mass of an organic additive (MacDermid "BLACKHOLE ETCHANT 671") and mixing uniformly to prepare an etching solution (1) of sulfuric acid / hydrogen peroxide aqueous solution for etching the copper layer (D).

[0229] Preparation Example 5: Preparation of Etching Solution (2) of Sulfuric Acid / Hydrogen Peroxide Aqueous Solution 2.1 parts by mass of 47% by mass sulfuric acid was added to 94.9 parts by mass of ion-exchanged water, and then 2.9 parts by mass of 35% by mass hydrogen peroxide solution was added, followed by adding 0.1 parts by mass of an organic additive (MacDermid "BLACKHOLE ETCHANT 671") and mixing uniformly to prepare an etching solution (2) of sulfuric acid / hydrogen peroxide aqueous solution for etching the copper layer (D).

[0230] [Preparation Example 6: Preparation of sulfuric acid / hydrogen peroxide aqueous etching solution (3)] 63.8 parts by mass of 47% by mass sulfuric acid was added to 2.6 parts by mass of ion-exchanged water, and then 28.6 parts by mass of 35% by mass hydrogen peroxide solution was added, followed by 5.0 parts by mass of an organic additive (MacDermid "BLACKHOLE ETCHANT 671") and mixing uniformly to prepare an etching solution (3) of sulfuric acid / hydrogen peroxide aqueous solution for etching the copper layer (D).

[0231] [Preparation Example 7: Preparation of etching solution (4) of sodium persulfate aqueous solution] To 84.4 parts by mass of ion-exchanged water, 10.9 parts by mass of 47% sulfuric acid and 4.7 parts by mass of sodium persulfate were added, and the mixture was mixed uniformly to prepare an etching solution (4) of an aqueous sodium persulfate solution for etching the copper layer (D).

[0232] [Preparation Example 8: Preparation of etching solution (5) of sodium persulfate aqueous solution] 2.1 parts by mass of 47% by mass sulfuric acid and 1.0 part by mass of sodium persulfate were added to 96.9 parts by mass of ion-exchanged water, and the mixture was mixed uniformly to prepare an etching solution (5) of sodium persulfate aqueous solution for etching the copper layer (D).

[0233] Preparation Example 9: Preparation of etching solution (6) of sodium persulfate aqueous solution 21.3 parts by mass of 47% by mass sulfuric acid and 20.0 parts by mass of sodium persulfate were added to 58.7 parts by mass of ion-exchanged water, and the mixture was mixed uniformly to prepare an etching solution (6) of sodium persulfate aqueous solution for etching the copper layer (D).

[0234] [Preparation Example 10: Preparation of etching solution (7) of potassium persulfate aqueous solution] 10.8 parts by mass of 47% by mass sulfuric acid and 5.5 parts by mass of potassium persulfate were added to 83.6 parts by mass of ion-exchanged water, and the mixture was mixed uniformly to prepare an etching solution (7) of potassium persulfate aqueous solution for etching the copper layer (D).

[0235] [Preparation Example 11: Preparation of etching solution (8) of potassium persulfate aqueous solution] 2.1 parts by mass of 47% by mass sulfuric acid and 1.0 part by mass of potassium persulfate were added to 96.9 parts by mass of ion-exchanged water, and the mixture was mixed uniformly to prepare an etching solution (8) of potassium persulfate aqueous solution for etching the copper layer (D).

[0236] [Preparation Example 12: Preparation of etching solution (9) of potassium persulfate aqueous solution] 21.3 parts by mass of 47% by mass sulfuric acid and 10.0 parts by mass of potassium persulfate were added to 68.7 parts by mass of ion-exchanged water, and the mixture was mixed uniformly to prepare an etching solution (9) of potassium persulfate aqueous solution for etching the copper layer (D).

[0237] [Preparation Example 13: Preparation of etching solution (10) of cupric chloride aqueous solution] 20.1 parts by mass of 35% by mass hydrochloric acid was added to 59.8 parts by mass of ion-exchanged water, and 20.1 parts by mass of cupric chloride (II) was added and mixed uniformly to prepare an etching solution (10) of an aqueous cupric chloride (II) solution for etching the copper layer (D).

[0238] [Preparation Example 14: Preparation of etching solution for plating underlayer] 2.6 parts by mass of acetic acid was added to 47.4 parts by mass of water, and 50 parts by mass of 35% by mass hydrogen peroxide solution was further added to prepare an etching solution (1) for etching a conductive plating underlayer (C). The molar ratio of hydrogen peroxide to carboxylic acid (hydrogen peroxide / carboxylic acid) in this etching solution (1) for etching a conductive plating underlayer (C) was 13.6, and the content of the mixture of hydrogen peroxide and carboxylic acid in the etching solution (1) for etching a conductive plating underlayer (C) was 22.4% by mass.

[0239] [Preparation Example 15: Preparation of inner layer circuit board (1)] The resin layer (B) of the transfer laminate (1) prepared in Preparation Example 3 was bonded to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm) and subjected to thermocompression bonding at 195 ° C for 90 minutes using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisakusho Co., Ltd.). Then, the copper foil alone was peeled off to form the resin layer (B) and the conductive plating underlayer (C) on both sides of the cured prepreg. A dry film resist ("RY-5125" manufactured by Resonac Corporation, thickness 25 μm) was then pressure-bonded onto the conductive plating underlayer (C) obtained in this way at 110 ° C, 0.4 MPa, and 1 m / min. Subsequently, a pattern for the inner layer circuit wiring was exposed using a direct exposure digital imaging device ("Nuvogo1000R" manufactured by Orbotek). Next, development was carried out using a 1% by mass aqueous solution of sodium carbonate to form a pattern resist on the conductive plating underlayer (C) from which the inner layer circuit wiring had been removed, thereby exposing the conductive plating underlayer (C) on the support (A).

[0240] Next, the surface of the conductive plating underlayer (C) of the support (A) on which the pattern resist was formed was placed as the cathode, and phosphorus-containing copper was used as the anode. Electroplating was performed for 41 minutes at a current density of 2 A / dm2 using an electroplating solution containing copper sulfate (60 g / L copper sulfate, 190 g / L sulfuric acid, 50 mg / L chloride ions, and an additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) to form an 18 μm-thick copper-plated conductive circuit pattern layer (E) on the daisy chain portion from which the resist had been removed. The support (A) on which the circuit pattern conductive layer (E) had been formed was then immersed in a 3% by mass aqueous sodium hydroxide solution set at 50°C to strip the pattern resist.

[0241] Next, the support (A) obtained above was immersed for 60 seconds at 35°C in the etching solution for etching the conductive plating underlayer (C) obtained in Preparation Example 14, thereby removing the conductive plating underlayer (C) other than the conductive layer pattern, thereby obtaining a substrate for forming inner layer circuit wiring. The cross-sectional shape of the circuit formation portion of the produced inner layer circuit board was a rectangular shape without reduction in wiring height or wiring width and without undercut, and the wiring was smooth.

[0242] Example 1 The resin layer (B)-formed side of the transfer laminate (1) prepared in Preparation Example 3 was attached to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm), and thermocompression bonding was performed at 195°C for 90 minutes using a hand press (Mini Test Press manufactured by Toyo Seiki Seisakusho Co., Ltd.). Then, only the copper foil was peeled off, forming the resin layer (B) and the conductive plating base layer (C) on both sides of the cured prepreg. The conductive plating base layer (C) obtained above was then set on the cathode side, and phosphorus-containing copper was set on the anode side. An electroplating solution containing copper sulfate was used at a current density of 3 A / dm 2 Electroplating was performed for 7 minutes at 1000 K for 10 minutes to form a copper plating layer (2 μm thick) corresponding to the metal plating layer (F) on the conductive plating underlayer (C). The electroplating solution used was 70 g / L copper sulfate, 200 g / L sulfuric acid, 50 mg / L chloride ions, and 5 ml / L of an additive (Top Lucina SF-M, Okuno Chemical Industries Co., Ltd.). Etching was then performed using the sulfuric acid / hydrogen peroxide aqueous solution etching solution (1) prepared in Preparation Example 4 until the copper layer (D) disappeared. By removing the copper layer (D) through etching, a laminate for confirming conductivity was obtained, in which the support (A), resin layer (B), and conductive plating underlayer (C) were sequentially laminated.

[0243] Examples 2 to 10 A laminate for confirming conductivity was obtained in the same manner as in Example 1, except that the type of etching solution was changed to one shown in Table 1.

[0244] Example 11 The resin layer (B) of the transfer laminate (1) prepared in Preparation Example 3 was bonded to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm) and subjected to thermocompression bonding at 195 ° C for 90 minutes using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisakusho Co., Ltd.). Then, using a ferric chloride etching solution (content 40% by mass) at 40 ° C, etching was performed so that the thickness of the copper foil to become the copper layer (D) was 6 μm. Then, using the sulfuric acid / hydrogen peroxide aqueous solution etching solution (1) prepared in Preparation Example 4, etching was performed until the copper layer (D) disappeared. By removing the copper layer (D) by etching, a laminate for confirming conductivity was obtained, in which the support (A), resin layer (B), and conductive plating underlayer (C) were sequentially laminated.

[0245] (Examples 12 to 14) A laminate for confirming conductivity was obtained in the same manner as in Example 11, except that the type of etching solution was changed to one shown in Table 1.

[0246] Example 15 The resin layer (B)-formed side of the transfer laminate (1) prepared in Preparation Example 3 was attached to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm), and thermocompression bonding was performed at 195°C for 90 minutes using a hand press (Mini Test Press manufactured by Toyo Seiki Seisakusho Co., Ltd.). Then, only the copper foil was peeled off, forming the resin layer (B) and the conductive plating base layer (C) on both sides of the cured prepreg. The conductive plating base layer (C) obtained above was then set on the cathode side, and phosphorus-containing copper was set on the anode side. An electroplating solution containing copper sulfate was used at a current density of 3 A / dm 2 Electrolytic plating was carried out at 400 K for 7 minutes to form a copper plating layer (thickness: 2 μm) corresponding to the copper layer (D) on the conductive plating underlayer (C).

[0247] Next, a conductive plating underlayer (C) and a 2 μm-thick copper layer (D) were formed on both surfaces of the prepreg support (A). A 100 μm-diameter through-hole was drilled into the laminate to create a daisy chain with 30 through-holes and a circuit pattern line width of 300 μm. Next, a plasma desmear was performed to remove any smears generated by the drilling process. The resulting support (A) with through-holes was subjected to MacDermid's Black Hole process (conditioning-carbon adsorption-etching) to deposit carbon on the through-hole surfaces. The carbon-deposited copper layer (D) was then etched using the sulfuric acid / hydrogen peroxide aqueous solution etchant (1) prepared in Preparation Example 4 until the copper layer (D) disappeared. The copper layer (D) was removed by etching, revealing the conductive plating underlayer (C) on the support (A).

[0248] A dry film resist ("RY-5125" manufactured by Resonac, Inc., thickness 25 μm) was applied to the conductive plating underlayer (C) thus obtained by pressure bonding at 110°C, 0.4 MPa, and 1 m / min. A daisy chain circuit pattern was then exposed onto the resist using a direct exposure digital imaging device ("Nuvogo1000R" manufactured by Orbotek). Development was then performed using a 1% by mass aqueous solution of sodium carbonate to form a pattern resist on the conductive plating underlayer (C) from which the daisy chain portion had been removed, exposing the conductive plating underlayer (C) on the support (A).

[0249] Next, the surface of the conductive plating underlayer (C) of the support (A) on which the pattern resist was formed was placed as the cathode, and phosphorus-containing copper was used as the anode. Electroplating was performed for 41 minutes at a current density of 2 A / dm2 using an electroplating solution containing copper sulfate (60 g / L copper sulfate, 190 g / L sulfuric acid, 50 mg / L chloride ions, and an additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) to form an 18 μm-thick copper-plated conductive circuit pattern layer (E) on the daisy chain portion from which the resist had been removed. The support (A) on which the circuit pattern conductive layer (E) had been formed was then immersed in a 3% by mass aqueous sodium hydroxide solution set at 50°C to strip the pattern resist.

[0250] Next, the support (A) obtained above was immersed in the etching solution for etching the conductive plating base layer (C) obtained in Preparation Example 14 at 35°C for 60 seconds to remove the conductive plating base layer (C) other than the conductive layer pattern, thereby obtaining a circuit board.

[0251] (Examples 16 to 17) A circuit board was obtained in the same manner as in Example 15, except that the type of etching solution was changed to one shown in Table 1.

[0252] Example 18 A prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm) and the resin layer (B) formed side of the transfer laminate (1) manufactured in Preparation Example 3 were bonded to both sides of the inner layer circuit board (1) manufactured in Preparation Example 15, and thermocompression bonding was performed for 90 minutes at 195°C using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisakusho Co., Ltd.). Then, only the copper foil was peeled off, and the resin layer (B) and the conductive plating base layer (C) were formed on both sides of the cured prepreg. The conductive plating base layer (C) obtained above was then set on the cathode side, and phosphorus-containing copper was set on the anode side, and an electroplating solution containing copper sulfate was used at a current density of 3 A / dm 2 Electrolytic plating was carried out at 400 K for 7 minutes to form a copper plating layer (thickness: 2 μm) corresponding to the copper layer (D) on the conductive plating underlayer (C).

[0253] Next, a conductive plating underlayer (C) and a 2 μm-thick copper layer (D) were formed on both surfaces of the inner layer circuit board and the prepreg. To create a daisy chain with 30 blind via holes (non-through holes) and a circuit pattern line width of 300 μm, 100 μm-diameter blind via holes (non-through holes) were formed on the copper wiring surface of the inner layer circuit board using a laser. Next, to remove dust (smear) generated by the laser processing, a plasma desmear was performed. The resulting support (A) with blind via holes (non-through holes) was subjected to MacDermid's Black Hole process (conditioning-carbon adsorption treatment-etching) to deposit carbon on the surface of the blind via holes. The carbon-deposited copper layer (D) and the copper wiring surface of the inner layer circuit board were then etched using the sulfuric acid / hydrogen peroxide aqueous solution etching solution (1) prepared in Preparation Example 4 until the copper layer (D) disappeared. The copper layer (D) was removed by etching to expose the conductive plating underlayer (C) on the support (A).

[0254] A dry film resist ("RY-5125" manufactured by Resonac, Inc., thickness 25 μm) was applied to the conductive plating underlayer (C) thus obtained by pressure bonding at 110°C, 0.4 MPa, and 1 m / min. A daisy chain circuit pattern was then exposed onto the resist using a direct exposure digital imaging device ("Nuvogo1000R" manufactured by Orbotek). Development was then performed using a 1% by mass aqueous solution of sodium carbonate to form a pattern resist on the conductive plating underlayer (C) from which the daisy chain portion had been removed, exposing the conductive plating underlayer (C) on the support (A).

[0255] Next, the surface of the conductive plating underlayer (C) of the support (A) on which the pattern resist was formed was placed as the cathode, and phosphorus-containing copper was used as the anode. Electroplating was performed for 41 minutes at a current density of 2 A / dm2 using an electroplating solution containing copper sulfate (60 g / L copper sulfate, 190 g / L sulfuric acid, 50 mg / L chloride ions, and an additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) to form an 18 μm-thick copper-plated conductive circuit pattern layer (E) on the daisy chain portion from which the resist had been removed. The support (A) on which the circuit pattern conductive layer (E) had been formed was then immersed in a 3% by mass aqueous sodium hydroxide solution set at 50°C to strip the pattern resist.

[0256] Next, the support (A) obtained above was immersed in the etching solution for etching the conductive plating base layer (C) obtained in Preparation Example 14 at 35°C for 60 seconds to remove the conductive plating base layer (C) other than the conductive layer pattern, thereby obtaining a circuit board.

[0257] (Examples 19 to 20) A circuit board was obtained in the same manner as in Example 18, except that the type of etching solution was changed to one shown in Table 1.

[0258] Example 21 The resin layer (B)-formed side of the transfer laminate (1) prepared in Preparation Example 3 was attached to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm), and thermocompression bonding was performed at 195°C for 90 minutes using a hand press (Mini Test Press manufactured by Toyo Seiki Seisakusho Co., Ltd.). Then, only the copper foil was peeled off, forming the resin layer (B) and the conductive plating base layer (C) on both sides of the cured prepreg. The conductive plating base layer (C) obtained above was then set on the cathode side, and phosphorus-containing copper was set on the anode side. An electroplating solution containing copper sulfate was used at a current density of 3 A / dm 2 Electrolytic plating was carried out at 400 K for 7 minutes to form a copper plating layer (thickness: 2 μm) corresponding to the copper layer (D) on the conductive plating underlayer (C).

[0259] Next, a conductive plating underlayer (C) and a 2.0 μm-thick copper layer (D) were formed on both surfaces of the prepreg support (A). To create a daisy chain with 30 through-holes and a circuit pattern line width of 300 μm, 100 μm-diameter through-holes were drilled using a drill. Next, a plasma desmear was performed to remove dust (smears) generated by the drilling process. The support (A) with through-holes thus obtained was made conductive using a palladium method. The treatment conditions for the palladium method included immersion in a catalyst solution containing 1 g / L palladium chloride, 1 ml / L hydrochloric acid, and 1 g / L dimethylthiourea at 25°C for 3 minutes. The substrate was then washed with water and treated with a reducing solution containing 10 g / L dimethylamine borane and 5 g / L sodium hydroxide at 50°C for 2 minutes to make the through-holes conductive with palladium. Thereafter, the support (A) with through holes (penetrating holes) after the conductive treatment was immersed in an electroless copper plating solution ("Circuposit 6550" manufactured by Rohm and Haas Electronic Materials Co., Ltd.) at 35°C for 10 minutes to form a first conductive layer (F) (thickness 0.2 μm). Next, the surface of the first conductive layer (F) was placed as the cathode, and phosphorus-containing copper was used as the anode. Electroplating was performed for 160 minutes at a current density of 1.0 A / dm2 using an electroplating solution containing copper sulfate (60 g / L copper sulfate, 190 g / L sulfuric acid, 50 mg / L chloride ions, and an additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) to form a second conductive layer (G) (thickness: 40 μm). Subsequently, etching was performed using a ferric chloride etching solution (content: 40% by mass) at 40°C to reduce the thickness of the copper layer (D) to 2 μm. Subsequently, etching treatment was performed using the sulfuric acid / hydrogen peroxide aqueous solution etching solution (1) prepared in Preparation Example 4 until the copper layer (D) disappeared. By removing the copper layer (D) by etching treatment, the conductive plating underlayer (C) was exposed on the support (A).

[0260] A dry film resist ("RY-5125" manufactured by Resonac, Inc., thickness 25 μm) was applied to the conductive plating underlayer (C) thus obtained by pressure bonding at 110°C, 0.4 MPa, and 1 m / min. A daisy chain circuit pattern was then exposed onto the resist using a direct exposure digital imaging device ("Nuvogo1000R" manufactured by Orbotek). Development was then performed using a 1% by mass aqueous solution of sodium carbonate to form a pattern resist on the conductive plating underlayer (C) from which the daisy chain portion had been removed, exposing the conductive plating underlayer (C) on the support (A).

[0261] Next, the surface of the conductive plating underlayer (C) of the support (A) on which the pattern resist was formed was placed as the cathode, and phosphorus-containing copper was used as the anode. Electroplating was performed for 41 minutes at a current density of 2 A / dm2 using an electroplating solution containing copper sulfate (60 g / L copper sulfate, 190 g / L sulfuric acid, 50 mg / L chloride ions, and an additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) to form an 18 μm-thick copper-plated conductive circuit pattern layer (E) on the daisy chain portion from which the resist had been removed. The support (A) on which the circuit pattern conductive layer (E) had been formed was then immersed in a 3% by mass aqueous sodium hydroxide solution set at 50°C to strip the pattern resist.

[0262] Next, the support (A) from which the pattern resist had been peeled off obtained above was immersed in the etching solution for etching the conductive plating base layer (C) obtained in Preparation Example 14 at 35°C for 60 seconds to remove the conductive plating base layer (C) other than the conductive layer pattern, thereby obtaining a circuit board.

[0263] (Examples 22 to 23) A circuit board was obtained in the same manner as in Example 21, except that the type of etching solution was changed to one shown in Table 1.

[0264] Example 24 A prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm) and the surface of the transfer laminate (1) manufactured in Preparation Example 3 on which the resin layer (B) was formed were bonded to both sides of the inner layer circuit board (1) manufactured in Preparation Example 15, and thermocompression bonding was performed for 90 minutes at 195°C using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisakusho Co., Ltd.). Then, only the copper foil was peeled off, and the resin layer (B) and the conductive plating base layer (C) were formed on both sides of the cured prepreg. The conductive plating base layer (C) obtained above was then set on the cathode side, and phosphorus-containing copper was set on the anode side, and electroplating was performed at a current density of 3 A / dm using an electroplating solution containing copper sulfate. 2 Electrolytic plating was carried out at 400 K for 7 minutes to form a copper plating layer (thickness: 2 μm) corresponding to the copper layer (D) on the conductive plating underlayer (C).

[0265] Next, a conductive plating underlayer (C) and a 2.0 μm-thick copper layer (D) were formed on both surfaces of the inner layer circuit board and the prepreg. To create a daisy chain with 30 blind via holes and a circuit pattern line width of 300 μm, 100 μm-diameter blind via holes were formed on the copper wiring surface of the inner layer circuit board using a laser. Next, a plasma desmearing process was performed to remove debris (smears) generated by the laser processing. The interior of the blind via holes was then made conductive using a palladium method. The palladium method involved immersion in a catalyst solution containing 1 g / L palladium chloride, 1 ml / L hydrochloric acid, and 1 g / L dimethylthiourea at 25°C for 3 minutes. The substrate was then rinsed with water and treated with a reducing solution containing 10 g / L dimethylamine borane and 5 g / L sodium hydroxide at 50°C for 2 minutes to make the through holes conductive with palladium. Thereafter, the support (A) with the blind via holes (non-penetrating holes) after the conductive treatment was immersed in an electroless copper plating solution (Circuposit 6550 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) at 35°C for 10 minutes to form a first conductive layer (F) (thickness 0.2 μm). Next, the surface of the first conductive layer (F) was placed as the cathode, and phosphorus-containing copper was used as the anode. Electroplating was performed for 160 minutes at a current density of 1.0 A / dm2 using an electroplating solution containing copper sulfate (60 g / L copper sulfate, 190 g / L sulfuric acid, 50 mg / L chloride ions, and an additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) to form a second conductive layer (G) (thickness: 40 μm). Subsequently, etching was performed using a ferric chloride etching solution (content: 40% by mass) at 40°C to reduce the thickness of the copper layer (D) to 2 μm. Subsequently, etching treatment was performed using the sulfuric acid / hydrogen peroxide aqueous solution etching solution (1) prepared in Preparation Example 4 until the copper layer (D) disappeared. By removing the copper layer (D) by etching treatment, the conductive plating underlayer (C) was exposed on the support (A).

[0266] A dry film resist ("RY-5125" manufactured by Resonac, Inc., thickness 25 μm) was applied to the conductive plating underlayer (C) thus obtained by pressure bonding at 110°C, 0.4 MPa, and 1 m / min. A daisy chain circuit pattern was then exposed onto the resist using a direct exposure digital imaging device ("Nuvogo1000R" manufactured by Orbotek). Development was then performed using a 1% by mass aqueous solution of sodium carbonate to form a pattern resist on the conductive plating underlayer (C) from which the daisy chain portion had been removed, exposing the conductive plating underlayer (C) on the support (A).

[0267] Next, the support (A) on which the pattern resist was formed obtained above was immersed in the etching solution for etching the conductive plating base layer (C) obtained in Preparation Example 14 at 35°C for 60 seconds to remove the conductive plating base layer (C) other than the conductive layer pattern, thereby obtaining a circuit board.

[0268] (Examples 25 to 26) A laminate for confirming conductivity was obtained in the same manner as in Example 24, except that the type of etching solution was changed to one shown in Table 1.

[0269] Example 27 The copper layer (D) was formed by laminating the resin layer (B)-formed surface of the transfer laminate (1) prepared in Preparation Example 3 to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm), and then thermocompression bonding was performed for 90 minutes at 195 ° C. using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisaku-sho, Ltd.). Thereafter, a circuit board was obtained in the same manner as in Example 15, except that the manufacturing method was changed to etching the copper foil to a thickness of 6 μm using a ferric chloride etching solution (content 40 mass%) at 40 ° C.

[0270] (Examples 28 to 29) A circuit board was obtained in the same manner as in Example 27, except that the type of etching solution was changed to one shown in Table 1.

[0271] Example 30 The copper layer (D) was formed by laminating the resin layer (B)-formed surface of the transfer laminate (1) prepared in Preparation Example 3 to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm), and then thermocompression bonding was performed for 90 minutes at 195 ° C. using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisaku-sho, Ltd.). Thereafter, a circuit board was obtained in the same manner as in Example 18, except that the manufacturing method was changed to etching the copper foil to a thickness of 6 μm using a ferric chloride etching solution (content 40 mass%) at 40 ° C.

[0272] (Examples 31 to 32) A circuit board was obtained in the same manner as in Example 30, except that the type of etching solution was changed to one shown in Table 1.

[0273] Example 33 The copper layer (D) was formed by laminating the resin layer (B)-formed surface of the transfer laminate (1) prepared in Preparation Example 3 to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm), and then thermocompression bonding was performed for 90 minutes at 195 ° C. using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisaku-sho, Ltd.). Then, a circuit board was obtained in the same manner as in Example 21, except that the manufacturing method was changed to etching the copper foil to a thickness of 6 μm using a ferric chloride etching solution (content 40 mass%) at 40 ° C.

[0274] (Examples 34 to 35) A circuit board was obtained in the same manner as in Example 33, except that the type of etching solution was changed to one shown in Table 1.

[0275] Example 36 The copper layer (D) was formed by laminating the resin layer (B)-formed surface of the transfer laminate (1) prepared in Preparation Example 3 to both sides of a prepreg (R-5670KG manufactured by Panasonic Corporation, containing glass fiber, thickness 0.1 mm), and then thermocompression bonding was performed for 90 minutes at 195 ° C. using a hand press ("Mini Test Press" manufactured by Toyo Seiki Seisaku-sho, Ltd.). Thereafter, a circuit board was obtained in the same manner as in Example 24, except that the manufacturing method was changed to etching the copper foil to a thickness of 6 μm using a ferric chloride etching solution (content 40 mass%) at 40 ° C.

[0276] (Examples 37 to 38) A circuit board was obtained in the same manner as in Example 36, except that the type of etching solution was changed to one shown in Table 1.

[0277] (Comparative Example 1) Instead of using a substrate (A) with a conductive plating underlayer (C) on both sides, a commercially available copper-clad laminate (Panasonic Corporation's "R-5775KH," substrate thickness 0.1 mm, copper foil 18 μm) was prepared. To create a daisy chain with 30 through-holes and a circuit pattern line width of 300 μm, 100 μm diameter through-holes were drilled using a drill. Next, to remove dust (smears) generated by the drilling process, the substrate with through-holes obtained in this way was subjected to MacDermid's Black Hole process (conditioning-carbon adsorption treatment-etching) to deposit carbon on the surface of the through-holes. The carbon-deposited copper layer was then removed from the copper layer surface using the sulfuric acid / hydrogen peroxide aqueous solution etching solution (1) prepared in Preparation Example 4.

[0278] Thereafter, a cathode was placed on the copper layer surface of the substrate, and through-hole plating was performed using phosphorus-containing copper as the anode and an electrolytic plating solution containing copper sulfate (copper sulfate 60 g / L, sulfuric acid 190 g / L, chloride ions 50 mg / L, and an additive (Coppergleam ST-901 manufactured by Rohm and Haas Electronic Materials Co., Ltd.) at a current density of 2 A / dm for 41 minutes. After that, a roughening treatment was performed to improve adhesion between the dry film resist and the copper layer surface. A dry film resist ("RY-5125" manufactured by Resonac Co., Ltd., thickness 25 μm) was applied to the substrate with through-holes obtained in this way at 110 °C, 0.4 MPa, and 1 m / min. A direct exposure digital imaging device ("Nuvogo1000R" manufactured by Orbotek) was then used to expose a daisy chain circuit pattern onto the resist. Development was then performed using a 1% by weight aqueous solution of sodium carbonate, forming a daisy chain pattern resist on the copper layer surface.

[0279] Next, the substrate on which the pattern resist was formed was etched with a ferric chloride etching solution (content 40% by mass) to form a conductive layer (E) of a circuit pattern in the daisy chain portion. Next, the substrate on which the conductive layer (E) of the circuit pattern was formed was immersed in a 3% by mass aqueous solution of sodium hydroxide set at 50°C to peel off the pattern resist, thereby obtaining a circuit board.

[0280] (Comparative Example 2) Instead of using a support (A) with a silver particle layer formed on both sides as a conductive plating underlayer (C), an ultra-thin copper foil with a carrier (Mitsui Mining & Smelting Co., Ltd.'s "MicroThin™ MT18SD-H" carrier copper foil thickness 18 μm, ultra-thin copper foil thickness 3 μm) was laminated with the roughened side to both sides of a prepreg (Panasonic Corporation's R-5670KG, glass fiber-containing, thickness 0.1 mm) and thermocompressed at 195 °C for 90 minutes using a hand press (Toyo Seiki Seisakusho Co., Ltd.'s "Mini Test Press"). Then, only the carrier copper foil was peeled off, and an ultra-thin copper foil was formed as a conductive plating underlayer (C) on the support (A).

[0281] Then, to create a daisy chain with 30 through-holes and a circuit pattern line width of 300 μm in the laminate on which the ultrathin copper foil was formed, 100 μm diameter through-holes were drilled using a drill. Next, to remove dust (smear) generated by the drilling process, a plasma desmear was performed. The substrate with through-holes thus obtained was subjected to MacDermid's Black Hole process (conditioning-carbon adsorption treatment-etching) to deposit carbon on the surface of the through-holes. The carbon-deposited copper layer was then removed from the copper layer surface using the sulfuric acid / hydrogen peroxide aqueous solution etching solution (1) prepared in Preparation Example 4.

[0282] A dry film resist ("RY-5125" manufactured by Resonac, 25 μm thick) was applied to the surface of the ultrathin copper foil thus obtained at 110 ° C, 0.4 MPa, and 1 m / min. A direct exposure digital imaging device ("Nuvogo1000R" manufactured by Orbotek) was then used to expose a daisy chain circuit pattern with 30 through-holes and a line width of 300 μm on the resist. Development was then performed using a 1% by mass aqueous solution of sodium carbonate, forming a pattern resist on the conductive plating underlayer (C) from which the daisy chain portion had been removed.

[0283] Next, the conductive plating underlayer (C) surface of the substrate on which the pattern resist was formed was placed as the cathode, and phosphorus-containing copper was used as the anode. Electroplating was performed for 41 minutes at a current density of 2 A / dm² using an electroplating solution containing copper sulfate (60 g / L copper sulfate, 190 g / L sulfuric acid, 50 mg / L chloride ions, and an additive (Coppergleam ST-901, manufactured by Rohm and Haas Electronic Materials Co., Ltd.) to form an 18 µm-thick conductive circuit pattern layer (E) by copper plating in the daisy chain area where the resist had been removed. The substrate with the conductive circuit pattern layer (E) formed was then immersed in a 3% by mass aqueous sodium hydroxide solution set at 50°C to remove the pattern resist.

[0284] Next, the substrate was immersed in a sulfuric acid / hydrogen peroxide-based flash etching solution used for copper seed etching to remove the copper seed, thereby obtaining a circuit board from which the copper seed had been removed.

[0285] [Method for calculating the ratio of the etching rate of copper to the etching rate of silver using an etching solution for the copper layer (D)] The copper etching rate was calculated using a commercially available copper-clad laminate (Panasonic Corporation's "R-5775KH," substrate thickness 0.1 mm, copper foil 18 μm) and an aqueous solution for etching the copper layer (D). The rate of change in copper film thickness before and after etching was calculated as the copper etching rate ((copper film thickness before etching - copper film thickness after etching) / etching time). The resin layer (B)-formed side of the transfer laminate (1) prepared in Preparation Example 3 was bonded to both sides of a prepreg (Panasonic Corporation's R-5670KG, glass fiber-containing, thickness 0.1 mm), and the laminate was thermocompressed at 195 °C for 90 minutes using a hand press (Toyo Seiki Seisakusho Co., Ltd.'s "Mini Test Press"). Then, by peeling off only the copper foil, a laminate was prepared in which the resin layer (B) and the conductive plating underlayer (C) were formed on both sides of the cured prepreg. The laminate and an aqueous solution for etching the copper layer (D) were used, and the rate of change in silver film thickness before and after etching with respect to the etching treatment time was calculated as the silver etching rate ((silver film thickness before etching - silver film thickness after etching) / etching treatment time). At this time, a result in which the copper etching rate ratio to the silver etching rate (copper etching rate / silver etching rate) was less than 5 was evaluated as (copper / silver etching rate ratio: ×), and a result in which the copper etching rate ratio to the silver etching rate (copper etching rate / silver etching rate) was 5 or more was evaluated as (copper / silver etching rate ratio: ◯). The thicknesses of the copper and silver were measured using a wavelength dispersive X-ray fluorescence analyzer (Zetium) to measure the weight per unit area, and the weight per unit area (mg / cm) was calculated based on the specific gravities of copper and silver (specific gravity of copper: 8.96, specific gravity of silver: 10.49). 2 The thickness of the copper film (μm) was calculated from the weight of copper per unit area (unit: mg / cm). 2) / specific gravity of copper (8.96) × 10, silver film thickness (unit: μm) = weight of silver per unit area (unit: mg / cm 2 ) / specific gravity of silver (10.49) x 10 Measured.

[0286] [Evaluation of processing time during copper layer (D) etching] The copper layer (D) was removed using the etching solutions prepared in Preparation Examples 4 to 13 to expose the conductive plating underlayer (C). When the etching time for the copper layer (D) was 3 minutes or more, the copper layer (D) was removed (processing time: ×), and when the etching time for the copper layer (D) was 3 minutes or less, the copper layer (D) was removed (processing time: ◯).

[0287] [Method for measuring surface resistance after etching of copper layer (D)] The surface resistance of the conductive plating underlayer (C) was measured with a Loresta GX MCP-T700 and a PSP probe, with the unit being Ω / □.

[0288] [Continuity check of daisy chain] The daisy chain of circuit boards obtained above was measured using a tester. Results where no continuity was observed with the tester were evaluated as (continuity: ×), and results where continuity was observed were evaluated as (continuity: ◯).

[0289] [Check for undercuts and the cross-sectional shape of the wiring] The cross section of the daisy chain of the circuit board obtained above was observed at 500 to 10,000 times magnification using a scanning electron microscope (JEOL Ltd., "JSM7800") to confirm the presence or absence of undercuts and the cross-sectional shape of the daisy chain portion.

[0290] The wiring surface of the fabricated circuit board was observed with a laser microscope (Keyence VK-9710) to check the surface roughness of the wiring surface, with Rz of 3 μm or less being evaluated as smooth (smoothness: ◯), and Rz of more than 3 μm being evaluated as not smooth (smoothness: ×). In addition, when the difference between the designed width of the wiring made by the resist used to form the wiring and the top surface width of the formed wiring was 2 μm or less, side etching was suppressed and the rectangular shape was maintained (rectangularity: ◯), and when the difference was more than 2 μm, the rectangular shape was not maintained (short formation: ×).

[0291] Examples, comparative examples and evaluation results are shown in Tables 1 to 8.

[0292] [Table 1]

[0293] [Table 2]

[0294] [Table 3]

[0295] [Table 4]

[0296] [Table 5]

[0297] [Table 6]

[0298] [Table 7]

[0299] [Table 8]

[0300] In Examples 1 to 10, which are manufacturing methods of the present invention, the surface resistance of the conductive plating underlayer (C) of the laminate was measured after etching with etching solutions having different liquid compositions during copper layer etching. The etching solutions using sulfuric acid / hydrogen peroxide, sodium persulfate, and potassium persulfate in Examples 1 to 9 all had low surface resistance. On the other hand, with the etching solution using cupric chloride in Example 10, the ratio of the copper etching rate to the silver etching rate (copper etching rate / silver etching rate) was less than 5, and the conductive plating underlayer (C) dissolved, resulting in high surface resistance that exceeded the measurement limit of the surface resistance measurement device, making it impossible to measure the surface resistance. Furthermore, in Examples 3, 6, and 9, the higher the concentrations of sulfuric acid / hydrogen peroxide, sodium persulfate, and potassium persulfate, the more the conductive plating underlayer (C) dissolved, resulting in relatively high surface resistance of the conductive plating underlayer (C). In Examples 2, 5, and 8, it was confirmed that the etching time for the copper layer (D) was longer as the concentrations of sulfuric acid / hydrogen peroxide solution, sodium persulfate, and potassium persulfate were lower.

[0301] In Examples 11 to 14, which are manufacturing methods of the present invention, a copper layer (D) was formed by using a copper foil as a temporary support (H), and etching solutions with different liquid compositions were used during etching of the copper layer. The surface resistance of the conductive plating underlayer (C) after removing the copper layer (D) was measured. The etching solutions using sulfuric acid / hydrogen peroxide, sodium persulfate, and potassium persulfate in Examples 11 to 13 all produced low surface resistance for the conductive plating underlayer (C). On the other hand, in Example 14, when the etching solution using cupric chloride (II) was used, the copper etching rate ratio to the silver etching rate (copper etching rate / silver etching rate) was less than 5, as in Example 10. The conductive plating underlayer (C) dissolved, increasing the surface resistance, exceeding the measurement limit of the surface resistance measurement device, making it impossible to measure the surface resistance.

[0302] In Examples 15 to 38, which are manufacturing methods of the present invention, conductivity was obtained at the daisy chain connections of all of the produced circuit boards, and the cross-sectional shape of the daisy chain was rectangular with no reduction in wiring height or wiring width and no undercuts, forming a smooth conductive layer for forming circuits. On the other hand, in Comparative Example 1, the cross-sectional shape of the daisy chain of the circuit board produced using a ferric chloride etching solution (content 40% by mass) was trapezoidal. Furthermore, the wiring surface had low smoothness due to the roughening treatment, which was a pretreatment before laminating the resist. In Comparative Example 2, when the copper seed was removed by immersion in a sulfuric acid / hydrogen peroxide-based flash etching solution used for seed etching of copper foil, the conductive layer (E) of the daisy chain circuit pattern was etched, resulting in a film thickness reduction of approximately 3 μm, a reduction in wiring width of approximately 10 μm, and a loss of rectangular cross-sectional shape, resulting in a trapezoidal cross-sectional shape. Furthermore, the wiring surface was roughened by the etching, reducing its smoothness. [Explanation of symbols]

[0303] 1:Support 2: Resin layer 3: Conductive plating underlayer 4: Copper layer 5:Through hole 6: Palladium, conductive polymer, Conductive paste or carbon 7: Resist 8: Conductive layer for circuit formation 9: Support for inner layer circuit 10: Inner layer circuit 11: Non-through hole 12:First conductive layer 13: Second conductive layer

Claims

1. A method for producing a laminate in which a resin layer (B), a conductive plating underlayer (C) containing a conductive material (c1) and a dispersant (c2), and a copper layer (D) are sequentially laminated on at least one surface of a support (A), the method comprising a step of selectively removing the copper layer (D) with an etching solution.

2. 2. The method for manufacturing a laminate according to claim 1, wherein the etching solution is an etching solution having a ratio of the rate at which copper is etched to the rate at which silver is etched (etching rate of copper / etching rate of silver) of 5 or more.

3. 3. The method for producing a laminate according to claim 2, wherein the etching solution is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate.

4. 4. The method for producing a laminate according to claim 3, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass % of sulfuric acid, 1 to 10 mass % of hydrogen peroxide, 0.1 to 5 mass % of an organic additive, and 55 to 97.9 mass % of water in the total etching solution.

5. 4. The method for producing a laminate according to claim 3, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution.

6. 4. The method for producing a laminate according to claim 3, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution.

7. 2. The method for producing a laminate according to claim 1, wherein the support (A) is made of one or more materials selected from the group consisting of a rigid substrate, a film, a build-up film, ceramics, glass, a silicon wafer, and a metal.

8. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film manufactured using a laminate obtained by the method for manufacturing a laminate according to claim 1.

9. A method for producing a circuit board using a laminate as a base material, the laminate comprising a planar support (A) having conductive layers formed on both sides thereof, at least one of the surfaces of which is a conductive layer formed by sequentially laminating a resin layer (B), a conductive plating underlayer (C), and a copper layer (D), the method comprising: Step 1: forming through holes penetrating both surfaces of the laminate; a step 2 of providing palladium, a conductive polymer, or carbon on the walls of the through holes of the support (A) and on the surface of the copper layer (D) to make the surfaces of the through holes conductive; Step 3: selectively removing the copper layer (D) with an etching solution to expose the conductive plating underlayer (C); Step 4: forming a pattern resist on the conductive plating underlayer (C); Step 5: electrically connecting both surfaces of the substrate by electrolytic copper plating and forming a conductive layer (E) of the circuit pattern; Step 6: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising:

10. The method for producing a circuit board according to claim 9, wherein the conductive layers on both sides of the support (A) are based on a laminate in which the resin layer (B), the plating base layer (C), and the copper layer (D) are sequentially laminated on both sides.

11. 10. The method for manufacturing a circuit board according to claim 9, wherein the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the etching rate of copper to the etching rate of silver (etching rate of copper / etching rate of silver) of 5 or more.

12. 12. The method for manufacturing a circuit board according to claim 11, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate.

13. 12. The method for producing a circuit board according to claim 11, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass % of sulfuric acid, 1 to 10 mass % of hydrogen peroxide, 0.1 to 5 mass % of an organic additive, and 55 to 97.9 mass % of water in the total etching solution.

14. 12. The method for manufacturing a circuit board according to claim 11, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution.

15. 12. The method for manufacturing a circuit board according to claim 11, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution.

16. 10. The method for producing a circuit board according to claim 9, wherein the support (A) is at least one material selected from the group consisting of a rigid substrate, a film, a build-up film, ceramic, glass, a silicon wafer, and a metal.

17. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board according to claim 9.

18. A method for producing a circuit board using a laminate as a base material, in which a support (A), a resin layer (B), a conductive plating underlayer (C), and a copper layer (D) are sequentially laminated on at least one surface of a substrate having a conductive pattern formed thereon, the method comprising: Step 1: forming a blind hole for connecting the surface of the laminate and the conductive pattern formed inside by lamination; a step 2 of applying any one of palladium, a conductive polymer, and carbon onto the walls of the non-through pores of the support (A) and the surface of the copper layer (D) to make the surfaces of the non-through pores conductive; Step 3: selectively removing the copper layer (D) with an etching solution to expose the conductive plating underlayer (C); Step 4: forming a pattern resist on the conductive plating underlayer (C); Step 5: electrically connecting the surface of the laminate to the conductive pattern of the inner layer by electrolytic copper plating and forming a conductive layer (E) of the circuit pattern; Step 6: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising:

19. 20. The method for manufacturing a circuit board according to claim 18, wherein the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the etching rate of copper to the etching rate of silver (etching rate of copper / etching rate of silver) of 5 or more.

20. 20. The method for manufacturing a circuit board according to claim 19, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate.

21. 21. The method for producing a circuit board according to claim 20, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass % of sulfuric acid, 1 to 10 mass % of hydrogen peroxide, 0.1 to 5 mass % of an organic additive, and 55 to 97.9 mass % of water in the total etching solution.

22. 21. The method for producing a circuit board according to claim 20, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution.

23. 21. The method for manufacturing a circuit board according to claim 20, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution.

24. 19. The method for manufacturing a circuit board according to claim 18, wherein the support (A) is at least one material selected from the group consisting of a rigid substrate, a film, and a build-up film.

25. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board according to claim 18.

26. A method for producing a circuit board using a laminate as a base material, the laminate comprising a planar support (A) having conductive layers formed on both sides thereof, at least one of the surfaces of which is a conductive layer formed by sequentially laminating the resin layer (B), a conductive plating underlayer (C), and a copper layer (D), Step 1: forming through holes that penetrate both surfaces of the laminate; Step 2: forming a first conductive copper layer (F) by electroless copper plating on the walls of the through holes of the support (A) and on the surface of the copper layer (D), electrically connecting both surfaces; Step 3: forming a second conductive copper layer (G1) on the first conductive copper layer (F1) on the surface of the through hole by electrolytic copper plating to fill the hole in the through hole; a step 4 of selectively removing the first conductive copper layer (F2), the second conductive copper layer (G2), and the copper layer (D) formed on the copper layer (D) in the electroless copper plating and electrolytic copper plating steps with an etching solution to expose the conductive plating base layer (C); Step 5: forming a pattern resist on the conductive plating underlayer (C); Step 6: forming a conductive layer (E) of a circuit pattern by electrolytic copper plating; Step 7: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising:

27. 27. The method for manufacturing a circuit board according to claim 26, wherein the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the etching rate of copper to the etching rate of silver (etching rate of copper / etching rate of silver) of 5 or more.

28. 28. The method for manufacturing a circuit board according to claim 27, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate.

29. 29. The method for producing a circuit board according to claim 28, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30 mass % of sulfuric acid, 1 to 10 mass % of hydrogen peroxide, 0.1 to 5 mass % of an organic additive, and 55 to 97.9 mass % of water in the total etching solution.

30. 29. The method for manufacturing a circuit board according to claim 28, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution.

31. 29. The method for manufacturing a circuit board according to claim 28, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution.

32. 27. The method for producing a circuit board according to claim 26, wherein the support (A) is at least one selected from the group consisting of a rigid substrate, a film, a build-up film, ceramic, glass, a silicon wafer, and a metal.

33. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board according to claim 26.

34. A method for producing a circuit board using a laminate as a base material, in which a support (A), a resin layer (B), a conductive plating underlayer (C), and a copper layer (D) are sequentially laminated on at least one surface of a substrate having a conductive pattern formed thereon, the method comprising: Step 1: forming a blind hole for connecting the surface of the laminate to the conductive pattern formed inside by lamination; a step 2 of forming a first conductive copper layer (F) by electroless copper plating on the walls of the non-through holes of the support (A) and on the surface of the copper layer (D), which electrically connects the surface of the laminate and the conductive pattern of the inner layer; Step 3: forming a copper layer (G1) that fills the holes in the non-through holes by electrolytic copper plating on the first conductive copper layer (F1) on the surface of the non-through holes; a step 4 in which the first conductive copper layer (F2) and the second conductive copper layer (G2) formed on the copper layer (D) in the electroless copper plating and electrolytic copper plating steps are selectively removed with an etching solution to expose the conductive plating base layer (C); Step 5: forming a pattern resist on the conductive plating underlayer (C); Step 6: forming a conductive layer (E) of a circuit pattern by electrolytic copper plating; Step 7: peeling off the pattern resist and removing the conductive plating underlayer (C) in the non-circuit pattern forming area with an etching solution; A method for manufacturing a circuit board, comprising:

35. 35. The method for manufacturing a circuit board according to claim 34, wherein the etching solution used in the step of selectively removing the copper layer (D) is an etching solution having a ratio of the etching rate of copper to the etching rate of silver (etching rate of copper / etching rate of silver) of 5 or more.

36. 36. The method for manufacturing a circuit board according to claim 35, wherein the etching solution used in the step of selectively removing the copper layer (D) is an aqueous solution of sulfuric acid / hydrogen peroxide or an aqueous solution of persulfate.

37. 37. The method for producing a circuit board according to claim 36, wherein the sulfuric acid / hydrogen peroxide aqueous solution contains 1 to 30% by mass of sulfuric acid, 1 to 10% by mass of hydrogen peroxide, 0.1 to 5% by mass of an organic additive, and 55 to 97.9% by mass of water in the total etching solution.

38. 37. The method for manufacturing a circuit board according to claim 36, wherein the aqueous persulfate solution contains 1 to 20 mass % sodium persulfate, 0.1 to 10 mass % sulfuric acid, and 70 to 98.9 mass % water in the total etching solution.

39. 37. The method for manufacturing a circuit board according to claim 36, wherein the aqueous persulfate solution contains 1 to 10 mass % potassium persulfate, 0.1 to 10 mass % sulfuric acid, and 80 to 98.9 mass % water in the total etching solution.

40. 35. The method for producing a circuit board according to claim 34, wherein the support (A) is one or more types selected from the group consisting of a rigid substrate, a film, and a build-up film.

41. A printed wiring board, a package substrate, an interposer, or an electromagnetic wave seed film, which is a circuit board obtained by the method for producing a circuit board according to claim 34.

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