Multilayer ceramic electronic component and method for manufacturing the same
The multilayer ceramic electronic component addresses stress-induced cracking by optimizing copper region properties and electrode connections, improving adhesion and structural integrity.
Patent Information
- Application Number
- JP2024109837
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-07-08
- Publication Date
- 2026-01-21
AI Technical Summary
The dispersion of ceramic powder in external electrodes improves adhesion between the element body and external electrodes but generates stress, leading to potential cracks in the element body.
A multilayer ceramic electronic component design with specific oxygen concentration, copper region occupancy, and grain size in the copper region, along with external electrodes contacting both internal electrodes and copper regions, is implemented to enhance adhesion while minimizing stress.
The design improves the adhesion of external electrodes to the element body, reducing stress and preventing cracks, thereby enhancing the structural integrity of the component.
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Figure 2026009741000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing the same. [Background technology]
[0002] It is known to add copper to the cover portion other than the active portion (for example, Patent Document 1). It is also known to disperse ceramic powder as a co-material in the conductive paste that forms the external electrodes (for example, Patent Documents 2 and 3). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Patent Publication No. 2021-93549 [Patent Document 2] Japanese Patent Application Publication No. 5-3134 [Patent Document 3] Patent Publication No. 2021-166214 Summary of the Invention [Problem to be solved by the invention]
[0004] Although dispersing ceramic powder in the external electrodes improves the adhesion between the element body and the external electrodes, stress is generated between the external electrodes and the element body, which may cause cracks in the element body. It is therefore necessary to suppress the generation of stress between the external electrodes and the element body while improving the adhesion between the element body and the external electrodes.
[0005] The present invention has been made in view of the above-mentioned problems, and has as its object to provide a multilayer ceramic electronic component that can improve the adhesion of external electrodes, and a method for manufacturing the same. [Means for solving the problem]
[0006] The present invention is a multilayer ceramic electronic component comprising: a base body in which a plurality of internal electrodes and a plurality of dielectric layers primarily composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and face each other in a second direction, and a copper region exposed from the surface; and a pair of external electrodes that respectively contact the plurality of internal electrodes exposed from the pair of end faces and that also contact the copper region.
[0007] In the above configuration, the oxygen concentration at the center of the copper region present in a cross section at a depth of 10 μm from the surface of the element body may be 30 atomic % or less.
[0008] In the above configuration, the copper region present in a cross section at a depth of 10 μm from the surface of the element body may have an occupancy rate of 0.05% to 5.50%.
[0009] In the above configuration, the copper region may have an average grain size of 100 nm or more and 3200 nm or less.
[0010] In the above configuration, the copper concentration in the dielectric in a region adjacent to the copper region present in a cross section at a depth of 10 μm from the surface of the element body can be higher than the copper concentration in the dielectric of the plurality of dielectric layers in a capacitive region where the plurality of internal electrodes overlap.
[0011] In the above configuration, the plurality of dielectric layers in the capacitance region where the plurality of internal electrodes overlap may contain no copper.
[0012] In the above configuration, the element body may include a cover dielectric layer that is outermost in the first direction, and side dielectric layers that are arranged to sandwich a capacitive region where the internal electrodes overlap in a third direction that intersects the first direction and the second direction, and the copper region may be exposed from the cover dielectric layer and the side margin dielectric layer.
[0013] In the above configuration, the cover dielectric layer and the side dielectric layer may have no copper region in their regions in contact with the capacitance region.
[0014] In the above configuration, the plurality of dielectric layers may be primarily composed of barium titanate, the plurality of internal electrodes may be primarily composed of nickel, and the regions of the pair of external electrodes that contact the element body may be primarily composed of copper.
[0015] The present invention provides a method for manufacturing a multilayer ceramic electronic component, including the steps of: preparing an element body in which a plurality of internal electrodes and a plurality of dielectric layers primarily composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and facing each other in a second direction, and the outermost dielectric layer containing copper or a copper compound; firing the element body so that a copper region is exposed from the surface of the outermost dielectric layer; and forming a pair of external electrodes that are in contact with the plurality of internal electrodes exposed from the pair of end faces and that are in contact with the copper region, respectively.
[0016] The present invention provides a method for manufacturing a multilayer ceramic electronic component, including the steps of: preparing an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and facing each other in a second direction, and the outermost dielectric layer containing copper or a copper compound; firing the element body so that a region containing copper oxide is exposed from the surface of the outermost dielectric layer; reducing the region containing copper oxide to form a copper region from the region containing copper oxide; and forming a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively, and in contact with the copper regions. [Effects of the Invention]
[0017] According to the present invention, it is possible to provide a multilayer ceramic electronic component that can improve the adhesion of external electrodes, and a method for manufacturing the same. [Brief explanation of the drawings]
[0018] [Figure 1] FIG. 1 is a partial cross-sectional perspective view of the multilayer ceramic capacitor according to the first embodiment. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3] FIG. 3 is a cross-sectional view taken along line BB in FIG. [Figure 4] FIG. 4 is a cross-sectional view taken along line CC in FIG. [Figure 5] FIG. 5 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor according to the first embodiment. [Figure 6] FIG. 6(a) is a plan view showing a method for manufacturing the multilayer ceramic capacitor according to the first embodiment, and FIG. 6(b) is a cross-sectional view taken along line AA in FIG. 6(a). [Figure 7] FIG. 7 is a cross-sectional view illustrating a method for manufacturing the multilayer ceramic capacitor according to the first embodiment. [Figure 8] 8(a) and 8(b) are cross-sectional views illustrating a method for manufacturing the multilayer ceramic capacitor according to the first embodiment. [Figure 9] 9(a) and 9(b) are cross-sectional views showing a method for measuring the copper region occupancy rate and the average grain size. [Figure 10] FIG. 10 is a cross-sectional view of the multilayer ceramic capacitor according to the first modification. [Figure 11] FIG. 11 is a cross-sectional view of a multilayer ceramic capacitor according to the second modification. [Figure 12] FIG. 12 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor according to the second embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0019] Hereinafter, with reference to the drawings, an embodiment will be described using a multilayer ceramic capacitor as an example of a multilayer ceramic electronic component.
[0020] (Embodiment) FIG. 1 is a partial cross-sectional perspective view of a multilayer ceramic capacitor 100 according to embodiment 1. FIG. 2 is a cross-sectional view taken along line AA in FIG. 1. FIG. 3 is a cross-sectional view taken along line BB in FIG. 1. FIG. 4 is a cross-sectional view taken along line CC in FIG. 1. In FIGS. 1 to 4, the Z direction (first direction) is the stacking direction in which the dielectric layers 14 and the internal electrodes 12a and 12b are stacked, and is the direction in which the bottom surface 55 and the top surface 56 of the element body 10 face each other. The X direction (second direction) is the length direction of the element body 10, and is the direction in which the pair of end surfaces 51 and 52 of the element body 10 face each other. The Y direction (third direction) is the width direction of the internal electrodes 12a and 12b, and is the direction in which the pair of side surfaces 53 and 54 of the element body 10 face each other. The X direction, the Y direction, and the Z direction intersect or are perpendicular to each other.
[0021] The multilayer ceramic capacitor 100 includes a substantially rectangular parallelepiped element body 10 and external electrodes 20a and 20b. The element body 10 includes a multilayer body 11 and side dielectric layers 18a and 18b provided on both sides of the multilayer body 11 in the Y direction.
[0022] The laminate 11 has a plurality of dielectric layers 14, a plurality of internal electrodes 12a and 12b, and cover dielectric layers 16a and 16b. The plurality of internal electrodes 12a and the plurality of internal electrodes 12b are alternately stacked. One of the plurality of dielectric layers 14 is provided between one of the plurality of internal electrodes 12a and one of the plurality of internal electrodes 12b. The bottom and top layers of the laminate 11 are cover dielectric layers 16a and 16b, respectively. Side dielectric layers 18a and 18b are provided on the surfaces of the laminate 11 in the Y direction.
[0023] The internal electrodes 12a and 12b are alternately exposed at the end faces 51 and 52. The internal electrode 12a is exposed at the end face 51, but the internal electrode 12b is not. The internal electrode 12b is exposed at the end face 52, but the internal electrode 12a is not. In other words, the internal electrodes 12a and 12b are connected to different end faces 51 and 52. The region of the element body 10 where the internal electrodes 12a and 12b overlap with each other across the dielectric layer 14 is a capacitive region 60.
[0024] Regions 17a, 17b, and 17c are provided in the cover dielectric layers 16a and 16b from the bottom surface 55 and top surface 56, respectively. Regions 19a, 19b, and 19c are provided in the side dielectric layers 18a and 18b from the side surfaces 53 and 54, respectively. A copper region 40 is provided within the regions 17a and 19a. The copper region 40 is a region in the element body 10 whose main metal component is copper. As described below, the copper region 40 diffuses copper atoms (hereinafter simply referred to as "copper") into the surrounding dielectric region. The diffused copper dissolves in the dielectric layer.
[0025] Copper regions 40 are exposed on side surfaces 53 and 54, bottom surface 55, and top surface 56. The occupancy rate of copper regions 40 in regions 17b and 19b is smaller than that in regions 17a and 19a. The occupancy rate of copper regions 40 in regions 17c and 19c is smaller than that in regions 17b and 19b. For example, regions 17c and 19c contain almost no copper regions 40. Furthermore, the copper concentration in the dielectric layer in regions 17b and 19b is lower than that in regions 17a and 19a. The copper concentration in regions 17c and 19c is lower than that in regions 17b and 19b. The thicknesses of regions 17a, 17b, and 17c are T17a, T17b, and T17c, respectively, and the thicknesses of regions 19a, 19b, and 19c are T19a, T19b, and T19c, respectively. The cover dielectric layers 16a and 16b have a thickness T16, and the side dielectric layers 18a and 18b have a thickness T18.
[0026] The external electrode 20a contacts the internal electrode 12a exposed from the element body 10 at the end face 51. The external electrode 20b contacts the internal electrode 12b exposed from the element body 10 at the end face 52. The external electrode 20a covers the end faces in the -X direction of the side faces 53 and 54, the bottom face 55, and the top face 56 in addition to the end face 51. The external electrode 20b contacts the internal electrode 12b at the end face 52. The external electrode 20b covers the end faces in the +X direction of the side faces 53 and 54, the bottom face 55, and the top face 56 in addition to the end face 52.
[0027] The size of the multilayer ceramic capacitor 100 is, for example, 0.25 mm in length (length in the X direction), 0.125 mm in width (width in the Y direction), and 0.125 mm in height (height in the Z direction), or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height. Note that the multilayer ceramic capacitor 100 is not limited to these sizes, but the effects described below are significant when the size is, for example, 1.0 mm or more in length, 0.5 mm or more in width, and 0.5 mm or more in height.
[0028] The internal electrodes 12a and 12b are mainly composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn). The internal electrodes 12a and 12b may be made of precious metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing these metals. The thickness of the internal electrodes 12a and 12b is, for example, 0.1 μm or more and 1 μm or less.
[0029] The dielectric layer 14 has a main phase made of a ceramic material having a perovskite structure represented by the general formula ABO3. 3-α For example, the ceramic material includes barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), and BaTiO3, which forms a perovskite structure. 1-x-y Ca x Sr y Ti 1-z Zr z At least one of the following can be selected and used: O3 (0≦x≦1, 0≦y≦1, 0≦z≦1). 1-x-y Ca x Sr y Ti 1-z Zr zO3 is barium strontium titanate, barium calcium titanate, barium zirconate, barium titanate zirconate, calcium titanate zirconate, barium calcium titanate zirconate, etc. For example, the dielectric layer 14 contains 90 at% or more of the main component ceramic. The thickness of the dielectric layer 14 is, for example, 0.3 μm or more and 2 μm or less.
[0030] An additive may be added to the dielectric layer 14. Examples of additives to the dielectric layer 14 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.
[0031] The composition of the main ceramic component of the cover dielectric layers 16a, 16b and the side dielectric layers 18a and 18b may be the same as or different from the main ceramic component of the dielectric layer 14. The thicknesses T16 and T18 of the cover dielectric layers 16a, 16b and the side dielectric layers 18a and 18b are, for example, 10 μm to 200 μm.
[0032] The external electrodes 20a and 20b are primarily composed of a metal such as copper, nickel, aluminum (Al), or zinc (Zn), or an alloy of two or more of these metals (e.g., an alloy of copper and nickel), and contain ceramics such as a glass component for densifying the external electrodes 20a and 20b and a co-material for controlling the sinterability of the external electrodes 20a and 20b. The glass component is an oxide of barium (Ba), strontium (Sr), calcium (Ca), zinc, aluminum, silicon, or boron. The co-material is, for example, a ceramic component primarily composed of the same material as the primary component of the dielectric layer 14. A plating film primarily composed of a base metal such as nickel, copper, or tin may be formed on the surfaces of the external electrodes 20a and 20b. Furthermore, a conductive resin film such as an epoxy resin or a urethane resin may be formed on the surface of the plating film.
[0033] (Manufacturing method of multilayer ceramic capacitors) A method for manufacturing the multilayer ceramic capacitor 100 will now be described. Fig. 5 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor according to the first embodiment.
[0034] (Green sheet formation process) First, green sheets 30a to 30c are formed (step S10). In step S10, a dielectric material is prepared by adding various additive compounds (such as sintering aids) to ceramic powder, for example. A binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the prepared dielectric material and wet-mixed to produce a slurry. The produced slurry is then applied onto a substrate, for example, by a die coater method or a doctor blade method, to form green sheets 30a to 30c. The substrate is, for example, a PET (polyethylene terephthalate) film. The green sheets 30a to 30c are then dried.
[0035] Copper particles or copper compound particles are added to the dielectric material for green sheets 30a and 30b. The copper compound is, for example, copper oxide (CuO or CuO2). The copper concentration of green sheet 30b is lower than that of green sheet 30a. No copper or copper compound is added to the dielectric material for green sheet 30c. If copper or a copper compound is added to the dielectric material for green sheet 30c, the copper concentration of green sheet 30c is lower than that of green sheet 30b.
[0036] (Pattern formation process) Next, a metal pattern 32 is formed on the green sheet 30c (step S12). Fig. 6(a) is a plan view showing the method for manufacturing the multilayer ceramic capacitor according to embodiment 1, and Fig. 6(b) is a cross-sectional view taken along line AA in Fig. 6(a). Cutting lines 36 in Fig. 6(a) and Fig. 6(b) are cutting lines along which the multilayer sheet 35 is cut in step S18.
[0037] In step S12, a metal paste containing metal powder, an organic binder, and an organic solvent is first prepared. The metal paste may contain ceramic particles as a co-material. As shown in FIGS. 6(a) and 6(b), the metal paste is printed on a green sheet 30c using, for example, gravure printing to form a metal pattern 32. A dielectric pattern that is the reverse pattern of the metal pattern 32 may be formed between the metal patterns 32. This results in a laminate sheet 34 in which the metal pattern 32 is formed on the green sheet 30c.
[0038] (Lamination process) Next, the green sheets are laminated (step S14). FIG. 7 is a cross-sectional view showing the manufacturing method of the multilayer ceramic capacitor according to the first embodiment, corresponding to the cross section AA in FIG. 6(a). In step S14, a green sheet 30b is laminated on a green sheet 30a, and a green sheet 30c on which a metal pattern 32 is formed is laminated on the green sheet 30b to form a laminate sheet 34a. A plurality of laminate sheets 34 are laminated on the laminate sheet 34a. The green sheets 30c, 30b, and 30a are laminated in this order on the top laminate sheet 34. This forms a laminate sheet 35 in which a plurality of laminate sheets 34 are laminated. At this time, the metal patterns 32 are provided alternately.
[0039] (Crimping process) Next, the laminated sheet 35 is pressure-bonded (step S16). In step S16, the laminated sheet 35 formed in step S14 is pressed to pressure-bond the plurality of laminated sheets 34a and 34 together. As the pressure-bonding means, for example, a hydrostatic press is used.
[0040] (cutting process) Next, the laminate sheet 35 is cut (step S18). In step S18, a cutting blade is used to cut the laminate sheet 35 in the lamination direction along predetermined cutting lines 36, thereby preparing a plurality of laminates 11a. FIGS. 8(a) and 8(b) are cross-sectional views showing the method for manufacturing the multilayer ceramic capacitor according to embodiment 1, and correspond to the cross section taken along line BB in FIGS. 1 to 4. As shown in FIGS. 8(a) and 8(b), in the laminate 11a, the metal pattern 32 is exposed from the side surfaces 53a and 54a.
[0041] (side green sheet attached) Next, side green sheets are attached (step S20). In step S20, as shown in FIG. 8(b), the side surfaces 53a of the laminate 11a are sequentially pressed against the green sheets 30c-30a for the side dielectric layers 18a, thereby attaching the green sheets 30c-30a to the side surfaces 53a. Similarly, the green sheets 30c-30a are attached to the side surfaces 54a of the laminate 11a. After step S20, the element body 10a may be polished by a technique such as barrel polishing. This rounds the corners of the element body 10a.
[0042] (Debinding process) Next, the element body 10a is fired (step S22). In step S22, the element body 10a is subjected to a binder removal process in an air atmosphere at 300°C to 700°C. At this time, carbon in organic materials such as the binder is oxidized, resulting in a low oxygen concentration. This makes the atmosphere weakly reducing. Therefore, even if copper oxide powder is contained in the green sheets 30b and 30c, the copper oxide is reduced to form metallic copper regions. At this time, some of the copper in the copper oxide powder diffuses into the green sheets 30b and 30c.
[0043] (Firing process) Next, the element body 10a is fired (step S24). In step S24, the element body 10a is fired in a reducing atmosphere (e.g., an atmosphere of air mixed with hydrogen gas) at 1100°C to 1300°C. This sinters the particles in the element body 10a, forming the element body 10. By increasing the temperature rise rate in the firing step, oxidation of the copper region 40 can be suppressed. For example, the temperature rise rate is set to 10,000°C / h to 20,000°C / h. Although the surface of the copper region 40 is slightly oxidized, the interior of the copper region 40 remains copper in a near-metallic state. As a result, the cover dielectric layers 16a and 16b and the side dielectric layers 18a and 18b are formed from the green sheets 30a to 30c. The internal electrodes 12a and 12b are formed from the metal pattern 32. The dielectric layer 14 is formed from the green sheet 30c located between the internal electrodes 12a and 12b.
[0044] (External electrode formation process) Next, the external electrodes 20a and 20b are formed (step S26). In step S26, a conductive paste containing, for example, metal powder, glass frit, binder, and solvent is applied to the end faces 51 and 52 of the element body 10. After the conductive paste is applied, it is baked to form a base metal layer for the external electrodes 20a and 20b. The binder and solvent evaporate during baking. The conductive paste is applied using, for example, a dipping method. A plating layer may be formed on the base metal layer.
[0045] During the firing process or external electrode formation process, the copper particles or copper compound particles added to the green sheets 30a, 30b diffuse between the side dielectric layers 18a, 18b and the cover dielectric layers 16a, 16b. For example, referring to Figures 3 and 4, the region 19c of the side dielectric layers 18a, 18b is formed from the green sheet 30c that does not contain copper particles or copper compound particles. Meanwhile, the regions 19a, 19b of the side dielectric layers 18a, 18b and the regions 17a, 17b of the cover dielectric layers 16a, 16b are formed from the green sheets 30a, 30b that contain those particles.
[0046] Therefore, at end R of region 19c in the Z direction, which is sandwiched between regions 19a, 19b and regions 17a, 17b, copper particles or particles of a copper compound diffuse from regions 19a, 19b and regions 17a, 17b, forming a copper region 40. As a result, when the cross section of element body 10 taken along the Y and Z directions is viewed from the front, many copper regions 40 are provided in square-shaped regions 19a, 19b, 19c, 17a, 17b on the front surface of element body 10, surrounding capacitance region 60.
[0047] In embodiment 1, as shown in Figures 2 to 4, copper region 40 is exposed from the outermost dielectric layer (e.g., regions 17a and 19a) including the surface of element body 10. The surface of copper region 40 has a higher surface free energy than the surface of the dielectric. Therefore, the surface of copper region 40 has better wettability with the conductive paste when forming external electrodes 20a and 20b than the surface of the dielectric. This improves adhesion between external electrodes 20a and 20b and element body 10. In particular, when the regions of external electrodes 20a and 20b that contact element body 10 are mainly composed of copper, adhesion between external electrodes 20a and 20b and element body 10 is improved.
[0048] After the external electrodes 20a and 20b are baked (step S26), copper may diffuse into the external electrodes 20a and 20b from the copper regions 40 exposed on the surface of the element body 10. At this time, if the main component metal element of the underlying metal layer of the external electrodes 20a and 20b that is in contact with the surface of the element body is an element other than copper (for example, Ni), an alloy (Ni-Cu alloy) will be formed with the copper diffused from the copper regions 40.
[0049] On the other hand, when the main metal element of the underlying metal layer of the external electrodes 20a and 20b is copper, an alloy is not formed by copper diffusion, but the outer portion of the copper region 40 exposed from the surface of the element body 10 becomes integrated with the underlying metal layer. This exposed copper region 40 can be confirmed by detecting the copper region 40 in contact with the boundary between the external electrodes 20a and 20b and the element body 10 in, for example, images of a cross section of the multilayer ceramic capacitor 100 as shown in FIGS. 2 and 4. Here, "in contact with the boundary" means, for example, that the region of the underlying metal layer and the copper region 40 are continuous without being interrupted by the dielectric component of the element body 10. Note that confirmation means, for example, includes, but is not limited to, an SEM (Scanning Electron Microscope).
[0050] To improve adhesion between the external electrodes 20a and 20b and the element body 10, the oxygen concentration at the center of the copper region 40 present in a cross section at a depth of 10 μm from the surface of the element body 10 is preferably 30 atomic % or less, more preferably 25 atomic % or less, and even more preferably 20 atomic % or less. The copper concentration in the copper region 40 on the surface of the element body 10 where the external electrodes 20a and 20b contact is preferably 50 atomic % or more, and more preferably 70 atomic % or more.
[0051] Here, the cross section at a depth of 10 μm from the surface of element body 10 refers to, for example, the upper surface 56 and the lower surface 55 facing in the stacking direction in which dielectric layers 12 and internal electrodes 12a, 12b are stacked, and the inner peripheral surfaces 10 μm inward from each of side surfaces 53 and 54 facing the stacking direction and the longitudinal direction in which end faces 51, 52 face. Note that the depth of 10 μm from the surface of element body 10 does not necessarily have to be 10 μm from the surface in the strict sense, as long as it is a cross section at a distance in the range of 5 μm to 15 μm from the surface of element body 10.
[0052] The oxygen concentration at the center of the copper region 40 is measured by spot measurement using SEM (Scanning Electron Microscope)-EDS (Energy Dispersive X-ray Spectroscopy). Note that the center of the copper region 40 does not need to be exactly the center; it is sufficient that the spot does not include the interface between the copper region 40 and the dielectric. The main component metal elements of the dielectric layer may be diffused within the copper region 40. Therefore, the oxygen concentration of the copper region 40 is determined by subtracting the oxygen in the oxide of the main component metal element of the dielectric layer from the measured copper concentration. For example, if the dielectric layer is barium titanate, the main component metal elements are Ba and Ti. The oxides of Ba and Ti are mainly BaO and TiO2. If the O concentration, Ba concentration, and Ti concentration detected by SEM-EDX are CO, CBa, and CTi, respectively, the oxygen concentration in the copper region 40 can be calculated by CO - (CBa + CTi × 2).
[0053] From the viewpoint of improving the adhesion between the external electrodes 20a and 20b, the occupancy rate of the copper region 40 in the cross section at a depth of 10 μm from the surface of the element body 10 is preferably 0.05% or more, more preferably 0.09% or more, and even more preferably 0.2% or more. If the occupancy rate of the copper region 40 is high, copper will diffuse more into the dielectric layer, causing the dielectric layer to become too dense. This makes the element body 10 more susceptible to cracks. From this viewpoint, the occupancy rate of the copper region 40 at a depth of 10 μm from the surface of the element body 10 is preferably 5.5% or less, more preferably 5% or less, even more preferably 4% or less, and even more preferably 3% or less.
[0054] From the viewpoint of improving the adhesion between the external electrodes 20a and 20b, the average grain size of the copper region 40 present in the cross section at a depth of 10 μm from the surface of the element body 10 is preferably 100 nm or more, more preferably 120 nm or more, and even more preferably 150 nm or more. From the viewpoint of preventing excessive densification, the average grain size of the copper region 40 on the surface of the element body 10 where the external electrodes 20a and 20b contact is preferably 3200 nm or less, more preferably 3000 nm or less, and even more preferably 2000 nm or less.
[0055] 9(a) and 9(b) are cross-sectional views illustrating a method for measuring the occupancy rate and average grain size of the copper region 40. FIG. 9(a) is a schematic diagram of an electron microscope image (e.g., an SEM image) of a cross section obtained by mirror-polishing a 10 μm-thick portion of the element body 10 from the surface. The magnification of the electron microscope is, for example, 10,000 times. At this magnification, a region of, for example, 140 μm × 105 μm in size can be observed within the cross section. In this region, as shown in FIG. 9(a), multiple copper regions 40 can be observed in the electron microscope image 41. The maximum width of each of the multiple copper regions 40 in a given direction (the horizontal direction in FIG. 9(a)) is defined as the width W of the copper region 40. As shown in FIG. 9(b), a circle 42 is assumed whose diameter is the width W. The occupancy rate (%) is calculated by dividing the total area of the circles 42 of the multiple copper regions 40 in the image 41 by the area of the image 41 and multiplying this value by 100. Furthermore, the average value of the widths W of the multiple copper regions 40 in the image 41 is taken as the average grain size of the copper regions 40. If the number of copper regions 40 in the image 41 is less than 10 or 100 or more, the occupancy rate and average grain size may be measured by changing the magnification of the image 41. This average grain size is calculated, for example, as the average of all copper regions 40 that can be confirmed within the region of the above size.
[0056] When copper atoms diffuse from copper region 40 into the dielectric in regions 17a and 19a, the copper concentration near the surface of element body 10 (the copper concentration in the dielectric not including copper region 40) increases. In this case, regions 17a and 19a become denser. This reduces the number of open pores on the surfaces of regions 17a and 19a. This suppresses the diffusion of moisture into element body 10.
[0057] However, if the copper concentration in the dielectric layer 14 in the capacitive region 60 is high, the electrical characteristics of the capacitor will deteriorate. Furthermore, if the copper in the dielectric layer 14 diffuses into the internal electrodes 12a and 12b, the characteristics of the internal electrodes 12a and 12b will deteriorate. For example, if the main component of the internal electrodes 12a and 12b is nickel, the diffusion of copper into the internal electrodes 12a and 12b will likely deteriorate the internal electrodes 12a and 12b. Therefore, the copper concentration in regions 17a and 19a that contact the copper region 40 present in the cross section at a depth of 10 μm from the surface of the element body 10 is made higher than the copper concentration in the dielectric layer 14 in the capacitive region 60. This suppresses deterioration of the electrical characteristics of the capacitor and enables densification of the surface area of the element body 10.
[0058] The copper concentration in the dielectric in regions 17a and 19a that contact copper region 40 in a cross section at a depth of 10 μm from the surface of element body 10 is preferably 0.1 atomic % or more, more preferably 0.2 atomic % or more, and even more preferably 0.3 atomic % or more. The copper concentration in regions 17a and 19a is preferably 2.0 atomic % or less, more preferably 1.8 atomic % or less, and even more preferably 1.5 atomic % or less. The copper concentration in the dielectric in regions 17a and 19a that contact copper region 40 is measured, for example, by spot measurement using SEM-EDS, where the spot is applied to the dielectric so as not to include the interface between copper region 40 and the dielectric.
[0059] The copper concentration in the dielectric in regions 17a and 19a is preferably 10 times or more, and more preferably 100 times or more, the copper concentration in the dielectric in dielectric layer 14 in capacitance region 60. It is preferable that no copper is added to dielectric layer 14 in capacitance region 60. Note that "no copper is added to dielectric layer 14" means that copper has not been intentionally added to dielectric layer 14.
[0060] (Variation 1) Fig. 10 is a cross-sectional view of a multilayer ceramic capacitor according to Modification 1. As shown in Fig. 10, in a multilayer ceramic capacitor 102 according to Modification 1, the cover dielectric layers 16a and 16b are entirely region 17a, and the occupancy rate of the copper region 40 is high. The side dielectric layers 18a and 18b are entirely region 19a, and the occupancy rate of the copper region 40 is high. The other configurations are the same as those of Embodiment 1, and therefore description thereof will be omitted.
[0061] (Variation 2) Fig. 11 is a cross-sectional view of a multilayer ceramic capacitor according to Modification 2. As shown in Fig. 11, in a multilayer ceramic capacitor 104 according to Modification 2, cover dielectric layers 16a and 16b have regions 17a and 17c, but do not have region 17b. Side dielectric layers 18a and 18b have regions 19a and 19c, but do not have region 19b. The other configurations are the same as those of embodiment 1, and therefore description thereof will be omitted.
[0062] As in Modification 1, the cover dielectric layers 16a and 16b may all be the region 17a, and the side dielectric layers 18a and 18b may all be the region 19a. That is, the cover dielectric layers 16a and 16b and the side dielectric layers 18a and 18b may all include the copper region 40. However, if the region in contact with the capacitance region 60 contains copper, there is a possibility that the copper will diffuse into the internal electrodes 12a and 12b. This may result in a deterioration of the electrical characteristics of the capacitor.
[0063] Therefore, as in the first embodiment and the second modification, the copper concentration in the regions 17a and 19a in contact with the surfaces of the cover dielectric layers 16a and 16b and the side dielectric layers 18a and 18b is higher than the copper concentration in the regions 17c and 19c in the cover dielectric layers 16a and 16b and the side dielectric layers 18a and 18b in contact with the capacitance region 60. This makes it possible to suppress the diffusion of copper into the capacitance region 60.
[0064] The copper concentration in regions 17a and 19a is preferably at least five times, and more preferably at least ten times, the occupancy rate of copper region 40 in regions 17c and 19c. It is preferable that copper is not added to regions 17c and 19c. It is also preferable that copper region 40 is not included in regions 17c and 19c.
[0065] To prevent copper from diffusing into the capacitance region 60, the thickness T17c of the region 17c is preferably at least 0.02 times, more preferably at least 0.05 times, and even more preferably at least 0.1 times the thickness T16 of the cover dielectric layers 16a and 16b. The thickness T19c of the region 19c is preferably at least 0.02 times, more preferably at least 0.05 times, and even more preferably at least 0.1 times the thickness T18 of the side dielectric layers 18a and 18b. As the regions 17c and 19c become thicker, the regions 17a and 19a become thinner, making it more difficult for the copper region 40 to be formed. Furthermore, the densified region becomes thinner, making it easier for moisture and the like to diffuse into the capacitance region 60. From this perspective, the thickness T17c is preferably at most 0.6 times, more preferably at most 0.5 times, and even more preferably at most 0.4 times the thickness T16. The thickness T19c is preferably 0.6 times or less, more preferably 0.5 times or less, and even more preferably 0.4 times or less, the thickness T18.
[0066] Increasing thicknesses T17a and T19a creates copper regions 40, improving adhesion between external electrodes 20a and 20b and element body 10. Furthermore, regions 17a and 19a are densified, thinning regions 17c and 19c, which are prone to moisture diffusion. This prevents moisture and other contaminants from diffusing into capacitance region 60. From this perspective, thicknesses T17a and T19a are preferably at least 0.2 times, more preferably at least 0.3 times, and even more preferably at least 0.4 times, the thicknesses T16 and T18, respectively. If thicknesses T17a and T19a are large, copper will diffuse significantly into capacitance region 60, degrading the electrical characteristics of the capacitor. From this perspective, thicknesses T17a and T19a are preferably at most 0.8 times, more preferably at most 0.7 times, and even more preferably at most 0.6 times the thicknesses T16 and T18, respectively.
[0067] As in the first embodiment, region 17b is provided between regions 17a and 17c, and region 19b is provided between regions 19a and 19c. The copper concentration in region 17b is lower than that in region 17a but higher than that in region 17c. The copper concentration in region 19b is lower than that in region 19a but higher than that in region 19c. In modifications 1 and 2, when regions 17a and 19a are densified, regions 17a and 19a shrink. This increases the stress applied to capacitance region 60 and regions 17c and 19c, potentially causing cracks or the like in element body 10. Therefore, providing regions 17b and 19b can alleviate the stress.
[0068] From the viewpoint of stress relaxation, the thickness T17b of region 17b is preferably at least 0.05 times, more preferably at least 0.1 times, and even more preferably at least 0.2 times, the thickness T16 of the cover dielectric layers 16a and 16b. The thickness T19b of region 19b is preferably at least 0.05 times, more preferably at least 0.1 times, and even more preferably at least 0.2 times the thickness T18 of the side dielectric layers 18a and 18b. If regions 17b and 19b are too thick, the functions of regions 17a, 17c, 19a, and 19c will be impaired. From this viewpoint, the thickness T17b is preferably at most 0.6 times, more preferably at most 0.4 times, and even more preferably at most 0.2 times the thickness T16. The thickness T19b is preferably at most 0.6 times, more preferably at most 0.4 times, and even more preferably at most 0.2 times the thickness T18 of the cover dielectric layers 16a and 16b.
[0069] Although the example in which regions 17a and 19a are provided on side surfaces 53, 54, lower surface 55, and upper surface 56 has been described, regions 17a and 19a may be provided on at least one of side surfaces 53, 54, lower surface 55, and upper surface 56. Regions 17a and 19a may be provided in at least a portion of the regions of side surfaces 53, 54, lower surface 55, and upper surface 56 where external electrodes 20a and 20b are provided, and may not be provided in regions where external electrodes 20a and 20b are not provided.
[0070] As in the following examples, when the cover dielectric layers 16a, 16b and the side dielectric layers 18a and 18b are mainly composed of barium titanate, the internal electrodes 12a and 12b are mainly composed of nickel, and the areas of the external electrodes 20a and 20b that contact the element body 10 are mainly composed of copper, the effects of embodiment 1 can be particularly achieved.
[0071] In addition, when a certain component contains a certain element as its main component, it is sufficient that the element is contained in the component to an extent that the effect of the embodiment is achieved, and the concentration of the element in the component is, for example, 50 mol % or more, 80 mol % or more, or 90 mol % or more.
[0072] (Embodiment 2) FIG. 12 is a flowchart showing a method for manufacturing a multilayer ceramic capacitor according to embodiment 2. As shown in FIG. 12, first, an element body 10 is formed (step S30). Step S30 is the same as steps S10 to S24 in FIG. 5. During the firing process, copper may be oxidized to form a region containing copper oxide. Next, the element body 10 is reduced (step S32). In the reduction treatment of step S32, the element body 10 is heat-treated, for example, in an air atmosphere with a high concentration of hydrogen gas. This reduces the region containing copper oxide, forming a copper region 40 that is close to metal. Next, external electrodes 20a and 20b are formed on the element body 10 (step S26).
[0073] As in step S30 of embodiment 2, the element body 10 is fired so that a region containing copper oxide is exposed from the surface of the outermost dielectric layer. Thereafter, as in step S32, the region containing copper oxide is reduced to form a copper region 40 from the region containing copper oxide. In this manner, a multilayer ceramic capacitor including a copper region 40 similar to that of embodiment 1 can be manufactured. [Example]
[0074] Multilayer ceramic capacitors of the examples and comparative examples were fabricated according to the flow chart shown in Figure 5. In the green sheet fabrication step S10 shown in Figure 5, Cu powder, CuO powder, or CuO2 powder with an average particle size of 30 nm to 4000 nm, BaTiO2 powder with an average particle size of 100 nm, various additives such as rare earth oxides, and an organic solvent were blended and mixed and pulverized using zirconia beads with a diameter of 1 mm. A binder was then added and the mixture was applied to a substrate. Green sheets 30a and 30b contained the desired amount of Cu powder, CuO powder, or CuO2 powder, while green sheet 30c did not contain any Cu powder, CuO powder, or CuO2 powder.
[0075] Steps S12 to S20 in Figure 5 were performed. The binder removal step S22 was performed in an air atmosphere, and the firing step S24 was performed in an air atmosphere containing hydrogen gas. The temperature rise rates during firing were 500°C / h, 1000°C / h, and 15000°C / h. The fabricated multilayer ceramic capacitor had T17a and T19a of approximately 60 μm, T17b and T19b of approximately 30 μm, and T17c and T19c of approximately 10 μm. The fabricated sample measured 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height.
[0076] Tables 1 and 2 show the manufacturing conditions and measurement results of the examples and comparative examples. [Table 1]
[0077] [Table 2]
[0078] In Tables 1 and 2, "ΔT / t" is the temperature rise rate in the firing step S24. "Cu content" is the amount of copper in the Cu, CuO, or CuO2 powder in the green sheet 30a in step S10, expressed relative to barium (Ba) and titanium (Ti). In Comparative Examples 7 to 9, the amounts of indium (In), zinc (Zn), and magnesium (Mg) are expressed relative to barium and titanium. "Additives" are materials added to the green sheets 30a and 30b in step S10.
[0079] The "average particle size" refers to the average particle size of the copper region 40 after the firing process and was calculated from an SEM image of a cross section at a depth of 10 μm from the surface. The "O concentration" refers to the oxygen (O) concentration in the copper region 40 measured by SEM-EDS measurement of a cross section at a depth of 10 μm from the surface. The measurement conditions were an acceleration voltage of 20 kV, an electron beam spot diameter of 50 mm, and a magnification of 20,000 times, and the O concentration was measured at the center of the copper region 40. As described above, the O concentration was corrected for the O concentrations due to BaO and TiO. The "Cu diffusion" refers to the copper concentration in BaTiO near the copper region 40 measured by SEM-EDS measurement of a cross section at a depth of 10 μm from the surface. In Comparative Examples 6, 7, and 8, the "Cu diffusion" refers to the indium concentration, zinc concentration, and magnesium concentration, respectively. The measurement method was the same as for the "O concentration." The "occupancy rate" is the occupancy rate of the copper region 40 after the firing step, and was calculated from an SEM image of a cross section at a depth of 10 μm from the surface.
[0080] The "number of short circuits" is the result of a humidity load test. 50 samples were subjected to a temperature of 80°C and a humidity of 90% to 95% RH with a rated voltage applied between the external electrodes 20a and 20b for a predetermined period of time. The number of samples that subsequently developed short circuits was recorded as the "number of short circuits." The "number of peelings" is an evaluation of the adhesion between the external electrodes 20a and 20b and the element body 10. The fabricated samples were mounted with the external electrodes 20a and 20b on a substrate measuring 100 mm in length, 40 mm in width, and 1.6 mm in thickness using solder. The substrate was then bent with the center of the substrate as a fulcrum and points ±45 mm from the fulcrum in the longitudinal direction as force points. Whether peeling occurred at the interfaces between the external electrodes 20a and 20b and the element body 10 was then investigated. The number of samples out of 10 that developed peeling was recorded as the "number of peelings."
[0081] The "rating" was rated as "A" when both the "number of short circuits" and the "number of peelings" were 0. A "B" was rated when the "number of short circuits" was 15 or less and the "number of peelings" was 2 or less. A "C" was rated when the "number of short circuits" was 20 or more and the "number of peelings" was 0. Anything other than the above was rated as "D". A rating of "A" indicates that both the moisture resistance and adhesion are good. A rating of "B" indicates that both the moisture resistance and adhesion are good, although not as good as rating "A". A rating of "C" indicates that the moisture resistance is poor, but the adhesion is as good as rating "A". A rating of "D" indicates that both the moisture resistance and adhesion are poor.
[0082] (Comparative Example 1) When copper is not added to the green sheets 30a to 30c as in Comparative Example 1, the copper region 40 is not formed, and the evaluation is "D" which is poor.
[0083] (Comparative Examples 2 to 5) As in Comparative Examples 2 to 5, even when Cu or CuO powder is added to the green sheets 30a and 30b, if the heating rate is slow, the oxygen concentration in the copper-containing regions will be 30 atomic % or more, and Cu diffusion will be 3 atomic % or more. In this case, the evaluation will be "D" (failure). This is because if the heating rate in the firing process is slow, copper will be oxidized in the copper regions. This will reduce the adhesion between the external electrodes 20a and 20b and the element body 10. Furthermore, the diffusion of copper into BaTiO3 will be large, causing excessive densification of BaTiO3, resulting in cracks in the element body 10 and degrading its moisture resistance.
[0084] (Comparative Examples 6 to 8) When metal elements other than copper (indium, zinc, or magnesium) are added to the green sheets 30a and 30b as in Comparative Examples 6 to 8, the O concentration in the metal element region is 50 atomic % or more, and the diffusion of the metal element into BaTiO3 is 3 atomic % or more, even when ΔT / t is 15,000°C / h, as in Examples 1 to 15. The result is a "D." This is thought to be because even if indium, zinc, or magnesium is reduced in the binder removal process, they are easily oxidized and do not easily become metal in the firing process. On the other hand, copper is more resistant to oxidation than nickel. Therefore, if the firing process conditions are set so that the nickel in the internal electrodes 12a and 12b is not oxidized, the copper reduced in the binder removal process can be prevented from being oxidized in the firing process.
[0085] (Examples 1 to 15) In Examples 1 to 15, the Cu content is 0.5 atomic % or more and 33 atomic % or less, the average particle size is 100 nm or more and 3200 nm or less, the O concentration is 10 atomic % or more and 30 atomic % or less, the Cu diffusion is 0.1 atomic % or more and 2.0 atomic % or less, and the occupancy is 0.05% or more and 5.5% or less. Within the above ranges, the evaluation is A, B, or C, and the moisture resistance and adhesion can be improved compared to Comparative Examples 1 to 8.
[0086] Examples 5, 13 and 14 Among Examples 5, 13, and 14, which have the same Cu content, Examples 13 and 14, which use Cu or CuO2 as the additive, have almost the same average particle size, O concentration, Cu diffusion, and occupancy as Example 5, which uses CuO as the additive, and are also evaluated as "A." Thus, the copper added to green sheets 30a and 30b may be any of Cu, CuO, and CuO2.
[0087] Examples 1 to 9 In Examples 1 to 9, the Cu content is 1 atomic % or more and 28 atomic % or less, the average grain size is 120 nm or more and 3000 nm or less, the O concentration is 10 atomic % or more and 20 atomic % or less, the Cu diffusion is 0.2 atomic % or more and 1.5 atomic % or less, and the occupancy is 0.09 atomic % or more and 3.00 atomic % or less. Within the above ranges, the evaluation is "A."
[0088] Examples 10 to 12 On the other hand, in Examples 10 to 12, the Cu content was 0.5 atomic % or less or 30 atomic % or more, the average particle size was 100 nm or 3000 nm, the O concentration was 18 atomic % or more, the Cu diffusion was 0.1 atomic % or more or 1.6 atomic % or more, and the occupancy was 0.05% or 3.5 atomic % or more. In this case, the evaluation was "B." The moisture resistance and adhesion were improved compared to Comparative Examples 1 to 8, but worse than Examples 1 to 9.
[0089] [Table 3]
[0090] Table 3 shows the "Cu residual ratio," "Cu diffusion ratio," and "judgment" for Examples 1 to 15 and Comparative Examples 2 to 5, which have a copper region 40. The "Cu residual ratio" is the ratio (%) of copper that remains without diffusing from the copper region 40, and the "Cu diffusion ratio" is the ratio (%) of copper that diffuses from the copper region 40. The "Cu residual ratio" is calculated by ("Cu amount" - "Cu diffusion") ÷ "Cu amount" × 100. The "Cu diffusion ratio" is calculated by "Cu diffusion" ÷ "Cu amount" × 100. The "judgment" is the same as the "judgment" in Table 2.
[0091] When the "Cu residual rate" is 80 to 95%, in other words, when the "Cu diffusivity" is in the range of 5 to 20%, the evaluation is "A," "B," or "C." In contrast, when the "Cu residual rate" is 38 to 65%, in other words, when the "Cu diffusivity" is in the range of 35 to 62%, the evaluation is "D." Therefore, the moisture resistance and adhesion are better when "Cu residual rate" > "Cu diffusivity" than when "Cu residual rate" < "Cu diffusivity."
[0092] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as described in the claims. [Explanation of symbols]
[0093] 10 Base 12a, 12b internal electrode 14 Dielectric layer 16a, 16b Cover dielectric layer 17a, 17b, 17c, 19a, 19b, 19c area 18a, 18b Side dielectric layers 20a, 20b external electrode 30a~30c Green Sheet 32 Metal Pattern 34, 35 Laminated sheet 40 copper area 51, 52 End face 53, 54 Side 55 Bottom side 56 Top 60 capacity area
Claims
1. an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and face each other in a second direction, and a copper region is exposed from a surface; a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively, and in contact with the copper region; A multilayer ceramic electronic component comprising:
2. 2. The multilayer ceramic electronic component according to claim 1, wherein the oxygen concentration at the center of the copper region present in a cross section at a depth of 10 [mu]m from the surface of the element body is 30 atomic % or less.
3. 3. The multilayer ceramic electronic component according to claim 1, wherein the copper region present in a cross section at a depth of 10 [mu]m from the surface of the element body has an occupancy rate of 0.05% to 5.50%.
4. 3. The multilayer ceramic electronic component according to claim 1, wherein the copper region has an average grain size of 100 nm or more and 3200 nm or less.
5. 3. The multilayer ceramic electronic component according to claim 1, wherein a copper concentration in a region in contact with the copper region present in a cross section at a depth of 10 μm from the surface of the element body is higher than a copper concentration in the dielectric of the plurality of dielectric layers in a capacitive region where the plurality of internal electrodes overlap.
6. 3. The multilayer ceramic electronic component according to claim 1, wherein the plurality of dielectric layers in the capacitance region where the plurality of internal electrodes overlap each other do not contain copper.
7. The element body is a cover dielectric layer that is the outermost in the first direction; side dielectric layers provided to sandwich a capacitance region where the internal electrodes overlap in a third direction intersecting the first direction and the second direction; Equipped with 3. The multilayer ceramic electronic component according to claim 1, wherein the copper region is exposed from the cover dielectric layer and the side dielectric layer.
8. 8. The multilayer ceramic electronic component according to claim 7, wherein the cover dielectric layer and the side dielectric layer do not include copper regions in their regions in contact with the capacitance region.
9. the plurality of dielectric layers are composed primarily of barium titanate; the plurality of internal electrodes are mainly composed of nickel, 3. The multilayer ceramic electronic component according to claim 1, wherein the regions of the pair of external electrodes that are in contact with the element body are mainly composed of copper.
10. preparing an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and face each other in a second direction, and an outermost dielectric layer containing copper or a copper compound; firing the element body so that a copper region is exposed on the surface of the outermost dielectric layer; forming a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively, and in contact with the copper region; A method for manufacturing a multilayer ceramic electronic component comprising:
11. preparing an element body in which a plurality of internal electrodes and a plurality of dielectric layers mainly composed of ceramic are alternately stacked in a first direction, the stacked internal electrodes having a pair of end faces that are alternately exposed and face each other in a second direction, and an outermost dielectric layer containing copper or a copper compound; firing the element body so that a region containing copper oxide is exposed from the surface of the outermost dielectric layer; forming a copper region from the copper oxide-containing region by reducing the copper oxide-containing region; forming a pair of external electrodes in contact with the plurality of internal electrodes exposed from the pair of end faces, respectively, and in contact with the copper region; A method for manufacturing a multilayer ceramic electronic component comprising:
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