Substrate body and method of manufacturing the same

Abstract

A substrate body is provided.SOLUTION: A substrate body according to the present invention includes a substrate, a plurality of under bump metallurgy layers (UBMs), and a plurality of tapered microbumps. The protective layer of the substrate has a hole, and a pad is exposed from the hole. The recess of each UBM is provided in the hole and is electrically connected to the pad. A root portion of each of the tapered micro-bumps is located in the recess, and a contact portion of each of the tapered micro-bumps protrudes into the recess. Each of the tapered micro-bumps includes an insulating tapered portion, a conductive layer, and a bonding layer. The conductive layer covers the insulating tapered portion and is electrically connected to the UBM. The bonding layer covers the conductive layer and is electrically connected to the conductive layer. A maximum outer diameter of each of the tapered micro-bumps is less than or equal to 20 μm.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present invention relates to a substrate and a manufacturing method thereof, and more particularly to a substrate in which tapered microbumps are formed on pads of the substrate, and a manufacturing method thereof. [Background technology]

[0002] A conventional semiconductor package includes a circuit board and a chip, with the chip being bonded to the circuit board by a number of bumps. Summary of the Invention [Problem to be solved by the invention]

[0003] However, due to the miniaturization of the semiconductor package, it has become necessary to design the pitch between two adjacent conductive pads on the circuit board and the pitch between two adjacent solder pads on the chip as fine pitches. However, this makes it easy for bridge connections to occur between two adjacent bumps, affecting the reliability of the package structure.

[0004] Therefore, the present inventors believed that the above drawbacks could be improved, and as a result of extensive research, they came up with the proposal of the present invention, which effectively improves the above problems through rational design.

[0005] The present invention was made in consideration of the above-mentioned problems through intensive research by the inventors, and its purpose is to provide a substrate body having microbumps and a manufacturing method thereof, which allows the substrate body to be electrically connected to other electronic elements (e.g., transparent conductive film, ITO) via the microbumps by increasing the number of bumps and preventing bridging between adjacent bumps. [Means for solving the problem]

[0006] In order to achieve the above object, a method for manufacturing a substrate body according to one aspect of the present invention includes the following steps. Providing a substrate having a carrier, a circuit layer, and a protective layer, wherein the circuit layer is formed on the carrier, the circuit layer has a plurality of pads, the protective layer covers the circuit layer, and the protective layer has a plurality of holes, each of which exposes a respective one of the pads. A step of forming a first metal layer that covers the protective layer and each of the pads in each hole, the first metal layer having a plurality of recesses, each recess formed in each of the holes, and each recess electrically connected to each of the pads. Forming an insulating layer covering the first metal layer and filling each of the recesses. patterning the insulating layer to form an insulating taper in each of the recesses and to expose the first metal layer located around the insulating taper, the insulating taper having a base located in each of the recesses and an end protruding into each of the recesses. forming a second metal layer covering the insulating taper and the first metal layer located around the insulating taper, the second metal layer being electrically connected to the first metal layer; forming a photoresist layer, the photoresist layer covering the second metal layer; patterning the photoresist layer to have a plurality of openings, each of the openings exposing the second metal layer covering the insulating tapered portion; A step of forming a bonding layer in each of the openings, the bonding layer covering the second metal layer located in each of the openings and being electrically connected to the second metal layer, the thickness of the bonding layer being greater than the thickness of the second metal layer. Removing the photoresist layer to expose the bonding layer and the second metal layer not covered by the bonding layer. Using the bonding layer as a mask, the second metal layer and the first metal layer that are not covered by the bonding layer are removed, multiple conductive layers are formed on the second metal layer, and multiple UBMs are formed on the first metal layer located below the insulating tapered portion, each UBM having a respective recess. The insulating tapered portion, the conductive layer, and the bonding layer constitute a tapered microbump, and the maximum outer diameter of the tapered microbump along the first direction is 20 μm or less.

[0007] Moreover, a substrate body according to another aspect of the present invention includes a substrate, a plurality of UBMs, and a plurality of tapered microbumps. The substrate has a carrier, a circuit layer, and a protective layer, the circuit layer is formed on the carrier, the circuit layer has a plurality of pads, the protective layer covers the circuit layer, and the protective layer has a plurality of holes, and each of the pads is exposed from each of the holes. Each of the UBMs is formed in each of the holes, and each of the UBMs has a recess located in each of the holes, and the recess is electrically connected to the pad. Each of the tapered microbumps has an insulating tapered portion, a conductive layer, and a bonding layer. The insulating tapered portion is formed in the recess, with the base of the insulating tapered portion located in the recess and the end of the insulating tapered portion protruding into the recess. The conductive layer covers the insulating tapered portion and is electrically connected to the UBM. The bonding layer covers the conductive layer and is electrically connected to the conductive layer, and the thickness of the bonding layer is greater than the thickness of the conductive layer. The maximum outer diameter of each of the tapered microbumps in the first direction is 20 μm or less.

[0008] The recess of the UBM is provided in the hole of the protective layer, and the tapered microbump is formed in the hole, and the tapered microbump is electrically connected to the UBM via the conductive layer covering the insulating taper, and the bonding layer covers the conductive layer and is electrically connected to the conductive layer. In the present invention, by miniaturizing the tapered microbumps, the number of bumps on the substrate body is increased, increasing the density, and the pitch between adjacent tapered microbumps is reduced, allowing the substrate body to be bonded to other electronic elements having fine-pitch bonding pads via each of the tapered microbumps.

[0009] At least the following points will become clear from the description and drawings to be described later. [Brief explanation of the drawings]

[0010] [Figure 1] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 2] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 3] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 4] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 5] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 6] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 7] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 8] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 9] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. [Figure 10] 1A to 1C are cross-sectional views showing a method for manufacturing a substrate body according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0011] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0012] Referring to Figure 1, in a method for manufacturing a substrate body 100 according to the present invention, first, a substrate 110 is provided. The substrate 110 is a wafer or a glass substrate, and includes a carrier 111, a circuit layer 112, and a protective layer 113. The circuit layer 112 is formed on the carrier 111, and the circuit layer 112 has a plurality of pads 112a. The protective layer 113 covers the circuit layer 112, and the protective layer 113 has a plurality of holes 113a, with each pad 112a exposed from each hole 113a.

[0013] Next, referring to FIG. 2, a first metal layer 120 is formed. The first metal layer 120 covers the protective layer 113 and each pad 112a in each hole 113a. The first metal layer 120 has a plurality of recesses 123, each formed in each hole 113a and electrically connected to each pad 112a. In this embodiment, the first metal layer 120 has at least a first portion 121 and a second portion 122. The first portion 121 covers the protective layer 113 and each pad 112a, and the second portion 122 covers the first portion 121. Preferably, the first portion 121 and the second portion 122 are formed by a sputtering method. The material of the first portion 121 may be titanium or a titanium alloy, and the material of the second portion 122 may be gold or an alloy thereof.

[0014] Next, referring to Figure 3, an insulating layer 130 is formed. The insulating layer 130 covers the first metal layer 120 and fills each recess 123. Preferably, the insulating layer 130 is formed by a coating method, and the material of the insulating layer 130 may be a polymer material such as polyimide or other insulating materials.

[0015] Next, referring to FIG. 4 , the insulating layer 130 is patterned. The insulating layer 130 has an insulating tapered portion 131 formed in each recess 123. Preferably, the insulating layer 130 is patterned by a method such as exposure, development, and baking, so that the insulating layer 130 located in each recess 123 is retained, the remaining insulating layer 130 is removed, and the first metal layer 120 located around the insulating tapered portion 131 is exposed. The base 131a of the insulating tapered portion 131 is located in the recess 123, and the end 131b of the insulating tapered portion 131 protrudes into the recess 123. The outer diameter of the insulating tapered portion 131 gradually decreases from the base 131a to the end 131b. Along the first direction X, the maximum outer diameter D1 of the insulating tapered portion 131 is 8 μm or less, and the distance S between the ends 131b of adjacent insulating tapered portions 131 is 100 μm or less. Along a second direction Y perpendicular to the first direction X, the height H of the insulating tapered portion 131 is 20 μm or less.

[0016] Referring now to FIG. 5, a second metal layer 140 is formed. The second metal layer 140 covers the insulating tapered portion 131 and the first metal layer 120 located around the insulating tapered portion 131, and the second metal layer 140 is electrically connected to the first metal layer 120. Preferably, the second metal layer 140 is formed by a sputtering method, and the material of the second metal layer 140 may be gold or an alloy thereof. In this embodiment, the second portion 122 of the first metal layer 120 and the second metal layer 140 are made of the same material.

[0017] Next, referring to Figure 6, a photoresist layer 150 is formed. The photoresist layer 150 covers the second metal layer 140. Preferably, the photoresist layer 150 is formed by a coating method, and the photoresist layer 150 may be a positive photoresist or a negative photoresist.

[0018] 7, a photoresist layer 150 is patterned. The photoresist layer 150 has a plurality of openings 151, each of which exposes the second metal layer 140 covering each insulating tapered portion 131. In this embodiment, each opening 151 exposes the second metal layer 140 located around each insulating tapered portion 131. Preferably, the photoresist layer 150 is patterned using a photolithography process, and after the photoresist layer 150 is patterned, a plasma descum treatment is performed to remove photoresist residue located in each opening 151, so that no photoresist remains on the second metal layer 140.

[0019] Next, refer to FIG. 8. An adhesive layer 160 is formed in each opening 151. The adhesive layer 160 covers the second metal layer 140 located in each opening 151. The adhesive layer 160 is electrically connected to the second metal layer 140, and the thickness of the adhesive layer 160 is greater than the thickness of the second metal layer 140. Preferably, the adhesive layer 160 is formed by plating, and the material of the adhesive layer 160 may be gold or an alloy thereof. In this embodiment, the adhesive layer 160 and the second metal layer 140 are made of the same material.

[0020] 9, the photoresist layer 150 is removed, exposing the bonding layer 160 and the second metal layer 140 that is not covered by the bonding layer 160.

[0021] Next, refer to FIG. 10 . Using the bonding layer 160 as a mask, the second metal layer 140 and the first metal layer 120 not covered by the bonding layer 160 are removed, forming the second metal layer 140 into multiple conductive layers 141, and the first metal layer 120 located under each insulating tapered portion 131 into multiple under-bump metal layers (UBMs) 120a. Each UBM 120a has a respective recess 123. The insulating tapered portion 131, the conductive layer 141 covering the insulating tapered portion 131, and the bonding layer 160 covering the conductive layer 141 form a tapered microbump 170. The contact portion 171 of the tapered microbump 170 protrudes into the recess 123, and the root portion 172 of the tapered microbump 170 is located in the recess 123. The contact portion 171 is used for electrical connection to another electronic element.

[0022] 10, the outer diameter of the tapered microbump 170 gradually decreases from the root portion 172 toward the contact portion 171. Along the first direction X, the maximum outer diameter D2 of the tapered microbump 170 is 20 μm or less, which contributes to miniaturization of the tapered microbump 170.

[0023] 10 , along the first direction X, a first distance S1 between the contact portions 171 of adjacent tapered microbumps 170 is 4 μm or more, and a second distance S2 between the root portions 172 of adjacent tapered microbumps 170 is 1 μm or more. Along the second direction Y, the first distance S1 gradually increases outward from the substrate 110.

[0024] The substrate body 100 formed by the above-described manufacturing method includes a substrate 110, UBMs 120a, and tapered microbumps 170. Each UBM 120a is formed in a corresponding hole 113a in the protective layer 113, and the recess 123 of each UBM 120a is electrically connected to the pad 112a. Each UBM 120a has a first portion 121 and a second portion 122, with the first portion 121 covering the protective layer 113 and each pad 112a, and the second portion 122 covering the first portion 121. Each tapered microbump 170 has an insulating tapered portion 131, a conductive layer 141, and a bonding layer 160. The insulating tapered portion 131 is formed in the recess 123, with a base 131a of the insulating tapered portion 131 located in the recess 123 and an end 131b of the insulating tapered portion 131 protruding into the recess 123. The conductive layer 141 covers the insulating tapered portion 131 and is electrically connected to the UBM 120a. The bonding layer 160 covers the conductive layer 141 and is electrically connected to the conductive layer 141. Preferably, the bonding layer 160, the conductive layer 141, and the second portion 122 of each UBM 120a are made of the same material.

[0025] Referring to FIG. 10 , in the present invention, recesses 123 are provided in pads 112a, and tapered microbumps 170 are placed in the recesses 123. This allows the tapered microbumps 170 to be miniaturized, and the pitch between adjacent tapered microbumps 170 is reduced, thereby increasing the number and density of bumps on the substrate 100. The substrate 100 is bonded to another electronic device having fine-pitch bonding pads by the tapered microbumps 170. Furthermore, the first distance S1 between the contact portions 171 of adjacent tapered microbumps 170 gradually increases outward from the substrate 110, preventing the bonding layers 160 of adjacent tapered microbumps 170 from being bridged, which could result in a short circuit.

[0026] Although the embodiment of the present invention has been described above in detail with reference to the drawings, the specific configuration is not limited to this embodiment, and design changes and the like are also included within the scope that does not deviate from the gist of the present invention. [Explanation of symbols]

[0027] 100 substrate body 110 Substrate 111 Career 112 Circuit layer 112a Pad 113 Protective layer 113a Hole 120 1st metal layer 120a Under-bump metal layer 121 Part 1 122 Part 2 123 Recess 130 Insulating layer 131 Insulation tapered section 131a base 131b Terminal 140 Second metal layer 141 Conductive layer 150 photoresist layers 151 Opening 160 Bonding layer 170 Tapered Microbump 171 Contact part 172 Root D1 Maximum outer diameter D2 Maximum outer diameter H Height S distance S1 1st distance S2 2nd distance X 1st direction Y Second direction

Claims

1. providing a substrate having a carrier, a circuit layer, and a protective layer, the circuit layer being formed on the carrier, the circuit layer having a plurality of pads, the protective layer covering the circuit layer, the protective layer having a plurality of holes, each of the pads being exposed through each of the holes; forming a first metal layer covering the protection layer and the pads in the holes, the first metal layer having a plurality of recesses, each recess being formed in each hole and electrically connected to each pad; forming an insulating layer covering the first metal layer and filling the recess; patterning the insulating layer so that an insulating taper is formed in each of the recesses and the first metal layer located around the insulating taper is exposed, the base of the insulating taper is located in each of the recesses, and the end of the insulating taper protrudes into each of the recesses; forming a second metal layer covering the insulating tapered portion and the first metal layer located around the insulating tapered portion and electrically connected to the first metal layer; forming a photoresist layer covering the second metal layer; patterning the photoresist layer to have a plurality of openings, each opening exposing the second metal layer covering the insulating taper; forming a bonding layer in each of the openings, the bonding layer covering the second metal layer located in each of the openings, the bonding layer being electrically connected to the second metal layer, and the bonding layer having a thickness greater than a thickness of the second metal layer; removing the photoresist layer to expose the bonding layer and the second metal layer not covered by the bonding layer; using the bonding layer as a mask to remove the second metal layer and the first metal layer that are not covered by the bonding layer, forming a plurality of conductive layers on the second metal layer, and forming a plurality of under-bump metal layers on the first metal layer located under the insulating tapered portion; A method for manufacturing a substrate body, characterized in that each of the under-bump metal layers has a respective recess, the insulating taper portion, each of the conductive layers, and the bonding layer form a tapered microbump, and the maximum outer diameter of the tapered microbump along the first direction is 20 μm or less.

2. 2. The method for manufacturing a substrate body according to claim 1, wherein the distance between the ends of adjacent insulating tapered portions along the first direction is 100 [mu]m or less.

3. 3. The method for manufacturing a substrate body according to claim 2, wherein the height of the insulating tapered portion along a second direction perpendicular to the first direction is 20 [mu]m or less.

4. 4. The method for manufacturing a substrate body according to claim 3, wherein the maximum outer diameter of the insulating tapered portion along the first direction is 8 [mu]m or less.

5. A method for manufacturing a substrate body as described in claim 1, characterized in that the contact portions of the tapered microbumps protrude into each of the recesses, a first distance along the first direction between the contact portions of adjacent tapered microbumps is 4 μm or more, and the first distance gradually increases outward from the substrate along a second direction perpendicular to the first direction.

6. A method for manufacturing a substrate body as described in claim 5, characterized in that the roots of the tapered microbumps are located in each of the recesses, and the second distance along the first direction between the roots of adjacent tapered microbumps is 1 μm or more.

7. 2. The method for manufacturing a substrate according to claim 1, wherein the bonding layer and the second metal layer are made of the same material.

8. 8. A method for manufacturing a substrate body as described in claim 7, characterized in that the first metal layer has a first part and a second part, the first part covers the protective layer and each of the pads, the second part covers the first part, and the second part and the second metal layer are made of the same material.

9. a substrate including a carrier, a circuit layer, and a protective layer, the circuit layer being formed on the carrier, the circuit layer having a plurality of pads, the protective layer covering the circuit layer, the protective layer having a plurality of holes, and each of the pads being exposed through each of the holes; a plurality of under-bump metal layers each having a recess formed in each of the holes and electrically connected to the pad; A substrate body characterized by comprising a plurality of tapered microbumps having an insulating tapered portion, a conductive layer, and a bonding layer, wherein the insulating tapered portion is formed in the recess, the base of the insulating tapered portion is located in the recess, the end of the insulating tapered portion protrudes into the recess, the conductive layer covers the insulating tapered portion and is electrically connected to each of the under-bump metal layers, the bonding layer covers the conductive layer and is electrically connected to the conductive layer, the thickness of the bonding layer is thicker than the thickness of the conductive layer, and the maximum outer diameter of each of the tapered microbumps along a first direction is 20 μm or less.

10. 10. The substrate according to claim 9, wherein the distance along the first direction between the ends of adjacent insulating tapered portions is 100 [mu]m or less.

11. 11. The substrate according to claim 10, wherein the height of the insulating tapered portion along a second direction perpendicular to the first direction is 20 [mu]m or less.

12. 12. The substrate according to claim 11, wherein the insulating tapered portion has a maximum outer diameter of 8 μm or less along the first direction.

13. The substrate body of claim 9, characterized in that the contact portion of each of the tapered microbumps protrudes into the recess, a first distance along the first direction between the contact portions of adjacent tapered microbumps is 4 μm or more, and the first distance gradually increases outward from the substrate along a second direction perpendicular to the first direction.

14. The substrate body of claim 13, wherein the root of each of the tapered microbumps is located in the recess, and the second distance between the roots of adjacent tapered microbumps is 1 μm or more.

15. The substrate according to claim 9 , wherein the bonding layer and the conductive layer are made of the same material.

16. 16. The substrate body of claim 15, wherein each of the under-bump metal layers has a first portion and a second portion, the first portion covering the protective layer, the second portion covering the first portion, and the second portion and the conductive layer being made of the same material.

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