Semiconductor device and power conversion device

Abstract

To provide a semiconductor device in which warpage is corrected and heat dissipation is improved.SOLUTION: The semiconductor device 101 includes a plurality of ceramic circuit boards 1, a sealing resin portion 6, and a groove 7. The plurality of ceramic circuit boards 1 are arranged side by side in the lateral direction. The sealing resin portion 6 seals the plurality of ceramic circuit boards 1 and the plurality of semiconductor elements 2 respectively mounted on the plurality of ceramic circuit boards 1. The groove 7 is provided in at least one of the upper surface and the lower surface of the sealing resin portion 6. The groove 7 is provided along a gap between two adjacent ceramic circuit boards among the plurality of ceramic circuit boards 1 in plan view.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a power conversion device. [Background technology]

[0002] In power semiconductor devices, ceramic substrates made of aluminum nitride, silicon nitride, alumina, etc., which are materials with excellent heat dissipation and insulation properties, are often used as substrates on which semiconductor chips are mounted. However, when a ceramic substrate is used in a package made of epoxy resin, warping occurs in the semiconductor device due to the difference in thermal expansion coefficient between the ceramic substrate and the epoxy resin (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-157550 [Patent Document 2] International Publication No. 2015 / 151235 Summary of the Invention [Problem to be solved by the invention]

[0004] To improve the heat dissipation performance of a semiconductor device, it is preferable to apply a thin layer of thermal grease between a metal heat dissipation surface provided on the underside of a ceramic substrate and a heat sink or other heat sink. However, if the semiconductor device is warped, the thickness of the thermal grease on the periphery of the semiconductor device may be thicker, or the thickness of the thermal grease on one side of the semiconductor device may be thicker, depending on the warpage. In such thicker areas of the thermal grease, the heat dissipation performance of the semiconductor device may be reduced.

[0005] In order to solve the above-mentioned problems, an object of the present disclosure is to provide a semiconductor device in which warpage is corrected and heat dissipation is improved. [Means for solving the problem]

[0006] A semiconductor device according to the present disclosure includes a plurality of ceramic circuit substrates, a sealing resin portion, and a groove. The plurality of ceramic circuit substrates are arranged side by side. The sealing resin portion seals the plurality of ceramic circuit substrates and the plurality of semiconductor elements mounted on each of the plurality of ceramic circuit substrates. The groove is provided on at least one of the upper and lower surfaces of the sealing resin portion. The groove is provided along the gap between two adjacent ceramic circuit substrates among the plurality of ceramic circuit substrates in a plan view. [Effects of the Invention]

[0007] According to the present disclosure, warpage of the semiconductor device is corrected when the semiconductor device is fixed to the heat sink, thereby making it possible to improve heat dissipation performance.

[0008] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a perspective view showing a configuration of a semiconductor device according to a first embodiment. [Figure 2] 1 is a cross-sectional view showing a configuration of a semiconductor device in a first embodiment. [Figure 3] 1 is a plan view showing an internal configuration of a semiconductor device according to a first embodiment. [Figure 4] 1 is a cross-sectional view showing the configuration of a power module according to a first embodiment. [Figure 5] 10 is a diagram showing the relationship between the amount of warpage deformation of the sealing resin portion and the depth of the groove provided on the rear surface of the sealing resin portion when the sealing resin portion is pressed against the heat sink with a constant pressure force in the first embodiment. FIG. [Figure 6] FIG. 10 is a perspective view showing the configuration of a semiconductor device according to a second embodiment. [Figure 7] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device according to a third embodiment. [Figure 8]11 is a plan view showing the internal configuration of a sealing resin portion of a semiconductor device according to a third embodiment. FIG. [Figure 9] FIG. 10 is a perspective view showing a configuration of a semiconductor device according to a fourth embodiment. [Figure 10] FIG. 10 is a plan view showing the internal configuration of a semiconductor device according to a fourth embodiment. [Figure 11] FIG. 13 is a plan view showing an internal configuration of a semiconductor device according to a modification of the fourth embodiment. [Figure 12] FIG. 11 is a block diagram showing a configuration of a power conversion system to which a power conversion device according to a fifth embodiment is applied. DETAILED DESCRIPTION OF THE INVENTION

[0010] Embodiment 1 Fig. 1 is a perspective view showing the configuration of a semiconductor device 101 in embodiment 1. Fig. 2 is a cross-sectional view showing the configuration of semiconductor device 101, showing a cross section taken along line II shown in Fig. 1. Fig. 3 is a plan view showing the internal configuration of semiconductor device 101.

[0011] The semiconductor device 101 is composed of a plurality of ceramic circuit substrates 1, a plurality of semiconductor elements 2, a bonding material 3, wires 4A and 4B, an external terminal 5, a sealing resin portion 6, and a groove .

[0012] The plurality of ceramic circuit substrates 1 are arranged side by side in the horizontal direction inside the sealing resin portion 6. In the first embodiment, two ceramic circuit substrates 1 are arranged in parallel.

[0013] Each ceramic circuit board 1 is composed of a ceramic plate 1A, a circuit pattern 1B, and a heat sink 1C. The ceramic plate 1A is formed primarily from silicon nitride. The ceramic plate 1A has an outer size of 20 mm × 20 mm and a thickness of 0.3 mm. The circuit pattern 1B is brazed to the surface of the ceramic plate 1A and is formed primarily from copper. The thickness of the circuit pattern 1B is 1.0 mm. The two circuit patterns 1B have the same shape. The heat sink 1C is brazed to the back surface of the ceramic plate 1A and is made of metal. The heat sink 1C of the first embodiment is formed primarily from copper. The thickness of the heat sink 1C is 1.0 mm. The heat sink 1C is exposed from the back surface of the sealing resin portion 6. The heat sink 1C has the function of dissipating heat generated by the semiconductor element 2 to the outside of the semiconductor device 101.

[0014] The semiconductor elements 2 are mounted on the circuit patterns 1B of each ceramic circuit substrate 1. More specifically, the semiconductor elements 2 are bonded to the circuit patterns 1B by a bonding material 3. The bonding material 3 is, for example, a solder containing tin as a main component. In the first embodiment, two semiconductor elements 2 are mounted on each of the two ceramic circuit substrates 1.

[0015] The semiconductor element 2 includes a switching element (not shown). The switching element in the first embodiment is a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor), and the base material of the semiconductor element 2 is SiC. The external size of the semiconductor element 2 is 5 mm × 5 mm, and the thickness thereof is 0.2 mm.

[0016] The semiconductor element 2 has a main electrode (not shown) and a signal electrode (not shown) on its upper surface. Of the two ceramic circuit substrates 1, the main electrode of the semiconductor element 2 on one ceramic circuit substrate 1 (the substrate on the left in FIGS. 2 and 3) is electrically connected by wire 4A to the circuit pattern 1B on the other ceramic circuit substrate 1 (the substrate on the right in FIGS. 2 and 3). In the semiconductor device 101, a circuit is formed by combining two semiconductor elements 2.

[0017] The external terminals 5 include a main terminal 5A and a signal terminal 5B. One end of each of the main terminal 5A and the signal terminal 5B protrudes from the side surface of the sealing resin portion 6. The other ends of the main terminal 5A and the signal terminal 5B are joined to the circuit pattern 1B via solder (not shown) containing tin as a main material. The main terminal 5A is electrically connected to a main electrode of the semiconductor element 2 via the circuit pattern 1B and a wire 4A containing aluminum as a main material. The signal terminal 5B is electrically connected to a signal electrode of the semiconductor element 2 via the circuit pattern 1B and a wire 4B containing aluminum as a main material.

[0018] The sealing resin portion 6 covers and seals the ceramic circuit board 1, the semiconductor element 2, and the wires 4A and 4B. The sealing resin portion 6 has the function of insulating the circuit of the semiconductor device 101 from the outside. The resin used in the first embodiment is epoxy resin. The external dimensions of the sealing resin portion 6 are 50 mm x 30 mm, and its thickness is 6 mm. The sealing resin portion 6 functions as a housing.

[0019] Grooves 7 are provided on the upper and lower surfaces of the sealing resin portion 6. The grooves 7 in embodiment 1 include groove 7A provided on the lower surface of the sealing resin portion 6 and groove 7B provided on the upper surface of the sealing resin portion 6. The grooves 7 are provided along the gap between two adjacent ceramic circuit substrates 1 in a plan view. The grooves 7 in embodiment 1 are provided parallel to the gap and pass through the center of the sealing resin portion 6 in a plan view. Groove 7A provided on the lower surface of the sealing resin portion 6 is provided along the gap between two heat sinks 1C. The grooves 7 extend from one end of the sealing resin portion 6 to the other. The cross-sectional shape of the grooves 7 is rectangular. The width of the grooves 7 is 2 mm and the depth is 0.5 mm.

[0020] In this way, the semiconductor device 101 has a circuit that combines a plurality of semiconductor elements 2. The sealing resin portion 6 insulates the circuit from the outside of the semiconductor device 101, and the heat sink 1C has the function of radiating heat generated by the semiconductor elements 2 to the outside of the semiconductor device 101.

[0021] 4 is a cross-sectional view showing the configuration of power module 150 in embodiment 1. Power module 150 is made up of semiconductor device 101, heat sink 8, heat dissipation grease 9, leaf spring 10, and screw 11.

[0022] The heat sink 8 has fins that are cooled by air or water. The semiconductor device 101 is mounted on the heat sink 8 via a thermal grease 9.

[0023] The thermal grease 9 contains silicone oil as its main ingredient and a filler such as silica, which has a relatively high thermal conductivity. A gap (not shown) is formed between the heat sink 1C and the heat sink 8 due to warping or unevenness. The thermal grease 9 fills this gap, thereby preventing a decrease in heat dissipation performance. The thermal grease 9 also fills part of the groove 7A provided on the underside of the sealing resin part 6.

[0024] The leaf spring 10 secures the semiconductor device 101 to the heat sink 8. The leaf spring 10 has two protrusions 10A provided on both sides of the center of the leaf spring 10 at equal distances. Both ends of the leaf spring 10 are fastened to the heat sink 8 by screws 11, with the two protrusions 10A in contact with the upper surface of the sealing resin part 6. The two protrusions 10A are located on both sides of the groove 7. The two protrusions 10A press the sealing resin part 6 downward, so that the heat sink 1C is pressed against the heat sink 8.

[0025] During the manufacturing process of the semiconductor device 101, when the semiconductor element 2, ceramic circuit board 1, etc. are sealed with resin, differences in the thermal expansion coefficients of the components cause warping in the semiconductor device 101. When the warped semiconductor device 101 is attached to the heat sink 8, the two protrusions 10A come into contact with the top surface of the sealing resin portion 6 at two points that are approximately equidistant from the center of the semiconductor device 101. Because the groove 7 is provided in the center of the sealing resin portion 6, the protrusions 10A also come into contact with the sealing resin portion 6 at two points that are also equidistant from the groove 7. The leaf spring 10 applies pressure to the semiconductor device 101, thereby pressing the heat sink 1C and the heat sink 8 as flatly as possible.

[0026] Because groove 7 is provided, sealing resin portion 6 easily bends around groove 7, and the warpage of semiconductor device 101 is easily corrected by the pressure of leaf spring 10. For example, the distance between heat sink 1C and heat sink 8 becomes smaller than before the correction, that is, the thickness of heat dissipation grease 9 becomes thinner than before the correction, and therefore the heat dissipation performance from semiconductor device 101 to heat sink 8 improves.

[0027] The function and effect of the groove 7 of the semiconductor device 101 will be described in detail below.

[0028] The components of the semiconductor device 101 are encapsulated with a hard epoxy resin, i.e., the encapsulating resin portion 6, thereby suppressing deterioration and extending the lifespan of the components. The thermosetting resin, such as epoxy resin, that forms the encapsulating resin portion 6 is injected into a molding die in a liquid state. The volume of the resin shrinks during heat curing. In particular, if the molding process involves the inclusion of a material, such as a ceramic material, whose thermal expansion coefficient is half or less than that of the resin, the resin shrinks during cooling after heat curing due to the difference in thermal expansion coefficients. As a result, a convex warp occurs on the surface where the ceramic plate 1A is disposed, i.e., the underside of the encapsulating resin portion 6. For example, even in the semiconductor device 101 of the first embodiment, a warp of approximately 200 μm occurs between the edges and the center of the encapsulating resin portion 6.

[0029] The semiconductor element 2 generates heat due to losses caused by electrical resistance when current is applied and when it is switched on. This heat generation can further increase losses or reduce resistance, causing excessive current to flow and resulting in a loss of function. To prevent the wiring members from breaking and causing failure of the semiconductor device 101, it is necessary to sufficiently dissipate the heat generated by the semiconductor element 2 to prevent the temperature from rising. For this reason, the semiconductor device 101 is attached to an air-cooled or water-cooled heat sink 8. The heat sink 1C and the heat sink 8 are in contact with each other via thermal grease 9, and the heat generated by the semiconductor element 2 is dissipated from the heat sink 8.

[0030] However, when warping as described above occurs, a large gap occurs between the heat sink 1C and the heat sink 8. In the area where the gap is large, the thickness of the heat dissipation grease 9 increases, making it easier for the temperature of the semiconductor element 2 to rise. In such a state, the output performance of the semiconductor element 2 is not fully exhibited. One possible way to correct the warping is to increase the pressure force of the leaf spring 10, but in that case, the size of the power module 150 would increase.

[0031] In the semiconductor device 101 of the first embodiment, the grooves 7 are provided in the sealing resin portion 6, and thus the leaf springs 10 press down on the sealing resin portion 6, thereby correcting the warpage. Without increasing the pressure, the distance between the heat sink 1C and the heat sink 8 is shortened, improving the heat dissipation performance.

[0032] Furthermore, when the semiconductor device 101 is in use, the semiconductor element 2 generates heat, which causes localized changes in warpage due to the difference in thermal expansion coefficient between the epoxy resin and the ceramic material. When localized changes in warpage occur, the oil component of the thermal grease 9 is expelled, reducing heat dissipation. Because the semiconductor device 101 of the first embodiment is provided with the grooves 7, changes in warpage of the heat sink 1C are reduced, and the life of the semiconductor device 101 is extended.

[0033] A modification of the semiconductor device 101 in the first embodiment will be described below.

[0034] The above effect can be achieved even if the grooves 7 are provided on only one of the upper and lower surfaces of the sealing resin portion 6. That is, the grooves 7 only need to be provided on at least one of the upper and lower surfaces of the sealing resin portion 6. When the grooves 7 are provided on the lower surface of the sealing resin portion 6, the thermal grease 9 on the periphery of the semiconductor device 101 is pushed out and expelled from the sealing resin portion 6 by the pressure of the leaf springs 10. The thermal grease 9 near the center of the semiconductor device 101 first flows into the grooves 7, and then is pushed out and expelled along the grooves 7 to the outside of the sealing resin portion 6. As a result, the thickness of the thermal grease 9 becomes thinner than before the warpage is corrected, achieving higher heat dissipation performance.

[0035] It is preferable that the depth of the groove 7 is as deep as possible and the width of the groove 7 is as wide as possible. The groove 7B provided on the upper surface of the sealing resin portion 6 has a depth that does not expose the wires 4A, 4B. The groove 7A provided on the lower surface of the sealing resin portion 6 may have a depth that reaches the ceramic plate 1A. Furthermore, the depth and width of the groove 7 do not have to be constant. The depth and width of the groove 7B provided on the upper surface of the sealing resin portion 6 do not have to be the same as the depth and width of the groove 7A provided on the lower surface of the sealing resin portion 6.

[0036] FIG. 5 is a diagram showing the relationship between the amount of warpage deformation of the sealing resin portion 6 when the sealing resin portion 6 is pressed against the heat sink 8 with a constant pressure and the depth of the groove 7A provided on the underside of the sealing resin portion 6. FIG. 5 also shows the amount of deformation when a groove 7B is further provided on the upper surface of the sealing resin portion 6. The relationship between the amount of warpage deformation and the depth of the groove 7A shown in FIG. 5 is the result of numerical analysis. When the depth of the groove 7A is 0.5 mm, the amount of deformation is 20% or more. Furthermore, when a groove 7B is provided on the upper surface of the sealing resin portion 6, the amount of deformation of the sealing resin portion 6 becomes even greater.

[0037] The cross-sectional shape of groove 7 is not limited to a rectangle, but may be a triangle or U-shape. If the width of the opening side of groove 7 is wider than the width of the bottom side of groove 7, sealing resin portion 6 will be easily bent.

[0038] Although the grooves 7 in the first embodiment extend from one end of the sealing resin portion 6 to the other end, the grooves 7 may be partially disconnected. For example, the grooves 7 may be provided intermittently in accordance with the wiring inside the sealing resin portion 6.

[0039] Although the number of ceramic circuit substrates 1 in the first embodiment is two, depending on the circuit configuration, the number may be three, four, or six. The arrangement of the ceramic circuit substrates 1 is not limited to one row, and may be two rows.

[0040] The shape of the circuit pattern 1B may be standardized. When the circuit pattern 1B is standardized, multiple circuits are configured with the same components. On the other hand, multiple ceramic circuit substrates 1 having different circuit patterns 1B may be applied in consideration of minimizing the substrate area or mass production.

[0041] When the number of ceramic circuit substrates 1 is an even number, the semiconductor device 101 may have only one groove 7 in the center of the sealing resin portion 6. To further improve heat dissipation, it is preferable that the groove 7 is formed along the gaps between the ceramic circuit substrates 1 other than the center in a plan view. When the ceramic circuit substrates 1 are arranged in multiple rows, it is preferable that the grooves 7 are provided in the vertical and horizontal directions, which makes it easier to achieve the above-mentioned effects.

[0042] It is preferable that the outer shapes of the ceramic plates 1A are the same, in which case the warpage is symmetrical and therefore easy to correct.

[0043] The circuit of the semiconductor device 101 is not limited to a circuit equipped with a MOSFET, but may be a circuit that is suitable for the product to which the semiconductor device 101 is applied, such as a circuit that combines an IGBT (Insulated Gate Bipolar Transistor) and an FWD (Free Wheeling Diode).

[0044] The bonding material 3 between the semiconductor element 2 and the circuit pattern 1B is not limited to solder, but may be a sintered material containing silver as a main component. When a sintered material is used, heat dissipation is further improved. Furthermore, the selection of the bonding material 3 is not restricted by the manufacturing process or material cost.

[0045] In summary, the semiconductor device 101 in the first embodiment includes a plurality of ceramic circuit substrates 1, a sealing resin portion 6, and a groove 7. The plurality of ceramic circuit substrates 1 are arranged side by side in the horizontal direction. The sealing resin portion 6 seals the plurality of ceramic circuit substrates 1 and the plurality of semiconductor elements 2 mounted on each of the plurality of ceramic circuit substrates 1. The groove 7 is provided on at least one of the upper and lower surfaces of the sealing resin portion 6. The groove 7 is provided along the gap between two adjacent ceramic circuit substrates 1 among the plurality of ceramic circuit substrates 1 in a plan view.

[0046] According to this configuration, when the semiconductor device 101 is attached to the heat sink 8, the semiconductor device 101 deforms, thereby shortening the distance between the heat sink 1C and the heat sink 8. In other words, the warpage is corrected, and the heat dissipation performance of the semiconductor device 101 is improved.

[0047] Embodiment 2 FIG. 6 is a perspective view showing the configuration of a semiconductor device 102 according to the second embodiment.

[0048] In addition to the configuration of the first embodiment, the semiconductor device 102 includes a plurality of through holes 6A penetrating the upper and lower surfaces of the sealing resin portion 6. In the second embodiment, two through holes 6A are provided. The two through holes 6A are positioned in a direction perpendicular to the extension direction of the groove 7 and are provided near the outer edge of the sealing resin portion 6. In other words, the through holes 6A are provided on both sides of the groove 7 and closer to the end of the sealing resin portion 6 than to the center in a plan view. The diameter of the through holes 6A is 4.5 mm. The sealing resin portion 6, which is made of epoxy resin, has an outer size of 70 mm × 30 mm and a thickness of 6 mm. The circuit configuration and other components of the semiconductor device 102 are the same as those of the semiconductor device 101 shown in the first embodiment, so detailed description thereof will be omitted.

[0049] Although not shown in the drawings, the power module of the second embodiment has a configuration in which the semiconductor device 102 is attached to the heat sink 8 of Fig. 4. The semiconductor device 102 is directly fastened to the heat sink 8 not by the leaf spring 10 but by a screw (not shown) passed through the through hole 6A.

[0050] In such a configuration, the sealing resin portion 6 is pressed against the heat sink 8 with a strong force in a direction perpendicular to the groove 7. Therefore, the warp is corrected and the heat dissipation performance is improved.

[0051] The reason why the semiconductor device 102 has such a configuration is described in detail below. Power modules handle high voltages exceeding 1 kV. Power modules that handle such high voltages require the use of a ceramic plate 1A with a thickness of 0.5 mm or more. In this case, the amount of warping that occurs due to the difference in thermal expansion coefficient between the epoxy resin of the sealing resin portion 6 and the ceramic material of the ceramic plate 1A increases. In the power module of embodiment 2, the semiconductor device 102 is directly fastened to the heat sink 8 with screws, thereby obtaining a high pressure. Even if the sealing resin portion 6 is warped before fastening, the warping is corrected, resulting in high heat dissipation.

[0052] Furthermore, if the thickness of the sealing resin portion 6 is reduced to reduce warpage, the rigidity of the sealing resin portion 6 decreases, making it impossible to increase the pressure applied by fastening the screws. However, because the semiconductor device 102 of the second embodiment is provided with the grooves 7, even if the sealing resin portion 6 is warped before fastening, the warpage is corrected when pressure is applied by the screws. Therefore, the rigidity of the sealing resin portion 6 is maintained while improving heat dissipation.

[0053] In a power module that handles high voltages, it is important to ensure an insulating distance between external terminals 5 or between external terminals 5 and metal materials. The semiconductor device 102 of the second embodiment is directly fastened to the heat sink 8 with screws, and the leaf spring 10 is not required to attach the semiconductor device 102 to the heat sink 8. Because there is no need to consider the insulating distance between the leaf spring 10 and the external terminals 5, the semiconductor device 102 of the second embodiment is effective for application to a power module that handles higher voltages.

[0054] The semiconductor device 102 may be provided with a U-shaped notch (not shown) instead of the through hole 6A. The notch is provided, for example, on the short side of the sealing resin part 6 shown in FIG. 6. Furthermore, when the size of the sealing resin part 6 is large, the through hole 6A or the notch is provided, for example, on the four corners of the sealing resin part 6. Even with such a configuration, the above-mentioned effects can be obtained.

[0055] Embodiment 3 Fig. 7 is a cross-sectional view showing the configuration of a semiconductor device 103 according to embodiment 3. Fig. 7 shows a cross section taken along a position corresponding to line II shown in Fig. 1. Fig. 8 is a plan view showing the internal configuration of a sealing resin portion 6 of the semiconductor device 103.

[0056] In addition to the configuration of the first embodiment, the semiconductor device 103 includes a flat lead 4C that electrically connects two semiconductor elements 2 and a flat lead 4D that electrically connects two circuit patterns 1B inside the sealing resin part 6. The leads 4C and 4D are members formed by bending a copper plate.

[0057] The lead 4C is provided so as to straddle the space between one of the two ceramic circuit substrates 1 (the substrate on the left in FIG. 7) and the other ceramic circuit substrate 1 (the substrate on the right in FIG. 7). One end of the lead 4C is joined by solder (not shown) to a main electrode of the semiconductor element 2 provided on one of the ceramic circuit substrates 1. The other end of the lead 4C is joined by solder (not shown) to a circuit pattern 1B provided on the other ceramic circuit substrate 1. The solder contains lead as a main material.

[0058] The width of the leads 4C and 4D is 4 mm, and the thickness is 0.3 mm. The linear expansion coefficient of the leads 4C and 4D is smaller than the linear expansion coefficient of the resin forming the sealing resin portion 6. The other components of the semiconductor device 103 are the same as those of the semiconductor device 101 shown in the first embodiment, and therefore detailed description thereof will be omitted.

[0059] In such a semiconductor device 103, a material with a lower coefficient of thermal expansion and a higher modulus of elasticity than resin is provided inside the sealing resin portion 6. Therefore, the semiconductor device 103 is less susceptible to warping or deformation due to curing shrinkage of the resin and temperature during module operation. As a result, high heat dissipation and a long life are achieved.

[0060] The reason why the semiconductor device 103 has such a configuration is described in detail below. When the semiconductor device 103 includes multiple ceramic circuit substrates 1, variations in the height or tilt of the ceramic circuit substrates 1 that occur during assembly of the semiconductor device 103 affect the heat dissipation performance of the heat sink 1C and the heat sink 8. By connecting the two ceramic circuit substrates 1 with flat leads 4C, which are more rigid than the wires 4A, the relative positional relationship of the ceramic circuit substrates 1 is restricted. In other words, the two ceramic circuit substrates 1 are less likely to shift in their positions in the planar and vertical directions. Furthermore, the position of the outer periphery of the ceramic circuit substrate 1 is fixed to some extent by joining the external terminals 5 to the circuit pattern 1B of the ceramic circuit substrate 1. Furthermore, by joining the two ceramic circuit substrates 1 with the leads 4C at as short a distance as possible, the tilt of the ceramic circuit substrates 1 is reduced.

[0061] In particular, when the ceramic circuit board 1 is large, or when multiple ceramic circuit boards 1 must be arranged due to complex circuits, wiring with the leads 4C reduces variations in height and inclination among the multiple ceramic circuit boards 1. As a result, high heat dissipation is achieved.

[0062] Furthermore, the linear expansion coefficient of the leads 4C and 4D is smaller than that of the resin forming the sealing resin portion 6. Therefore, the semiconductor device 103 is less susceptible to warping or deformation due to curing shrinkage of the resin and temperature during module operation. As a result, high heat dissipation and a long life are achieved.

[0063] A material in which a low thermal expansion material such as Kovar or Invar is laminated with a high electrical conductivity material such as copper or aluminum may be used, which will further reduce warpage.

[0064] When the semiconductor device 103 includes three or more semiconductor elements 2, a plurality of leads 4C are provided, and each lead 4C electrically connects two of the three or more semiconductor elements 2.

[0065] Even when the configuration of the third embodiment is applied to the semiconductor device 102 of the second embodiment, the above-mentioned effects can be obtained.

[0066] Embodiment 4 Fig. 9 is a perspective view showing the configuration of a semiconductor device 104 according to the fourth embodiment. Fig. 10 is a plan view showing the internal configuration of the semiconductor device 104. The sealing resin part 6 is made up of a resin frame 6C and a resin part 6D.

[0067] The resin frame 6C has a frame shape and accommodates a plurality of ceramic circuit boards 1, a plurality of semiconductor elements 2, etc. The resin frame 6C is made of, for example, PPS (Polyphenylene sulfide). The resin frame 6C functions as a housing.

[0068] The resin portion 6D fills the space inside the resin frame 6C. In other words, the resin frame 6C surrounds the outer periphery of the resin portion 6D in a plan view. The resin portion 6D is formed of a resin different from the resin that forms the resin frame 6C, for example, an epoxy resin. Although not shown in the drawings, the heat sink 1C is exposed from the back surface of the resin portion 6D, as in the first embodiment.

[0069] The semiconductor device 104 also includes a notch 6B. The notch 6B penetrates the upper and lower surfaces of the sealing resin portion 6, and in the fourth embodiment, two notches 6B are provided at the end portions of the sealing resin portion 6.

[0070] The main terminal 5A is a bent flat plate, and the signal terminal 5B is a pin-shaped member. One end of the main terminal 5A and the signal terminal 5B is soldered to the surface of the circuit pattern 1B of the ceramic circuit board 1. The other end of the main terminal 5A and the signal terminal 5B protrudes from the upper surface of the resin portion 6D.

[0071] The groove 7 extends linearly from the resin portion 6D to the resin frame 6C on the back surface of the sealing resin portion 6. The groove 7 is provided along the gap between two adjacent ceramic circuit substrates 1 in a plan view. More specifically, the groove 7 is provided along the gap between two heat sinks 1C.

[0072] A method for forming the grooves 7 in the manufacturing process of the semiconductor device 104 will be described. First, the ceramic circuit substrate 1 and the resin frame 6C are positioned using a resin casting jig (not shown) made of fluororesin. The fluororesin of the resin casting jig is, for example, PTFE (Polytetrafluoroethylene). The resin frame 6C is provided with recesses corresponding to the grooves 7 in advance. The resin casting jig is also provided with protrusions corresponding to the shape of the grooves 7 in the resin part 6D.

[0073] The convex shape of the resin casting jig is aligned with the concave shape of the resin frame 6C, and in this state, liquid epoxy resin is poured into the space inside the resin frame 6C. The epoxy resin is then heated and hardened, forming grooves 7 in the resin part 6D. The grooves 7 in the resin part 6D are connected to the concave shapes of the resin frame 6C. At this time, the positioning of the ceramic circuit board 1 can also be achieved by partially widening the convex shape of the resin casting jig.

[0074] Although not shown in the drawings, the power module of the fourth embodiment has a configuration in which the semiconductor device 104 is attached to the heat sink 8 of FIG. 4 with screws, similar to the second embodiment. The screws are passed through the notches 6B and fastened to the heat sink 8. Grooves 7 are provided in the resin part 6D and the resin frame 6C, and thus the sealing resin part 6 is pressurized by fastening the screws. This corrects warping and improves heat dissipation.

[0075] The reasons for the semiconductor device 104 having such a configuration are described in detail below. Power modules handle high voltages. Some applications require widened spatial and creepage distances not only between external terminals 5 but also between the external terminals 5 and the heat sink 8. In such cases, it is preferable for the external terminals 5 to protrude from the upper surface of the resin portion 6D. In the transfer molding method using epoxy resin, upper and lower molds are joined together and resin is injected at high pressure, making it difficult to expose the external terminals 5 from the upper surface of the resin portion 6D located within the mold. While it is possible to expose the external terminals 5 using a complex mold or post-processing, the process becomes complicated and difficult to adopt from the standpoints of productivity and cost. When injecting liquid epoxy resin, the surface shape is not flat due to surface tension, making it difficult to directly drill screw holes.

[0076] Since the semiconductor device 104 includes the resin frame 6C, it is easy to form a structure in which the external terminals 5 protrude from the upper surface of the resin portion 6D. Furthermore, since the grooves 7 are provided in both the resin frame 6C and the resin portion 6D, warping is corrected by the pressure applied by screwing, improving heat dissipation.

[0077] FIG. 11 is a plan view showing the internal configuration of a semiconductor device 104A according to a modification of the fourth embodiment. The resin frame 6C includes a beam 6E on the bottom side thereof. The beam 6E connects the centers of two opposing long sides that form the frame shape of the resin frame 6C on the bottom side thereof. The groove 7 extends into the bottom surface of the beam 6E. In other words, the cross-sectional shape of the beam 6E is a generally arch-like shape that is convex upward. This configuration eliminates the need to provide a convex shape in the resin casting jig during the manufacturing process of the semiconductor device 104A.

[0078] The external terminals 5 may be provided so as to protrude from the upper surface of the resin frame 6C. For example, the external terminals 5 and the resin frame 6C may form an integrated component by having a portion of the external terminals 5 embedded in the resin frame 6C. The external terminals 5 may be directly bonded to the circuit pattern 1B inside the resin part 6D or to the main electrodes of the semiconductor element 2, or may be connected via aluminum wire.

[0079] In this way, the semiconductor devices 104 and 104A offer improved flexibility in designing the structure.The semiconductor devices 104 and 104A have a structure suitable for high-mix low-volume production.

[0080] Even when the configuration of the fourth embodiment is applied to the semiconductor device 103 of the third embodiment, the above-mentioned effects can be obtained.

[0081] Embodiment 5 12 is a block diagram showing the configuration of a power conversion system according to embodiment 5. The power conversion system includes a power conversion device 200, which includes a semiconductor device according to any one of embodiments 1 to 4. The power conversion device 200 is not limited to a specific power conversion device, but will be described below using a three-phase inverter as an example.

[0082] The power conversion system includes a power source 100 , a power conversion device 200 , and a load 300 .

[0083] The power supply 100 is a DC power supply and supplies DC power to the power conversion device 200. The power supply 100 can have various configurations, such as a DC system, a solar cell, or a storage battery. The power supply 100 may be a rectifier circuit or an AC / DC converter connected to an AC system. The power supply 100 may also be a DC / DC converter that converts DC power output from a DC system into a predetermined power.

[0084] The power conversion device 200 is connected between the power supply 100 and the load 300. The power conversion device 200 of the fifth embodiment is a three-phase inverter, which converts DC power supplied from the power supply 100 into AC power and supplies the AC power to the load 300.

[0085] The load 300 is driven by AC power supplied from the power conversion device 200. The load 300 in the fifth embodiment is a three-phase motor. The three-phase motor is not limited to a specific application and is mounted in various electrical devices. For example, the three-phase motor is mounted in hybrid vehicles, electric vehicles, railroad cars, elevators, air conditioners, etc.

[0086] The following describes in detail the power conversion device 200. The power conversion device 200 includes a main conversion circuit 201 and a control circuit 203.

[0087] The main conversion circuit 201 converts DC power into AC power and outputs it. The main conversion circuit 201 includes a semiconductor device 202 and a drive circuit (not shown). The semiconductor device 202 corresponds to the semiconductor device shown in any one of the above first to fourth embodiments.

[0088] The main conversion circuit 201 includes a switching element (not shown) and a freewheeling diode (not shown). The main conversion circuit 201 converts DC power supplied from the power source 100 into AC power by switching the switching element, and supplies the AC power to the load 300.

[0089] Although the main conversion circuit 201 may have a variety of specific circuit configurations, it has a two-level three-phase full-bridge circuit (not shown). The three-phase full-bridge circuit is composed of six switching elements and six freewheeling diodes connected in anti-parallel to the six switching elements. At least one of the six switching elements and six freewheeling diodes is composed of a semiconductor device described in any one of the first to fourth embodiments. The six switching elements form upper and lower arms, with every two switching elements connected in series. Three pairs of upper and lower arms form the U, V, and W phases of the full-bridge circuit. The output terminals of these three pairs of upper and lower arms correspond to the three output terminals of the main conversion circuit 201 and are connected to the load 300.

[0090] The drive circuit may be built into the semiconductor device 202 or may be provided separately from the semiconductor device 202. The drive circuit generates a drive signal for driving the switching element of the main conversion circuit 201 in accordance with a control signal output from the control circuit 203. The drive circuit supplies the drive signal to the control electrode of the switching element of the semiconductor device 202.

[0091] The drive signal is a signal for turning on a switching element or a signal for turning off a switching element. More specifically, when a switching element is maintained in an on state, the drive signal is a voltage signal (on signal) that is equal to or greater than the threshold voltage of the switching element. When a switching element is maintained in an off state, the drive signal is a voltage signal (off signal) that is smaller than the threshold voltage of the switching element.

[0092] The control circuit 203 outputs a control signal to the main conversion circuit 201 for controlling the drive circuit of the main conversion circuit 201. The control circuit 203 controls the switching elements of the main conversion circuit 201 so that a desired power is supplied to the load 300. Specifically, the control circuit 203 calculates the time (on time) that each switching element of the main conversion circuit 201 should be in the on state based on the power to be supplied to the load 300. The control circuit 203 generates a control signal so that the main conversion circuit 201 is controlled by PWM (Pulse Width Modulation). The control circuit 203 outputs a control signal to the drive circuit so that the drive circuit outputs an on signal to a switching element that should be in the on state and an off signal to a switching element that should be in the off state. In this way, the control circuit 203 controls the switching elements of the main conversion circuit 201 so that a predetermined power is supplied to the load 300.

[0093] In such a power conversion device 200, the semiconductor device according to any one of the first to fourth embodiments is applied to the switching element or the free wheel diode, thereby improving reliability.

[0094] In the fifth embodiment, an example has been shown in which the power conversion device 200 is a two-level three-phase inverter, but the configuration of the power conversion device 200 is not limited to this. For example, the power conversion device 200 may be a multi-level power conversion device such as a three-level power conversion device. Alternatively, the power conversion device 200 may be a single-phase inverter for supplying power to a single-phase load. When the load 300 is a DC load, the power conversion device 200 may be a DC / DC converter or an AC / DC converter. When the load 300 is a solar power generation system, a power storage system, or the like, the power conversion device 200 may be a power conditioner.

[0095] In the fifth embodiment, an example has been given in which the load 300 is a three-phase electric motor, but the configuration of the load 300 is not limited to this. For example, the load 300 may be an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system.

[0096] In the present disclosure, the embodiments can be freely combined, and the embodiments can be modified or omitted as appropriate.

[0097] Various aspects of the present disclosure are summarized below as appendices.

[0098] (Appendix 1) a plurality of ceramic circuit boards arranged side by side in a horizontal direction; a sealing resin portion that seals the plurality of ceramic circuit boards and the plurality of semiconductor elements mounted on the plurality of ceramic circuit boards, respectively; a groove provided on at least one of an upper surface and a lower surface of the sealing resin portion, The semiconductor device, wherein the groove is provided along a gap between two adjacent ceramic circuit substrates among the plurality of ceramic circuit substrates in a plan view.

[0099] (Appendix 2) Each of the plurality of ceramic circuit substrates is Ceramic plate and a circuit pattern provided on the surface of the ceramic plate; a metal heat sink provided on the rear surface of the ceramic plate, each of the plurality of semiconductor elements is mounted on the circuit pattern; the heat sink is exposed from the lower surface of the sealing resin portion, 2. The semiconductor device according to claim 1, wherein the sealing resin portion is formed of an epoxy resin.

[0100] (Appendix 3) 3. The semiconductor device according to claim 1, further comprising a plurality of through holes or a plurality of notches that are provided closer to the end portion than the center portion of the sealing resin portion in a direction intersecting the extension direction of the groove, and that penetrate the upper surface and the lower surface of the sealing resin portion.

[0101] (Appendix 4) Further, a flat lead is provided to electrically connect two semiconductor elements among the plurality of semiconductor elements, 4. The semiconductor device according to claim 1, wherein the lead has a linear expansion coefficient smaller than a linear expansion coefficient of a resin forming the sealing resin portion.

[0102] (Appendix 5) The sealing resin portion is a resin frame having a frame shape and accommodating the plurality of ceramic circuit boards and the plurality of semiconductor elements inside the frame shape; a resin portion filled in the space inside the resin frame, 5. The semiconductor device according to claim 1, wherein the groove extends from the resin portion to the resin frame on the at least one surface of the sealing resin portion.

[0103] (Appendix 6) The sealing resin portion is a resin frame having a frame shape and accommodating the plurality of ceramic circuit boards and the plurality of semiconductor elements inside the frame shape; a resin portion filled in the space inside the resin frame, the resin frame includes a beam portion connecting two opposing sides that form the frame shape, 5. The semiconductor device according to claim 1, wherein the groove is provided on a bottom surface of the beam portion.

[0104] (Appendix 7) a main conversion circuit including the semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 6, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit. [Explanation of symbols]

[0105] 1 ceramic circuit board, 1A ceramic plate, 1B circuit pattern, 1C heat sink, 2 semiconductor element, 3 bonding material, 4A wire, 4B wire, 4C lead, 4D lead, 5 external terminal, 5A main terminal, 5B signal terminal, 6 sealing resin part, 6A through hole, 6B cutout, 6C resin frame, 6D resin part, 6E beam part, 7 groove, 7A groove, 7B groove, 8 heat sink, 9 thermal grease, 10 leaf spring, 10A protrusion, 11 screw, 100 power supply, 101 semiconductor device, 102 semiconductor device, 103 semiconductor device, 104 semiconductor device, 104A semiconductor device, 150 power module, 200 power conversion device, 201 main conversion circuit, 202 semiconductor device, 203 control circuit, 300 load.

Claims

1. a plurality of ceramic circuit boards arranged side by side in a horizontal direction; a sealing resin portion that seals the plurality of ceramic circuit boards and the plurality of semiconductor elements mounted on the plurality of ceramic circuit boards, respectively; a groove provided on at least one of an upper surface and a lower surface of the sealing resin portion, The semiconductor device, wherein the groove is provided along a gap between two adjacent ceramic circuit substrates among the plurality of ceramic circuit substrates in a plan view.

2. Each of the plurality of ceramic circuit substrates is Ceramic plate and a circuit pattern provided on the surface of the ceramic plate; a metal heat sink provided on the rear surface of the ceramic plate, each of the plurality of semiconductor elements is mounted on the circuit pattern; the heat sink is exposed from the lower surface of the sealing resin portion, 2. The semiconductor device according to claim 1, wherein said sealing resin portion is made of epoxy resin.

3. 2. The semiconductor device according to claim 1, further comprising a plurality of through holes or a plurality of notches that are provided closer to an end portion of the sealing resin portion than to a center portion in a direction intersecting the extension direction of the groove, and that penetrate the upper surface and the lower surface of the sealing resin portion.

4. further comprising a flat lead that electrically connects two of the plurality of semiconductor elements; 2. The semiconductor device according to claim 1, wherein the linear expansion coefficient of said leads is smaller than the linear expansion coefficient of the resin forming said sealing resin portion.

5. The sealing resin portion is a resin frame having a frame shape and accommodating the plurality of ceramic circuit boards and the plurality of semiconductor elements inside the frame shape; a resin portion filled in the space inside the resin frame, The semiconductor device according to claim 1 , wherein the groove extends from the resin portion to the resin frame on the at least one surface of the sealing resin portion.

6. The sealing resin portion is a resin frame having a frame shape and accommodating the plurality of ceramic circuit boards and the plurality of semiconductor elements inside the frame shape; a resin portion filled in the space inside the resin frame, the resin frame includes a beam portion connecting two opposing sides that form the frame shape, The semiconductor device according to claim 1 , wherein the groove is provided on a bottom surface of the beam portion.

7. a main conversion circuit including the semiconductor device according to claim 1, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit.

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