Method and apparatus for evaluating solder wettability of electronic component

A non-destructive imaging-based method evaluates solder wettability quickly and accurately, addressing the inefficiencies of existing destructive methods by predicting solderability degradation.

JP2026013970APending Publication Date: 2026-01-29HITACHI LTD
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Patent Information

Application Number
JP2024114763
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-07-18
Publication Date
2026-01-29

AI Technical Summary

Technical Problem

Existing methods for evaluating solder wettability are time-consuming and destructive, making them inefficient and limiting the reuse of evaluated parts.

Method used

A non-destructive method and apparatus that captures images of electronic component leads, extracts color information, and evaluates solder wettability based on pre-stored relationships between color information and solderability, allowing for quick and accurate predictions of solder wettability.

Benefits of technology

Enables rapid, non-destructive evaluation of solder wettability, ensuring parts with good solderability are used in production while discarding those with poor wettability, and predicting the time point at which wettability will degrade.

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Abstract

To provide a solder wettability evaluation method of an electronic component and a solder wettability evaluation device of the electronic component, capable of evaluating wettability in a short time, simply and nondestructively.SOLUTION: A method for evaluating solder wettability of an electronic component and a device for evaluating solder wettability of an electronic component include an image information capturing step of capturing an image of a lead portion mainly made of copper of the electronic component, a color information extracting step of extracting color information of the lead portion from the image captured in the image information capturing step, and a solder wettability evaluating step of evaluating the solder wettability of the lead portion by comparing the color information extracted in the color information extracting step with a relationship between the color information and the solder wettability of the lead portion stored in advance.SELECTED DRAWING: Figure 3
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Description

[Technical Field]

[0001] The present invention relates to a method for evaluating the solder wettability of electronic components and an apparatus for evaluating the solder wettability of electronic components. [Background technology]

[0002] The exposed copper portion of the cut surface of the outer lead of an electronic component, such as a resin-encapsulated semiconductor, can oxidize during long-term storage, forming an oxide film on the surface. When an oxide film forms, the solder wettability is poor when soldering, such as reflow, is performed for mounting, preventing the solder from wetting and spreading, which can result in soldering defects.

[0003] Patent Document 1 describes a conventional method for evaluating the solder wettability of electrodes of mounted components, etc., in which an appropriate amount of brazing filler metal (solder) is supplied onto the component electrodes, and heat-treated to evaluate the wettability of the brazing filler metal based on the area over which the brazing filler metal melts and spreads. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2001-188034 Summary of the Invention [Problem to be solved by the invention]

[0005] As described in Patent Document 1, the most accurate method for evaluating wettability is to actually melt the solder and evaluate the wettability, but this method has the drawback of being time-consuming. Also, since it is a destructive test that involves melting the solder and soldering, the parts used for the evaluation cannot be reused.

[0006] An object of the present invention is to provide a method and an apparatus for evaluating the solder wettability of electronic components, which are capable of evaluating the wettability in a short time, easily, and non-destructively. [Means for solving the problem]

[0007] The present invention has the following configuration to achieve the above object. A method for evaluating the solder wettability of an electronic component, comprising: an image information capturing step of capturing an image of a lead portion of the electronic component, the lead portion being mainly made of copper; a color information extracting step of extracting color information of the lead portion from the image captured in the image information capturing step; and a solder wettability evaluating step of evaluating the solder wettability of the lead portion based on the color information extracted in the color information extracting step in light of a pre-stored relationship between the color information and the solder wettability of the lead portion.

[0008] Also, the present invention provides a method for evaluating the solder wettability of an electronic component, the method including: an image information capturing step of capturing at least two images of the same lead portion of the electronic component, the lead portion being made mainly of copper, at different times; a color information extracting step of extracting color information of the lead portion from the at least two images captured in the image information capturing step; a solder wettability evaluation step of evaluating the solder wettability of the lead portion at each time point in light of the relationship between the color information and the solder wettability of the lead portion, which is stored in advance, and a solder wettability prediction step of predicting the time point at which the solder wettability of the same lead portion will fall below a predetermined solder wettability, based on the evaluation results of the solder wettability at different times evaluated in the solder wettability evaluation step.

[0009] Also, the solder wettability evaluation device for electronic components includes an imaging unit that captures images of the lead portions of the electronic components, which are mainly made of copper; a color information extraction unit that extracts color information of the lead portions from the images captured by the imaging unit; and a solder wettability evaluation unit that evaluates the solder wettability of the lead portions in light of the relationship between the color information extracted by the color information extraction unit and the solder wettability of the lead portions, the color information being stored in advance in a memory unit.

[0010] The present invention also provides an apparatus for evaluating the solder wettability of electronic components, the apparatus comprising: an imaging unit that captures at least two images of the same lead portion of the electronic component, the lead portion being made mainly of copper, at different times; a color information extraction unit that extracts color information of the lead portion from each of the at least two images captured by the imaging unit; a solder wettability evaluation unit that evaluates the solder wettability of the lead portion at each time point in light of the relationship between the color information extracted by the color information extraction unit and the solder wettability of the lead portion, which is stored in advance in a memory unit; and a solder wettability prediction unit that predicts the time point at which the solder wettability of the same lead portion will fall below a predetermined solder wettability, based on the evaluation results of the solder wettability at different times by the solder wettability evaluation unit. [Effects of the Invention]

[0011] It is possible to provide a method and an apparatus for evaluating the solder wettability of electronic components, which are capable of evaluating the wettability in a short time, easily, and non-destructively. [Brief explanation of the drawings]

[0012] [Figure 1] 1 is a diagram showing the configuration of a solder wettability evaluation device according to an embodiment of the present invention; [Figure 2] This diagram shows how, after long-term storage of an electronic component, the exposed copper of the outer lead oxidizes, forming a copper oxide film that reduces solder wettability. [Figure 3] 1 is a flowchart showing a flow of evaluating solder wettability according to an embodiment of the present invention. [Figure 4] 4 is a diagram for explaining a method for obtaining a hue in S103 of FIG. 3. [Figure 5] A diagram showing the relationship between hue H and oxide film thickness, and between oxide film thickness and solder wettability. [Figure 6] This table shows the results of an experiment in which a copper plate was exposed to a high-temperature, high-humidity environment and oxidized, and the solder wettability was evaluated based on the thickness of the oxide film. [Figure 7] This table summarizes the measurement results (examples) of the oxide film thickness for each lead when wettability is good, when applied to a QFN with 52 leads. [Figure 8]A graph of Figure 7. [Figure 9] This table summarizes the measurement results (examples) of the oxide film thickness for each lead when wettability is poor, when applied to a QFN with 52 leads. [Figure 10] A graph of Figure 9. [Figure 11] This diagram shows how tin plating adheres to the outer leads at the cut surface during the cutting process in QFN manufacturing. [Figure 12] FIG. 10 is a diagram showing changes in oxide film thickness on the terminal surface depending on the storage period of an electronic component. [Figure 13] An image of a conventional solder wettability evaluation device. [Figure 14] 1 is a flowchart of a conventional solder wettability evaluation flow. DETAILED DESCRIPTION OF THE INVENTION

[0013] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. [Example]

[0014] A solder wettability evaluation method and a solder wettability evaluation device according to an embodiment of the present invention will be described with reference to the accompanying drawings. Figure 1(a) shows the solder wettability evaluation device of this embodiment. The solder wettability evaluation device is composed of an imaging device 6 (also referred to as the "imaging unit") that captures an image of an object 5 and an image analyzer 7. The object 5 is, for example, a resin-encapsulated semiconductor QFN (Quad Flat Non-leaded package) as shown in Figure 1(b). When viewed from above, the black plastic package is the only visible part. When viewed from below, a rectangular metal piece for heat dissipation is visible in the center, along with multiple metal terminals (the lead frame end faces, also referred to as "outer leads" or simply "leads") aligned along the four sides. The lead frame is made of a metal (e.g., a copper-iron alloy) primarily composed of copper, which has excellent electrical and thermal conductivity. The surface of the lead frame is, for example, tin-plated to prevent copper oxidation. The imaging device 6 photographs (also referred to as "imaging") the electronic component from the bottom or side so as to photograph the outer leads.

[0015] When electronic components are stored for a long period of time in a warehouse or the like, the surface of the outer lead exposed when the lead frame is cut may oxidize. Figure 2 shows how the exposed copper portion of the outer lead 9 of an electronic component 8 oxidizes after long-term storage, forming a copper oxide film 10 that reduces solder wettability. The present invention aims to provide a method and evaluation device suitable for easily and nondestructively evaluating the solder wettability of the outer lead surface exposed when cutting such a lead frame. It goes without saying that the present invention can also be applied to evaluating the solder wettability of metal terminals other than the outer lead portion, as long as they are provided on electronic components and connected to a substrate or the like by soldering.

[0016] The image of the outer lead taken by the imaging device 6 is sent to an image analysis device 7 (PC), where it is analyzed by an image analysis program of the PC. The image analysis device 7 (PC) includes various programs such as the image analysis program described below, a storage unit for storing image data taken by the imaging device 6, an input unit for selecting an image to be analyzed and inputting analysis conditions, a display unit for displaying the analysis results, etc. (illustration of the input unit, display unit, etc. is omitted). The imaging information image analysis program is composed of programs such as a "color information extraction unit" that extracts color information of the lead portion from the image captured by the imaging unit, a "film thickness estimation unit" that estimates the film thickness of the oxide film formed on the surface of the lead portion by comparing the color information extracted by the color information extraction unit with the relationship between the color information and the film thickness of the oxide film stored in advance in a memory unit, a "solder wettability evaluation unit" that evaluates the solder wettability of the lead portion by comparing with the relationship between the film thickness of the oxide film and the solder wettability stored in advance in the memory unit, and a "solder wettability prediction unit" that predicts the point at which the solder wettability of the lead portion will fall below a predetermined solder wettability based on the solder wettability evaluation result by the solder wettability evaluation unit. Note that it is also possible to determine a "film thickness threshold" for determining whether the solder wettability is good or bad based on the relationship between the film thickness of the oxide film and the solder wettability stored in advance in the memory unit, and to determine the solder wettability based on this "film thickness threshold" (i.e., calculation of the "solder wettability" itself can be omitted).

[0017] 3 shows a flowchart of image analysis in a solder wettability evaluation method according to an embodiment of the present invention. First, an image of the outer leads (lead portion) is acquired (S101). For example, if a QFN with 52 leads is to be evaluated, the terminals are provided on the four sides of the QFN, and each of the four sides has 13 outer leads. Therefore, an image is taken so that all 13 terminals (pins) are captured on each side, and this process is repeated for all four sides.

[0018] Next, the hue is obtained from the obtained image of the lead portion. In this embodiment, the hue is obtained for each terminal, so if a QFN with 52 leads is to be evaluated, the hue is obtained 52 times. In the flowchart of FIG. 3, the number of times the hue is obtained (number of trials) is i, starting from i = 1 (S102), and each time the hue evaluation of that pin is completed, i = i + 1 (S106), and the hue evaluation is repeated until i = 53 in S107 (i.e., until the hue evaluation of the 52nd pin is completed).

[0019] The method for acquiring the hue in S103 of FIG. 3 will be described with reference to FIG. 4. A schematic diagram of the terminal image acquired in S101 of FIG. 3 is shown in the upper part of FIG. 4(a). (In the case of a QFN with 52 leads, there are actually 13 terminals arranged, but the upper part of FIG. 4(a) illustrates only eight of them.) As can be seen from the upper part of FIG. 4(a), the color of the terminal is not uniform, and dark areas (areas where the hue H in the HSV space is a negative value, i.e., areas where the copper oxide film is thick) and light areas (areas where the hue H in the HSV space is a positive value, i.e., areas where the copper oxide film is thin) are mixed. The outer leads of an electronic component 1 are immersed in solder (jet solder) 2 for about three seconds (referred to as "solder DIP"), as will be described later with reference to FIG. 13, and the solder is applied to the outer leads. A schematic diagram of the terminal image after this is shown in the lower part of FIG. 4(a). Each terminal in the lower diagram of Fig. 4(b) corresponds to each terminal in the upper diagram of Fig. 4(a) written directly above it. In the lower diagram of Fig. 4(a), the areas filled with a diagonal brick-like pattern indicate areas where solder is present (where the solder is well adhered), and the blank areas not filled with a pattern indicate areas where there is no solder.

[0020] In the upper diagram of FIG. 4( a), it can be seen that the dark areas (areas where the hue H in the HSV space is a negative value, i.e., areas where the copper oxide film is thick) do not have solder, while the light areas (areas where the hue H in the HSV space is a positive value, i.e., areas where the copper oxide film is thin) have solder. Experiments conducted by the inventors have shown that if the area where solder is present is less than 85% of the entire terminal area, the printed wiring on the board and the terminal of the electronic component may not be securely soldered when the electronic component is soldered to the board by solder reflow. Therefore, in this embodiment, whether an electronic component has good solder wetting or may have poor solder wetting is determined based on whether the light-colored areas of the terminal (areas where the hue H in the HSV space is a positive value, i.e., areas where the copper oxide film is thinner than a predetermined value) account for 85% or more of the entire terminal surface.

[0021] To evaluate whether the light-colored portion of the terminal occupies 85% or more of the terminal surface, an image analysis program can be used to calculate the area of ​​the region with a hue value of at least HSV in a predetermined HSV space, or, as shown in Figure 4(b), the terminal can be divided into multiple small regions (in the case of Figure 4(b), it is divided into 10 rows and 10 columns, for a total of 100 small regions), and the hue H of each small region can be evaluated, and the solder wettability can be evaluated based on how many regions have a hue value of at least HSV in a predetermined HSV space. In the case of Figure 4(b), there are 76 regions where terminals exist out of the 100 small regions, so if there are 76 x 0.85 ≒ 65 or more small regions with a hue value of at least HSV in a predetermined HSV space, the solder wettability is determined to be good.

[0022] The advantage of dividing the terminal into small regions and evaluating the hue in this way is that it allows us to evaluate where on the terminal there are clusters of dark colored areas (areas with a negative hue H value in the HSV space, i.e., areas with a thick copper oxide film). For example, if the areas with a thick copper oxide film are only present on the periphery of the terminal, it is clear that the solder wettability is good in the center of the terminal. Therefore, even if there are fewer than 85 small regions with a hue H value equal to or greater than the predetermined value in the HSV space, it is likely that there will be no practical problems with reflow soldering in many cases. The advantage of dividing the terminal into small regions and evaluating the hue in this way is that it allows us to evaluate the thickness distribution of the copper oxide film.

[0023] Next, the thickness of the oxide film formed on the lead surface is estimated based on the relationship between the hue value and the oxide film thickness calculated in advance, as shown in Fig. 5 (S104: Film Thickness Estimation). Next, as described above with reference to Fig. 4, it is determined whether the area where the estimated oxide film thickness is 30 nm or less occupies 85% or more of the area (S105: Solder Wettability Evaluation).

[0024] If the area of ​​all outer leads is 85% or more of the area where the oxide film thickness is 30 nm or less (YES for all pins), the solder wettability is determined to be good (S108). If there is even one outer lead where the area is 15% or more of the area where the oxide film thickness is 30 nm or more (NO), the wettability is determined to be poor (S109). Generally, it is considered that the wettability can be determined to be good if 80% of the entire lead is covered with solder, but in this embodiment, the threshold for wettability pass / fail is set to 85% for safety reasons.

[0025] Any imaging device 6 can be used as long as it can determine the hue of the outer lead with a predetermined accuracy. If multiple outer leads can be imaged in one field of view and the hue of each outer lead can be determined with a predetermined accuracy, the image from the imaging device only needs to be captured once, thereby increasing the processing speed. If an optical microscope with a small field of view is used as the imaging device, it is necessary to use a stage that moves the object horizontally and move the outer lead to be imaged into the field of view of the optical microscope to capture images sequentially, which takes time for processing, but is expected to increase the accuracy of the obtained hue. It is desirable to select an imaging device 6 appropriately according to the object to be imaged.

[0026] Although the present invention is described using a QFN (Quad Flat Non-leaded package) electronic component as the object of the invention, the present invention can be applied to any electronic component as long as it is possible to capture an image of the copper terminals on which the solder is placed (typically, an electronic component having a copper lead frame with a cut surface on the outer lead).

[0027] The color change due to copper oxidation in the acquired image of the exposed portion is converted to hue H in a color space such as HSV, and the oxide film thickness is calculated from the relationship between the pre-calculated hue value and the oxide film thickness. The reason for focusing on hue H and conversion is that, while the brightness and saturation of the captured image change due to reflected light and shadows, the hue H of a color space such as HSV does not change depending on the shooting conditions, thereby simplifying the configuration of the imaging device. Color spaces with hue include HSV and HSL color spaces, and both provide a hue value specific to the oxide film thickness. If an imaging device can be used that can maintain constant imaging conditions such as lighting, color information other than hue H (saturation or brightness) can be extracted. In other words, if the relationship between the color information extracted from the image data captured by the imaging device 6 and the thickness of the oxide film formed on the lead surface can be experimentally determined in advance, the oxide film thickness can be estimated more accurately. The extracted color information can be of any type. Below, the HSV color space is used as an example of a color space with hue.

[0028] Figure 5(a) shows a graph of the experimentally determined relationship between hue H in the HSV color space and the thickness of the copper oxide film. Because hue H can vary depending on the manufacturer of the electronic component being evaluated, or even between batches of electronic components from the same manufacturer, it is desirable to determine this relationship in advance. One possible reason for this is that hue values ​​vary depending on the lead frame material. In some cases, it may be preferable to determine this relationship for each manufacturer and batch, and then use different relationships depending on the electronic component being evaluated.

[0029] Techniques for estimating the thickness of oxides formed on metal surfaces by changes in the color of the metal have been published in various papers, etc. For example, evaluation of copper oxide film thickness is described in "Shinichi Nakata, Discoloration of Copper and Copper Alloys, Corrosion Prevention Technology, Vol. 8, No. 7, pp. 291-297, 1959," and film thickness can be evaluated by referring to this description.

[0030] The oxide film thickness was measured using the cathodic reduction method (described in "Masahiro Sakai, Fundamentals of Electrochemical Measurement of Corrosion - Constant Current Method -," Zairyo-to-Kankyo, Vol. 67, No. 1, pp. 17-21, 2018"). Figure 5(b) shows the experimental relationship between the copper oxide film formed on the surface of the outer lead and solder wettability. It can be seen that as the thickness of the copper oxide film increases, the solder wettability deteriorates (decreases). Solder wettability is evaluated based on the relationship between Figures 5(a) and 5(b). It is also possible to summarize the relationships in Figures 5(a) and 5(b) to create a relationship between hue H in the HSV color space and solder wettability, and then evaluate solder wettability based on this relationship.

[0031] If the estimated oxide film thickness (t) satisfies the following, the wettability is judged to be good; if not, the wettability is judged to be poor.

[0032] Oxide film thickness (t) < 30 nm (nanometers) Equation (1) Figure 6 shows the results of an experiment in which a phosphorus-deoxidized copper plate (pure copper plate) was exposed to a high-temperature, high-humidity environment and oxidized, and the solder wettability was evaluated against the oxide film thickness. It was found that solder wettability was good (◯) when the oxide film thickness was 20 nm or 30 nm, but was unclear when the oxide film thickness exceeded 30 nm (△). Therefore, in this example, an oxide film thickness of 30 nm was used as the limit for good solder wettability, and if even one lead did not satisfy Equation (1), the solder wettability of that component was considered poor. It is known that Cu-Fe alloys used in lead frames form thicker copper oxide films than pure copper under the same conditions and for the same time. For Cu-Fe alloys, the threshold for good solder wettability is greater than 30 nm, as shown in Equation (1). Because the lead frame material used may vary depending on the manufacturer, product, and lot, the threshold for good solder wettability for pure copper, as shown in Equation (1), was used as a conservative evaluation. Of course, the threshold may be changed depending on the lead frame material used.

[0033] As an example, Figures 7 to 10 show the case where this is applied to a QFN with 52 leads. Figure 7 is a table summarizing the measurement results (examples) of the oxide film thickness for each lead when wettability is good, and Figure 8 shows a graph of Figure 7. In Figures 7 and 8, the oxide film thickness for all leads is below 30 nm, so the product is considered to have good solder wettability.

[0034] Figure 9 is a table summarizing the measurement results (examples) of the oxide film thickness for each lead when wettability is poor, and Figure 10 is a graph of Figure 9. In Figures 9 and 10, there are multiple leads with oxide film thicknesses exceeding 30 nm, so they are treated as products with poor solder wettability.

[0035] Solder also contains a solvent called flux, which cleans the surface of the components that will be joined to the solder and removes oxide films. Flux penetrates into areas that are not wet with solder, dissolving the surface oxide film and making the solder more easily wet. However, if there are areas with a thick oxide film in certain places, the oxide film may not be able to dissolve within the reflow time, resulting in poor wetting. Therefore, in terms of area, if 85% or more of the area has an oxide film thickness of less than 30 nm, it is considered a pass, but if 15% or more of the area has an oxide film thickness of more than 30 nm, it is considered a fail.

[0036] Figure 11 shows that tin plating adheres to the cut surface of the outer lead during the cutting process in QFN manufacturing. A resin-encapsulated semiconductor (QFN) 12 is completed by cutting the lead frame of a resin-encapsulated semiconductor. The outer lead surface 13 is tin-plated, but the cut end surface exposes the base copper. Long-term storage in a warehouse or other location can cause the exposed outer lead surface to oxidize. Oxidation of the outer lead surface is expected to reduce solder wettability at the end surface, resulting in reduced connection reliability. Furthermore, because the leads are cut from the lead frame side, tin plating can sometimes extend to the cut surface, as shown in Figure 11. The lower surface 15 of the outer lead is relatively susceptible to tin plating, while the upper surface 14 is less susceptible to tin plating. Therefore, in this example, we focus on the upper part of the outer lead, which is less susceptible to tin (i.e., where the amount of tin plating is small). (If the entire outer lead is divided into upper and lower parts, more than 60% of the upper part is measured.) By measuring the upper part, the accuracy of measuring the oxide film thickness can be improved.

[0037] In this example, parts determined to have poor wettability are discarded because they cannot be used in products due to their quality. However, because this is a non-destructive test that does not involve actual soldering, parts determined to have good wettability can be used in product production without being discarded. Furthermore, by plotting oxide film thickness data acquired at multiple times on a graph with the horizontal axis representing storage time and the vertical axis representing oxide film thickness, as shown in Figure 12, the appropriate storage period can be calculated by comparing the future oxide film thickness predicted by extrapolation using a linear law with the film thickness at which solder wettability deteriorates. An example of the calculation method is shown below. If the oxide film thickness after storage for X1 years is Y1 nm, and the oxide film thickness after storage for X2 years is Y2 nm, The equation of this line can be found using the formula y-y2=((Y2-Y1) / (X2-X1))(x-X2). If X1 = 1 year, X2 = 2 years, Y1 = 15 nm, and Y2 = 25 nm, y-25=(25-15) / (2-1)(x-2) y=10x+5 Equation (2) Therefore, by substituting y=30nm, which is the boundary between good and bad solder wettability, into equation (2) and solving the equation, we get x=2.5, which means that the appropriate storage period is determined to be 2.5 years. Equation (2) shows that a 5nm oxide film is formed even after 0 years of storage. This method also takes into account oxidation during the period up to storage. However, the oxide film thickness here is selected to be the largest value among all leads.

[0038] <Appendix 1> In the present invention, an image of the outer lead of an electronic component is acquired, the oxide film thickness is estimated from its color tone, and the wettability is evaluated from a formula for determining the oxide film thickness and solder wettability. Preferably, at a solder joint where copper is exposed in an electronic component, the hue H in a color space such as HSV, which changes due to copper oxidation, is quantified from an image of the exposed part acquired (before soldering), the oxide film thickness is found from the formula for the relationship between the hue value and the oxide film thickness, and the wettability is further determined from the formula for the relationship between the oxide film thickness and wettability.

[0039] HSV is a method of expressing color using three elements: "Hue," "Saturation," and "Value / Brightness." According to this invention, it is possible to determine the quality of wettability non-destructively, without actually soldering.

[0040] Assuming that copper oxidation is proportional to time when the ambient temperature and relative humidity are constant, we can plot oxide film thickness data collected at multiple times on a graph with storage time on the horizontal axis and oxide film thickness on the vertical axis. By comparing the future oxide film thickness predicted by extrapolation using a linear law with the film thickness at which solder wettability decreases, we can calculate the appropriate storage period. It is known that as the copper oxidation film thickens, the protectiveness of the oxide film increases, causing the corrosion rate to transition from a linear law to a parabolic law, resulting in a slower corrosion rate. Because we are focusing on a region with a relatively thin oxide film (region with low oxide film protectiveness), we assumed the corrosion rate follows a linear law. Even if the corrosion rate were to fall into a parabolic region, the storage period estimated using a linear law would be shorter than the storage period estimated using the parabolic law, making this a conservative estimate.

[0041] When manufacturing a QFN (Quad Flat Non-leaded package), the component (electrode portion) is cut from the lead frame side, and tin plating can sometimes wrap around the lead side at the cut surface. The lower surface of the outer lead is relatively susceptible to tin plating, while the upper surface is less susceptible to tin plating. For this reason, in this embodiment of the present invention, the copper color is obtained by focusing on the upper part of the outer lead, which is less affected by tin (the amount of tin plating is small). (If the entire surface is divided into upper and lower parts, more than 60% of the upper part is obtained.) By measuring the upper part, the accuracy of measuring the oxide film thickness can be improved.

[0042] <Appendix 2: Conventional solder wettability evaluation methods> As Appendix 2, a conventional solder wettability evaluation method will be described. Figure 13 is an image diagram of a solder wettability evaluation device. An electronic component 1 is immersed in solder 2, which has been pre-heated and melted, being jetted from a jet nozzle 3 attached to a solder bath 4 of a soldering device. In conventional solder wettability evaluation, the wettability is evaluated by visually checking the state of the solder actually attached to the outer lead of the electronic component 1. The flow of solder wettability evaluation will be described using Figure 14. The soldering device is powered on, and the device is prepared by raising the temperature of the solder melting bath to a predetermined temperature (S201).

[0043] Next, flux (a liquid that promotes soldering) to be applied to the leads of the electronic component 1 is prepared (S202). Next, a randomly selected electronic component 1 to be soldered is prepared (S203). Next, the outer leads of the electronic component 1 to be soldered are immersed in a container containing flux, and the flux is applied (S204). The outer leads of the electronic component 1 are immersed in solder (jet solder) 2 shown in Figure 13 for approximately 3 seconds (called "solder DIP"), and the solder adheres to the outer leads. The outer leads are visually inspected to see if they are covered with solder (S206). The wettability is determined to be good (S207) or poor (S208). Electronic components 1 from the same lot that are determined to have good wettability are deemed usable, but the components used for evaluation are already covered with solder and cannot be used to produce product boards. (If the wettability is determined to be poor, all products from the same lot are deemed defective and are discarded.) [Explanation of symbols]

[0044] 1: Electronic component, 2: Solder jet, 3: Jet nozzle, 4: Solder bath, 5: Target object (electronic component), 6: Imaging device, 7: Image analysis device, 8: Electronic component (QFN) body, 9: Outer lead, 10: Oxide film formed on outer lead, 11: Cutting direction, 12: Electronic component (QFN) body, 13: Outer lead, 14: Area with little tin plating, 15: Area with heavy tin plating.

Claims

1. an image information capturing step of capturing an image of a lead portion of an electronic component, the lead portion being mainly made of copper; a color information extraction step of extracting color information of the lead portion from the image captured in the image information capturing step; a solder wettability evaluation step of evaluating the solder wettability of the lead portion in light of the color information extracted in the color information extraction step and a relationship between the color information and the solder wettability of the lead portion, which is stored in advance. A method for evaluating the solder wettability of an electronic component, comprising:

2. The method for evaluating solder wettability of an electronic component according to claim 1, The color information is color information including a hue H in an HSV color space. A method for evaluating the solder wettability of an electronic component, comprising:

3. The method for evaluating solder wettability of an electronic component according to claim 1, The relationship between the color information and the solder wettability of the lead portion is a relationship derived from at least two of the following relational expressions: a relational expression between color information including a hue H in the HSV color space and a thickness of an oxide film formed on the surface of the lead portion; and a relational expression between the thickness of the oxide film and solder wettability. A method for evaluating the solder wettability of an electronic component, comprising:

4. The method for evaluating solder wettability of an electronic component according to claim 1, The color information extracting step divides the image of the lead portion captured in the image information capturing step into predetermined small regions, and extracts color information for each of the divided small regions; The solder wettability evaluation step evaluates the solder wettability of each small region of the lead portion in light of a relationship between the color information extracted for each small region and the solder wettability of the lead portion, the relationship being stored in advance. A method for evaluating the solder wettability of an electronic component, comprising:

5. 5. The method for evaluating solder wettability of electronic components according to claim 4, the solder wettability evaluation step evaluates the solder wettability as good when a ratio of the solder wettability of each small region of the lead portion that satisfies a predetermined solder wettability is equal to or greater than a predetermined ratio; A method for evaluating the solder wettability of an electronic component, comprising:

6. 5. The method for evaluating solder wettability of electronic components according to claim 4, the solder wettability evaluation step evaluates the solder wettability based on a ratio of the small regions of the lead portion whose solder wettability satisfies a predetermined solder wettability and a distribution state of the small regions whose solder wettability satisfies the predetermined solder wettability; A method for evaluating the solder wettability of an electronic component, comprising:

7. an image information capturing step of capturing at least two images of the same lead portion of the electronic component, the lead portion being made primarily of copper, at different times; a color information extraction step of extracting color information of the lead portion from each of the at least two images captured in the image information capturing step; a solder wettability evaluation step of evaluating the solder wettability of the lead portion at each of the points in time in light of a relationship between the color information extracted in the color information extraction step and the solder wettability of the lead portion, which relationship is stored in advance; and a solder wettability prediction step of predicting a time point at which the solder wettability of the same lead portion will fall below a preset solder wettability based on the evaluation results of the solder wettability at different times evaluated in the solder wettability evaluation step. A method for evaluating the solder wettability of an electronic component, comprising:

8. The method for evaluating solder wettability of an electronic component according to claim 7, a storage limit calculation step of calculating a storage limit of the electronic component based on information on the time point at which the solder wettability predicted in the solder wettability prediction step falls below a predetermined value, A method for evaluating the solder wettability of an electronic component, comprising:

9. 9. The method for evaluating solder wettability of electronic components according to claim 8, The storage period calculation step of calculating a storage period of the electronic component includes: a storage limit for the electronic component is calculated by approximating the relationship between the time point at which the image was captured in the image information capturing step and the solder wettability evaluated in the solder wettability evaluating step using an approximation curve; A method for evaluating the solder wettability of an electronic component, comprising:

10. The method for evaluating solder wettability of an electronic component according to any one of claims 1 to 9, The lead portion to be imaged in the image information imaging step is a lead portion prepared by cutting from a lead frame, and an image of a portion of the lead portion that is not affected by plating applied to the lead frame is captured. A method for evaluating the solder wettability of an electronic component, comprising:

11. an imaging unit that captures an image of a lead portion of an electronic component, the lead portion being made mainly of copper; a color information extraction unit that extracts color information of the lead portion from the image captured by the imaging unit; a solder wettability evaluation unit that stores the color information extracted by the color information extraction unit in advance in a storage unit, and evaluates the solder wettability of the lead portion in light of the relationship between the color information and the solder wettability of the lead portion, The solder wettability evaluation device for electronic components is characterized by:

12. an imaging unit that captures at least two images of the same lead portion of an electronic component, the lead portion being made primarily of copper, at different times; a color information extraction unit that extracts color information of the lead portion from each of the at least two images captured by the imaging unit; a solder wettability evaluation unit that evaluates the solder wettability of the lead portion at each of the aforementioned points in time in light of the relationship between the color information extracted by the color information extraction unit and the solder wettability of the lead portion, the relationship being stored in a storage unit in advance; and a solder wettability prediction unit that predicts the time point at which the solder wettability of the same lead portion will fall below a preset solder wettability based on the evaluation results of the solder wettability at different times by the solder wettability evaluation unit. The solder wettability evaluation device for electronic components is characterized by:

Citation Information

Patent Citations

  • Method and device for evaluating wetting

    JP2001188034A