Semiconductor device and crystal oscillation device

Abstract

To provide a semiconductor device capable of setting the function of a crystal oscillation circuit in accordance with an external signal after being incorporated in a high-order circuit board and device.SOLUTION: The semiconductor device 11 includes an oscillation circuit 17 including a first terminal 13 and a second terminal 15 configured to be connected to a crystal oscillator 13, and a crystal oscillation amplifier 29 connected between the first terminal 13 and the second terminal 15, an output terminal 19 for outputting an oscillation signal from the oscillation circuit 17, a control terminal 21 for receiving an external signal SMOD for designating an operation mode, an interface circuit 23 for receiving the external signal SMOD from the control terminal 21, and a memory circuit 25 configured to store a value related to the external signal SMOD and connected to the interface circuit 12. A control circuit 27 connected to the interface circuit 23 and the memory circuit 25 is provided, the control circuit 27 generates a control signal SCNT, and the control signal SCNT controls the oscillation circuit 17 according to the storage content of the memory circuit 25.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a crystal oscillator device including the semiconductor device. [Background technology]

[0002] Patent Document 1 discloses an IC chip including an oscillator circuit fixed to the bottom of a package. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 5942312 Summary of the Invention [Problem to be solved by the invention]

[0004] Crystal oscillators generate clock signals required for various circuits and devices that handle digital signals. These circuits and devices require different characteristics from crystal oscillators depending on the characteristics of their applications. For example, crystal oscillators are required to provide a temperature-compensated oscillation frequency, a pre-adjusted (F0 adjusted) oscillation frequency, or an oscillation frequency that exhibits characteristics different from the two examples above.

[0005] Crystal oscillator devices that fulfill these functions are available, but once such semiconductor devices are incorporated into higher-level circuits and devices, they cannot be replaced with crystal oscillator devices that perform different functions.

[0006] The present disclosure aims to provide a semiconductor device that can set the function of a crystal oscillation circuit in response to an external signal after being incorporated into a higher-level circuit or device, and a crystal oscillation device that includes this semiconductor device. [Means for solving the problem]

[0007] A semiconductor device according to a first aspect of the present disclosure comprises an oscillator circuit including a crystal oscillator amplifier having a first end and a second end configured to be connected to a crystal oscillator, a plurality of terminals including a control terminal configured to receive one or more external signals specifying one or more operating modes, and an output terminal configured to provide an oscillation signal for the oscillator circuit, an interface circuit connected to the control terminal and configured to receive the external signals, a memory circuit configured to store a value related to the external signal and connected to the interface circuit, and a control circuit connected to the interface circuit and the memory circuit, wherein the control circuit is configured to generate at least one control signal configured to control the oscillator circuit according to the contents stored in the memory circuit.

[0008] A crystal oscillation device according to a second aspect of the present disclosure comprises the semiconductor device described in the first aspect and a mounting substrate that mounts the semiconductor device and includes an interconnect layer that is connected to at least some of the terminals of the semiconductor device. [Effects of the Invention]

[0009] According to the above aspect, it is possible to provide a semiconductor device that can set the function of the crystal oscillation circuit in response to an external signal after being incorporated into a higher-level circuit or device, and a crystal oscillation device that includes this semiconductor device. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram schematically showing a semiconductor device according to this embodiment. [Figure 2] FIG. 2 is a block diagram schematically showing an SPXO (Simple Packaged Crystal Oscillator) type semiconductor device according to this embodiment. [Figure 3] FIG. 3 is a diagram showing the characteristics of the specific SPXO type semiconductor device shown in FIG. 2 in the oscillation frequency stabilization mode and the phase noise reduction mode. [Figure 4]FIG. 4 is a block diagram schematically illustrating an exemplary semiconductor device according to this embodiment. [Figure 5] FIG. 5 is a block diagram schematically illustrating an exemplary semiconductor device according to this embodiment. [Figure 6] FIG. 6 is a block diagram schematically showing the operation of the semiconductor device shown in FIG. 5 in a certain operation mode. [Figure 7] FIG. 7 is a block diagram schematically showing the operation of the semiconductor device shown in FIG. 5 in a certain operation mode. [Figure 8] FIG. 8 is a block diagram schematically showing the operation of the semiconductor device shown in FIG. 5 in a certain operation mode. [Figure 9] FIG. 9 is a block diagram schematically showing the operation of the semiconductor device shown in FIG. 5 in a certain operation mode. [Figure 10] FIG. 10 is a block diagram schematically showing the operation of the semiconductor device shown in FIG. 5 in a certain operation mode. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Identical or similar parts will be designated by the same reference numerals, and redundant description will be omitted.

[0012] FIG. 1 is a block diagram schematically showing a semiconductor device according to this embodiment.

[0013] The semiconductor device 11 includes a plurality of terminals 10, an oscillator circuit 17, an interface circuit 23, a memory circuit 25, and a control circuit 27. The oscillator circuit 17, the interface circuit 23, the memory circuit 25, and the control circuit 27 are monolithically integrated on a semiconductor substrate to form a single integrated circuit.

[0014] The exemplary terminals 10 may specifically include a first terminal 13, a second terminal 15, an output terminal 19, and a control terminal 21. The first terminal 13 and the second terminal 15 are connected to one end and the other end of a crystal oscillator 16, respectively.

[0015] The oscillator circuit 17 may include a crystal oscillator amplifier 29. The crystal oscillator amplifier 29 has a first end 29b and a second end 29c, which are respectively connected between the first terminal 13 and the second terminal 15. The exemplary crystal oscillator amplifier 29 may include a CMOS inverter 29f and a feedback circuit 29g connected between the input and output of the CMOS inverter 29f.

[0016] The control terminal 21 can receive an external signal SMOD as a command signal, and the exemplary external signal SMOD has a value that specifies at least one of one or more operation modes.

[0017] In the exemplary semiconductor device 11, the interface circuit 23, the memory circuit 25, and the control circuit 27 can be communicatively connected to each other.

[0018] The interface circuit 23 is connected to the control terminal 21 and configured to receive the external signal SMOD. The interface circuit 23 can provide a part or all of the external signal SMOD to the memory circuit 25 depending on the content of the external signal SMOD. The interface circuit 23 can also provide a part or all of the content of the external signal SMOD to the control circuit 27 depending on the content of the external signal SMOD.

[0019] The memory circuit 25 is configured to store a value associated with the external signal SMOD. The memory circuit 25 can include at least one memory element 26 that stores a value associated with the external signal SMOD, and exemplary memory elements 26 can be electrically programmable, electrically rewritable, or electrically erasable. The memory elements 26 can include at least one of a volatile memory element, a volatile memory circuit, a nonvolatile memory element, and a nonvolatile memory circuit.

[0020] Exemplary volatile memory elements can include memory elements such as static random access memories (SRAMs), and exemplary volatile memory circuits can include sequential circuits such as latch circuits and flip-flop circuits. Exemplary nonvolatile memory elements can include semiconductor nonvolatile memories such as nonvolatile SRAMs, EEPROMs, and flash EPROMs. Exemplary nonvolatile memory circuits can include memory circuits with nonvolatile memory elements connected to form sequential circuits.

[0021] The memory circuit 25 is connected to the interface circuit 23 and the control circuit 27. Specifically, the memory circuit 25 is configured to store a value related to the external signal SMOD. After receiving the value related to the external signal SMOD from the interface circuit 23, the memory circuit 25 can provide the control circuit 27 with the stored content of the memory circuit 25 or the memory element 26 associated with storing the value related to the external signal SMOD. Alternatively, the memory circuit 25 can provide the control circuit 27 with the stored content of the memory circuit 25 or the memory element 26 associated with storing the value related to the external signal SMOD in response to a request signal from the control circuit 27.

[0022] The semiconductor device 11 may further include at least one voltage regulator 31. The voltage regulator 31 is connected to a first power supply terminal 33, such as a power supply terminal connected to a VDD power supply line, and a second power supply terminal 35, such as a ground terminal connected to a VSS power supply line, and is supplied with power from a power supply device.

[0023] An exemplary voltage regulator 31 can power the oscillator circuit 17. The plurality of terminals 10 can further include a first power supply terminal 33, a second power supply terminal 35, and a regulator terminal 37. The exemplary voltage regulator 31 can also be connected to the regulator terminal 37. The semiconductor device 11 can include other voltage regulators that can power at least a portion of the remaining circuitry.

[0024] The oscillator circuit 17, the interface circuit 23, the memory circuit 25, the control circuit 27, and the voltage regulator 31 are monolithically integrated on a semiconductor substrate to form a single integrated circuit.

[0025] The plurality of terminals 10 may further include a clock terminal 43 configured to receive a clock signal CLK. The interface circuit 23 receives the clock signal CLK from the clock terminal 43 and can operate in synchronization with the clock signal CLK. Similarly, the memory circuit 25 and the control circuit 27 also receive the clock signal CLK and can operate in synchronization with the clock signal CLK.

[0026] The oscillator circuit 17 may further include a buffer circuit 45. The buffer circuit 45 has an input 45b and an output 45c. The input 45b of the buffer circuit 45 is configured to receive the original oscillation signal from the output of the crystal oscillation amplifier 29. The output 45c of the buffer circuit 45 is connected to the output terminal 19, which receives the signal from the output 45c of the buffer circuit 45. The buffer circuit 45 enables the semiconductor device 11 to output at least one of a CMOS level waveform, a clipped sine waveform, and a differential waveform as the oscillation signal.

[0027] The oscillator circuit 17, the interface circuit 23, the memory circuit 25, the control circuit 27, and the buffer circuit 45 are monolithically integrated on a semiconductor substrate to form a single integrated circuit.

[0028] The control circuit 27 is connected to the interface circuit 23 and the memory circuit 25. The control circuit 27 is configured to generate one or more control signals SCNT according to the contents stored in the memory circuit 25. The control signals SCNT are configured to control the oscillation circuit 17 according to the contents stored in the memory circuit 25.

[0029] In the exemplary semiconductor device 11, the operating modes can include at least an oscillation frequency stabilization mode and a phase noise reduction mode.

[0030] In the exemplary control circuit 27, the control signal SCNT is configured to specify a phase noise reduction mode and an oscillation frequency stabilization mode depending on the contents stored in the memory circuit 25.

[0031] The oscillation frequency stability mode is configured to operate the oscillator circuit 17 in response to a compensation signal SCMS, and the exemplary compensation signal SCMS is configured to control the oscillator circuit 17 based on a sensor signal from the sensor. The phase noise reduction mode is configured to operate the oscillator circuit 17 independently of the sensor signal from the sensor.

[0032] The exemplary oscillator circuit 17 may include at least one variable capacitance element, such as a variable capacitance diode 47, and at least one fixed capacitance element, such as a fixed capacitance capacitor 49. The variable capacitance diode 47 may have one end 47b and another end 47c, and the fixed capacitance capacitor 49 may have one end 49b and another end 49c. Each of the first end 29b and the second end 29c of the crystal oscillation amplifier 29 may be connected to at least one of the one end 47b of the variable capacitance diode 47 and the one end 49b of the fixed capacitance capacitor 49. Passive elements such as the variable capacitance diode 47 and the fixed capacitance capacitor 49 may be monolithically integrated with an integrated circuit such as the oscillator circuit 17. The variable capacitance diode 47 and the fixed capacitance capacitor 49 may be disposed in close proximity to the crystal oscillation amplifier 29.

[0033] Specifically, in the oscillation frequency stabilization mode, the fixed capacitor 49 is disconnected from the crystal oscillation amplifier 29. The other end 47c of the variable capacitance diode 47 is configured to receive the compensation signal SCMS, and the capacitance of the variable capacitance diode 47 is adjusted to reduce the frequency fluctuation of the oscillation circuit 17 due to the ambient temperature.

[0034] The compensation signal SCMS can be configured to control the oscillator circuit 17 based on the sensor signal from the sensor 55, and the oscillation frequency stability mode is configured to operate the oscillator circuit 17 in response to the compensation signal SCMS.

[0035] Specifically, in the phase noise reduction mode, fixed capacitor 49 is connected to crystal oscillation amplifier 29 to enable stable oscillation in oscillator circuit 17. Meanwhile, compensation signal SCMS is applied to the other end 47c of variable capacitance diode 47 so that variable capacitance diode 47 exhibits a fixed capacitance, e.g., a minimum capacitance.

[0036] Accordingly, the phase noise reduction mode is configured to operate the oscillator circuit 17 stably using the fixed capacitance of the fixed capacitor 49 and the variable capacitance diode 47 regardless of the sensor signal from the sensor 55 .

[0037] The operation mode of the semiconductor device 11 can be set in accordance with an external signal SMOD received at a control terminal 21.

[0038] An exemplary control circuit 27 may include a mode setting circuit 51 and a temperature compensation circuit 53. The oscillator circuit 17, the interface circuit 23, the memory circuit 25, the control circuit 27, the voltage regulator 31, the buffer circuit 45, the mode setting circuit 51, and the temperature compensation circuit 53 are monolithically integrated on a semiconductor substrate to form a single integrated circuit.

[0039] The mode setting circuit 51 is connected to the interface circuit 23 and the memory circuit 25. The mode setting circuit 51 is configured to generate one or more control signals SCNT according to the contents stored in the memory circuit 25. The mode setting circuit 51 is configured to control the oscillation circuit 17 according to the contents stored in the memory circuit 25 using the control signals SCNT.

[0040] The operation mode and activation / deactivation of the temperature compensation circuit 53 can be set according to the contents stored in the memory circuit 25 .

[0041] Specifically, when the temperature compensation circuit 53 is activated in response to a control signal SCNT such as an activation signal, the temperature compensation circuit 53 (more specifically, the temperature compensation amplifier 57 in FIG. 4) can be configured to generate a compensation signal SCMS to perform temperature compensation for the oscillation frequency. The temperature compensation circuit 53 adjusts the capacitance of the oscillation circuit 17, specifically the variable capacitance diode 47, to reduce fluctuations in the frequency of the oscillation circuit 17 due to the ambient temperature.

[0042] Specifically, when the temperature compensation circuit 53 is inactive, the control circuit 27, e.g., the temperature compensation circuit 53, does not operate to perform temperature compensation of the oscillation frequency. The exemplary temperature compensation circuit 53 is configured to set a specific value for the compensation signal SCMS rather than performing temperature compensation of the oscillation frequency. The compensation signal SCMS from the inactive temperature compensation circuit 53 sets the capacitance of the variable capacitance diode 47 to a fixed value, e.g., its minimum value. As a result, the oscillation characteristics of the oscillation circuit 17 are determined by the capacitance of the fixed capacitor 49 and the fixed capacitance of the variable capacitance diode 47, and the control circuit 27, e.g., the temperature compensation circuit 53, can reduce the phase jitter of the oscillation frequency.

[0043] The exemplary control circuit 27 may further include a sensor 55. The oscillator circuit 17, the interface circuit 23, the memory circuit 25, the control circuit 27, the voltage regulator 31, the buffer circuit 45, the mode setting circuit 51, the temperature compensation circuit 53, and the sensor 55 are monolithically integrated on a semiconductor substrate to form a single integrated circuit. The sensor 55, specifically a temperature sensor, is connected to the temperature compensation circuit 53. The exemplary temperature compensation circuit 53 operates in response to a sensor signal from a temperature sensor configured to sense an environmental temperature.

[0044] The exemplary semiconductor device 11 may further include a package 41 .

[0045] The package 41 is configured to accommodate the semiconductor device 11, specifically, the oscillator circuit 17, the interface circuit 23, the memory circuit 25, the control circuit 27, and the voltage regulator 31.

[0046] The terminals 10, specifically the first terminal 13, the second terminal 15, the output terminal 19, the control terminal 21, and the clock terminal 43, are configured in the package 41 as external terminals that enable the semiconductor integrated circuit in the semiconductor device 11 to be connected to the outside of the semiconductor device 11. Similarly, the first power supply terminal 33, the second power supply terminal 35, and the regulator terminal 37 can also be configured in the package 41 as external terminals.

[0047] An exemplary package 41 may include a lead frame and molding compound, or may include a ceramic housing.

[0048] 1, the crystal oscillator device 12 may include a crystal oscillator 16 in addition to the semiconductor device 11. The crystal oscillator 16 is connected between the first terminal 13 and the second terminal 15 of the semiconductor device 11.

[0049] Furthermore, the crystal oscillator device 12 may include a mounting substrate 14 in addition to the semiconductor device 11. The mounting substrate 14 may mount the semiconductor device 11 and the crystal oscillator 16 and may include an interconnect layer 18. The interconnect layer 18 is connected to at least one of the terminals 10 of the semiconductor device 11, for example, a control terminal 21. The operating mode of the semiconductor device 11 can be set based on an external signal SMOD received at the control terminal 21 from the interconnect layer 18 of the mounting substrate 14. An exemplary interconnect layer 18 may include a conductive layer (for example, a metal layer) provided on the mounting substrate 14.

[0050] FIG. 2 is a block diagram schematically showing a specific semiconductor device 11 according to this embodiment.

[0051] A specific example of the semiconductor device 11 is an SPXO type. The SPXO type semiconductor device 11 is provided with an oscillation frequency stabilization mode and a phase noise reduction mode in accordance with the contents stored in the memory circuit 25. In the semiconductor device 11, switching of the operation mode, specifically, switching between the oscillation frequency stabilization mode and the phase noise reduction mode, can be performed on-board.

[0052] 1, the interface circuit 23 can receive a first external signal as the external signal SMOD from the control terminal 21. The interface circuit 23 provides the first external signal to the memory circuit 25, which stores the value of the first external signal and / or a value associated with the first external signal.

[0053] The exemplary control circuit 27 is configured to read a value (e.g., stored content) associated with the first external signal from the memory circuit 25, and generate a first control signal SCNT1 as a control signal SCNT related to the operating mode based on the stored content.

[0054] The mode setting circuit 51 of the control circuit 27 is configured to generate the first control signal SCNT1 as the control signal SCNT. The first control signal SCNT1 switches the oscillation circuit 17 and the temperature compensation circuit 53 between an oscillation frequency stabilization mode and a phase noise reduction mode.

[0055] In the exemplary oscillator circuit 17, one end 47b of the variable capacitance diode 47 (first variable capacitance diode) and one end 49b of the fixed capacitance capacitor 49 (first capacitor) are connected to the first end 29b and the second end 29c of the crystal oscillation amplifier 29, respectively.

[0056] Specifically, in the oscillation frequency stabilization mode, the temperature compensation circuit 53 is activated in response to a first control signal SCNT1 from the mode setting circuit 51. The temperature compensation circuit 53 generates a first compensation signal SCMS1 in response to a sensor signal from the sensor 55 so as to reduce frequency fluctuations (frequency fluctuations of the oscillation circuit 17) due to the ambient temperature. The first compensation signal SCMS1 is provided to the other end 47c of the variable capacitance diode 47 and is configured to control the variable capacitance diode 47 (first variable capacitance diode) so as to reduce fluctuations in the oscillation frequency of the oscillation circuit 17 due to the ambient temperature.

[0057] Specifically, the capacitance of variable capacitance diode 47 is adjusted in accordance with first compensation signal SCMS1. Meanwhile, fixed capacitor 49 is disconnected from crystal oscillation amplifier 29 in response to first control signal SCNT1, for example, by using switch 50b connected to the other end 49c.

[0058] Specifically, in the phase noise reduction mode, the temperature compensation circuit 53 is deactivated in response to a first control signal SCNT1 from the mode setting circuit 51. The inactivated temperature compensation circuit 53 generates a first compensation signal SCMS1 to set a fixed capacitance in the variable capacitance diode 47 regardless of the sensor signal from the sensor 55, and the first compensation signal SCMS1 is provided to the other end 47c of the variable capacitance diode 47. The mode setting circuit 51 connects the fixed capacitance capacitor 49 (first capacitor) to the crystal oscillation amplifier 29 using a switch 50b responsive to the first control signal SCNT1. This connection enables stable oscillation of the oscillation circuit 17.

[0059] Specifically, the fixed capacitor 49 can be configured to be able to switch between connection and disconnection with respect to the crystal oscillation amplifier 29 in response to a first control signal SCNT1.

[0060] FIG. 3 is a diagram showing the characteristics of the specific SPXO type semiconductor device shown in FIG. 2 in the oscillation frequency stabilization mode and the phase noise reduction mode.

[0061] Referring to part (a) of Figure 3, the phase noise characteristics of the stable oscillation frequency mode (MD1) and the reduced phase noise mode (MD2) are shown. The horizontal axis represents the offset frequency, and the vertical axis represents the phase noise. The phase noise characteristics of the reduced phase noise mode are superior to those of the stable oscillation frequency mode. In addition, the oscillation margin is increased compared to the stable oscillation frequency mode (MD1), enabling operation at higher frequencies (high frequencies).

[0062] Referring to part (b) of Figure 3, the frequency stability characteristics of the oscillation frequency stabilization mode (MD1) and the phase noise reduction mode (MD2) are shown. The horizontal axis represents the ambient temperature (Ta), and the vertical axis represents the frequency fluctuation rate (Δf / f). The frequency fluctuation rate of the oscillation frequency stabilization mode is superior to that of the phase noise reduction mode.

[0063] FIG. 4 is a block diagram schematically illustrating an exemplary semiconductor device according to this embodiment.

[0064] The specific semiconductor device 11 has several operation modes in addition to the oscillation frequency stabilization mode and phase noise reduction mode described in the SPXO (Simple Packaged Crystal Oscillator) type, including a VCXO (Voltage Controlled Crystal Oscillator) mode, an analog TCXO (Analog Temperature Compensated Crystal Oscillator) mode, and a digital TCXO (Digital Temperature Compensated Crystal Oscillator) mode.

[0065] In the VCXO operation mode, the frequency of the oscillator circuit 17 is controlled by an external voltage signal.

[0066] In the digital TCXO operating mode, the oscillator circuit 17 is digitally controlled in stages to maintain a constant oscillation frequency regardless of changes in the ambient temperature, based on temperature data from the temperature sensor. In contrast, in the analog TCXO operating mode, the oscillator circuit 17 is analog-controlled in stages to maintain a constant oscillation frequency regardless of changes in the ambient temperature, based on temperature data from the temperature sensor.

[0067] The exemplary semiconductor device 11 monolithically integrates an oscillator circuit 17 and the following capacitors (46, 47, 48, 49).

[0068] A variable capacitance element such as a variable capacitance diode 46 is used in the VCXO mode. A variable capacitance diode 47 is used in the oscillation frequency stabilization mode and the analog TCXO mode. A fixed capacitance element such as a fixed capacitance capacitor 48 is used in the digital TCXO mode (which may include one or more capacitor elements). A fixed capacitance capacitor 49 is used in the phase noise reduction mode.

[0069] The mode setting circuit 51 generates a first control signal SCNT1 in response to the external signal SMOD. The first control signal SCNT1 enables the fixed capacitor 49 to be connected to or disconnected from the crystal oscillation amplifier 29.

[0070] Furthermore, the exemplary mode setting circuit 51 can generate further control signals, such as a second control signal SCNT2 and a third control signal SCNT3, in addition to the first control signal SCNT1 in response to various external signals SMOD. The exemplary second control signal SCNT2 is used to specify a digital TCXO mode, thereby setting digital and analog operation in the temperature compensation circuit 53. The second control signal SCNT2 allows the fixed capacitor 48 to be connected to or disconnected from the crystal oscillation amplifier 29. The exemplary third control signal SCNT3 is used to specify a VCXO mode.

[0071] In addition to the temperature compensation circuit 53 and the sensor 55, the control circuit 27 includes a temperature compensation amplifier 57. In analog operation, the temperature compensation circuit 53 operates in response to a signal from the sensor 55 to control the temperature compensation amplifier 57. The temperature compensation amplifier 57 operates in response to the signal from the sensor 55 and the analog temperature compensation circuit 53 to generate a first compensation signal SCMS1. The first compensation signal SCMS1 is configured to enable analog control of the varactor diode 47. Specifically, the temperature compensation amplifier 57 is connected to the varactor diode 47 so that the capacitance of the varactor diode 47 can be continuously adjusted using the first compensation signal SCMS1.

[0072] In digital operation, the temperature compensation circuit 53 operates in response to a signal from the sensor 55 to generate the second compensation signal SCMS2. The second compensation signal SCMS2 is configured to enable digital control of the fixed capacitor 48. Specifically, the temperature compensation circuit 53 is connected to the fixed capacitor 48 so that the capacitance of the fixed capacitor 48 can be controlled using the second compensation signal SCMS2.

[0073] The semiconductor device 11 (control circuit 27) may also include a voltage-controlled amplifier 59. The voltage-controlled amplifier 59 is connected to one of the terminals 10, for example, the clock terminal 43, and receives a voltage signal SVC provided from outside the semiconductor device 11. The voltage signal SVC is converted into a third compensation signal SCMS3 by the voltage-controlled amplifier 59. The voltage-controlled amplifier 59 is connected to the variable capacitance diode 46, and can control the capacitance of the variable capacitance diode 46 using the third compensation signal SCMS3.

[0074] Continuing with the description of exemplary mode switching, the mode setting circuit 51 generates a first control signal SCNT1, a second control signal SCNT2, and a third control signal SCNT3.

[0075] (Phase noise reduction mode) The first control signal SCNT1 indicates that the fixed capacitor 49 is connected to the crystal oscillation amplifier 29. The second control signal SCNT2 does not indicate the digital TCXO mode. The third control signal SCNT3 does not indicate the VCXO mode. At this time, the oscillator circuit 17 is set to the phase noise reduction mode.

[0076] The mode setting circuit 51 connects the fixed capacitor 49 to the crystal oscillation amplifier 29 using a switch 50b that receives a first control signal SCNT1. The first control signal SCNT1 deactivates the temperature compensation circuit 53 and the temperature compensation amplifier 57. The inactive temperature compensation amplifier 57 is connected to the variable capacitance diode 47 and operates to set the variable capacitance diode 47 to a fixed capacitance, for example, the minimum capacitance.

[0077] The mode setting circuit 51 disconnects the fixed capacitor 48 from the crystal oscillation amplifier 29 using the switch 50c that responds to the second control signal SCNT2.

[0078] The third control signal SCNT3 deactivates the voltage-controlled amplifier 59. The inactive voltage-controlled amplifier 59 is connected to the variable capacitance diode 46 and operates to set the variable capacitance diode 46 to a fixed capacitance, for example, a minimum capacitance.

[0079] In the phase noise reduction mode, the oscillation frequency of the crystal oscillation amplifier 29 is controlled in accordance with the first control signal SCNT1 and the fixed capacitor 49.

[0080] (oscillation frequency stabilization mode) The first control signal SCNT1 indicates that the fixed capacitor 49 is to be disconnected from the crystal oscillation amplifier 29. The second control signal SCNT2 does not indicate the digital TCXO mode. The third control signal SCNT3 does not indicate the VCXO mode. At this time, the oscillator circuit 17 is set to the oscillation frequency stabilization mode.

[0081] The mode setting circuit 51 disconnects the fixed capacitor 48 from the crystal oscillation amplifier 29 using the switch 50b that responds to the first control signal SCNT1.

[0082] The first control signal SCNT1 also activates the temperature compensation circuit 53 and the temperature compensation amplifier 57. In the active temperature compensation circuit 53 and the active temperature compensation amplifier 57, the temperature compensation circuit 53 controls the temperature compensation amplifier 57 in response to a sensor signal from the sensor 55. The temperature compensation amplifier 57 generates a first compensation signal SCMS1 as an analog signal to control the variable capacitance diode 47, and the first compensation signal SCMS1 is provided to the variable capacitance diode 47 (the other end 47c). The first compensation signal SCMS1 continuously adjusts the capacitance of the variable capacitance diode 47.

[0083] Since the second control signal SCNT2 does not indicate the digital TCXO mode, the mode setting circuit 51 disconnects the fixed capacitor 48 from the crystal oscillation amplifier 29 using the switch 50c responsive to the second control signal SCNT2.

[0084] Also, because the second control signal SCNT2 does not indicate a digital TCXO mode, the second control signal SCNT2 sets the active temperature compensation circuit 53 to analog operation.

[0085] The third control signal SCNT3 deactivates the voltage-controlled amplifier 59. The inactive voltage-controlled amplifier 59 operates to generate a third compensation signal SCMS3, which is configured to set the variable capacitance diode 47 to a fixed capacitance, e.g., a minimum capacitance.

[0086] In the oscillation frequency stabilization mode, the oscillation frequency of the crystal oscillation amplifier 29 is controlled in accordance with the first compensation signal SCMS1 and the variable capacitance diode 47.

[0087] (Digital TCXO mode) The first control signal SCNT1 indicates that the fixed capacitor 49 is disconnected from the crystal oscillation amplifier 29. The second control signal SCNT2 indicates the digital TCXO mode. The third control signal SCNT3 does not indicate the VCXO mode. At this time, the oscillator circuit 17 is set to the digital TCXO mode.

[0088] The mode setting circuit 51 disconnects the fixed capacitor 49 from the crystal oscillation amplifier 29 using the switch 50b that responds to the first control signal SCNT1.

[0089] When the second control signal SCNT2 indicates the digital TCXO mode, the mode setting circuit 51 connects the fixed capacitor 48 to the crystal oscillation amplifier 29 using the switch 50c that responds to the second control signal SCNT2.

[0090] The temperature compensation circuit 53 is set to be active in accordance with the first control signal SCNT1 or the second control signal SCNT2, while the temperature compensation amplifier 57 is set to be inactive in accordance with the second control signal SCNT2. The active temperature compensation circuit 53 is set to digital operation in accordance with the second control signal SCNT2.

[0091] In digital TCXO mode, the inactive temperature compensation amplifier 57 operates to generate a first compensation signal SCMS1, which is configured to set the variable capacitance diode 47 to a fixed capacitance, e.g., a minimum capacitance.

[0092] Also in digital TCXO mode, the active temperature compensation circuit 53 operates digitally to adjust the capacitance of the fixed capacitor 48. The temperature compensation circuit 53 operates to generate a second compensation signal SCMS2, which is configured to adjust the capacitance of the fixed capacitor 48 in steps.

[0093] Specifically, the temperature compensation circuit 53 performs A / D conversion on the signal from the sensor 55 to generate a digital signal, and generates a second compensation signal SCMS2 as a digital value indicating the capacitance of the fixed capacitor 48 and the number of capacitor elements (e.g., unit capacitors) in accordance with this digital value. This generation can be performed, for example, using compensation values ​​from the memory circuit 25. An example compensation value can be configured as a temperature correction table value that stores values ​​specifying capacitor elements that should be connected to and / or disconnected from the crystal oscillation amplifier 29.

[0094] The third control signal SCNT3 deactivates the voltage-controlled amplifier 59. The inactive voltage-controlled amplifier 59 operates to generate a third compensation signal SCMS3, which is configured to set the variable capacitance diode 47 to a fixed capacitance, e.g., a minimum capacitance.

[0095] In the digital TCXO mode, the oscillation frequency of the crystal oscillation amplifier 29 is controlled in accordance with the second compensation signal SCMS2 and the fixed capacitor 48.

[0096] (VCXO mode) The first control signal SCNT1 indicates that the fixed capacitor 49 is disconnected from the crystal oscillation amplifier 29. The second control signal SCNT2 does not indicate the digital TCXO mode. The third control signal SCNT3 indicates the VCXO mode. At this time, the oscillator circuit 17 is set to the VCXO mode.

[0097] The mode setting circuit 51 disconnects the fixed capacitor 49 from the crystal oscillation amplifier 29 using the switch 50b that responds to the first control signal SCNT1.

[0098] Since the second control signal SCNT2 does not indicate the digital TCXO mode, the mode setting circuit 51 disconnects the fixed capacitor 48 from the crystal oscillation amplifier 29 using the switch 50c responsive to the second control signal SCNT2.

[0099] Additionally, the third control signal SCNT3 deactivates the temperature compensation circuit 53 and the temperature compensation amplifier 57, regardless of the first control signal SCNT1. The inactive temperature compensation amplifier 57 operates to generate the first compensation signal SCMS1, which is configured to set the variable capacitance diode 47 to a fixed capacitance, for example, a minimum capacitance.

[0100] The third control signal SCNT3 activates the voltage-controlled amplifier 59. The active voltage-controlled amplifier 59 operates to generate a third compensation signal SCMS3, which controls the capacitance of the variable capacitance diode 46, and the voltage-controlled amplifier 59 is connected to one end of the variable capacitance diode 46.

[0101] In this embodiment, the clock terminal 43 can also be used as an input terminal for receiving an external voltage signal SVC during the period when the input of the external signal SMOD from the control terminal 21 is not being accepted.

[0102] In the VCXO mode, the oscillation frequency of the crystal oscillation amplifier 29 is controlled in accordance with the third compensation signal SCMS3 and the variable capacitance diode 46.

[0103] (Analog TCXO mode) The first control signal SCNT1 indicates that part or all of the fixed capacitor 49 is disconnected from the crystal oscillation amplifier 29. The second control signal SCNT2 does not indicate the digital TCXO mode. The third control signal SCNT3 does not indicate the VCXO mode. At this time, the oscillator circuit 17 can be set to the analog TCXO mode. An additional mode signal and an additional control signal can be provided to set the analog TCXO mode.

[0104] The mode setting circuit 51 uses the switch 50b in response to the first control signal SCNT1 to disconnect the fixed capacitor 49 from the crystal oscillation amplifier 29. The first control signal SCNT1 also activates the temperature compensation circuit 53 and the temperature compensation amplifier 57.

[0105] Because the second control signal SCNT2 does not indicate the digital TCXO mode, the mode setting circuit 51 uses the switch 50c responsive to the second control signal SCNT2 to disconnect the fixed capacitor 48 from the crystal oscillation amplifier 29. The second control signal SCNT2 also sets the temperature compensation circuit 53 to analog operation.

[0106] Temperature compensation circuit 53 controls temperature compensation amplifier 57 in response to a sensor signal from sensor 55. Temperature compensation amplifier 57 generates a first compensation signal SCMS1 as an analog signal to control variable capacitance diode 47, and provides first compensation signal SCMS1 to variable capacitance diode 47 (other end 47c). First compensation signal SCMS1 controls the oscillation frequency of crystal oscillation amplifier 29 so as to reduce the temperature dependency.

[0107] The mode setting circuit 51 inactivates the voltage-controlled amplifier 59 in response to the third control signal SCNT3. The inactive voltage-controlled amplifier 59 operates to generate a third compensation signal SCMS3, and the third compensation signal SCMS3 is configured to set the variable capacitance diode 47 to a fixed capacitance, for example, a minimum capacitance.

[0108] In the analog TCXO mode, the oscillation frequency of the crystal oscillation amplifier 29 is continuously controlled according to the first compensation signal SCMS1 and the variable capacitance diode 47.

[0109] As can be seen from the above description, switching among the oscillation frequency stabilization mode, phase noise reduction mode, digital TCXO mode, VCXO mode, and analog TCXO mode can be performed on-board.

[0110] The use of fixed capacitor 49, fixed capacitor 48, varactor diode 47, and varactor diode 46 will now be described.

[0111] The fixed capacitor 49 is selectively connected to the crystal oscillation amplifier 29 when controlled in the phase noise reduction mode, and is selectively disconnected from the crystal oscillation amplifier 29 when controlled in the other modes.

[0112] The fixed capacitor 48 is selectively connected to the crystal oscillator amplifier 29 in the digital TCXO control mode and selectively disconnected from the crystal oscillator amplifier 29 in other control modes. In the digital TCXO mode control, an exemplary fixed capacitor 48 can be connected between each of the first terminal 29b and the second terminal 29c of the crystal oscillator amplifier 29 and the digitally operated temperature compensation circuit 53. The capacitance of the fixed capacitor 48 is discretely adjusted in accordance with the second compensation signal SCMS2 to control the oscillation frequency of the crystal oscillator amplifier 29.

[0113] The variable capacitance diode 47 can be connected between each of the first terminal 29b and the second terminal 29c of the crystal oscillation amplifier 29 and the temperature compensation amplifier 57. In the oscillation frequency stabilization mode and the analog TCXO mode, the capacitance of the variable capacitance diode 47 is adjusted according to the first compensation signal SCMS1 to control the oscillation frequency of the crystal oscillation amplifier 29. In other modes, the capacitance of the variable capacitance diode 47 is set to a fixed capacitance according to the first compensation signal SCMS1 so as not to disturb the adjustment of the oscillation frequency by the variable capacitance diode 46.

[0114] In VCXO mode control, the variable capacitance diode 46 can be connected between each of the first and second terminals 29b and 29c of the crystal oscillation amplifier 29 and the voltage-controlled amplifier 59. In VCXO mode control, the capacitance of the variable capacitance diode 46 is adjusted in accordance with the third compensation signal SCMS3 to control the oscillation frequency of the crystal oscillation amplifier 29. In other modes, the capacitance of the variable capacitance diode 46 is set to a fixed capacitance in accordance with the third compensation signal SCMS3 so as not to disturb the adjustment of the oscillation frequency by the variable capacitance diode 46.

[0115] FIG. 5 is a block diagram schematically illustrating an exemplary semiconductor device according to this embodiment.

[0116] The exemplary semiconductor device 11 of FIG. 5 monolithically integrates fewer capacitors (47, 49) and oscillator circuits 17 than the exemplary semiconductor device 11 of FIG. 4 monolithically integrates capacitors (46, 47, 48, 49) and oscillator circuits. Some or all of the variable capacitance diodes 47 can be used in both the oscillation frequency stabilization mode, the analog TCXO mode, and the VCXO mode. Some or all of the fixed capacitance capacitors 49 can be used in both the phase noise reduction mode and the digital TCXO mode. Either one of these dual uses can be implemented in the exemplary semiconductor device 11. In the following description, both of these dual uses will be implemented in the exemplary semiconductor device 11.

[0117] 5 has the following operation modes: a phase noise reduction mode, an oscillation frequency stabilization mode, a digital TCXO mode, a VCXO mode, and an analog TCXO mode, similar to the semiconductor device 11 of FIG. 4. Switching between these operation modes can be performed on-board.

[0118] In the exemplary semiconductor device 11 of FIG. 5, the oscillator circuit 17, the mode setting circuit 51, the temperature compensation circuit 53, the temperature compensation amplifier 57, and the voltage control amplifier 59 can operate in their respective modes as described with reference to FIG. 4.

[0119] Five exemplary switches SW1 to SW5 are provided to serve both as the variable capacitance diode 47 and the fixed capacitance capacitor 49. These switches SW1 to SW5 can be controlled by switching signals from the control circuit 27. The exemplary semiconductor device 11 may include additional switches or fewer switches.

[0120] The mode setting circuit 51 can generate a plurality of control signals, for example, a first control signal SCNT1, a second control signal SCNT2, and a third control signal SCNT3, in response to an external signal SMOD.

[0121] 6, 7, 8, 9 and 10 are block diagrams each schematically showing the operation of the semiconductor device shown in FIG. 5 in each operation mode.

[0122] Referring to FIG. 6, the connections in phase noise reduction mode are shown.

[0123] (Phase noise reduction mode) In the oscillator circuit 17 set to the phase noise reduction mode, the first control signal SCNT 1 indicates that the fixed capacitor 49 is to be connected to the crystal oscillation amplifier 29 .

[0124] Some or all of the fixed capacitors 49 are used in both the digital TCXO mode and the phase noise reduction mode. In the phase noise reduction mode, the fixed capacitors 49 required for operation in the phase noise reduction mode are connected to the crystal oscillation amplifier 29 in response to a first control signal SCNT1. In addition, in the phase noise reduction mode, the fixed capacitors 49 not required for this operation, if any, are disconnected from the crystal oscillation amplifier 29 in response to a second control signal SCNT2. Thus, the fixed capacitors 49 connected to the crystal oscillation amplifier 29 can contribute to the oscillation of the crystal oscillation amplifier 29.

[0125] In the phase noise reduction mode, the temperature compensation circuit 53 and the temperature compensation amplifier 57 are set to an inactive (OFF) state in response to a first control signal SCNT1. The inactive temperature compensation amplifier 57 operates to generate a first compensation signal SCMS1, which is configured to set the variable capacitance diode 47 to a fixed capacitance, for example, a minimum capacitance. The switches SW3 and SW4 are conductive (ON) to apply the first compensation signal SCMS1 from the temperature compensation amplifier 57 to the variable capacitance diode 47.

[0126] The second control signal SCNT2 does not indicate the digital TCXO mode. Accordingly, the temperature compensation circuit 53 is not set to digital operation and does not generate the second compensation signal SCMS2. Accordingly, the switches SW1 and SW2 are non-conductive (OFF). With the switches SW1 and SW2 non-conductive, the inactive temperature compensation circuit 53 is disconnected from the fixed capacitor 49.

[0127] The third control signal SCNT3 does not indicate the VCXO mode. Therefore, the voltage-controlled amplifier 59 is set to inactive (OFF), and the variable capacitance diode 47 is disconnected from control by the third compensation signal SCMS3 of the voltage-controlled amplifier 59. Accordingly, the switch SW5 can be non-conductive (OFF). The non-conductive switch SW5 prevents the third compensation signal SCMS3 from the voltage-controlled amplifier 59 from competing with the first compensation signal SCMS1.

[0128] Referring to FIG. 7, the connections in the oscillation frequency stabilization mode are shown.

[0129] (oscillation frequency stabilization mode) In the oscillator circuit 17 set to the oscillation frequency stabilization mode, the first control signal SCNT1 indicates that the fixed capacitors 49 should be disconnected from the crystal oscillation amplifier 29, while the second control signal SCNT2 does not indicate the digital TCXO mode. Accordingly, all of the fixed capacitors 49 are disconnected from the crystal oscillation amplifier 29 in accordance with the first control signal SCNT1 and / or the second control signal SCNT2.

[0130] The first control signal SCNT1 activates (ON) the temperature compensation circuit 53 and the temperature compensation amplifier 57. The second control signal SCNT2 activates (ON) the temperature compensation circuit 53 for analog operation. The active temperature compensation amplifier 57 operates to generate a first compensation signal SCMS1 in response to the sensor signal from the sensor 55 and control of the active temperature compensation circuit 53. The first compensation signal SCMS1 is configured to continuously control the capacitance of the variable capacitance diode 47. The switches SW3 and SW4 are conductive (ON). With the switches SW3 and SW4 conductive, the first compensation signal SCMS1 can be provided to the variable capacitance diode 47 (the other end 47c).

[0131] Since the second control signal SCNT2 does not indicate the digital TCXO mode, the switches SW1 and SW2 are turned off, and the temperature compensation circuit 53, which operates in analog mode, is disconnected from the fixed capacitor 49.

[0132] The third control signal SCNT3 does not indicate the VCXO mode. Therefore, the voltage-controlled amplifier 59 is set to inactive (OFF), and the switch SW5 can be non-conductive (OFF). Accordingly, the variable capacitance diode 47 is isolated from control by the third compensation signal SCMS3 of the voltage-controlled amplifier 59. The non-conductive switch SW5 prevents the first compensation signal SCMS1 from competing with the third compensation signal SCMS3 from the voltage-controlled amplifier 59.

[0133] Referring to FIG. 8, the connections in digital TCXO mode are shown.

[0134] (Digital TCXO mode) The first control signal SCNT1 indicates that the fixed capacitor 49 should be disconnected from the crystal oscillation amplifier 29. The second control signal SCNT2 indicates the digital TCXO mode. As already explained, the fixed capacitor 49 is used in both the digital TCXO mode and the phase noise reduction mode. In the digital TCXO mode, the fixed capacitor 49 required for operation in the digital TCXO mode is connected to the crystal oscillation amplifier 29 in response to the second control signal SCNT2. In addition, in the digital TCXO mode, the fixed capacitor 49 not required for this operation, if any, is disconnected from the crystal oscillation amplifier 29 in response to the first control signal SCNT1. Accordingly, the fixed capacitor 49 connected to the crystal oscillation amplifier 29 can contribute to the oscillation of the crystal oscillation amplifier 29.

[0135] In the digital TCXO mode, the temperature compensation circuit 53 is set to be active (ON) in response to the first control signal SCNT1 or the second control signal SCNT2. The temperature compensation circuit 53 is set to digital operation in response to the second control signal SCNT2, while the temperature compensation amplifier 57 is set to be inactive (OFF) in response to the second control signal SCNT2.

[0136] Switches SW1 and SW2 are conductive (ON) to allow temperature compensation circuit 53 to digitally control fixed capacitor 49. Accordingly, second compensation signal SCMS2 controls the capacitance of fixed capacitor 49 in stages based on the digital value of second compensation signal SCMS2. Inactive temperature compensation amplifier 57 is configured to generate first compensation signal SCMS1, which is configured to set variable capacitance diode 47 to a fixed capacitance, e.g., minimum capacitance. Switches SW3 and SW4 are conductive (ON) to apply first compensation signal SCMS1 to variable capacitance diode 47.

[0137] The third control signal SCNT3 does not indicate the VCXO mode. Therefore, the voltage-controlled amplifier 59 is set to inactive (OFF), and the switch SW5 can be non-conductive (OFF). Accordingly, the variable capacitance diode 47 is isolated from control by the third compensation signal SCMS3 of the voltage-controlled amplifier 59. The non-conductive switch SW5 prevents the third compensation signal SCMS3 from the voltage-controlled amplifier 59 from competing with the first compensation signal SCMS1.

[0138] Referring to FIG. 9, the connections in VCXO mode are shown.

[0139] (VCXO mode) The third control signal SCNT3 indicates the VCXO mode. Therefore, the voltage-controlled amplifier 59 is set to be active (ON), and the switch SW5 is turned on. Accordingly, the third compensation signal SCMS3 from the voltage-controlled amplifier 59 is provided to the variable capacitance diode 47.

[0140] In the oscillator circuit 17 set to the VCXO mode, the fixed capacitor 49 is disconnected from the crystal oscillation amplifier 29 in response to the first control signal SCNT1 and the second control signal SCNT2.

[0141] The temperature compensation circuit 53 and the temperature compensation amplifier 57 are deactivated according to the first control signal SCNT1 or the third control signal SCNT3. The inactive temperature compensation amplifier 57 operates to generate a first compensation signal SCMS1, which is configured to set the variable capacitance diode 47 to a fixed capacitance, e.g., a minimum capacitance. However, the switches SW3 and SW4 are non-conductive (OFF). The non-conductive switches SW3 and SW4 prevent the first compensation signal SCMS1 from competing with the third compensation signal SCMS3 from the voltage control amplifier 59.

[0142] Referring to FIG. 10, the connections in analog TCXO mode are shown.

[0143] (Analog TCXO mode) In the oscillator circuit 17 set to analog TCXO mode, the fixed capacitor 49 is disconnected from the crystal oscillation amplifier 29 in accordance with the first control signal SCNT1 and the second control signal SCNT2. The temperature compensation circuit 53 and the temperature compensation amplifier 57 are also set to active (ON) in accordance with the first control signal SCNT1. Because the second control signal SCNT2 does not indicate digital TCXO mode, the temperature compensation circuit 53 is set to analog operation. The active temperature compensation amplifier 57 operates to generate a first compensation signal SCMS1 in response to the sensor signal from the sensor 55 and the control of the active temperature compensation circuit 53, and the first compensation signal SCMS1 is configured to control the capacitance of the variable capacitance diode 47. The switches SW3 and SW4 are conductive (ON). With the switches SW3 and SW4 conductive, the first compensation signal SCMS1 can be provided to the variable capacitance diode 47 (the other end 47c).

[0144] Since the second control signal SCNT2 does not indicate the digital TCXO mode, the switches SW1 and SW2 are turned off, and the temperature compensation circuit 53 is disconnected from the fixed capacitor 49.

[0145] The third control signal SCNT3 does not indicate the VCXO mode. Therefore, the voltage-controlled amplifier 59 is set to inactive (OFF), and the switch SW5 can be non-conductive (OFF). The non-conductive switch SW5 makes it possible to prevent the third compensation signal SCMS3 from the voltage-controlled amplifier 59 from competing with the first compensation signal SCMS1.

[0146] Next, the use of the fixed capacitor 49 and the variable capacitance diode 47 will be explained.

[0147] Part or all of the fixed capacitor 49 is selectively connected to the crystal oscillator amplifier 29 in the phase noise reduction mode and under control of the digital TCXO, and is disconnected from the crystal oscillator amplifier 29 under control in other modes.

[0148] In the phase noise reduction mode of control, no compensation signal is applied to the exemplary fixed capacitor 49 .

[0149] In the digital TCXO mode of control, an exemplary fixed capacitor 49 can be selectively connected between each of the first and second terminals 29b and 29c of the crystal oscillation amplifier 29 and the digitally operated temperature compensation circuit 53. The selective connection is achieved by switches SW1 and SW2. The capacitance of the fixed capacitor 49 is adjusted in steps according to a second compensation signal SCMS2 to control the oscillation frequency of the crystal oscillation amplifier 29.

[0150] In the control of the oscillation frequency stabilization mode, the analog TCXO mode, and the VCXO mode, the variable capacitance diode 47 can be selectively connected between each of the first terminal 29b and the second terminal 29c of the crystal oscillation amplifier 29 and the temperature compensation amplifier 57 or the voltage controlled amplifier 59. The selective connection is achieved by the switches SW3, SW4, and SW5. Specifically, switching between the oscillation frequency stabilization mode, the analog TCXO mode, and the VCXO mode is achieved by exclusive conduction between the switches SW3 and SW4 and the switch SW5.

[0151] Specifically, in the oscillation frequency stabilization mode and the analog TCXO mode, the variable capacitance diode 47 is selectively connected between each of the first terminal 29b and the second terminal 29c of the crystal oscillation amplifier 29 and the temperature compensation amplifier 57. The capacitance of the variable capacitance diode 47 is adjusted in accordance with the first compensation signal SCMS1 to control the oscillation frequency of the crystal oscillation amplifier 29.

[0152] In the VCXO mode, the variable capacitance diode 47 is selectively connected between each of the first terminal 29b and the second terminal 29c of the crystal oscillation amplifier 29 and the voltage-controlled amplifier 59. The capacitance of the variable capacitance diode 47 is adjusted in accordance with the third compensation signal SCMS3 to control the oscillation frequency of the crystal oscillation amplifier 29.

[0153] In the phase noise reduction mode and digital TCXO, the capacitance of the variable capacitance diode 47 is set to a fixed capacitance according to the first compensation signal SCMS1 so as not to disturb the adjustment of the oscillation frequency by the fixed capacitance capacitor 49.

[0154] As described above, according to this embodiment, it is possible to provide a semiconductor device 11 in which the function of the crystal oscillator circuit can be set in response to an external signal and / or an external command after being incorporated into a higher-level circuit and device, and a crystal oscillator device 12 including this semiconductor device 11.

[0155] As can be understood from the above description, the present embodiment can have various aspects.

[0156] A semiconductor device according to a first aspect of this embodiment comprises an oscillator circuit including a crystal oscillator amplifier having a first end and a second end configured to be connected to a crystal oscillator, a plurality of terminals including a control terminal configured to receive one or more external signals specifying one or more operating modes, and an output terminal configured to provide an oscillation signal for the oscillator circuit, an interface circuit connected to the control terminal and configured to receive the external signals, a memory circuit configured to store values ​​related to the external signals and connected to the interface circuit, and a control circuit connected to the interface circuit and the memory circuit, wherein the control circuit is configured to generate at least one control signal configured to control the oscillator circuit according to the contents stored in the memory circuit.

[0157] In a semiconductor device according to a second aspect of the first aspect of this embodiment, the memory circuit includes at least one memory element that stores a value related to the external signal, and the memory element may include at least one of a volatile memory element and a non-volatile memory element.

[0158] A semiconductor device according to a third aspect in accordance with the first or second aspect of this embodiment may further include a voltage regulator, and the crystal oscillation amplifier may be supplied with power from the voltage regulator.

[0159] A semiconductor device according to a fourth aspect in accordance with the third aspect of this embodiment further includes a package, the package accommodating the oscillator circuit, the memory circuit, the interface circuit, and the voltage regulator, the terminals including a first terminal and a second terminal connected to the first end and the second end of the crystal oscillation amplifier, respectively, and the output terminal, the control terminal, the first terminal, and the second terminal can be configured as external terminals in the package.

[0160] In a semiconductor device according to a fifth aspect in accordance with the first, second, third, or fourth aspect of this embodiment, the operating modes include an oscillation frequency stabilization mode and a phase noise reduction mode, and the control circuit is configured to generate, as the control signal, a first control signal that specifies the phase noise reduction mode and the oscillation frequency stabilization mode according to the stored contents of the memory circuit, and the oscillation frequency stabilization mode can be configured to operate the oscillation circuit in response to a compensation signal that is configured to control the oscillation circuit based on a sensor signal from a sensor.

[0161] In a semiconductor device according to a sixth aspect in accordance with the fifth aspect of this embodiment, the oscillation circuit includes at least one variable capacitance element having one end and the other end, and at least one fixed capacitance element having one end and the other end, and at least one of the fixed capacitance elements includes a first capacitor connected so as to be switchable between connection and disconnection to the crystal oscillation amplifier in response to the first control signal, and at least one of the variable capacitance elements includes a first variable capacitance element connected to the crystal oscillation amplifier, and the capacitance of the first variable capacitance element can be set according to the compensation signal in each of the phase noise reduction mode and the oscillation frequency stabilization mode.

[0162] In a semiconductor device according to a seventh aspect in accordance with the sixth aspect of this embodiment, the oscillation frequency stabilization mode can be configured to disconnect the first capacitor from the crystal oscillation amplifier in response to the first control signal and to control the capacitance of the first variable capacitance element according to the compensation signal, and the phase noise reduction mode can be configured to connect the first capacitor to the crystal oscillation amplifier in response to the first control signal and to set the first variable capacitance element to a fixed capacitance in response to the compensation signal.

[0163] In a semiconductor device according to an eighth aspect of the present embodiment, which is in accordance with the fifth, sixth, or seventh aspect, the control circuit further includes a temperature sensor monolithically integrated with the oscillation circuit as the sensor, and the control circuit further includes a temperature compensation circuit connected to the temperature sensor, and the control circuit can be configured to generate the compensation signal as the control signal using the temperature compensation circuit.

[0164] A crystal oscillation device according to a ninth aspect of this embodiment comprises a semiconductor device described in any one of the first to eighth aspects, and a mounting substrate on which the semiconductor device is mounted, the mounting substrate including an interconnect layer connected to at least a portion of the terminals of the semiconductor device.

[0165] In a crystal oscillator device according to a tenth aspect of the ninth aspect of this embodiment, the operating mode of the semiconductor device can be determined based on the external signal received at the control terminal from the interconnect layer of the mounting substrate.

[0166] A crystal oscillation device according to an eleventh aspect in accordance with the ninth or tenth aspect of this embodiment can further include a crystal oscillator connected to the first end and the second end of the crystal oscillation amplifier of the semiconductor device.

[0167] The present disclosure is not limited to the above-described embodiments, and various modifications can be made without departing from the spirit and scope of the present disclosure, all of which are included in the technical concept of the present disclosure. [Explanation of symbols]

[0168] 10··· terminal, 11. Semiconductor device, 12. Crystal oscillator, 13...1st terminal, 14. Mounting board, 15...2nd terminal, 16. Crystal oscillator, 17. Oscillator circuit, 18···Interconnect layer, 19. Output terminal, 21 Control terminal, 23. Interface circuit, 25...Memory circuit, 26...Memory element, 27···Control circuit, 29. Crystal oscillator amplifier, 31. Voltage regulator, 33...1st power supply terminal, 35...Second power supply terminal, 37 Regulator terminal, 41···package, 43 Clock terminal, 45... Buffer circuit, 46, 47···Varactor diode, 48, 49···Fixed capacitor, 50b, 50c...switch, 51 Mode setting circuit, 53...Temperature compensation circuit, 55...sensor, 57···Temperature compensated amplifier, 59...Voltage Control Amplifier, CLK: Clock signal, SCMS...compensation signal SCMS1...first compensation signal, SCMS2...Second compensation signal, SCMS3...Third compensation signal, SCNT control signal, SCNT1: First control signal SCNT2: Second control signal SCNT3: Third control signal SMOD...external signal, SVC: Voltage signal, SW1, SW2, SW3, SW4, SW5... switches.

Claims

1. an oscillator circuit including a crystal oscillator amplifier having a first end and a second end configured to be connected to a crystal oscillator; a plurality of terminals including a control terminal configured to receive one or more external signals specifying one or more operating modes, and an output terminal configured to provide an oscillation signal for the oscillator circuit; an interface circuit connected to the control terminal and configured to receive the external signal; a memory circuit configured to store a value related to the external signal and connected to the interface circuit; a control circuit connected to the interface circuit and the memory circuit; Equipped with the control circuit is configured to generate at least one control signal, the control signal being configured to control the oscillator circuit according to the contents stored in the memory circuit; Semiconductor device.

2. the memory circuit includes at least one memory element that stores a value related to the external signal; The memory element includes at least one of a volatile memory element and a non-volatile memory element.

2. The semiconductor device according to claim 1.

3. a voltage regulator; The crystal oscillation amplifier is powered by the voltage regulator.

2. The semiconductor device according to claim 1.

4. Further comprising a package, the package accommodates the oscillator circuit, the memory circuit, the interface circuit, and the voltage regulator; the terminals include a first terminal and a second terminal connected to the first end and the second end of the crystal oscillation amplifier, respectively; the output terminal, the control terminal, the first terminal, and the second terminal are configured as external terminals in the package.

4. The semiconductor device according to claim 3.

5. the operation modes include an oscillation frequency stabilization mode and a phase noise reduction mode; the control circuit is configured to generate, as the control signal, a first control signal that specifies the phase noise reduction mode and the oscillation frequency stabilization mode according to the stored content of the memory circuit; the oscillation frequency stabilization mode is configured to operate the oscillation circuit in response to a compensation signal configured to control the oscillation circuit based on a sensor signal from a sensor; 2. The semiconductor device according to claim 1.

6. the oscillator circuit includes at least one variable capacitance element having one end and the other end, and at least one fixed capacitance element having one end and the other end; at least one of the fixed capacitance elements includes a first capacitor connected so as to be switchable between connection and disconnection to the crystal oscillation amplifier in response to the first control signal; At least one of the variable capacitance elements includes a first variable capacitance element connected to the crystal oscillation amplifier, the capacitance of the first variable capacitance element is set in accordance with the compensation signal in each of the phase noise reduction mode and the oscillation frequency stabilization mode.

6. The semiconductor device according to claim 5.

7. the oscillation frequency stabilization mode is configured to disconnect the first capacitor from the crystal oscillation amplifier in response to the first control signal, and to control the capacitance of the first variable capacitance element in response to the compensation signal; the phase noise reduction mode is configured to connect the first capacitor to the crystal oscillation amplifier in response to the first control signal, and to set the first variable capacitance element to a fixed capacitance in response to the compensation signal; 7. The semiconductor device according to claim 6.

8. the control circuit further includes a temperature sensor as the sensor, the temperature sensor being monolithically integrated with the oscillation circuit; the control circuit further includes a temperature compensation circuit connected to the temperature sensor; The control circuit is configured to generate the compensation signal as the control signal using the temperature compensation circuit.

6. The semiconductor device according to claim 5.

9. A semiconductor device according to any one of claims 1 to 8; a mounting substrate including an interconnect layer connected to at least a portion of the terminals of the semiconductor device and on which the semiconductor device is mounted; A crystal oscillator device comprising:

10. the operation mode of the semiconductor device is identified based on the external signal received by the control terminal from the interconnect layer of the mounting substrate; 10. The crystal oscillator device according to claim 9.

11. The semiconductor device further includes a crystal oscillator connected to the first terminal and the second terminal of the crystal oscillation amplifier.

10. The crystal oscillator device according to claim 9.

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