ADC calibration device, digitizer using ADC calibration device, signal analyzer, and ADC calibration method

Abstract

To provide an ADC calibration device, a digitizer using the ADC calibration device, a signal analysis device, and an ADC calibration method capable of performing calibration at low cost and in a short time even for a time interleave ADC having high frequency resolution in a wide band.SOLUTION: In an ADC calibration device 10, a calibration signal generator 1 generates, as a calibration signal, a frequency-modulated wave whose frequency changes in a predetermined pattern with time within a corresponding frequency range, a TI-AD converter ADC2 outputs a sample signal obtained by performing AD conversion on an input calibration signal by a plurality of ADCs, and individual frequency characteristic detectors 6a, 6b, and 6c are provided in parallel corresponding to the respective ADCs and individually detect frequency characteristics of the sample signal for each ADC. In the control unit 7, the mismatch calculation unit 72 calculates the frequency characteristics of the mismatch characteristics between the ADCs from the frequency characteristics of the sample signal for each ADC, and further calculates the correction information for correcting the mismatch.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an ADC calibration device that calibrates an AD conversion device that operates a plurality of AD converters in a time-interleaved manner, a digitizer that uses the ADC calibration device, a signal analysis device, and an ADC calibration method. [Background technology]

[0002] Among devices that convert analog signals into digital signal strings and perform various processes, time-interleaved AD conversion devices (hereinafter also referred to as time-interleaved ADCs or TI-ADCs) are used for high-speed analog signal processing. In a time-interleaved ADC, the analog signal to be converted is input to multiple AD converters (hereinafter also referred to as ADCs), and a sampling clock with a predetermined period is given to each ADC with a slightly delayed timing, thereby performing equivalent high-speed sampling digital conversion.

[0003] In a time-interleaved ADC, a technique is known in which the mismatch is corrected by calibration in order to reduce fluctuations in sample values ​​and occurrence of spurious signals due to mismatches between individual ADCs (see, for example, Patent Document 1).

[0004] Patent Document 1 discloses a method for correcting mismatch in a time-interleaved ADC. Conventional calibrations of time-interleaved ADCs, such as those described in Patent Document 1, use an unmodulated CW signal (a tone signal with a single frequency) as a calibration signal. Specifically, a sine wave signal is input to the time-interleaved ADC as the unmodulated CW signal, and the outputs from each ADC are compared to measure the degree of mismatch between the ADCs, thereby correcting the mismatch. Generally, mismatch between ADCs has frequency characteristics that vary depending on the frequency. Therefore, in measuring the mismatch, it is necessary to acquire the mismatch characteristics over the entire bandwidth used by changing the frequency of the unmodulated CW signal. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 6508665 Summary of the Invention [Problem to be solved by the invention]

[0006] However, the calibration of conventional time-interleaved ADCs described in Patent Document 1 and elsewhere uses a single-tone unmodulated CW signal as the calibration signal, and requires measurements each time while varying the frequency within the corresponding frequency range, which poses a problem of taking a relatively long time to acquire the frequency characteristics of mismatch between ADCs. This long calibration time is particularly noticeable when the frequency resolution is high over a wide band.

[0007] Furthermore, conventional time-interleaved ADC calibration requires complex circuit configuration and control for switching the frequency of the unmodulated CW signal used as the calibration signal, which increases the cost of the ADC calibration device.

[0008] The present invention has been made to solve the above-mentioned problems, and aims to provide an ADC calibration device that is capable of performing calibration at low cost and in a short time even for a time-interleaved ADC that has a wide band and high frequency resolution, a digitizer that uses the ADC calibration device, a signal analysis device, and an ADC calibration method. [Means for solving the problem]

[0009] In order to solve the above problem, the ADC calibration device according to claim 1 of the present invention is an ADC calibration device (10) for calibrating a TI-ADC (2) that operates a plurality of AD converters (ADCs: 23) in a time interleave (TI) system, and includes a calibration signal generator (1) that generates a frequency-modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range as a calibration signal to be input to the TI-ADC, a frequency conversion unit (4) that performs frequency conversion in the TI-ADC to extract sample signals obtained by AD converting the calibration signal at a predetermined sampling frequency using the plurality of AD converters, and a frequency conversion unit (5) that converts the extracted sample signals into IQ signals. The system is characterized by comprising: a serial-to-parallel conversion unit (5) that outputs the IQ signal to a plurality of signal paths that are provided in parallel corresponding to the plurality of AD converters; individual frequency characteristic detection units (6a, 6b, 6c) that are provided in each of the plurality of signal paths and that individually detect the frequency characteristics of the sample signal for each of the plurality of AD converters; a mismatch calculation unit (72) that calculates the frequency characteristics of the mismatch characteristics between the plurality of AD converters from the frequency characteristics of the sample signal for each of the plurality of AD converters; and a correction information calculation unit (73) that calculates correction information for correcting the mismatch between the plurality of AD converters from the frequency characteristics of the mismatch characteristics.

[0010] With this configuration, the ADC calibration device according to claim 1 of the present invention uses, as a calibration signal, a frequency-modulated wave having a frequency pattern in which the frequency changes over time within the corresponding frequency range, eliminating the need to switch frequencies each time calibration is performed, shortening the calibration time, and enabling the circuitry for generating the calibration signal and receiving the calibration signal to detect mismatch characteristics between ADCs to be realized with a simple, inexpensive structure. Furthermore, by selecting the frequency pattern, it becomes possible to perform calibration at low cost and in a short time, even for time-interleaved ADCs with wideband and high frequency resolution.

[0011] Furthermore, the ADC calibration device according to claim 2 of the present invention may be configured such that the calibration signal generator generates the frequency-modulated wave having the frequency pattern in which the frequency increases or decreases linearly over time.

[0012] With this configuration, the ADC calibration device according to claim 2 of the present invention can easily calculate mismatch characteristics between ADCs and correction information for the corresponding frequency range by inputting a calibration signal once while changing the frequency in a desired linearly changing frequency pattern.

[0013] Furthermore, the ADC calibration device according to claim 3 of the present invention may be configured such that the calibration signal generator generates the frequency-modulated wave having the frequency pattern in which the frequency increases or decreases stepwise over time.

[0014] With this configuration, the ADC calibration device according to claim 3 of the present invention can easily calculate mismatch characteristics between ADCs and correction information for the corresponding frequency range by inputting a calibration signal once and changing the frequency in a desired frequency pattern that changes in stages.

[0015] Furthermore, the ADC calibration device according to claim 4 of the present invention may be configured such that the calibration signal generator generates the calibration signal further associated with a level on / off pattern that turns level on at the start position of the calibration signal and turns level off at the end position, and further includes a timing detection unit (3) that detects the timing of the start position and end position of the calibration signal from the level on / off pattern in accordance with the AD conversion process, and the frequency conversion unit performs the frequency conversion in the section from the start position to the end position of the calibration signal.

[0016] With this configuration, the ADC calibration device according to claim 4 of the present invention can reliably and accurately detect the timing of the start and end positions of a calibration signal from the level on / off pattern associated with that calibration signal, thereby improving the accuracy of calculating the mismatch characteristics between multiple AD converters and the correction information that corrects the mismatch between multiple AD converters for the corresponding frequency range.

[0017] Furthermore, the ADC calibration device according to claim 5 of the present invention may further include a timing detection unit (3) in which the calibration signal generator generates a trigger signal indicating the signal-on timing of the calibration signal in synchronization with the generation of the frequency-modulated wave, detects the timing of the start position of the calibration signal from the trigger signal in synchronization with the AD conversion process, and estimates the timing of the end position of the calibration signal based on the start position of the calibration signal and the corresponding frequency range, and the frequency conversion unit performs the frequency conversion in the section from the start position to the end position of the calibration signal.

[0018] With this configuration, the ADC calibration device according to claim 5 of the present invention can accurately detect the start position of a calibration signal from the signal pattern of the calibration signal, and can also accurately detect the end position of the calibration signal taking into account the supported frequency range, thereby improving the accuracy of calculation of mismatch characteristics between multiple AD converters and correction information that corrects mismatches between multiple AD converters for the supported frequency range.

[0019] Furthermore, the ADC calibration device according to claim 6 of the present invention may further include a corresponding frequency range recognition unit (75a) that recognizes the corresponding frequency range of the calibration signal, and a sweep speed variable control unit (75) that variably controls the sweep speed by selecting the sweep speed of the calibration signal according to the recognized corresponding frequency range.

[0020] With this configuration, the ADC calibration device according to claim 6 of the present invention variably controls the sweep speed so that the calibration signal is swept at a slow speed when the supported frequency range is relatively narrow, and swept at a faster speed when the supported frequency range is wide, thereby enabling mismatch characteristics that match the supported frequency range and accurate calculation of correction information.

[0021] Furthermore, the ADC calibration device according to claim 7 of the present invention may be configured such that the individual frequency characteristic detection unit individually detects frequency characteristics related to amplitude, phase, and DC offset of the sample signal for each of the plurality of AD converters, and the mismatch calculation unit calculates differences in frequency characteristics related to amplitude, phase, and DC offset of the sample signal for each of the plurality of AD converters as the mismatch characteristics between the plurality of AD converters.

[0022] With this configuration, the ADC calibration device according to claim 7 of the present invention can calculate mismatch characteristics and correction information between multiple AD converters for each of the items of amplitude, phase, and DC offset, and can easily correct mismatches related to each of the items between the multiple AD converters based on the correction information.

[0023] Furthermore, the ADC calibration device according to claim 8 of the present invention may further include a timing interpolation processing unit (72a) that calculates, by interpolation from detected values ​​of the amplitude, phase, and DC offset of the sample signal for each of the plurality of AD converters, values ​​of the amplitude, phase, and DC offset of the sample signal at a time of the same frequency, and the mismatch calculation unit may be configured to calculate the mismatch characteristics between the plurality of AD converters based on the interpolated values ​​at a time of the same frequency calculated by the timing interpolation processing unit.

[0024] With this configuration, the ADC calibration device according to claim 8 of the present invention calculates mismatch characteristics between multiple AD converters using the amplitude, phase, and DC offset values ​​(interpolated values) of sample signals at the same frequency and time calculated (interpolated) by the timing interpolation processing unit, thereby improving the accuracy of calculating mismatch characteristics and correction information and also improving the accuracy of mismatch correction.

[0025] Furthermore, the ADC calibration device according to claim 9 of the present invention may further include a temperature sensor (8) that detects the temperature inside the device body, and a calibration time notification control unit (76) that prompts the user to perform the calibration when the temperature sensor detects a temperature that is either below or above a preset temperature range.

[0026] With this configuration, the ADC calibration device of claim 9 of the present invention notifies the user that calibration of the TI-ADC is necessary when the temperature inside the device body falls below or exceeds a preset temperature range, thereby enabling timely calibration to be performed at all times and preventing inaccurate AD conversion processing from occurring due to long periods of time without calibration.

[0027] Furthermore, the ADC calibration device according to claim 10 of the present invention may further include an interleave correction unit (74) that performs interleave correction of the TI-ADC to eliminate mismatch characteristics between the plurality of AD converters based on the correction information calculated by the correction information calculation unit, and a correction information table (74a) that stores the correction information corresponding to each temperature within the temperature range, and the interleave correction unit may be configured to obtain, from the correction information table, the correction information corresponding to the temperature inside the device body detected by the temperature sensor, and perform the interleave correction.

[0028] With this configuration, the ADC calibration device according to claim 10 of the present invention has the advantage that, since individual frequency characteristics are often determined according to temperature, by measuring and storing correction information (correction values) according to temperature in advance as calibration data, interleaved correction can be performed using the calibration data without having to re-calibrate.

[0029] In order to solve the above problem, a digitizer according to claim 11 of the present invention is a digitizer (100) having a TI-ADC (102) that operates a plurality of AD converters in a time interleaved manner, and that outputs a sample signal obtained by AD converting an input signal (Input) by the plurality of AD converters at a predetermined sampling frequency, and further having an ADC calibration device (10) that calibrates the TI-ADC, the ADC calibration device generating, as a calibration signal, a frequency modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range, and inputting the calibration signal to the TI-ADC instead of the input signal, and a calibration signal generator (101) that outputs, as an IQ signal, a sample signal obtained by AD converting the calibration signal by the plurality of AD converters at the predetermined sampling frequency in the TI-ADC. a serial-to-parallel conversion unit (5) for outputting the extracted IQ signal to a plurality of signal paths provided in parallel corresponding to the plurality of AD converters; individual frequency characteristic detection units (6a, 6b, 6c) provided in each of the plurality of signal paths for individually detecting the frequency characteristic of the sample signal for each of the plurality of AD converters; a mismatch calculation unit (106) for calculating the frequency characteristic of mismatch characteristics between the plurality of AD converters from the frequency characteristic of the sample signal for each of the plurality of AD converters; and an interleave correction unit (107) for calculating correction information for correcting mismatch between the plurality of AD converters from the frequency characteristic of the mismatch characteristics and performing interleave correction for correcting the mismatch based on the correction information.

[0030] With this configuration, the digitizer of claim 11 of the present invention employs an ADC calibration device that can perform calibration at low cost and in a short time, even for TI-ADCs with wide bandwidth and high frequency resolution, thereby improving the calibration accuracy of the TI-ADC, and ultimately improving the basic function of the digitizer, which converts input signals into analog signals using the TI-ADC and outputs them.

[0031] In order to solve the above problem, a signal analysis device according to claim 12 of the present invention comprises a frequency conversion unit (151) that converts a signal to be analyzed to an intermediate frequency and outputs the converted signal, an A / D conversion device (156) having a TI-ADC that operates a plurality of AD converters in a time interleaved manner, a signal analysis unit (165) that analyzes the signal to be analyzed based on a sample signal obtained by AD converting the signal to be analyzed after conversion to the intermediate frequency using the plurality of AD converters at a predetermined sampling frequency, and an ADC calibration device (10) that calibrates the TI-ADC, wherein the ADC calibration device includes a calibration signal generator (155) that generates, as a calibration signal, a frequency modulated wave whose frequency changes over time in a corresponding frequency range in a predetermined frequency pattern, and inputs the calibration signal to the TI-ADC in place of the signal to be analyzed, and in the TI-ADC, the calibration signal is AD converted at the predetermined sampling frequency using the plurality of AD converters. a serial-to-parallel conversion unit (5) for outputting the extracted IQ signals to a plurality of signal paths provided in parallel corresponding to the plurality of AD converters; individual frequency characteristic detection units (6a, 6b, 6c) provided in each of the plurality of signal paths for individually detecting the frequency characteristics of the sample signals for each of the plurality of AD converters; a mismatch calculation unit (163) for calculating the frequency characteristics of mismatch characteristics between the plurality of AD converters from the frequency characteristics of the sample signals for each of the plurality of AD converters; and an interleave correction unit (164) for calculating correction information for correcting mismatch between the plurality of AD converters from the frequency characteristics of the mismatch characteristics, performing interleave correction for correcting the mismatch based on the correction information, and outputting the result to the signal analysis unit.

[0032] With this configuration, the signal analysis device of claim 12 of the present invention is equipped with an ADC calibration device that can perform calibration at low cost and in a short time, even for a wideband AD conversion device with high frequency resolution (TI-ADC).By adopting a digitizer with improved basic function of AD converting an input signal using the TI-ADC and outputting it, it is possible to improve the calibration accuracy of the TI-ADC, and ultimately to expect an improvement in the basic function of the signal analysis device that performs AD conversion of the signal to be analyzed using the TI-ADC and performs signal analysis.

[0033] In order to solve the above-mentioned problems, an ADC calibration method according to claim 13 of the present invention is an ADC calibration method using the ADC calibration device according to claim 1 to calibrate a TI-ADC (2) that operates a plurality of AD converters (ADCs: 23) in a time interleave (TI) system, the ADC calibration method including: a calibration signal generation step (S1) of generating, as a calibration signal to be input to the TI-ADC, a frequency modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range; and a frequency conversion step (S2) of performing frequency conversion in the TI-ADC to extract, as an IQ signal, a sample signal obtained by AD converting the calibration signal at a predetermined sampling frequency using the plurality of AD converters. a serial-to-parallel conversion step (S4) of outputting the extracted IQ signal to a plurality of signal paths provided in parallel corresponding to the plurality of AD converters; an individual frequency characteristic detection step (S6) provided in each of the plurality of signal paths for individually detecting the frequency characteristic of the sample signal for each of the plurality of AD converters; a mismatch calculation step (S7) of calculating the frequency characteristic of the mismatch characteristic between the plurality of AD converters from the frequency characteristic of the sample signal for each of the plurality of AD converters; and a correction information calculation step (S8) of calculating correction information for correcting the mismatch between the plurality of AD converters from the frequency characteristic of the mismatch characteristic.

[0034] With this configuration, the ADC calibration method according to claim 13 of the present invention uses, as a calibration signal, a frequency-modulated wave having a frequency pattern in which the frequency changes over time within the corresponding frequency range, eliminating the need to switch frequencies each time calibration is performed, shortening the calibration time, and enabling the circuitry for generating the calibration signal and receiving the calibration signal to detect mismatch characteristics between ADCs to be realized with a simple and inexpensive structure. Furthermore, by selecting the frequency pattern, it becomes possible to perform calibration at low cost and in a short time, even for time-interleaved ADCs with wideband and high frequency resolution. [Effects of the Invention]

[0035] The present invention provides an ADC calibration device that can perform calibration at low cost and in a short time, even for a time-interleaved ADC with wideband and high frequency resolution, a digitizer that uses the ADC calibration device, a signal analysis device, and an ADC calibration method. [Brief explanation of the drawings]

[0036] [Figure 1] 1 is a block diagram showing a schematic configuration of an ADC calibration device according to an embodiment of the present invention. [Figure 2] 3 is a block diagram showing the functional configuration of a control unit in the ADC calibration device according to one embodiment of the present invention. FIG. [Figure 3] 1 is a block diagram showing an example of the basic configuration of a TI-ADC in an ADC calibration device according to an embodiment of the present invention. [Figure 4] FIG. 10 is a conceptual diagram showing a connection between sub-ADCs, which is an example of a combination of ADCs that are the subject of mismatch correction. [Figure 5] 10A and 10B are conceptual diagrams showing other examples of combinations of ADCs that are subject to mismatch correction. (a) shows the connection state when the TI-ADC consists of a single ADC core, and (b) shows the connection state when the TI-ADC uses multiple ADC cores by switching between them. [Figure 6]1A and 1B are diagrams showing the characteristics of the frequency pattern of a frequency-modulated wave used as a calibration signal in an ADC calibration device according to one embodiment of the present invention, where (a) shows an example of a pattern in which the frequency increases linearly, and (b) shows an example of a pattern in which the frequency increases stepwise. [Figure 7] 10 is a diagram showing an example of detection of a residual frequency after frequency conversion of a frequency-modulated wave used as a calibration signal in an ADC calibration device according to an embodiment of the present invention. FIG. [Figure 8] 4 is a flowchart showing a calibration operation of the ADC calibration device according to one embodiment of the present invention. [Figure 9] 1 is a schematic diagram illustrating a signal processing system for a calibration signal in an ADC calibration device according to an embodiment of the present invention and signal characteristics of a processed signal in the signal processing system. [Figure 10] 10 is a diagram illustrating a comparative example of the frequency characteristics of the sample signal in Sub-ADC #1 detected by the individual frequency characteristic detector 6a in FIG. 9 and the frequency characteristics of the sample signal in Sub-ADC #2 detected by the individual frequency characteristic detector 6b. [Figure 11] 1A and 1B are diagrams for explaining sampling interpolation in an ADC calibration device according to one embodiment of the present invention, in which (a) shows an image of characteristic extraction of sample signals from two ADCs, and (b) shows an image of derivation of mismatch characteristics between ADCs to which sampling interpolation is applied. [Figure 12] 1 is a block diagram showing an embodiment of a digitizer according to the present invention that uses an ADC calibration device according to the present invention. [Figure 13] 1 is a block diagram showing an embodiment of a signal analysis device according to the present invention that employs a digitizer using an ADC calibration device according to the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0037] Hereinafter, embodiments of an ADC calibration device, a digitizer using the ADC calibration device, a signal analyzer, and an ADC calibration method according to the present invention will be described with reference to the drawings.

[0038] (ADC calibration device) First, the configuration of an ADC calibration device 10 according to one embodiment of the present invention will be described. Fig. 1 is a block diagram showing a schematic configuration of an ADC calibration device 10 according to one embodiment of the present invention.

[0039] 1, an ADC calibration device 10 according to this embodiment includes a calibration signal generator 1, a time-interleaved ADC (hereinafter referred to as a TI-ADC) 2, a timing detection unit 3, a frequency conversion unit 4, a serial-to-parallel conversion unit (hereinafter referred to as an S / P conversion unit) 5, individual frequency characteristic detection units 6a, 6b, and 6c (hereinafter sometimes collectively referred to as an individual frequency characteristic detection unit 6), and a control unit 7. The timing detection unit 3, the frequency conversion unit 4, the S / P conversion unit 5, and the individual frequency characteristic detection unit 6 form a frequency characteristic monitoring unit 9.

[0040] Calibration signal generator 1 generates a calibration signal within a specified frequency range (supported frequency range). In this embodiment, calibration signal generator 1 generates as the calibration signal a frequency-modulated wave (hereinafter referred to as an FM-modulated wave) whose frequency changes over time within the supported frequency range in a predetermined frequency pattern (see FIG. 6). The calibration signal may further be associated with a signal pattern (see FIG. 6), such as a signal on-off pattern in which the signal is on at the beginning of the calibration signal and off at the end.

[0041] The TI-ADC2 is configured with multiple ADCs that operate using a time interleaving method, and each ADC generates a sample signal by AD converting the calibration signal input from the calibration signal generator 1 at a predetermined sampling frequency, and outputs the sample signals from each ADC sequentially (serially). A detailed configuration example of the TI-ADC2 will be described later in detail with reference to Figure 3.

[0042] The timing detection unit 3 detects timings such as the start position, start and end positions, and end position of the calibration signal from sample signals of the calibration signal generated by the multiple ADCs that are sequentially output by the TI-ADC 2. The detection of the timings of the start and end positions of the calibration signal can be performed, for example, based on the above-mentioned signal pattern associated with the calibration signal.

[0043] The frequency conversion unit 4 is a functional unit that performs frequency conversion to extract the sample signals output sequentially as DC signals and as IQ signals in accordance with the AD conversion process in which the TI-ADC2 AD converts the above calibration signal at a predetermined sampling frequency using multiple ADCs and outputs the sample signals in sequence.

[0044] Specifically, the frequency conversion unit 4 includes a local oscillator 41 that generates a local signal when the timing detection unit 3 detects the start position of the calibration signal, a π / 2 phase shifter 42 that shifts the phase of the local signal by 90°, a mixer 43 that mixes the sample signal input from the timing detection unit 3 with the local signal from the π / 2 phase shifter 42, and a mixer 44 that mixes the input sample signal with the local signal from the local oscillator 41. With this configuration, the frequency conversion unit 4 generates a beat signal equivalent to the input sampling signal as a local signal when the timing detection unit 3 detects the start position of the calibration signal, and multiplies this beat signal by the sample signal input from the TI-ADC 2 to extract a zero-frequency signal (baseband signal). Additionally, the frequency conversion unit 4 quadrature-demodulates the sample signal input from the TI-ADC 2 into an I-phase component and a Q-phase component.

[0045] The S / P conversion unit 5 is a functional unit that performs serial / parallel conversion processing, inputting the baseband signals (digital quadrature demodulated signals of I-phase and Q-phase components) output from the frequency conversion unit 4 in order (serial) and outputting the input signals to multiple signal paths that are arranged in parallel corresponding to each ADC that makes up the TI-ADC2.

[0046] The individual frequency characteristic detector 6 is provided for each signal path corresponding to each of the multiple ADCs constituting the TI-ADC2, and is a processing circuit that individually detects the frequency characteristics of the sample signals (I-phase component and Q-phase component signals (digital quadrature demodulated signals)) sampled by each ADC input from the S / P converter 5. In this embodiment (see FIG. 1 ), a configuration is illustrated in which the TI-ADC2 has three ADCs, and individual frequency characteristic detectors 6a, 6b, and 6c are provided for each of the three signal paths corresponding to the ADCs. In the present invention, the number of individual frequency characteristic detectors 6 is not limited to three, and it is necessary to provide one corresponding to each ADC constituting the TI-ADC2. As shown in FIG. 1 , each individual frequency characteristic detector 6 (6a, 6b, 6c) is configured to include a low-pass filter (hereinafter referred to as LPF) 61 and an amplitude / phase calculator 62 that calculates the amplitude and phase of a calibration signal.

[0047] The control unit 7 controls the entire ADC calibration device 10, and as shown in Fig. 2, has an ADC calibration control unit 71 that controls calibration of the TI-ADC 2 (calibration control). The ADC calibration control unit 71 includes, as control function units related to calibration control, a mismatch calculation unit 72, a correction information calculation unit 73, an interleave correction unit 74, a sweep speed variable control unit 75, and a calibration time notification control unit 76. For convenience, control function units other than the mismatch calculation unit 72 are not shown in Fig. 1. The interleave correction unit 74 does not necessarily need to be included in the ADC calibration control unit 71, and may be provided in the control unit (see Fig. 13), for example.

[0048] 2, the mismatch calculation unit 72 compares the frequency characteristics of the sample signals from each of the ADCs constituting the TI-ADC 2, i.e., three ADCs in this example, detected by the individual frequency characteristic detection units 6a, 6b, and 6c, to calculate mismatch characteristics between the ADCs. Items of the mismatch characteristics to be calculated include the relative level (amplitude) ratio and relative timing (phase) difference between the sample signals from each ADC, as well as DC offset.

[0049] The correction information calculation section 73 calculates correction information for correcting the mismatches between the three ADCs based on the mismatch characteristics between the ADCs calculated by the mismatch calculation section 72.

[0050] The interleave correction unit 74 is a functional unit that performs control (calibration control) to correct (interleave correction) each ADC based on the correction information calculated by the correction information calculation unit 73 so as to eliminate mismatch characteristics between the ADCs.

[0051] The embodiment of the interleave correction in the interleave correction unit 74 is not limited to using the correction information calculated by the correction information calculation unit 73, but may also use preset correction information. As an example, FIG. 2 illustrates a configuration in which a correction information table 74a is provided that stores correction information corresponding to each temperature (air temperature) inside the ADC calibration device 10, and the interleave correction unit 74 acquires the correction information corresponding to the temperature (air temperature) inside the device from the correction information table 74a to perform interleave correction. Here, the interleave correction unit 74 reads the temperature inside the device detected by a temperature sensor 8 (described later) and acquires the correction information corresponding to that temperature from the correction information table 74a. With this configuration, by measuring and storing correction information (correction values) in advance, it becomes possible to perform interleave correction using the calibration data without recalibration.

[0052] The sweep speed variable control unit 75 is a control function unit that variably controls the sweep speed of the calibration signal, i.e., the sweep width (sweep width) per unit time of the calibration signal, according to a specified target frequency range. Specifically, the sweep speed variable control unit 75 has a corresponding frequency range recognition unit 75a that detects (recognizes) the specified target frequency range prior to calibration, and has a control function of decreasing the sweep speed of the calibration signal (changing it at a slower speed) when the recognized corresponding frequency range is a relatively narrow frequency band, and increasing the sweep speed of the calibration signal (changing it at a faster speed) when the recognized corresponding frequency range is a relatively wide frequency band compared to when the corresponding frequency range is relatively narrow. The control of increasing or decreasing the sweep speed of the calibration signal is not limited to, for example, always controlling it at a constant speed within the corresponding frequency range (one stroke) of frequencies f1 and f2 in FIG. 6, but may also include control of repeatedly increasing and decreasing the speed within one stroke.

[0053] Below is an example of an "appropriate sweep speed" when ensuring an appropriate sweep speed by selecting a sweep speed that increases (speeds up) when the supported frequency range is wide and decreases (slows down) when the supported frequency range is narrow. Taking an existing spectrum analyzer as an example, for example, 10 GHz can be said to be wide in terms of analysis bandwidth, and 100 MHz can be said to be narrow. In terms of sweep speed, sweeping 10 GHz in 0.1 seconds corresponds to a high speed, while sweeping 10 MHz in 1 second corresponds to a low speed. The relationship between the supported frequency range and sweep speed described here is merely an example, and it is desirable to set the relationship between the supported frequency range and sweep speed according to the model, etc.

[0054] The calibration time notification control unit 76 has a control function of notifying the user that it is time to perform a calibration operation of the TI-ADC 2. To realize this control function, the ADC calibration device 10 is provided with a temperature sensor 8 that detects the temperature, for example, inside the device body, of the ADC calibration device 10, as shown in Fig. 2. The calibration time notification control unit 76 receives a signal indicating the temperature detected by the temperature sensor 8, and when the detected temperature is, for example, either below or above a preset temperature range, notifies the user that it is time to perform a calibration operation.

[0055] In the ADC calibration device 10 according to this embodiment, the above-mentioned temperature range (effective temperature range) is set to, for example, a temperature range of 20°C to 30°C. The calibration time notification control unit 76 can be configured to, for example, emit a predetermined alarm sound when the temperature detected by the temperature sensor 8 exceeds 30°C or falls below 20°C (i.e., when it deviates from the effective temperature range), to notify that it is time to perform a calibration operation. The method of notifying that it is time to perform a calibration operation is not limited to emitting the above-mentioned alarm sound, and various embodiments can be used, such as displaying a pop-up message on the display unit, such as "It is time to perform calibration."

[0056] (Time-interleaved ADC conversion device) Next, the TI-ADC2 will be described.

[0057] FIG. 3 is a block diagram showing an example of the basic configuration of the TI-ADC 2 in the ADC calibration device 10 (see FIG. 1) according to one embodiment of the present invention.

[0058] As shown in FIG. 3, the TI-ADC 2 splits an analog input signal IN(t) input to an input terminal 21a into multiple (for example, m) signal paths using a signal splitter 22 such as a power divider, and outputs m ADCs 230 to 233. m-1 (hereinafter collectively referred to as ADC23).

[0059] The sampling control unit 24 generates sampling clocks C0 to C1 each having a period T and phases shifted by ΔT (=T / m). m-1 and generate each ADC230~23 m-1 and each ADC230~23 m-1 A designation signal ADNUM that designates the ADC that will perform sampling is provided to the signal switch 25.

[0060] Each ADC230~23 m-1 are clocks C0 to C m-1 The input value IN is sampled and converted into a digital value, and each sample value X0, X1, X2, . . ., X m-1 are output to the signal switcher 25.

[0061] The signal switch 25 is connected to each of the ADCs 230 to 23 m-1 Among these, sample values ​​X0, X1, X2, ... output from the ADC specified by the specification signal ADNUM are selected in order, and a digital signal sequence OUT(n) in which the sample values ​​are arranged in the sampling order is output to the output terminal 21b.

[0062] The digital signal sequence OUT(n) obtained in this way is equivalent to that obtained by sampling the input signal IN(t) at a sampling period ΔT that is 1 / m of the clock period T, and high-speed sampling can be performed using multiple low-speed ADCs.

[0063] However, as in the above-mentioned TI-ADC2, the input signal IN(t) is input to multiple ADCs 230 to 233. m-1 When the signals are distributed to the ADCs 230 to 233, the signal divider 22 itself has different distribution characteristics, the frequency characteristics of the distribution paths are different, and the ADCs 230 to 233 have different distribution characteristics. m-1 Due to the difference in frequency characteristics, errors occur in the results of signal processing of the obtained sample values.

[0064] Also, each ADC230~23 m-1Regarding the clock that determines the sampling timing, timing errors occur due to differences in the signal path length and differences in the delay characteristics of each ADC relative to the sampling clock, and errors occur in the results of signal processing of the obtained sample values.

[0065] To reduce such errors, it is necessary to reduce the influence of the non-uniformity (mismatch) of the characteristics from these input terminals to the ADC. For example, m-1 A correction processing unit for correcting mismatch is provided between the TI-ADC 2 and the signal switcher 25, thereby improving the accuracy of the TI-ADC 2.

[0066] (ADC combinations subject to mismatch correction) In the ADC calibration device 10 according to this embodiment, an example of a combination of ADCs to be subjected to mismatch correction is, for example, a configuration in which sub-ADCs 190 to 193 are accommodated within an ADC core 20 so that input signals can be switched using a power divider 21, as shown in FIG. 4, in which mismatch characteristics between the sub-ADCs 190 to 193 are detected and the mismatch between these sub-ADCs 190 to 193 is corrected.

[0067] In the TI-ADC2 shown in Figure 3, the entire TI-ADC2 forms one ADC core, and each of ADC230 to 233 m-1 In other words, the TI-ADC2 can be considered as an example of application of mismatch correction between multiple sub-ADCs 230 to 233 in one ADC core 20, as shown in FIG.

[0068] Another example of a combination of ADCs that is the target of mismatch correction in the ADC calibration device 10 according to this embodiment is the configuration shown in Fig. 5. In Fig. 5, (a) shows a configuration example in which the TI-ADC2 is composed of a single ADC core, and (b) shows a configuration example in which the TI-ADC2 uses multiple ADC cores 200 and 201 by switching between them using a power divider 28. In this way, the ADC calibration device 10 according to this embodiment can be applied to acquiring and correcting mismatch characteristics using various combinations of sub-ADCs and ADC cores as shown in Figs. 4 and 5.

[0069] One feature of the ADC calibration device 10 according to this embodiment is that it uses an FM modulated wave such as a chirp signal as a calibration reference signal in order to easily acquire mismatch characteristics between sub-ADCs and between ADC cores. The calibration signal generator 1 described above is configured to generate, as a calibration signal, an FM modulated wave as shown in Fig. 6, whose frequency changes over time in a predetermined frequency pattern (frequency change pattern) set in advance within a frequency range (corresponding frequency range) to be corrected (calibrated).

[0070] By repeatedly inputting an FM-modulated wave that covers a predetermined compatible frequency range as a calibration signal to the TI-ADC2 and continuing to sample, it becomes possible to detect mismatch characteristics for frequencies that change in the above-mentioned frequency pattern within the compatible frequency range. In short, with the ADC calibration device 10 of this embodiment, the frequency of the calibration signal changes over time within the compatible frequency range with each input, eliminating the need to repeatedly switch from one frequency to another within the frequency range to be corrected, as in conventional devices that use an unmodulated CW signal as a calibration signal. Instead, it becomes possible to detect mismatch characteristics for all frequencies within the frequency range to be corrected by simply repeating the procedure of inputting an FM-modulated wave.

[0071] 6A and 6B are diagrams showing the frequency change characteristics (frequency pattern) over time of the calibration signal generated by the calibration signal generator 1 of the ADC calibration device 10 according to one embodiment of the present invention, where (a) shows an example of a frequency pattern in which the frequency increases linearly, and (b) shows an example of a frequency pattern in which the frequency increases stepwise.

[0072] First, the FM modulated wave FmA having the frequency pattern shown in Fig. 6(a) will be described. As shown in the upper part of Fig. 6(a), the FM modulated wave FmA has a frequency pattern in which the frequency increases at a uniform rate of change (slope) from frequency f1 to frequency f2 during the period from time T1 to T2. The FM modulated wave FmA is not limited to one having a uniform rate of change from frequency f1 to frequency f2, and may increase (or decrease) while the rate of change increases and decreases in various ways.

[0073] Furthermore, this FM modulated wave FmA is associated with a signal pattern for identifying the leading or trailing edge of the calibration signal, or both. The lower part of Figure 6(a) is associated with a level on / off pattern in which, in response to the frequency change from frequency f1 to frequency f2, the level changes from OFF to ON at time T1, which corresponds to the leading edge of the calibration signal, and then changes from ON to OFF at time T2, which corresponds to the trailing edge of the calibration signal.

[0074] Here, in order to associate a level on / off pattern (see the lower part of FIG. 6(a)) with a change in frequency of the FM modulated wave FmA (see the upper part of FIG. 6(a)), the calibration signal generator 1 may be configured to, for example, monitor the frequency of the FM modulated wave FmA and generate a level on / off pattern in association with the above calibration, in which the level is on during the period from when it is detected that the frequency is f1 to when it is detected that the frequency is f2. Also, a functional unit that generates a level on / off pattern in association with the FM modulated wave (calibration signal) generated by the calibration signal generator 1 may be provided separately from the calibration signal generator 1.

[0075] In this case, the timing detector 3 (see FIG. 1) can detect the timing of the start and end positions of the calibration signal from the level on / off pattern in accordance with the AD conversion process in the TI-ADC 2.

[0076] The configuration for associating the frequency pattern of the FM modulated wave FmA with a signal pattern that enables identification of the leading and trailing positions of the calibration signal is not limited to the configuration described above. As an example, a trigger signal generator that generates a trigger signal that indicates the signal-on (leading position) timing of the calibration signal in synchronization with the generation of the FM modulated wave that is the calibration signal, either within the calibration signal generator 1 or outside the calibration signal generator 1, may be provided.

[0077] In this case, the timing detection unit 3 (see FIG. 1) may be configured to detect the timing of the start position of the calibration signal from the trigger signal in accordance with the AD conversion process in the TI-ADC 2, and to estimate the timing of the end position of the calibration signal based on the start position of the calibration signal and a pre-specified corresponding frequency range. Here, the trigger signal generator may be configured to generate trigger signals at both the signal-on (start position) and signal-off (end position) timings of the calibration signal. Furthermore, the calibration signal generated by the calibration signal generator 1 of the ADC calibration device 10 is not limited to the frequency patterns shown in FIGS. 6(a) and 6(b), and a chirp signal of any form can also be generated and used as the calibration signal.

[0078] Next, the FM modulated wave FmB having the signal pattern shown in Fig. 6(b) will be described. As shown in the upper part of Fig. 6(b), the FM modulated wave FmB has a frequency pattern in which the frequency increases stepwise (step increase) from frequency f1 to frequency f2 during the period from time T1 to T2. The number of steps and change width of the FM modulated wave FmB from frequency f1 to frequency f2 are not limited to the example shown in Fig. 6(b), and the FM modulated wave FmB may increase (or decrease) while changing with various number of steps and change widths.

[0079] The FM modulated wave FmB is also associated with a level on / off pattern as a signal pattern for identifying either the leading or trailing end position of the calibration signal, in which the level changes from off to on at time T1 corresponding to the leading end position of the calibration signal, and then changes from on to off at time T2 corresponding to the trailing end position of the calibration signal.

[0080] Here, in order to associate a level on / off pattern (see the lower part of FIG. 6(b)) with the frequency change of the FM modulated wave FmB (see the upper part of FIG. 6(b)), the calibration signal generator 1 may be configured to, for example, monitor the frequency of the FM modulated wave FmB and generate a level on / off pattern in association with the above calibration, in which the level is on for a period from when it is detected that the frequency is f1 until it is detected that the frequency is f2. Also, a functional unit that generates a level on / off pattern in association with the FM modulated wave (calibration signal) generated by the calibration signal generator 1 may be provided separately from the calibration signal generator 1.

[0081] Even when an FM modulated wave FmB is used as the calibration signal, the timing detection unit 3 (see Figure 1) can detect the timing of the start and end positions of the calibration signal from the above level on / off pattern in accordance with the AD conversion process in the TI-ADC2.

[0082] Furthermore, when using the FM modulated wave FmB, as in the case of using the FM modulated wave FmA, a trigger signal generator may be installed and a configuration may be adopted in which the timing of the start position and end position of the calibration signal are detected or estimated based on the trigger signal generated by the trigger signal generator.

[0083] Here, the merits of associating signal levels (level on / off patterns, trigger signals, etc.) with the FM modulated waves FmA and FmB will be described.

[0084] (Sampling timing detection) The ADC calibration device 10 according to an embodiment of the present invention is premised on performing frequency conversion at the same frequency as the calibration signal (see frequency conversion unit 4 in FIG. 1). While the frequency pattern (frequency, time) of the calibration signal is known in advance (see the upper part of FIG. 6(a) and the upper part of FIG. 6(b)), the pattern timing is unknown and must be determined from the received signal (the calibration signal input from the calibration signal generator 1). Therefore, applying a frequency pattern (level on / off pattern) relating to the on / off of the signal level, for example, as shown in the lower part of FIG. 6(a) and the lower part of FIG. 6(b) to the frequency and level of the calibration signal, can assist in pattern timing detection.

[0085] By repeatedly outputting FM modulated waves FmA and FmB as shown in Figure 6 from calibration signal generator 1 as calibration signals and performing timing detection using detection procedures 1 and 2 described below, it is possible to detect the accurate pattern timing of the received calibration signal. (Detection Procedure 1) The timing detector 3 detects the rising (or falling) edge of the signal level of the calibration signal to determine the approximate timing (coarse correction). (Detection procedure 2) After detecting the approximate timing in detection procedure 1, the frequency conversion unit 4 converts the frequency of the calibration signal (processing to extract it as a DC signal), and the exact timing is detected from the frequency difference (precise correction). By configuring the system to detect the timing of the start and end positions (or the start or end positions) of the calibration signal using the above-mentioned coarse and fine corrections, there is no need to use a synchronization circuit or the like between the calibration signal generation circuit and the receiving system, which also reduces the cost of the device.

[0086] For example, when a calibration signal using a chirp signal such as that shown in Figure 6(a) is frequency converted, if ω(t) ≠ ω'(t), the frequency of the baseband signal will not be 0 (zero), and will appear as a constant frequency difference (Δf) over a certain interval, as shown in Figure 7, which is an example of a "residual frequency" detected after frequency conversion. The residual frequency is the frequency difference (Δf) that appears when the baseband signal frequency does not become 0 (zero) when a signal is frequency converted.

[0087] This means that there is a time difference Δt between the received calibration signal and the frequency translation pattern, which can be expressed as follows:

number

[0088] By correcting the timing during frequency conversion based on this time difference Δt, the angular frequency of the received calibration signal and the frequency conversion can be made the same (equivalent to ω(t) = ω'(t - Δt)).

[0089] In reality, errors occur due to noise and frequency characteristics, so accuracy is improved by averaging within a range that can be considered a certain interval.

[0090] On the other hand, when the frequency is variable in steps (see Figure 6(b)), the angular frequency of the received calibration signal and the frequency conversion signal may be identical for a certain period of time simply by obtaining the timing using coarse correction. By using only this certain period to obtain the mismatch characteristics, it is possible to omit the fine correction. Furthermore, it is expected that the calibration signal generation circuit can be simplified compared to when using only chirp signals.

[0091] In Figure 6, a signal pattern in which the frequency increases linearly or stepwise over time is given as an example of an FM modulated wave (chirp signal), but the signal pattern of the FM modulated wave is not limited to these patterns, and a signal pattern in which the frequency decreases linearly or stepwise over time may also be applied.

[0092] Furthermore, in the ADC calibration device 10 according to this embodiment, the sweep speed variable control unit 75 applies variable control of the sweep speed according to the corresponding frequency range for each of the linearly increasing (or decreasing) frequency pattern and the stepwise increasing (or decreasing) frequency pattern described above, thereby making it possible to improve the analysis accuracy of the calibration signal.

[0093] Next, the calibration operation of the ADC calibration device 10 according to this embodiment will be described with reference to the flowchart shown in Fig. 8. For convenience, it is assumed here that the TI-ADC 2 of the ADC calibration device 10 corresponds to the ADCs 230 to 233 shown in Fig. 2. m-1 The following explanation is based on the assumption that the ADC is configured with multiple Sub-ADCs 23 equivalent to the ADCs 21 and 22, and that mismatch correction between these Sub-ADCs 23 is performed (mismatch correction between Sub-ADCs (see Figure 4)). This calibration operation can also be performed in the same way when correcting mismatch between ADC cores (see Figure 5).

[0094] In the ADC calibration device 10 according to this embodiment, the control unit 7 is configured by a computer device equipped with a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), etc., and the CPU executes a predetermined program stored in the ROM, etc., thereby realizing control functions by each functional block of an ADC calibration control unit 71, a mismatch calculation unit 72, a correction information calculation unit 73, an interleave correction unit 74, a sweep speed variable control unit 75, and a calibration time notification control unit 76 (see FIG. 2).

[0095] During the calibration control shown in FIG. 8, the ADC calibration control unit 71 works in conjunction with the above-mentioned functional blocks to comprehensively control the calibration signal generator 1, the TI-ADC 2, the timing detection unit 3, the frequency conversion unit 4, the S / P conversion unit 5, and the individual frequency characteristic detection unit 6, and controls the calibration operation for calibrating the TI-ADC 2 in the following procedure.

[0096] To start the calibration operation, first, the ADC calibration control unit 71 generates a calibration signal by driving and controlling the calibration signal generator 1, which is a calibration signal source, and outputs the calibration signal to the TI-ADC 2 (step S1). The calibration signal is, for example, an FM modulated wave having a frequency pattern as shown in Fig. 6, and is a signal associated with a signal pattern (timing pattern) such as a level on / off pattern.

[0097] In response to this, the TI-ADC2 receives the calibration signal output from the calibration signal generator 1 in step S1 above, and performs a process of sampling the received calibration signal (received calibration signal) at a predetermined sampling frequency using each Sub-ADC23 (see Figure 3) that constitutes the TI-ADC2, and sequentially outputs the sample signals obtained by this process to the timing detection unit 3 (step S2).

[0098] The timing detection unit 3 inputs the sample signal output by the TI-ADC2, detects the start position timing of the calibration signal from the timing pattern associated with the sample signal (for example, the level on / off pattern shown in the lower part of Figures 6(a) and (b), or the trigger signal mentioned above), and outputs a signal indicating that the detection has been made to the local oscillator 41 of the frequency conversion unit 4.

[0099] As a result, the frequency conversion unit 4 starts the local oscillator 41 at the timing when the signal is input from the timing detection unit 3, i.e., at the timing of the start position of the calibration signal, and generates a local signal (Local) for the frequency conversion signal in accordance with the start position timing (step S3). Here, the local signal has a negative frequency relative to the received calibration signal. As a result, in step S4 below, this local signal can be multiplied by the sample signal from each Sub-ADC 23 of the TI-ADC 2 to extract an IQ signal with a zero frequency.

[0100] As another example of a configuration for generating a local signal in step S3, the timing detection unit 3 may have a memory and temporarily store the received calibration signal from the TI-ADC2 for the required length, and output it to the next block (frequency conversion unit 4) in synchronization with the output of the local signal.

[0101] After generating the local signal in step S3 above, the frequency conversion unit 4 shifts the phase of the local signal using the π / 2 phase shifter 42 and inputs it to the mixer 43, and also inputs the local signal directly to the mixer 44. Meanwhile, the frequency conversion unit 4 receives sample signals from each Sub-ADC 23 of the TI-ADC2 as input to the mixers 43, 44 via the timing detection unit 3. The frequency conversion unit 4 multiplies each local signal, which has a phase difference of π / 2, by the sample signals from each Sub-ADC 23 of the TI-ADC2 in the mixers 43, 44, respectively, to thereby frequency-convert the receiver calibration signal in the form of an IQ signal (step S4). In this way, the frequency conversion unit 4 performs frequency conversion to extract the IQ signal, which has a frequency of 0, relative to the sample signals after AD conversion by each Sub-ADC 23 of the TI-ADC2.

[0102] Next, the S / P conversion unit 5 performs serial-to-parallel conversion processing (step S5) to output the sample signals (IQ signals) of each Sub-ADC 23, which have been frequency converted in step S4 and input as serial signals from the frequency conversion unit 4, to a plurality of signal paths provided in parallel corresponding to each Sub-ADC 23. As a result, the IQ signals are separated (distributed) in the form sampled by each Sub-ADC 23 to the signal paths corresponding to that Sub-ADC 23 (respective signal paths provided with individual frequency characteristic detection units 6a, 6b, 6c in FIG. 1).

[0103] 1 illustrates an example of S / P conversion processing assuming a configuration in which the TI-ADC 2 has, for example, three Sub-ADCs 23, and individual frequency characteristic detectors 6a, 6b, and 6c are provided in three signal paths corresponding to each of the Sub-ADCs 23. The present invention is not limited to this, and S / P conversion processing can be performed regardless of the number of Sub-ADCs 23 and individual frequency characteristic detectors 6 that make up the TI-ADC 2.

[0104] Following the serial-to-parallel conversion process in step S5 above, the individual frequency characteristic detectors 6a, 6b, and 6c corresponding to the respective Sub-ADCs 23 perform a process of detecting the frequency characteristics of the sample signals of the respective Sub-ADCs 23 input from the S / P converter 5. Specifically, the individual frequency characteristic detectors 6a, 6b, and 6c use LPF 61 to filter the sample signals (IQ signals) of the respective Sub-ADCs 23 input thereto to remove high-frequency components, and then use amplitude / phase calculator 62 to calculate the amplitude and phase of the calibration signal from the IQ signals from which the high-frequency components have been removed (step S6).

[0105] The information on the amplitude and phase of the calibration signal calculated in step S6 above is input to the mismatch calculation unit 72 that constitutes the ADC calibration control unit 71. The mismatch calculation unit 72 compares the amplitude and phase calculated in step S6 with the detection values ​​of the signal paths corresponding to each Sub-ADC 23, and calculates the mismatch characteristics between the Sub-ADCs 23 (step S7).

[0106] Next, based on the mismatch characteristics between the Sub-ADCs 23 calculated in step S7 above, the correction information calculation unit 73 calculates correction information for correcting the mismatch between the Sub-ADCs 23 from the mismatch characteristics between these Sub-ADCs 23 (step S8).

[0107] Furthermore, the interleave correction unit 74 controls the above-mentioned correction processing unit based on the correction information calculated by the correction information calculation unit 73, and performs control to correct the mismatch calculated in step S7 between the Sub-ADCs 23 that are the subject of this correction. Well-known techniques can be applied to the mismatch correction control performed by the correction processing unit based on the correction information.

[0108] The above-described series of calibration control operations in the ADC calibration device 10 according to this embodiment will be described in more detail with reference to FIG.

[0109] 9 is a schematic diagram showing a signal processing system for a calibration signal in the ADC calibration device 10 according to this embodiment and the signal characteristics of a processed signal in the signal processing system. For convenience, Fig. 9 illustrates the configuration of a signal processing system in which the TI-ADC 2 has, for example, two Sub-ADCs 23 (hereinafter referred to as Sub-ADC(#1) and Sub-ADC(#2)), and two individual frequency characteristic detectors 6a and 6b corresponding to these Sub-ADC(#1) and Sub-ADC(#2), respectively.

[0110] In Figure 9, symbol A indicates the signal characteristics of the calibration signal (FM modulated wave) used in the ADC calibration device 10 of this embodiment, and symbol B indicates the signal characteristics of the sample signal after frequency conversion of the ADC (Sub-ADC (#1)) and ADC (Sub-ADC (#2)) that make up the TI-ADC2.

[0111] Furthermore, symbol C11 indicates the frequency characteristics (amplitude characteristics) of the sample signal from Sub-ADC(#1) flowing through the signal path corresponding to Sub-ADC(#1), symbol C12 indicates the frequency characteristics (amplitude characteristics) of the sample signal from Sub-ADC(#2) flowing through the signal path corresponding to Sub-ADC(#2). Furthermore, symbol D11 indicates the frequency characteristics (phase characteristics) of the sample signal from Sub-ADC(#1) flowing through the signal path corresponding to Sub-ADC(#1), and symbol D12 indicates the frequency characteristics (phase characteristics) of the sample signal from Sub-ADC(#2) flowing through the signal path corresponding to Sub-ADC(#2).

[0112] As shown in FIG. 9, in the ADC calibration device 10 of this example, the TI-ADC 2 receives an FM modulated wave having a characteristic (A) that changes linearly with time from the calibration signal generator 1 as a calibration signal.

[0113] In the TI-ADC2, the input calibration signal is sampled by the Sub-ADC (#1) and Sub-ADC (#2) at predetermined sampling frequencies, and the resulting sample signals are output serially.

[0114] The timing detection unit 3 detects the start timing of the calibration signal from the sample signals generated by Sub-ADC (#1) and Sub-ADC (#2) output from TI-ADC2 based on, for example, a level on / off pattern associated with the calibration signal, and generates a local signal using the local oscillator 41 of the frequency conversion unit 4 at the detected start timing.

[0115] Next, the frequency converter 4 performs a process of down-converting the receiver calibration signal to DC by multiplying the generated local signal and the local signal with a phase shifted by π / 2 by the sample signal from Sub-ADC (#1) and the sample signal (IQ signal) from Sub-ADC (#2) of the TI-ADC 2, respectively, using mixers 44 and 43. Depending on the frequency of the receiver calibration signal, up-conversion may also be performed.

[0116] The calibration signal after down-conversion takes on discrete values ​​relative to the input calibration signal (see characteristic (A)), as shown in characteristic B. The reason the calibration signal after down-conversion takes on discrete values ​​is that it reflects the gap time corresponding to the sampling frequency in the AD conversion process in TI-ADC2's Sub-ADC (#1) and Sub-ADC (#2).

[0117] Thereafter, the S / P conversion unit 5 performs serial-parallel conversion processing on the down-converted sample signals from Sub-ADC (#1) and Sub-ADC (#2) input in order from the frequency conversion unit 4, and inputs the sample signal from Sub-ADC (#1) to the upper signal path in Figure 9, while inputting the sample signal from Sub-ADC (#2) to the lower signal path in Figure 9.

[0118] Thereafter, in the signal path corresponding to Sub-ADC(#1), the individual frequency characteristic detection unit 6a filters the sample signal from the Sub-ADC(#1) using the LPF 61, and then executes processing to detect the frequency characteristics of the sample signal using the amplitude / phase calculation unit 62. Here, the individual frequency characteristic detection unit 62a is configured to detect, for example, the amplitude characteristic (Level) exemplified as characteristic C11 in Fig. 9 and the phase characteristic (Phase) exemplified as characteristic D11 for the sample signal from the Sub-ADC(#1).

[0119] Meanwhile, in the signal path corresponding to Sub-ADC (#2), the individual frequency characteristic detection unit 6b filters the sample signal from the Sub-ADC (#2) using an LPF 61, and then detects the frequency characteristics of the sample signal using an amplitude / phase calculation unit 62. Here, the individual frequency characteristic detection unit 62b is configured to detect, for example, the amplitude characteristic (Level) exemplified as characteristic C12 in Fig. 9 and the phase characteristic (Phase) exemplified as characteristic D12 for the sample signal from the Sub-ADC (#2).

[0120] (Calculation of mismatch characteristics) Fig. 10 shows a comparative example of the amplitude characteristic C11 (or phase characteristic D11) of the sample signal by Sub-ADC (#1) detected by the individual frequency characteristic detector 6a provided in the signal path in the upper part of Fig. 9, and the amplitude characteristic C12 (or phase characteristic D12) of the sample signal by Sub-ADC (#2) detected by the individual frequency characteristic detector 6b provided in the signal path in the lower part of Fig. 9. In Fig. 10, the upper part shows an example of detection of the sample signal by Sub-ADC (#1), and the lower part shows an example of detection of the sample signal by Sub-ADC (#2).

[0121] From the comparative example shown in FIG. 10, the relationship between the amplitude characteristic C11 of the sample signal obtained by Sub-ADC (#1) and the amplitude characteristic C12 of the sample signal obtained by Sub-ADC (#2) can be considered as follows. When the frequency is the same (ωt = ω't), ideally, both (amplitude characteristic C11 and amplitude characteristic C12) are assumed to have the same value. However, in reality, the two have different values ​​due to the frequency characteristics and mismatch between Sub-ADC (#1) and Sub-ADC (#2) (see FIG. 10). Taking these characteristics into consideration, the mismatch calculation unit 72 (see FIGS. 1 and 2) can calculate the amplitude mismatch characteristic between the amplitude characteristic C11 of the sample signal obtained by Sub-ADC (#1) shown in the upper part of FIG. 9 and the amplitude characteristic C12 of the sample signal obtained by Sub-ADC (#2) shown in the lower part of FIG. 9.

[0122] Similarly, the mismatch calculation section 72 can calculate the phase mismatch characteristics between the phase characteristics D11 of the sample signal by the Sub-ADC (#2) shown in the upper part of Figure 9 and the amplitude characteristics D12 of the sample signal by the Sub-ADC (#2) shown in the lower part of Figure 9.

[0123] (Example of calculating mismatch characteristics) The calculation of the mismatch characteristics in the mismatch calculation section 72 of the ADC calibration apparatus 10 according to this embodiment will be described below using a specific example. Now the calibration signal is Acos{ω(t) t+Δθ} (A is amplitude, t is time, ω(t) is angular frequency, Δθ is initial phase (undefined value)) Let us assume that: In this case, the measurement frequency f can be expressed as follows:

number

[0124] When this signal is frequency converted (down-converted) at angular frequency ω´(t),

number

[0125] In this case, if ω(t) = ω´(t), then

number

number

[0126] In the case of TI-ADC, the amplitude and phase are independent for each path corresponding to the Sub-ADC (or ADD core), so the baseband signal for each path is

number

[0127] For example, if you want to obtain the mismatch characteristics based on path k=0,

number

number

[0128] (About sampling interpolation) The mismatch characteristics described above require calculation accuracy as high as possible in order to obtain accurate correction information for correcting the mismatch characteristics.

[0129] In this regard, the actual baseband signal (see characteristic B in Figure 9) is a discrete value, and when a chirp signal is used as the calibration signal, differences in sampling timing between sub-ADCs (or between ADC cores) can cause deviations in the measurement frequency, which can degrade the accuracy of acquiring mismatch characteristics.

[0130] As a countermeasure, the ADC calibration device 10 according to this embodiment performs sampling interpolation to eliminate the difference in sampling timing between sub-ADCs (or between ADC cores), thereby making it possible to obtain mismatch correction at the same frequency between sub-ADCs (or between ADC cores).

[0131] 11 is a schematic diagram for explaining sampling interpolation in the ADC calibration apparatus 10 according to this embodiment, in which (a) shows an image of extracting characteristics of sample signals from two Sub-ADCs #1 and #2 that are the targets of sampling interpolation, and (b) shows an image of applying sampling interpolation to the characteristics of the extracted sample signals to derive mismatch characteristics between Sub-ADCs #1 and #2. Note that in Fig. 11, the horizontal axis represents time and the vertical axis represents level (amplitude) or phase, and for convenience, the amplitude and phase characteristics are shown together on a single graph.

[0132] In the ADC calibration device 10 of this embodiment, during sampling interpolation, for example, as shown in Figure 11(a), the sampling timing t is converted to a frequency (the frequency corresponding to the sampling timing t is read), and the amplitude and phase characteristics E11 and E12 detected by the individual frequency characteristic detection units 6a and 6b corresponding to Sub-ADC #1 and Sub-ADC #2, respectively, for that frequency are obtained.

[0133] The amplitude and phase characteristics E11 and E12 acquired in this procedure have a frequency shift due to the difference in sampling timing between Sub-ADC #1 and Sub-ADC #2. Therefore, in the ADC calibration device 10, as the next step, for example, a timing interpolation processing unit 72a (see FIG. 2) provided in the mismatch calculation unit 72 acquires amplitude and phase characteristics for the same frequency by interpolation processing. An example of interpolation is linear interpolation.

[0134] 11(b), the timing interpolation processing unit 72a calculates timing t using, for example, characteristic E11 of Sub-ADC #1 as a reference, and obtains amplitude and phase characteristic E12 for the frequency of Sub-ADC #2 corresponding to the timing t by linear interpolation, etc. Next, the mismatch calculation unit 72 calculates mismatch characteristics between the two from the characteristic E11 of Sub-ADC #1 and characteristic E12 of Sub-ADC #2 for the same frequency that have been obtained.

[0135] According to the configuration of the mismatch calculation unit 72 including the timing interpolation processing unit 72a having the above-mentioned sampling interpolation function, it is possible to obtain mismatch characteristics at the same frequency for the sample signal by the Sub-ADC (#1) and the sample signal by the Sub-ADC (#2), thereby improving the accuracy of mismatch correction.

[0136] In addition, FIG. 11(b) shows an example in which the timing interpolation processing unit 72a has a sampling interpolation function that acquires characteristics E11 and E12 of the same frequency converted from timing t using the sample signal by the Sub-ADC (#1) as a reference.

[0137] However, the present invention is not limited to this, and the timing interpolation processing unit 72a may have a function of, for example, using the sample signal by Sub-ADC(#1) as a reference, acquiring characteristics on both sides of the timing t of the sample signal by Sub-ADC(#1), or an average value of the characteristics on both sides, and setting the acquired characteristics as a sampling correction value. Even such a sampling interpolation function can sufficiently contribute to improving the accuracy of mismatch correction, depending on the supported frequency range, frequency pattern, etc. of the calibration signal.

[0138] As described above, the ADC calibration device 10 according to this embodiment is an ADC calibration device 10 that calibrates the TI-ADC 2 that operates a plurality of ADCs 23 in a time interleave (TI) manner.

[0139] The ADC calibration device 10 of this embodiment is configured to include: a calibration signal generator 1 that generates, as a calibration signal to be input to the TI-ADC 2, a frequency-modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range; a frequency conversion unit 4 that performs frequency conversion in the TI-ADC 2 to extract sample signals obtained by AD converting the calibration signal at a predetermined sampling frequency using multiple ADCs 23; an S / P conversion unit 5 that outputs the extracted IQ signals to multiple signal paths that are provided in parallel corresponding to the multiple ADCs 23; individual frequency characteristic detection units 6 a, 6 b, and 6 c that are provided in each of the multiple signal paths and individually detect the frequency characteristics of the sample signals for each of the multiple ADCs 23; a mismatch calculation unit 72 that calculates the frequency characteristics of the mismatch characteristics between the multiple ADCs 23 from the frequency characteristics of the sample signals for each of the multiple ADCs 23; and a correction information calculation unit 73 that calculates correction information for correcting the mismatch between the multiple ADCs 23 from the frequency characteristics of the mismatch characteristics.

[0140] With this configuration, the ADC calibration device 10 according to this embodiment uses, as a calibration signal, a frequency-modulated wave having a frequency pattern in which the frequency changes over time within the supported frequency range, eliminating the need to switch frequencies each time calibration is performed, shortening the calibration time, and enabling the circuitry for generating the calibration signal and receiving the calibration signal to detect mismatch characteristics between the ADCs 23 to be realized with a simple and inexpensive structure. Furthermore, by selecting a frequency pattern, it becomes possible to perform calibration at low cost and in a short time, even for a time-interleaved ADC with a wide bandwidth and high frequency resolution.

[0141] Furthermore, the ADC calibration device 10 according to this embodiment is configured such that the calibration signal generator 1 generates a frequency-modulated wave having a frequency pattern in which the frequency increases or decreases linearly over time.

[0142] With this configuration, the ADC calibration device 10 according to this embodiment can easily calculate mismatch characteristics and correction information between ADCs 23 for the corresponding frequency range by inputting a calibration signal once, while changing the frequency in a desired linearly changing frequency pattern.

[0143] Furthermore, the ADC calibration device 10 according to this embodiment has a configuration in which the calibration signal generator 1 generates a frequency-modulated wave having a frequency pattern in which the frequency increases or decreases stepwise over time.

[0144] With this configuration, the ADC calibration device 10 according to this embodiment can easily calculate mismatch characteristics and correction information between ADCs 23 for the corresponding frequency range by inputting a calibration signal once while changing the frequency in a desired frequency pattern that changes in stages.

[0145] Furthermore, in the ADC calibration device 10 of this embodiment, the calibration signal generator 1 generates a calibration signal that is further associated with a level on / off pattern in which the level is on at the start position of the calibration signal and the level is off at the end position, and the ADC calibration device 10 further includes a timing detection unit 3 that detects the timing of the start position and end position of the calibration signal from the level on / off pattern in accordance with the AD conversion process, and a frequency conversion unit 4 that performs the above-mentioned frequency conversion in the section from the start position to the end position of the calibration signal.

[0146] With this configuration, the ADC calibration device 10 of this embodiment can reliably and accurately detect the timing of the start and end positions of a calibration signal from the level on / off pattern associated with the calibration signal, and can improve the accuracy of calculating the mismatch characteristics between multiple ADCs 23 and the correction information that corrects the mismatch between multiple ADCs 23 for the corresponding frequency range.

[0147] Furthermore, the ADC calibration device 10 according to this embodiment may be configured such that the calibration signal generator 1 generates a trigger signal indicating the signal-on timing of the calibration signal in synchronization with the generation of the frequency-modulated wave, and further includes a timing detection unit 3 that detects the timing of the start position of the calibration signal from the trigger signal in synchronization with the AD conversion process and estimates the timing of the end position of the calibration signal based on the start position of the calibration signal and the corresponding frequency range, and the frequency conversion unit 4 performs the above-mentioned frequency conversion for the section from the start position to the end position of the calibration signal.

[0148] With this configuration, the ADC calibration device 10 of this embodiment can accurately detect the start position of the calibration signal from the signal pattern of the calibration signal, and can also accurately detect the end position of the calibration signal taking into account the supported frequency range, thereby improving the accuracy of calculating the mismatch characteristics between multiple ADCs 23 and the correction information that corrects the mismatch between multiple ADCs 23 for the supported frequency range.

[0149] In addition, the ADC calibration device 10 according to this embodiment is further configured to include a corresponding frequency range recognition unit 75a that recognizes the corresponding frequency range of the calibration signal, and a sweep speed variable control unit 75 that variably controls the sweep speed by selecting the sweep speed of the calibration signal according to the recognized corresponding frequency range.

[0150] With this configuration, the ADC calibration device 10 of this embodiment variably controls the sweep speed so that the calibration signal is swept at a slow speed when the supported frequency range is relatively narrow, and the calibration signal is swept at a faster speed when the supported frequency range is wide, thereby enabling mismatch characteristics that match the supported frequency range and accurate calculation of correction information.

[0151] Furthermore, the ADC calibration device 10 according to this embodiment has a configuration in which the individual frequency characteristic detection units 6a, 6b, and 6c individually detect the frequency characteristics related to the amplitude, phase, and DC offset of the sample signal for each of the multiple ADCs 23, and the mismatch calculation unit 72 calculates the differences in the frequency characteristics related to the amplitude, phase, and DC offset of the sample signal for each of the multiple ADCs 23 as the mismatch characteristics between the multiple ADCs 23.

[0152] With this configuration, the ADC calibration device 10 according to this embodiment can calculate mismatch characteristics and correction information between the multiple ADCs 23 for each of the items of amplitude, phase, and DC offset, and can easily correct mismatches related to each of the items between the multiple ADCs 23 based on the correction information.

[0153] Moreover, the ADC calibration device 10 according to this embodiment further includes a timing interpolation processing unit 72a that calculates, by interpolation from the detected values ​​of the amplitude, phase, and DC offset of the sample signal for each of the plurality of ADCs 23, values ​​of the amplitude, phase, and DC offset of the sample signal at the same frequency and time as interpolated values, and the mismatch calculation unit 72 is configured to calculate the mismatch characteristics between the plurality of ADCs 23 based on the interpolated values ​​at the same frequency and time calculated by the timing interpolation processing unit 72a.

[0154] With this configuration, the ADC calibration device 10 of this embodiment calculates mismatch characteristics between multiple ADCs 23 using the amplitude, phase, and DC offset values ​​(interpolated values) of sample signals at the same frequency and time calculated (interpolated) by the timing interpolation processing unit 72a, thereby improving the accuracy of calculating mismatch characteristics and correction information and also improving the accuracy of mismatch correction.

[0155] In addition, the ADC calibration device 10 according to this embodiment further includes a temperature sensor 8 that detects the temperature inside the device body, and a calibration time notification control unit 76 that prompts the user to perform calibration when the temperature sensor 8 detects a temperature that is either below or above a preset temperature range.

[0156] With this configuration, the ADC calibration device 10 of this embodiment notifies the user that calibration of the TI-ADC2 is necessary when the temperature inside the device body drops below or exceeds a preset temperature range, thereby enabling timely calibration to be performed at all times and preventing inaccurate AD conversion processing from occurring due to long periods of time without calibration.

[0157] In addition, the ADC calibration device 10 of this embodiment further includes an interleave correction unit 74 that performs interleave correction of the TI-ADC2 to eliminate mismatch characteristics between multiple ADCs 23 based on the correction information calculated by the correction information calculation unit 73, and a correction information table 74a that stores correction information corresponding to temperatures within the above-mentioned temperature range, and the interleave correction unit 74 is configured to obtain correction information corresponding to the temperature inside the device body detected by the temperature sensor 8 from the correction information table 74a and perform interleave correction.

[0158] With this configuration, the ADC calibration device 10 according to this embodiment has the advantage that, since individual frequency characteristics are often determined according to temperature, correction information (correction values) according to temperature is measured in advance and stored as calibration data, and interleaved correction can be performed using the calibration data without recalibration.

[0159] Furthermore, the ADC calibration method according to this embodiment is an ADC calibration method that uses the ADC calibration device 10 having the above-described configuration to calibrate a TI-ADC2 that operates multiple ADCs 23 in a time interleaved manner, and includes a calibration signal generation step (S1) that generates, as a calibration signal to be input to the TI-ADC2, a frequency-modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range, and a frequency conversion step (S4) that performs frequency conversion in the TI-ADC2 to extract sample signals obtained by AD converting the calibration signal at a predetermined sampling frequency using the multiple ADCs 23, as IQ signals. The method is characterized by including a serial-to-parallel conversion step (S5) of outputting the extracted IQ signal to a plurality of signal paths arranged in parallel corresponding to the plurality of ADCs 23; an individual frequency characteristic detection step (S6) arranged in each of the plurality of signal paths for individually detecting the frequency characteristics of the sample signal for each of the plurality of ADCs 23; a mismatch calculation step (S7) of calculating the frequency characteristics of the mismatch characteristics between the plurality of ADCs 23 from the frequency characteristics of the sample signal for each of the plurality of ADCs 23; and a correction information calculation step (S8) of calculating correction information for correcting the mismatch between the plurality of ADCs 23 from the frequency characteristics of the mismatch characteristics.

[0160] According to the ADC calibration method of this embodiment, a frequency-modulated wave having a frequency pattern in which the frequency changes over time within the corresponding frequency range is used as the calibration signal, eliminating the need to switch frequencies each time calibration is performed, shortening the calibration time, and enabling the circuitry for generating the calibration signal and receiving the calibration signal to detect mismatch characteristics between the ADCs 23 to be realized with a simple and inexpensive structure. Furthermore, by selecting the frequency pattern, it becomes possible to perform calibration at low cost and in a short time, even for a time-interleaved ADC with a wide bandwidth and high frequency resolution.

[0161] (Digitizer with ADC calibration device) Next, an embodiment of the digitizer according to this embodiment will be described. Fig. 12 is a block diagram showing an embodiment of a digitizer 100 according to the present invention, which uses an ADC calibration device according to the present invention (see the ADC calibration device 10 shown in Fig. 1).

[0162] As shown in FIG. 12, the digitizer 100 according to this embodiment comprises a calibration signal generator 101, a TI-ADC 102, path switching units 103 and 104, a frequency characteristic monitoring unit 9, an ADC calibration control unit 105, and a waveform acquisition unit 108.

[0163] Path switching unit 103 selectively switches a signal path between one output terminal 103c and either input terminal 103a, which inputs a signal to be observed, or input terminal 103b, which inputs a calibration signal generated by calibration signal generator 101. Path switching unit 103 is not limited to a selective switching configuration, and may be configured to simply branch (for example, outputting a signal from input terminal 103a or input terminal 103b to output terminal 104c).

[0164] The path switching unit 104 selectively switches a signal path between an input terminal 104a that receives an output signal from the TI-ADC 102 and either an output terminal 104b or an output terminal 104c. The path switching unit 104 is not limited to a selective switching configuration, and may be configured to simply branch (for example, to distribute a signal from the input terminal 104a to the output terminal 104b or the output terminal 104c).

[0165] In the configuration of the digitizer 100 shown in Figure 12, the calibration signal generator 101, the TI-ADC 102, and the frequency characteristic monitoring unit 9 have configurations equivalent to those of the calibration signal generator 1, the TI-ADC 2, and the frequency characteristic monitoring unit 9 (which have a timing detection unit 3, a frequency conversion unit 4, an S / P conversion unit 5, and an individual frequency characteristic detection unit 6), which are components of the ADC calibration device 10 (see Figure 1) described above.

[0166] ADC calibration control unit 105 is equivalent to ADC calibration control unit 71, which is a component of ADC calibration device 10 (see FIG. 1), and includes mismatch calculation unit 106 and interleave correction unit 107. Although only mismatch calculation unit 106 and interleave correction unit 107 are shown in FIG. 12, it goes without saying that ADC calibration control unit 105 includes functional blocks corresponding to the respective functional units within ADC calibration control unit 71 of ADC calibration device 10.

[0167] As described above, in the digitizer 100 according to this embodiment, the calibration signal generator 101, the TI-ADC 102, the frequency characteristic monitor 9, and the ADC calibration control unit 105 constitute the ADC calibration device 10 according to this embodiment (see FIG. 1 ). More specifically, the digitizer 100 according to this embodiment can achieve an ADC calibration function equivalent to that of the ADC calibration device 10 according to this embodiment by switching the path switching unit 103 so that the input terminal 103b is connected to the output terminal 103c, and by switching the path switching unit 104 so that the input terminal 104a is connected to the output terminal 104b. An operating state in which this ADC calibration function can be achieved is referred to as, for example, an ADC calibration mode.

[0168] On the other hand, the digitizer 100 according to this embodiment can realize a waveform observation function of a signal (Input: input signal) input from the input terminal 103a by switching the path switching units 103 and 104 to the side opposite to the ADC calibration mode side shown in Fig. 12. An operation mode that can realize this waveform observation function is referred to as, for example, a waveform observation mode.

[0169] In the digitizer 100 according to this embodiment, the setting of the ADC calibration mode or waveform observation mode can be performed, for example, by manually switching the path switching units 103 and 104. Alternatively, a control unit (not shown) for the entire device including the ADC calibration control unit 105 and an operation unit may be provided, and the control unit may automatically switch the path switching units 103 and 104 in response to the setting operation of the operation unit to the ADC calibration mode or waveform observation mode. The path switching units 103 and 104 may also be configured to simply branch signals.

[0170] Next, a description will be given of the operation of the digitizer 100 according to this embodiment. First, the operation in the ADC calibration mode will be described.

[0171] In the ADC calibration mode, in the digitizer 100, a calibration signal, which is an FM-modulated wave generated by the calibration signal generator 101, is input to the TI-ADC 102 via the path switching unit 103. The TI-ADC 102 performs A / D conversion of the input calibration signal in each ADC to generate a sample signal, and inputs the sample signal to the frequency characteristic monitoring unit 9 via the path switching unit 104. In the frequency characteristic monitoring unit 9, the timing detection unit 3, the frequency conversion unit 4, and the S / P conversion unit 5 perform the signal processing described above, and the individual frequency characteristic detection units 6a, 6b, and 6c detect the individual frequency characteristics (amplitude, phase) for each sample signal in each ADC constituting the TI-ADC 102, and input the detection results to the ADC calibration control unit 105.

[0172] In the ADC calibration control unit 105, the mismatch calculation unit 106 acquires the frequency characteristics (amplitude, phase) for each sample signal at each ADC input from the individual frequency characteristic detection units 6a, 6b, and 6c through the above-described processing, compares the frequency characteristics, and calculates mismatch characteristics related to the frequency characteristics between each ADC. The interleave correction unit 107 calculates correction information (correction values) capable of correcting the mismatch characteristics calculated by the mismatch calculation unit 106, and controls each ADC constituting the TI-ADC 102 to perform correction (interleave correction) using this correction information. This interleave correction is not limited to being performed in the ADC calibration mode, but may also be performed during execution of the waveform observation mode.

[0173] Next, the operation in waveform observation mode will be described. In waveform observation mode, digitizer 100 outputs an input signal (Input) input from input terminal 103a of path switching unit 103 to output terminal 103c. The input signal may be, for example, an intermediate frequency (IF) signal converted to an IF by a frequency conversion unit (see frequency conversion unit 151 in FIG. 13) of a signal analysis device such as a spectrum analyzer.

[0174] The IF signal output to output terminal 103c of path switching unit 103 is input to TI-ADC 102. TI-ADC 102 performs A / D conversion processing on the input IF signal in each ADC to generate a sample signal, and outputs the sample signal from output terminal 104c of path switching unit 104. The signal (Dm) output from output terminal 104c of path switching unit 104 is further input to waveform acquisition unit 108 via interleave correction unit 107 in ADC calibration control unit 105.

[0175] Here, the interleave correction unit 107 may perform interleave correction of the ADC using the correction information already calculated in the ADC calibration mode described above, in accordance with the input of the above signal from the TI-ADC 102 via the path switching unit 104.

[0176] The waveform acquisition unit 108 performs processing to observe the waveform of the signal input via the interleave correction unit 107. In the waveform observation mode, the waveform of the input signal is acquired by the procedure described above.

[0177] According to the configuration of the digitizer 100 of this embodiment shown in FIG. 12, the ADC calibration control function performs ADC calibration at appropriate timing, thereby enabling highly accurate waveform observation of the input signal while reducing mismatch characteristics between the ADCs that make up the TI-ADC 102.

[0178] Furthermore, in the configuration shown in Figure 12, if the ADC calibration control unit 105 has a configuration similar to that of the ADC calibration control unit 71 (see Figure 2) of the above-mentioned ADC calibration device 10 (see Figure 1), then the control functions thereof, for example, the sweep speed variable control unit 75 and the calibration time notification control unit 76, can also be used in the digitizer 100 of this embodiment.

[0179] As a result, the digitizer 100 of this embodiment has both a sweep speed variable control function by the sweep speed variable control unit 75 that varies the sweep speed in accordance with, for example, the target frequency of the calibration signal, and a control function by the calibration time notification control unit 76 that notifies that it is time to perform an ADC calibration operation, making it possible to smoothly carry out calibration control and further increase convenience when observing the waveform of the input signal with high precision.

[0180] As described above, the digitizer 100 according to this embodiment has a TI-ADC 102 that operates a plurality of ADCs 23 in a time interleaved manner, and outputs sample signals obtained by AD converting an input signal (Input) using the plurality of ADCs 23 at a predetermined sampling frequency. It also has an ADC calibration device 10 that calibrates the TI-ADC 23. The ADC calibration device 10 is equivalent to that shown in FIG. 1 and includes a calibration signal generator 101 that generates, as a calibration signal, a frequency-modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range, and inputs the calibration signal to the TI-ADC 102 instead of the input signal. The system is equipped with a frequency conversion unit 4 that performs frequency conversion to extract the obtained sample signal as an IQ signal, an S / P conversion unit 5 that outputs the extracted IQ signal to a plurality of signal paths that are provided in parallel corresponding to the plurality of ADCs 23, individual frequency characteristic detection units 6 (6a, 6b, 6c) that are provided in each of the plurality of signal paths and that individually detect the frequency characteristics of the sample signal for each of the plurality of ADCs 23, a mismatch calculation unit 106 that calculates the frequency characteristics of the mismatch characteristics between the plurality of ADCs 23 from the frequency characteristics of the sample signal for each of the plurality of ADCs 23, and an interleave correction unit 107 that calculates correction information for correcting the mismatch between the plurality of ADCs 23 from the frequency characteristics of the mismatch characteristics and performs interleave correction to correct the mismatch based on the correction information.

[0181] With this configuration, the digitizer 100 of this embodiment employs an ADC calibration device 10 that can perform calibration at low cost and in a short time, even for the TI-ADC 102, which has a wide bandwidth and high frequency resolution, thereby improving the calibration accuracy of the TI-ADC 102 and ultimately improving the basic function of the digitizer, which performs AD conversion on the input signal using the TI-ADC 102 and outputs it.

[0182] (Signal analysis device using a digitizer with an ADC calibration device) Next, an embodiment of a signal analyzing device according to the present invention will be described. Fig. 13 is a block diagram showing an embodiment of a signal analyzing device 150 according to the present invention, which employs a digitizer according to the present invention (see digitizer 100 shown in Fig. 12).

[0183] As shown in FIG. 13, the signal analysis device 150 according to this embodiment is configured to include a frequency conversion unit 151, a calibration signal generator 155, an A / D conversion device 156, path switching units 157 and 158, a frequency characteristic monitoring unit 9, a control unit 160, and an operation display unit 170.

[0184] The frequency conversion unit 151 is composed of a mixer 152, a local oscillator 153, and a filter 154. The frequency conversion unit 151 converts an input signal S IN and a local signal L generated by a local oscillator 153 are mixed, and the mixed signal passes through a filter 154 to generate an input signal S IN is converted into an intermediate frequency signal.

[0185] Calibration signal generator 155 generates a calibration signal for calibrating a TI-ADC that constitutes A / D conversion device 156, which will be described later. Calibration signal generator 155 is equivalent to, for example, calibration signal generator 1 (see FIG. 1), which is a component of ADC calibration device 10 described above.

[0186] The A / D conversion device 156 performs A / D conversion on the signals (calibration signals, intermediate frequency signals) input via the path switching unit 157 and outputs the converted signals, and has a configuration equivalent to that of, for example, the TI-ADC2 (see Figures 1 and 2), which is a component of the ADC calibration device 10 described above.

[0187] Path switching unit 157 selectively switches a signal path between one of input terminal 157a, which inputs an intermediate frequency signal output by frequency conversion unit 151, or input terminal 157b, which inputs a calibration signal generated by calibration signal generator 155, and one output terminal 157c. Path switching unit 157 is not limited to a selective switching configuration, and may be configured to simply branch (for example, outputting a signal from input terminal 157a or input terminal 157b to output terminal 157c).

[0188] The path switching unit 158 ​​selectively switches a signal path between an input terminal 158a, which inputs an output signal from the A / D conversion device 156, and one of output terminals 158b and 158c to the control unit 160. The path switching unit 158 ​​is not limited to a selective switching configuration, and may be configured to simply branch (for example, by distributing a signal from the input terminal 158a to the output terminal 158b or the output terminal 158c). Here, the output terminal 158b is connected to a mismatch calculation unit 163 in the control unit 160 (described later) via a frequency characteristic monitoring unit 9, and the output terminal 158c is connected to a signal analysis unit 165 in the control unit 160 via an interleave correction unit 164. The frequency characteristic monitoring unit 9 has a configuration equivalent to that of the frequency characteristic monitoring unit 9 (including a timing detection unit 3, a frequency conversion unit 4, an S / P conversion unit 5, and an individual frequency characteristic detection unit 6) of the ADC calibration device 10 (see FIG. 1) described above.

[0189] The control unit 160 includes an operation display control unit 161 , a mode switching control unit 162 , a mismatch calculation unit 163 , an interleave correction unit 164 , and a signal analysis unit 165 .

[0190] The operation display control unit 161 receives operation input from the operation unit of the operation display unit 170, which has the functions of an operation unit and a display unit, and controls the display of various information on the display unit.

[0191] The mode switching control unit 162 is a functional unit that selectively sets the operation mode of the signal analyzing device 150 between the ADC calibration mode and the signal analysis mode based on a predetermined mode setting operation input from the operation display unit 170 .

[0192] When the ADC calibration mode is set, the mismatch calculation unit 163 acquires the frequency characteristics (amplitude, phase) of each sample signal in each ADC constituting the TI-ADC2 of the A / D conversion device 156, calculated by the individual frequency characteristic detection units 6a, 6b, and 6c of the frequency characteristic monitoring unit 9, and compares the frequency characteristics to calculate mismatch characteristics related to the frequency characteristics between each ADC. The interleave correction unit 164 calculates correction information (correction values) capable of correcting the mismatch characteristics calculated by the mismatch calculation unit 163, and uses this correction information to perform interleave correction on each ADC constituting the TI-ADC2.

[0193] The signal analysis unit 165 is a functional unit that performs analysis processing of the signal to be analyzed that is input to the signal analysis device 150 when the signal analysis mode is set.

[0194] The operation and display unit 170 is composed of an operation unit for performing various operations such as setting operations, and a display unit for displaying various information such as mismatch characteristics between the ADCs that make up the TI-ADC2 of the A / D conversion device 156, signal analysis results, etc. Here, an example is shown in which the operation and display unit 170 has the functions of both the operation and display unit, but the operation and display unit 170 may also be configured so that the operation and display unit are independent of each other.

[0195] As described above, in the signal analyzing device 150 according to this embodiment, the calibration signal generator 155, the A / D converting device (TI-ADC) 156, the frequency characteristic monitoring unit 9, and the mismatch calculating unit 163 in the control unit 160 constitute the above-mentioned ADC calibration device 10 (see FIG. 1). Furthermore, in the signal analyzing device 150 according to this embodiment, a configuration in which a path switching unit 157 for inputting a calibration signal or an intermediate frequency signal to the A / D converting device 156 is added to the calibration signal generator 155, the A / D converting device 156 (TI-ADC), the frequency characteristic monitoring unit 9, and the mismatch calculating unit 163 in the control unit 160 constitutes a digitizer 100 (see FIG. 12) using the above-mentioned ADC calibration device 10 (see FIG. 1).

[0196] Next, a description will be given of the operation of the signal analyzing device 150 according to this embodiment. First, the operation in the ADC calibration mode will be described.

[0197] To set the ADC calibration mode, an ADC calibration mode setting operation is performed on the operation display unit 170. The operation display control unit 161 accepts the setting operation, and the mode switching control unit 162 sets the ADC calibration mode based on the setting operation. At that time, the mode switching control unit 162 controls switching of the path switching unit 157 so that the input terminal 157b and the output terminal 157c are connected, and controls switching of the path switching unit 158 ​​so that the input terminal 158a and the output terminal 158b are connected.

[0198] In the ADC calibration mode, in the signal analyzing device 150, a calibration signal, which is an FM-modulated wave generated by the calibration signal generator 155, is input to the A / D conversion device 156 via the path switching unit 157. The A / D conversion device 156 has a TI-ADC2 (see FIGS. 3, 4, and 5), and each ADC performs A / D conversion processing on the input calibration signal to generate a sample signal, which is input to the frequency characteristic monitoring unit 9 via the path switching unit 158. In the frequency characteristic monitoring unit 9, the timing detection unit 3, the frequency conversion unit 4, and the S / P conversion unit 5 perform the signal processing described above, and the individual frequency characteristic detection units 6a, 6b, and 6c detect the individual frequency characteristics (amplitude, phase) for each sample signal in each ADC constituting the TI-ADC2, and input the detection results to the control unit 160.

[0199] In the control unit 160, the mismatch calculation unit 163 acquires the frequency characteristics (amplitude, phase) for each sample signal from each ADC input from the individual frequency characteristic detection units 6a, 6b, and 6c through the above-described process, compares the frequency characteristics, and calculates mismatch characteristics related to the frequency characteristics between the ADCs. Next, the interleave correction unit 164 calculates correction information (correction values) capable of correcting the mismatch characteristics calculated by the mismatch calculation unit 163, and uses this correction information to control interleave correction for each ADC constituting the TI-ADC2. Thereafter, for example, in signal analysis mode, AD conversion processing is performed by the TI-ADC2 that has undergone interleave correction.

[0200] Next, operation in the signal analysis mode will be described. To set the signal analysis mode, a signal analysis mode setting operation is performed on the operation display unit 170. The operation display control unit 161 accepts the setting operation, and the mode switching control unit 162 sets the signal analysis mode based on the setting operation, and performs switching control so that the path switching unit 157 connects the input terminal 157a and the output terminal 157c, and the path switching unit 158 ​​connects the input terminal 158a and the output terminal 158c.

[0201] In the signal analysis mode, the frequency converter 151 converts the input signal S INand a local signal L generated by a local oscillator 153 are mixed, and the mixed signal is passed through a filter 154 to obtain an input signal S IN is converted into an intermediate frequency signal M and output to the path switching unit 157.

[0202] Path switching unit 157 outputs frequency-converted signal M input from frequency conversion unit 151 to input terminal 157a to output terminal 157c. Signal M (IF signal) output to output terminal 157a of path switching unit 157 is input to A / D conversion device 156.

[0203] The A / D conversion device 156 has a TI-ADC configuration, and performs A / D conversion processing on the input signal M in each ADC to generate respective sample signals, and outputs the sample signals from the output terminal 158 c of the path switching unit 158 ​​.

[0204] The signal (Dm) output from the output terminal 158c of the path switching unit 158 ​​is input to the signal analysis unit 165 via the interleave correction unit 164. The signal analysis unit 165 performs an analysis process on the signal to be analyzed after A / D conversion, which is input from the A / D conversion device 156 via the path switching unit 158.

[0205] Furthermore, the operation display control unit 161 controls the display of the analysis result of the signal to be analyzed after A / D conversion on the display unit of the operation display unit.

[0206] According to the configuration of the signal analyzing device 150 of this embodiment shown in FIG. 13, the ADC calibration mode is set at an appropriate timing to calibrate the TI-ADC of the A / D conversion device 156, thereby enabling high-precision signal analysis of the input signal while reducing mismatch characteristics between the ADCs.

[0207] In addition, with regard to the configuration shown in FIG. 13, the control unit 160 may be configured to have control functions equivalent to the sweep speed variable control unit 75 and the calibration time notification control unit 76 in the ADC calibration control unit 71 (see FIG. 2) of the ADC calibration device 10 (see FIG. 1) described above.

[0208] As a result, the signal analysis device 150 according to this embodiment has both a sweep speed variable control function of the sweep speed variable control unit 75 to vary the sweep speed of the calibration signal according to, for example, the target frequency, and a control function of the calibration timing notification control unit 76 to notify that it is time to perform an ADC calibration operation, thereby enabling smooth calibration control and further improving convenience when performing high-precision signal analysis of the input signal.

[0209] As described above, the signal analyzing device 150 according to this embodiment includes a frequency conversion unit 151 that converts the signal to be analyzed to an intermediate frequency and outputs the converted signal, an A / D conversion device 156 having a TI-ADC that operates a plurality of ADCs 23 in a time interleaved manner, a signal analyzing unit 165 that analyzes the signal to be analyzed based on sample signals obtained by AD converting the signal to be analyzed after conversion to the intermediate frequency using the plurality of ADCs 23 at a predetermined sampling frequency, and an ADC calibration device 10 that calibrates the TI-ADC. Here, the ADC calibration device 10 is equivalent to that shown in FIG. 1 (and by providing a mechanism such as a path switching unit 157 for inputting a calibration signal or an intermediate frequency signal to the A / D conversion device 156, it has a configuration equivalent to that of the digitizer 100 shown in FIG. 12), and includes a calibration signal generator 155 that generates a frequency modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range as a calibration signal and inputs the calibration signal to the TI-ADC in place of the signal to be analyzed, a frequency conversion unit 4 that performs frequency conversion in the TI-ADC to extract sample signals obtained by AD converting the calibration signal at a predetermined sampling frequency using a plurality of ADCs 23, and The signal processing unit 160 includes an S / P conversion unit 5 that outputs an IQ signal to a plurality of signal paths that are arranged in parallel corresponding to the plurality of ADCs 23; individual frequency characteristic detection units 6a, 6b, and 6c that are respectively arranged in the plurality of signal paths and that individually detect the frequency characteristics of the sample signals for each of the plurality of ADCs 23; a mismatch calculation unit 163 that calculates the frequency characteristics of the mismatch characteristics between the plurality of ADCs 23 from the frequency characteristics of the sample signals for each of the plurality of ADCs 23; and an interleave correction unit 165 that calculates correction information for correcting the mismatch between the plurality of ADCs 23 from the frequency characteristics of the mismatch characteristics, performs interleave correction to correct the mismatch based on the correction information, and outputs the result to a signal analysis unit 165.

[0210] With this configuration, the signal analyzing device 150 of this embodiment is equipped with an ADC calibration device 10 (see FIG. 1) that can perform calibration at low cost and in a short time, even for a TI-ADC (A / D conversion device 156) that has a wide band and high frequency resolution. By adopting a digitizer 100 (see FIG. 12) that has an improved basic function of AD converting an input signal using the TI-ADC and outputting it, the calibration accuracy of the TI-ADC can be improved, and the basic function as a signal analyzing device that performs AD conversion of the signal to be analyzed using the TI-ADC and performs signal analysis can be improved. [Industrial Applicability]

[0211] As described above, the present invention has the effect of enabling low-cost, short-time calibration even for a time-interleaved ADC with wideband and high frequency resolution, and is useful for an ADC calibration device that is equipped with such a time-interleaved ADC and calibrates it, a digitizer that uses the ADC calibration device, a signal analysis device, and an ADC calibration method in general. [Explanation of symbols]

[0212] 1 Calibration signal generator 2 Time-Interleaved ADC (TI-ADC) 3 Timing detection section 4, 151 Frequency conversion unit 5 Serial-to-parallel conversion section (S / P conversion section) 6, 6a, 6b, 6c Individual frequency characteristic detection section 7, 160 Control unit 8 Temperature Sensor 9 Frequency characteristics monitoring section 10 ADC calibration device 190, 191, 192, 193 Sub ADC 20, 200, 201 ADC Core 21, 28 Power Divider 22 Signal splitter 23, 230, 231, 23 m-1 Analog-to-Digital Converter (ADC) 24 Sampling control section 25 Signal switch 61 Low-pass filter (LPF) 62 Amplitude / phase calculation section 71 ADC calibration control section 72, 163 Mismatch calculation section 72a Timing interpolation processing unit 73 Correction information calculation unit 74 Interleave correction section 75 Sweep speed variable control section 75a Supported frequency range recognition unit 76 Calibration time notification control section 100 digitizer 101, 155 Calibration signal generator 102 TI-ADC 103 Route switching unit (first route switching unit) 104 Route switching unit (second route switching unit) 105 ADC calibration control section 106, 163 Mismatch calculation section 107, 164 Interleave correction section 108 Waveform acquisition section 150 Signal analysis equipment 156 A / D conversion device (TI-ADC) 157 Path switching unit (input path switching unit) 158 Path switching unit (output path switching unit) 160 control section 161 Operation display control unit 162 Mode switching control section 165 Signal analysis section 170 Operation display section

Claims

1. An ADC calibration device (10) for calibrating a TI-ADC (2) that operates a plurality of AD converters (ADCs: 23) in a time interleave (TI) manner, a calibration signal generator (1) that generates a frequency-modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range as a calibration signal to be input to the TI-ADC; a frequency conversion unit (4) that performs frequency conversion in the TI-ADC to extract sample signals obtained by AD converting the calibration signals at a predetermined sampling frequency using the plurality of AD converters as IQ signals; a serial-to-parallel conversion unit (5) that outputs the extracted IQ signals to a plurality of signal paths that are provided in parallel corresponding to the plurality of AD converters; individual frequency characteristic detection units (6a, 6b, 6c) provided in the plurality of signal paths, respectively, for individually detecting frequency characteristics of the sample signals for each of the plurality of AD converters; a mismatch calculation unit (72) that calculates frequency characteristics of mismatch characteristics between the plurality of AD converters from the frequency characteristics of the sample signals for each of the plurality of AD converters; a correction information calculation unit (73) that calculates correction information for correcting mismatches between the plurality of AD converters from the frequency characteristics of the mismatch characteristics; An ADC calibration device comprising:

2. 2. The ADC calibration device according to claim 1, wherein the calibration signal generator generates the frequency modulated wave having the frequency pattern in which the frequency linearly increases or decreases with time.

3. 2. The ADC calibration device according to claim 1, wherein the calibration signal generator generates the frequency modulated wave having the frequency pattern in which the frequency increases or decreases stepwise over time.

4. the calibration signal generator generates the calibration signal further associated with a level-on-off pattern that is level-on at a leading position of the calibration signal and level-off at a trailing position of the calibration signal; a timing detection unit (3) for detecting timings of a start position and an end position of the calibration signal from the level on / off pattern in accordance with the AD conversion process; 2. The ADC calibration device according to claim 1, wherein the frequency conversion unit performs the frequency conversion in a section from a start position to an end position of the calibration signal.

5. the calibration signal generator generates a trigger signal indicating a signal-on timing of the calibration signal in accordance with the generation of the frequency-modulated wave; a timing detection unit (3) that detects the timing of the start position of the calibration signal from the trigger signal in accordance with the AD conversion process, and estimates the timing of the end position of the calibration signal based on the start position of the calibration signal and the corresponding frequency range; 2. The ADC calibration device according to claim 1, wherein the frequency conversion unit performs the frequency conversion in a section from a start position to an end position of the calibration signal.

6. a corresponding frequency range recognition unit (75a) that recognizes the corresponding frequency range of the calibration signal; a sweep speed variable control unit (75) for variably controlling the sweep speed by selecting a sweep speed of the calibration signal according to the recognized corresponding frequency range; 2. The ADC calibration device according to claim 1, further comprising:

7. the individual frequency characteristic detection unit individually detects frequency characteristics related to amplitude, phase, and DC offset of the sample signal for each of the plurality of AD converters; 2. The ADC calibration device according to claim 1, wherein the mismatch calculation unit calculates differences in frequency characteristics regarding amplitude, phase, and DC offset of the sample signal for each of the plurality of AD converters as the mismatch characteristics between the plurality of AD converters.

8. a timing interpolation processing unit (72a) that calculates, by interpolation from detected values ​​of the amplitude, phase, and DC offset of the sample signal for each of the plurality of AD converters, values ​​of the amplitude, phase, and DC offset of the sample signal at a time of the same frequency as that of the plurality of AD converters, as interpolated values; 8. The ADC calibration device according to claim 7, wherein the mismatch calculation unit calculates the mismatch characteristics between the plurality of AD converters based on the interpolated values ​​at the same frequency time calculated by the timing interpolation processing unit.

9. a temperature sensor (8) for detecting the temperature inside the device body; 2. The ADC calibration device according to claim 1, further comprising a calibration time notification control unit (76) that prompts the user to perform the calibration when the temperature sensor detects either a temperature below or above a preset temperature range.

10. an interleave correction unit (74) that performs interleave correction of the TI-ADC to eliminate mismatch characteristics between the plurality of AD converters based on the correction information calculated by the correction information calculation unit; a correction information table (74a) storing the correction information corresponding to each temperature within the temperature range; 10. The ADC calibration device according to claim 9, wherein the interleave correction unit acquires the correction information corresponding to the temperature inside the device body detected by the temperature sensor from the correction information table and performs the interleave correction.

11. A digitizer (100) having a TI-ADC (102) that operates a plurality of AD converters in a time interleaved manner, and outputting a sample signal obtained by AD converting an input signal (Input) by the plurality of AD converters at a predetermined sampling frequency, The apparatus further includes an ADC calibration device (10) for calibrating the TI-ADC, The ADC calibration device a calibration signal generator (101) that generates a frequency-modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range as a calibration signal, and inputs the calibration signal to the TI-ADC in place of the input signal; a frequency conversion unit (4) that performs frequency conversion in the TI-ADC to extract sample signals obtained by AD converting the calibration signals at a predetermined sampling frequency using the plurality of AD converters as IQ signals; a serial-to-parallel conversion unit (5) that outputs the extracted IQ signals to a plurality of signal paths that are provided in parallel corresponding to the plurality of AD converters; individual frequency characteristic detection units (6a, 6b, 6c) provided in the plurality of signal paths, respectively, for individually detecting frequency characteristics of the sample signals for each of the plurality of AD converters; a mismatch calculation unit (106) that calculates frequency characteristics of mismatch characteristics between the plurality of AD converters from the frequency characteristics of the sample signals for each of the plurality of AD converters; an interleave correction unit (107) that calculates correction information for correcting mismatches between the plurality of AD converters from the frequency characteristics of the mismatch characteristics, and performs interleave correction to correct the mismatches based on the correction information; A digitizer comprising:

12. The apparatus comprises a frequency conversion unit (151) that converts a signal to be analyzed into an intermediate frequency and outputs the converted signal, an A / D conversion device (156) having a TI-ADC that operates a plurality of AD converters in a time interleaved manner, a signal analysis unit (165) that analyzes the signal to be analyzed based on a sample signal obtained by AD converting the signal to be analyzed after conversion into the intermediate frequency by the plurality of AD converters at a predetermined sampling frequency, and an ADC calibration device (10) that calibrates the TI-ADC, The ADC calibration device a calibration signal generator (155) that generates a frequency-modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range as a calibration signal, and inputs the calibration signal to the TI-ADC in place of the signal to be analyzed; a frequency conversion unit (4) that performs frequency conversion in the TI-ADC to extract sample signals obtained by AD converting the calibration signals at a predetermined sampling frequency using the plurality of AD converters as IQ signals; a serial-to-parallel conversion unit (5) that outputs the extracted IQ signals to a plurality of signal paths that are provided in parallel corresponding to the plurality of AD converters; individual frequency characteristic detection units (6a, 6b, 6c) provided in the plurality of signal paths, respectively, for individually detecting frequency characteristics of the sample signals for each of the plurality of AD converters; a mismatch calculation unit (163) that calculates frequency characteristics of mismatch characteristics between the plurality of AD converters from the frequency characteristics of the sample signals for each of the plurality of AD converters; an interleave correction unit (164) that calculates correction information for correcting mismatches between the plurality of AD converters from the frequency characteristics of the mismatch characteristics, performs interleave correction for correcting the mismatches based on the correction information, and outputs the result to the signal analysis unit; A signal analysis device comprising:

13. An ADC calibration method for calibrating a TI-ADC (2) that operates a plurality of AD converters (ADCs: 23) in a time interleave (TI) mode using the ADC calibration device according to claim 1, comprising: a calibration signal generating step (S1) of generating a frequency modulated wave whose frequency changes over time in a predetermined frequency pattern within a corresponding frequency range as a calibration signal to be input to the TI-ADC; a frequency conversion step (S4) of performing frequency conversion in the TI-ADC to extract sample signals obtained by AD converting the calibration signals at a predetermined sampling frequency using the plurality of AD converters as IQ signals; a serial-to-parallel conversion step (S5) of outputting the extracted IQ signals to a plurality of signal paths provided in parallel corresponding to the plurality of AD converters; an individual frequency characteristic detection step (S6) provided in each of the plurality of signal paths, for individually detecting the frequency characteristics of the sample signal for each of the plurality of AD converters; a mismatch calculation step (S7) of calculating frequency characteristics of mismatch characteristics between the plurality of AD converters from the frequency characteristics of the sample signals for each of the plurality of AD converters; a correction information calculation step (S8) of calculating correction information for correcting mismatches between the plurality of AD converters from the frequency characteristics of the mismatch characteristics; 1. A method for calibrating an ADC, comprising:

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