Wiring structure, substrate, method of forming wiring structure, electroless plating method, and method of manufacturing substrate

Abstract

To achieve a wiring structure or the like in which an excellent Cu diffusion barrier metal film is formed on the inner wall of a through hole, a bottomed hole, or a trench groove having a high aspect ratio.SOLUTION: The barrier layer includes a CoMn film in which Co is a main component and Mn is added, a content of elements other than Co, Mn, and O in the CoMn film is less than 5 atomic ratio%, and a content of Mn in a surface layer within a range from a surface of the CoMn film on a side of the Cu wire layer to a 7nm portion of the CoMn film is 0.5 atomic ratio% or more. When the layer thickness of the barrier layer on the first opening (11) side of the bottomed hole is T1, the layer thickness of the barrier layer on the side opposite to the first opening is T2, and T1 ≥ T2, T2 / T1 is 10% or more.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a wiring structure, a substrate, a method for forming a wiring structure, an electroless plating method, and a method for manufacturing a substrate. [Background technology]

[0002] Conventionally, a via-last method has been developed to form through silicon vias (TSVs) in LSIs after the wafer process has been completed, as a way to achieve three-dimensional packaging of semiconductors. This method involves etching a silicon substrate to form via holes (through holes), forming an insulating film such as SiO2 on the inner walls of the via holes, and then filling the holes with conductive paste or Cu or other conductors using methods such as sputtering or electroplating.

[0003] In this method, in order to prevent Cu from diffusing into the silicon substrate and insulating film such as SiO2, it is known that a high-melting point metal such as Ti or Ta or a compound of a high-melting point metal is deposited on the insulating film as a Cu diffusion barrier metal before depositing Cu.

[0004] The present inventors have also investigated the formation of a CoWB film using an electroless plating method (Non-Patent Document 1) and the formation of a Mn-added Co film using a sputtering method (Non-Patent Document 2) as a Cu diffusion barrier metal film. [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] MES2014 (24th Microelectronics Symposium), September 2014, pp. 387-389 [Non-patent document 2] The 81st Autumn Meeting of the Japan Society of Applied Physics, Abstracts "Study on Cu diffusion barrier properties in Mn-doped Co films" Summary of the Invention [Problem to be solved by the invention]

[0006] However, with conventional technology, it has been difficult to form a good Cu diffusion barrier metal film (layer) on the inner wall of a through hole with a high aspect ratio (depth / diameter) such as a TSV. This will be explained below.

[0007] A Mn-doped Co film (hereinafter, CoMn film), which is composed mainly of Co and has Mn added, has excellent Cu diffusion barrier properties (hereinafter, simply referred to as diffusion barrier properties). However, because it has been conventionally formed by sputtering, the film thickness is thick on the side of the first opening of the through hole, which is close to the target, but is thin on the second opening on the opposite side of the first opening, where the sputtered particles have difficulty reaching. In other words, it is difficult to form a Cu diffusion barrier metal with an effective thickness over the entire inner wall of the through hole.

[0008] In contrast, when electroless plating is used, a Cu diffusion barrier metal film can be formed with a sufficient thickness on the entire inner wall of the through hole. However, the CoWB film previously discussed in Non-Patent Document 1 does not have good diffusion barrier properties. In addition, since it contains a large amount of W, a high-melting-point metal, the film stress is high. As a result, adhesion is weak, and if the film thickness is increased, it becomes prone to peeling. In addition, NiB films, NiP films, CoB films, and CoP films using electroless plating have also been considered, but none of these films have good diffusion barrier properties. The results of investigating the diffusion barrier properties of CoWB films and CoB films using electroless plating will be described later as comparative examples.

[0009] In addition, the formation of CoMn films, which have excellent diffusion barrier properties, using conventional electroless plating methods has also been investigated. However, conventional Co plating uses boron compounds such as dimethylamine borane or phosphorus compounds such as hypophosphite as reducing agents. When CoMn films are formed using these reducing agents, the CoMn films become contaminated with approximately 5% to 20% of B or P derived from the reducing agent, resulting in CoMnB films or CoMnP films.

[0010] These impurities mixed into the CoMn film reduce the diffusion barrier properties of the CoMn film. Therefore, the inventors of the present application have confirmed that CoMnB films and CoMnP films cannot be used as Cu diffusion barrier metals. The results of investigating the diffusion barrier properties of CoMnB films prepared by electroless plating will be described later as a comparative example.

[0011] Although the above description has been given as a problem that occurs in the case of through holes with a high aspect ratio, similar problems also occur in bottomed through holes in which one opening of the through hole is closed, and in trenches when the aspect ratio is high.

[0012] An object of one aspect of the present invention is to realize a wiring structure or the like in which a good Cu diffusion barrier metal film is formed on the inner wall of a through hole, a blind hole, or a trench groove having a high aspect ratio. [Means for solving the problem]

[0013] In order to solve the above-mentioned problems, one embodiment of the present invention provides a wiring structure comprising: a barrier layer provided on an inner wall of a through hole, a blind hole, or a trench having an aspect ratio of 5 or more; and a Cu wiring layer formed on the barrier layer, wherein the barrier layer includes a Mn-doped Co film containing Co as a main component and Mn added thereto, wherein the Mn-doped Co film contains elements other than Co, Mn, and O at a content of less than 5 atomic percent, and the Mn content of a surface layer of the Mn-doped Co film within a 7 nm range from the surface facing the Cu wiring layer is 0.5 atomic percent or more, and wherein, in the through hole, the blind hole, or the trench, the thickness of the barrier layer on the side of a first opening is T1, the thickness of the barrier layer on the side opposite to the first opening is T2, and T1≧T2, where T2 / T1 is 10% or more.

[0014] With the above-described configuration, it is possible to obtain a wiring structure in which a good Cu diffusion barrier metal film is formed on the inner wall of a through hole, a blind hole, or a trench groove having a high aspect ratio.

[0015] In the wiring structure according to one aspect of the present invention, the Mn-added Co film may have a CoMn oxide containing oxygen mixed therein on the Cu wiring layer side, the total content of Co, Mn, and O in the CoMn oxide being 90 atomic % or more, and the Mn content in the Mn-added Co film may be 0.1 atomic % or more. This configuration further enhances the diffusion barrier properties of the Mn-added Co film.

[0016] In the wiring structure according to one aspect of the present invention, the total content of Co and Mn in the surface layer of the Mn-doped Co film within a range of 7 nm from the surface facing the Cu wiring layer may be 50 atomic % or more. With this configuration, the electrical resistivity of the surface layer containing CoMn oxide can be set to 1000 μΩm or less, thereby ensuring good electrical conductivity.

[0017] In a wiring structure according to one embodiment of the present invention, the side of the first opening may be a region within 2 μm from the edge of the first opening, and the side opposite the first opening may be a region within 2 μm from a second opening opposite the first opening in the case of the through hole, a region within 2 μm from the bottom of the bottomed hole in the case of the bottomed hole, and a region within 2 μm from the bottom of the trench in the case of the trench.

[0018] In the wiring structure according to one aspect of the present invention, T2 may be 5 nm or more. With this configuration, an effective diffusion barrier property can be obtained also on the side of the bottomed hole or trench opposite to the first opening.

[0019] In the wiring structure according to one aspect of the present invention, the Mn content in the Mn-doped Co film may be 20 atomic percent or less. This configuration makes it possible to avoid problems such as the CoMn oxide film covering the surface of the CoMn oxide becoming discontinuous, thereby inhibiting improvement in diffusion barrier properties.

[0020] In order to solve the above problem, a substrate according to one embodiment of the present invention comprises a substrate portion having a through hole, a bottomed hole, or a groove with an aspect ratio of 5 or more, and a wiring structure according to any one of the above embodiments provided in the through hole, the bottomed hole, or the groove in the substrate portion.

[0021] With the above-described configuration, it is possible to obtain a substrate having a wiring structure in which a good Cu diffusion barrier metal film is formed on the inner walls of through holes, blind holes, or trenches with a high aspect ratio.

[0022] In order to solve the above-mentioned problems, a method for forming a wiring structure according to one embodiment of the present invention includes a barrier layer-forming step of contacting a substrate having a through hole, a bottomed hole, or a groove with an electroless plating solution containing at least a Co salt for donating Co ions, a Mn salt for donating Mn ions, and hydrazine hydrate as a reducing agent, to form a barrier layer on a surface of the substrate including an inner wall of the through hole, the bottomed hole, or the groove, the barrier layer including a Mn-doped Co film containing Co as a main component and Mn added thereto, the Mn-doped Co film having a content of elements other than Co, Mn, and O of less than 5 atomic percent in the Mn-doped Co film; a pre-annealing step of pre-annealing the barrier layer; and a Cu wiring layer-forming step of forming a Cu wiring layer in contact with the barrier layer after the pre-annealing step, wherein a molar concentration of the Mn salt in the electroless plating solution is 15% or more of a molar concentration of the Co salt.

[0023] The above method makes it possible to form a wiring structure in which a good Cu diffusion barrier metal film is formed on the inner wall of a through hole, a blind hole, or a trench groove having a high aspect ratio.

[0024] Furthermore, by pre-annealing the barrier layer, an oxide layer containing a mixture of Co oxide, Mn oxide, and CoMn oxide, which has superior diffusion barrier properties, is formed on the surface side of the Mn-added Co film, which forms the interface with the Cu wiring layer, thereby further improving the diffusion barrier properties of the Cu diffusion barrier metal film.

[0025] In the method for forming a wiring structure according to one aspect of the present invention, the concentration of the hydrazine hydrate in the electroless plating solution may be 0.01 mol / L or more and 10.0 mol / L or less. This method allows for stabilization of the plating solution while allowing film deposition to occur.

[0026] In the method for forming a wiring structure according to one aspect of the present invention, the pH of the electroless plating solution may be 11.0 or more and 14.0 or less, which allows for a good deposition rate and stabilization of the plating solution.

[0027] An electroless plating method according to one aspect of the present invention includes contacting a surface to be treated with an electroless plating solution containing at least a Co salt for donating Co ions, a Mn salt for donating Mn ions, and hydrazine hydrate as a reducing agent, to form a Mn-doped Co film on the surface to be treated, the Mn-doped Co film being composed mainly of Co with Mn added, and containing elements other than Co, Mn, and O at a content of less than 5 atomic percent, and the molar concentration of the Mn salt in the electroless plating solution is 15% or more of the molar concentration of the Co salt.

[0028] By pre-annealing using the above method, a Mn-added Co film that functions as a good Cu diffusion barrier metal film can be formed by electroless plating.

[0029] A method for manufacturing a substrate according to one aspect of the present invention includes contacting a substrate having through holes, bottomed holes, or grooves with an electroless plating solution containing at least a Co salt for donating Co ions, a Mn salt for donating Mn ions, and hydrazine hydrate as a reducing agent, and forming a barrier layer by electroless plating on a surface of the substrate including the inner walls of the through holes, bottomed holes, or grooves, the barrier layer comprising a Mn-doped Co film containing Co as a main component with Mn added, and wherein the content of elements other than Co, Mn, and O in the Mn-doped Co film is less than 5 atomic percent. a barrier layer forming step of forming a Cu wiring layer in contact with the barrier layer after the pre-annealing step; and a removal step of polishing a surface of the substrate portion to remove the barrier layer and the Cu wiring layer formed on areas other than the inner walls of the through holes, the bottomed holes, or the grooves after the Cu wiring layer forming step, wherein a molar concentration of the Mn salt in the electroless plating solution is 15% or more of a molar concentration of the Co salt.

[0030] The above method makes it possible to manufacture a substrate having a wiring structure in which a good Cu diffusion barrier metal film is formed on the inner walls of through holes, blind holes or trenches with a high aspect ratio. [Effects of the Invention]

[0031] According to one aspect of the present invention, it is possible to realize a wiring structure or the like in which a good Cu diffusion barrier metal film is formed on the inner wall of a through hole, a blind hole, or a trench groove having a high aspect ratio. [Brief explanation of the drawings]

[0032] [Figure 1] 1 is a schematic cross-sectional view of an interconnect structure according to an embodiment of the present invention and a substrate having the interconnect structure; [Figure 2] 1 is a schematic cross-sectional view of an interconnect structure according to an embodiment of the present invention and a substrate having the interconnect structure; [Figure 3] 10A to 10C are cross-sectional views showing a step of forming the wiring structure in the trench. [Figure 4] FIG. 2 is a diagram showing the results of SIMS analysis of a sample having a CoMn film according to Example 1 of the present invention. [Figure 5] FIG. 10 is a diagram showing the results of SIMS analysis of a sample having a CoWB film in Comparative Example 1. [Figure 6] FIG. 10 is a diagram showing the results of SIMS analysis of a sample having a CoB film in Comparative Example 2. [Figure 7] FIG. 10 is a diagram showing the results of SIMS analysis of a sample having a CoMnB film in Comparative Example 3. [Figure 8] FIG. 2 is a diagram showing the results of elemental analysis by X-ray photoelectron spectroscopy (XPS) of a sample having a CoMn film in Example 1 of the present invention. [Figure 9] This is a diagram in which the vertical axis in FIG. 8 is enlarged by 10% or less. [Figure 10] FIG. 2 is a diagram illustrating a location where a film thickness is measured. [Figure 11] FIG. 10 is a diagram showing measurement results together with an SEM image of Example 2 of the present invention. [Figure 12] FIG. 10 is a cross-sectional view schematically showing a main part of a semiconductor device in which two LSI substrates are connected by a TSV having the above-described wiring structure. [Figure 13] 1A to 1C are cross-sectional views schematically showing the steps from forming a TSV having the above-described wiring structure on an LSI substrate to stacking. [Figure 14] 5A to 5C are cross-sectional views schematically showing steps for forming a substrate having the wiring structure formed in a trench groove. [Figure 15] 3A to 3C are cross-sectional views schematically showing the steps of forming a glass substrate with through holes having the wiring structure. [Figure 16] 10A to 10C are cross-sectional views schematically showing the steps of forming an interposer to which a TSV having the above wiring structure is applied. [Figure 17] FIG. 1 is a cross-sectional view schematically showing a wiring structure in which a Cu wiring is covered with a CoMn film. [Figure 18] FIG. 10 is a diagram showing the results of SIMS analysis of a sample having a CoMn film of a reference example. [Figure 19]FIG. 10 is a diagram showing the results of a depth distribution analysis of the atomic ratio of a CoMn film of a reference example, performed by X-ray photoelectron spectroscopy (XPS). [Figure 20] FIG. 10 is a diagram showing the results of SIMS analysis of a sample having a CoMn film according to Example 3 of the present invention. [Figure 21] FIG. 10 is a diagram showing the results of SIMS analysis of a sample having a CoMn film in Comparative Example 4. [Figure 22] FIG. 10 is a diagram showing the results of elemental analysis by X-ray photoelectron spectroscopy (XPS) of a sample having a CoMn film according to Example 3 of the present invention. [Figure 23] FIG. 10 is a diagram showing the results of elemental analysis by X-ray photoelectron spectroscopy (XPS) of a sample having a CoMn film in Comparative Example 4. DETAILED DESCRIPTION OF THE INVENTION

[0033] The present inventors have conducted extensive research in light of the above-mentioned problems and have found that a Mn-doped Co film with an extremely low impurity content can be formed by using hydrazine hydrate as a reducing agent in an electroless plating method, leading to the present invention. Hereinafter, the Mn-doped Co film will be referred to as a CoMn film.

[0034] By reducing the impurities mixed into the CoMn film and subjecting the formed CoMn film to a heat treatment (pre-annealing) at approximately 200°C to segregate Mn in the surface layer, the film exhibits good diffusion barrier properties and can be used as a Cu diffusion barrier metal. To segregate Mn in the surface layer by pre-annealing, the molar concentration of the Mn salt in the electroless plating solution must be 15% or more of the molar concentration of the Co salt. This ensures that the Mn content in the area 7 nm from the surface that will become the Cu wiring layer (surface layer) is 0.5 atomic ratio% or more, thereby achieving diffusion barrier properties.

[0035] Furthermore, by reducing the amount of impurities mixed into the CoMn film, the electrical resistivity of the CoMn film can be reduced, resulting in excellent conductivity with lower-layer wiring, etc. Electrical conductivity is not hindered. It has also been confirmed that the content of elements (impurities) other than Co, Mn, and O contained in the CoMn film can be controlled to less than 5 atomic percent.

[0036] The O contained in the CoMn film is introduced into the CoMn film by heat treatment in an oxygen-containing atmosphere during and after the deposition of the CoMn film.

[0037] Since it is formed using electroless plating, a CoMn film with an effective thickness and excellent diffusion barrier properties can be formed on the inner walls of through holes, blind holes, or trenches with high aspect ratios.

[0038] Furthermore, compared to the CoWB film of Non-Patent Document 1, it does not contain W, so it has the advantage of not having a large film stress and providing high adhesion.

[0039] Furthermore, by subjecting the CoMn film to a heat treatment (pre-annealing) at approximately 200°C, an oxide layer with excellent diffusion barrier properties, consisting of a mixture of Co oxide, Mn oxide, and CoMn oxide, can be formed on the surface side of the CoMn film, which forms the interface with the Cu wiring layer. This oxide layer can further improve the diffusion barrier properties of the Cu diffusion barrier metal film.

[0040] Hereinafter, embodiments of the present invention will be described in detail.

[0041] [Embodiment 1] The wiring structure according to this embodiment and a method for forming the wiring structure will be described with reference to FIGS.

[0042] <Wiring structure, substrate> 1 and 2 are schematic cross-sectional views of a wiring structure 1 according to one embodiment of the present invention and a substrate 100 having the wiring structure 1. Fig. 1 shows the wiring structure 1 formed in a through hole TH, and Fig. 2 shows the wiring structure 1 formed in a bottomed hole BH or a trench groove TR.

[0043] The through holes TH, bottomed holes BH, or trench grooves TR are formed in the substrate body 4, which will be described later. The through holes TH are provided so as to penetrate the substrate body 4. The bottomed holes BH are formed by embedding metal wiring 9 or the like in one end (opening) of the through holes TH. Therefore, the bottom 13 of the bottomed holes BH becomes the metal wiring 9. The trench grooves TR are formed in the shape of a groove dug into the substrate body 4. Therefore, the bottom 14 of the trench grooves TR becomes the dug surface (not shown) of the substrate body 4.

[0044] As shown in Figures 1 and 2, the wiring structure 1 comprises a barrier layer 2 provided on the inner wall 10 of a through hole TH, a bottomed hole BH, or a trench groove TR having an aspect ratio of 5 or more, and a Cu wiring layer 3 formed on the barrier layer 2.

[0045] Here, the aspect ratio, in the case of through holes TH and bottomed holes BH, is the value obtained by dividing the hole depth by the hole diameter (hole depth / hole diameter). In the case of trench grooves TR, it is the value obtained by dividing the groove depth by the groove depth (groove depth / groove width). When an insulating film 5 is formed on the inner wall 10, the hole depth, hole diameter, groove depth, and groove width, which define the aspect ratio, are the dimensions obtained by subtracting the film thickness of the insulating film 5 from the actual dimensions formed on the substrate body 4.

[0046] The barrier layer 2 prevents Cu from diffusing from the Cu wiring layer 3 into the substrate body 4 and the like, and includes a CoMn film as a Cu diffusion barrier metal film. The CoMn film is a film containing Co as the main component with Mn added. The content of elements other than Co, Mn, and O in the CoMn film is less than 5 atomic percent, and the Mn content in the surface layer of the CoMn film within a 7-nm range from the surface on the Cu wiring layer side is 0.5 atomic percent or more. The average Mn content in the surface 7-nm layer of the CoMn film is 0.5 atomic percent or more.

[0047] By containing less than 5 atomic percent of elements other than Co, Mn, and O in the CoMn film, deterioration of the diffusion barrier properties due to impurities mixed in the film is suppressed. By making the Mn content in the surface layer of the CoMn film within 7 nm from the surface on the Cu wiring layer side 0.5 atomic percent or more, the barrier layer 2 can maintain the excellent diffusion barrier properties of the CoMn film.

[0048] If the layer thickness (film thickness) of the barrier layer 2 on the side of the first opening 11 of the through hole TH, the bottomed hole BH or the trench groove TR is T1, the layer thickness of the barrier layer 2 on the side opposite the first opening 11 is T2, and T1≧T2, T2 / T1 is 10% or more.

[0049] When the thickness ratio between the first opening 11 side and the opposite side of the barrier layer 2 is 10% or more, the film thickness of the barrier layer 2 can be made an effective thickness over the entire inner wall of the through hole TH, the bottomed hole BH, or the trench groove TR, thereby achieving good diffusion barrier properties.

[0050] The side of the first opening 11 is a region within 2 μm from the edge of the first opening 11. In addition, as shown in FIG. 1, the opposite side of the first opening 11 is a region within 2 μm from the edge of the second opening 12 opposite the first opening 11 in the case of the through hole TH. On the other hand, as shown in FIG. 2, in the case of the bottomed hole BH, the opposite side of the first opening 11 is a region within 2 μm from the bottom 13 of the bottomed hole BH. Similarly, as shown in FIG. 2, in the case of the trench groove TR, the opposite side of the first opening 11 is a region within 2 μm from the bottom 14 of the trench groove TR.

[0051] The thickness T2 of the barrier layer 2 on the side opposite to the first opening 11 is preferably 5 nm or more. It is difficult to form a CoMn film by sputtering, but by setting the thickness T2 of the CoMn film on the side opposite to the first opening 11 to 5 nm or more, the CoMn film functions as an effective barrier layer 2.

[0052] Furthermore, in the barrier layer 2, the CoMn film may have a CoMn oxide containing oxygen on the Cu wiring layer 3 side, and the total content of Co, Mn, and O in the CoMn oxide may be 90 atomic % or more, and the Mn content in the CoMn film may be 0.1 atomic % or more (condition 1).

[0053] CoMn oxides include not only Co, Mn, and CoMn, but also Co oxides, Mn oxides, and oxides of CoMn alloys. More specifically, Co, Mn, CoMn, CoO, Co3O4, Co2O3, Mn3O4, MnO2, Co x Mn y O z With this structure, the diffusion barrier properties of the CoMn film can be further improved.

[0054] The reason why the total content of Co, Mn, and O in the CoMn oxide is set to 90% or more by atomic ratio is that if the total content is less than 90%, the oxide film covering the surface of the oxide layer will become discontinuous due to the influence of other impurity particles, etc., and the improvement in diffusion barrier properties that is achieved by providing the oxide layer will be suppressed.

[0055] The Mn content in the CoMn film is set to 0.1 atomic percent or more because, if it is less than 0.1 atomic percent, the ratio of MnO bonds in the CoMn oxide decreases, suppressing the improvement in diffusion barrier properties achieved by providing an oxide layer. Among the oxides contained in the CoMn oxide, Mn oxides with MnO bonds have been confirmed to have particularly high diffusion barrier properties. A more preferable Mn content is 0.4 atomic percent or more.

[0056] In the barrier layer 2, the total content of Co and Mn in the surface layer of the CoMn film within a range of 7 nm from the surface on the Cu wiring layer 3 side may be 50 atomic percent or more (condition 2).

[0057] The CoMn film is oxidized by heat treatment in an air atmosphere at about 200°C, and the Cu wiring layer 3 side tends to become a CoMn oxide with a higher oxygen ratio than the inside of the film. As described above, CoMn oxides include Co, Mn, CoMn, CoO, Co3O4, Co2O3, Mn3O4, MnO2, Co x Mn y O z etc. are mixed together.

[0058] Here, if the ratio of O (oxygen) in the CoMn oxide increases, the electrical resistance of the CoMn oxide increases, hindering electrical conduction. To ensure good electrical conduction, it is desirable to keep the electrical resistivity of the CoMn oxide below 1000 μΩm.

[0059] As in the above configuration, by setting the total content of Co and Mn in the surface layer of the CoMn film within a range of 7 nm from the surface on the Cu wiring layer 3 side to be 50 atomic % or more, the electrical resistivity of the surface layer containing CoMn oxide can be set to 1000 μΩm or less, and good electrical conductivity can be ensured.

[0060] Furthermore, in the barrier layer 2, when the thickness of the CoMn film is 15 nm or more, the total content of Co and Mn averaged over the entire layer may be 80 atomic percent or more. If the total content of Co and Mn averaged over the entire layer with a thickness of 15 nm or more is less than 80 atomic percent, the electrical resistivity of the CoMn film (as a whole) becomes high, eliminating the benefit of using it as a wiring material. By setting the total content of Co and Mn averaged over the entire layer with a thickness of 15 nm or more to 80 atomic percent or more, the electrical resistivity of the CoMn film can be made 10 μΩm or less, ensuring the benefit of using it as a wiring material.

[0061] In the barrier layer 2, the Mn content in the CoMn film is preferably 20 atomic percent or less (condition 3).

[0062] This is because the formation of a CoMn alloy in the CoMn film is promoted when the Mn content in the CoMn film exceeds 20 atomic percent. If the number of bonds between Co and Mn in the CoMn film increases, the CoMn oxide film covering the surface of the CoMn oxide becomes discontinuous, suppressing the improvement in diffusion barrier properties achieved by providing the CoMn oxide. It is more preferable that the Mn content in the CoMn film be 10 atomic percent or less.

[0063] The Cu wiring layer 3 may be formed so as to fill the through holes TH, the bottomed holes BH, or the trench grooves TR via the barrier layer 2. Alternatively, the Cu wiring layer 3 may be formed on the barrier layer 2 without filling the through holes TH, the bottomed holes BH, or the trench grooves TR.

[0064] The substrate body 4 is an insulating substrate or a semiconductor substrate, and more specifically, is an SiO2 substrate, an organic insulating film substrate, a Si substrate, etc. An insulating film 5 is formed on the inner wall 10 of the through hole TH, the bottomed hole BH, or the trench groove TR, and a barrier layer 2 may be formed on this insulating film 5. The insulating film 5 is, for example, an SiO2-based insulating film, an SiOC-based insulating film, etc. formed using an ozone-TEOS-based raw material.

[0065] A catalytic Pd nanoparticle layer (not shown) serving as a plating catalyst may be included between the insulating film 5 and the barrier layer 2. The substrate includes a substrate body 4, an insulating film 5, and a catalytic Pd nanoparticle layer (not shown). The catalytic Pd nanoparticle layer is a plating catalyst. Note that a nanoparticle layer of a noble metal such as Au, Pt, or Ru may also be used as the plating catalyst.

[0066] The substrate body 4, or the substrate body 4 and the insulating film 5, constitute a substrate portion 101 having through holes TH, bottomed holes BH, or trenches TR with an aspect ratio of 5 or more. The substrate 100 includes such a substrate portion 101 and the wiring structure 1.

[0067] <Method for forming wiring structure> Next, a method for forming the wiring structure 1 will be described with reference to Fig. 3. Fig. 3 is a cross-sectional view showing a process for forming the wiring structure 1 in the trench TR, but the same applies to the through hole TH and the bottomed hole BH.

[0068] The method for forming the wiring structure 1 includes a barrier layer forming step, a pre-annealing step, and a Cu wiring layer forming step. As shown in Fig. 3, in the barrier layer forming step, first, Pd nanoparticles 6, which serve as a plating catalyst, are adsorbed onto a surface (a surface to be treated) that is to be brought into contact with an electroless plating solution and on which a barrier layer 2, which is a plating film, is to be formed. That is, the Pd nanoparticles 6 are adsorbed onto the insulating film 5 formed on the surface of the substrate body 4, including the inner walls 10 of the trench grooves TR (through holes TH, blind holes BH).

[0069] Next, the substrate 101 is brought into contact with the electroless plating solution to form a barrier layer 2 on the surface of the substrate 101 where the barrier layer 2 is to be formed, the barrier layer 2 including a CoMn film containing Co as the main component with added Mn, and in which the content of elements other than Co, Mn, and O in the CoMn film is less than 5 atomic percent. The electroless plating solution contains at least a Co salt for imparting Co ions, a Mn salt for imparting Mn ions, and hydrazine hydrate as a reducing agent.

[0070] The electroless plating solution contains Mn salt in an amount such that the Mn content in the surface layer of the CoMn film within 7 nm from the surface of the Cu wiring layer after the pre-annealing step is 0.5 atomic ratio % or more. That is, the molar concentration of the Mn salt in the electroless plating solution is 15% or more of the molar concentration of the Co salt.

[0071] By setting the molar concentration of the Mn salt in the electroless plating solution to 15% or more of the molar concentration of the Co salt, Mn segregation occurs on the Cu wiring layer side of the CoMn film after the pre-annealing step, and the Mn content in the surface layer within a range of 7 nm from the surface on the Cu wiring layer side becomes 0.5 atomic ratio% or more.

[0072] Furthermore, as described above, in the barrier layer 2, if the Mn content in the CoMn film exceeds 20% by atomic ratio, the formation of a CoMn alloy in the CoMn film is promoted, suppressing the improvement in diffusion barrier properties due to the presence of CoMn oxide. Therefore, in the electroless plating solution, the molar concentration of the Mn salt is preferably 400% or less of the molar concentration of the Co salt. Furthermore, the molar concentration of the Mn salt is more preferably 200% or less of the molar concentration of the Co salt. This allows the Mn content in the CoMn film to be 10% or less by atomic ratio.

[0073] Examples of the Co salt that can be used include cobalt chloride, cobalt sulfate, cobalt nitrate, cobalt carbonyl compounds, cobalt acetate, and cobalt fluoride (CoF).

[0074] As the Mn salt, manganese chloride, manganese sulfide, manganese sulfate, manganese nitrate, manganese sulfide, manganese carbonyl compound, manganese fluoride (MnF), manganic acid compound, etc. can be used.

[0075] The electroless plating solution may also contain a complexing agent that promotes the formation of complex ions, such as ammonium chloride, tartaric acid, L(+)-tartaric acid, sodium citrate, malic acid, malonic acid, sodium succinate, lactic acid, sodium acetate, propionic acid, sodium pyrophosphate, hydroxyacetic acid, salicylic acid, phthalic acid, glycine, ethylenediamine, ethylenediaminetetraacetic acid, triethanolamine, glycolic acid, etc.

[0076] The electroless plating solution may contain a stabilizer, such as bipyridyl, a thiol compound, a thiourea or other thio compound, or an organic nitrile compound.

[0077] The electroless plating solution may contain a surfactant, such as polyethylene glycol (molecular weight 500-10000) or polyacrylic acid.

[0078] The concentration of hydrazine hydrate in the electroless plating solution is preferably 0.01 mol / L or more and 10.0 mol / L or less. If the concentration of hydrazine hydrate is less than 0.01 mol / L, the reducing power is too weak and film deposition does not occur. If the concentration exceeds 10.0 mol / L, the plating solution becomes unstable. A more preferred range is 0.05 mol / L or more and 1.0 mol / L or less. An even more preferred range is 0.10 mol / L or more and 0.75 mol / L or less.

[0079] The pH of the electroless plating solution is preferably 11.0 or higher and 14.0 or lower. If the pH is lower than 11.0, the deposition rate becomes very slow. If the pH is higher than 14.0, the plating bath becomes unstable. A more preferred range is 12.0 or higher and 13.5 or lower.

[0080] The time (plating time) for immersing and contacting the substrate part 101 with the electroless plating solution is approximately 10 to 60 minutes. The temperature of the electroless plating solution is preferably 50°C or higher and 100°C or lower. If the temperature is lower than 50°C, the plating speed becomes very slow and film deposition does not occur substantially. If the temperature exceeds 100°C, the plating bath becomes unstable. By setting the temperature within the above range, the plating bath is stable and a sufficient plating deposition speed can be obtained. A more preferable range is 60°C or higher and 90°C or lower. An even more preferable range is 70°C or higher and 80°C or lower.

[0081] The pre-annealing step is a step of pre-annealing (heat treating) the barrier layer 2 formed in the barrier layer forming step. In the pre-annealing step, the barrier layer 2 is pre-annealed at a temperature of about 200°C.

[0082] By pre-annealing, Mn segregates on the boundary side (surface side) of the barrier layer 2 with the Cu wiring layer 3. The Mn content within a range of 7 nm from the boundary side (surface side) with the Cu wiring layer 3 is 0.5 atomic percent or more.

[0083] Furthermore, by pre-annealing, an oxide layer 2A of Co and Mn is formed on the surface of the barrier layer 2 at the boundary with the Cu wiring layer 3. The oxide layer 2A is a layer made of a mixture of MnOx, CoOx, and CoMnOx. Examples of MnOx include MnO, Mn2O3, MnO2, and MnO3. Examples of CoOx include CoO and CoO2. The formation of the oxide layer 2A improves the Cu diffusion barrier properties.

[0084] 3, the Cu wiring layer formation step is performed after the barrier layer formation step, and a Cu wiring layer 3 is formed so as to be in contact with the barrier layer 2. The Cu wiring layer 3 is formed by, for example, electrolytic plating or electroless plating.

[0085] [Embodiment 2] Another embodiment of the present invention will be described below. For the sake of convenience, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated. In this embodiment, experimental results will be described.

[0086] (Evaluation of Cu diffusion barrier properties of barrier layer) The following describes the evaluation of the diffusion barrier properties of a CoMn film formed using electroless plating. A sample of a planar laminated structure of TiN / Cu / CoMn / SiO2 structure including the CoMn film of Example 1 of the present invention was fabricated. As Comparative Example 1, a sample of a planar laminated structure of Cu / CoWB / SiO2 structure including a CoWB film was fabricated. As Comparative Example 2, a sample of a planar laminated structure of Cu / CoB / SiO2 structure including a CoB film was fabricated. As Comparative Example 3, a sample of a planar laminated structure of Cu / CoMnB / SiO2 structure including a CoMnB film was fabricated.

[0087] Example 1 Here, a CVD-SiO2 substrate was used as the substrate body 4, which is the base for the CoMn film, and an SiO2-based insulating film was formed on the CVD-SiO2 substrate using an ozone-TEOS-based raw material as the insulating film 5. Hereinafter, the substrate body 4 on which the insulating film 5 has been formed will be referred to as the "base substrate."

[0088] Step 1: First, the base substrate was subjected to ultrasonic cleaning with acetone for 5 minutes as a pre-treatment for plating.

[0089] Step 2: Then, a catalytic treatment was carried out to adsorb catalytic Pd nanoparticles onto the surface of the insulating film 5 of the base substrate. The catalytic treatment can be carried out using the following two methods. In this example, catalytic treatment B was carried out, but catalytic treatment A may also be carried out.

[0090] (Catalyst Treatment A) This is a treatment method in which SnPd colloid is adsorbed onto the surface of the substrate, and then the Sn is etched away, leaving only Pd colloidal nanoparticles on the surface. It is generally used as a pretreatment for Cu electroless plating.

[0091] For example, when using the catalyst treatment solution from Uemura Kogyo Co., Ltd., the procedure is (1) → (2) → (3) as shown below.

[0092] (1) Pre-dip treatment: 27 g of MTPR-KU-M was completely dissolved in 80 ml of pure water, and further pure water was added to make 100 ml. The temperature was then adjusted to 25° C., and the base substrate was immersed for 2 minutes.

[0093] (2) Activator treatment: 27 g of MTPR-KU-M was completely dissolved in 80 ml of purified water, and then purified water was added to make 98 ml. 2 ml of MTAT-KU-M was then added. The temperature was raised to 30°C, and the substrate pre-dipped in (1) was placed in the solution and immersed for 8 hours.

[0094] (3) Accelerator treatment: Add 15 ml of MTAC-KU-M to 60 ml of pure water, and then add more pure water to bring the total to 100 ml. The temperature is raised to 25°C, and the base substrate that has been subjected to the activator treatment in (2) is immersed for 3 minutes.

[0095] Regarding Pd catalyst adsorption treatment, each plating bath manufacturer proposes their own unique adjustment method. The above-mentioned catalyst treatment A, MTPR by Uemura Kogyo, is one example, and the same effect can be obtained by using other companies' Pd adsorption treatment methods.

[0096] (Catalyst Treatment B) Pd nanoparticles (PVP coated, average diameter 4 nm) manufactured by Tanaka Kikinzoku Kogyo Kogyo are adsorbed onto the surface of the insulating film 5 of the base substrate by a silane coupling treatment. As an example, 1% 3-aminopropyltrimethylsilane (APTES) as a silane coupling agent is dissolved in a solution using toluene as the solvent, and the adsorption treatment is carried out. Isopropyl alcohol may also be used as the solvent here. The silane coupling treatment is carried out at 60°C for 15 minutes. As a result, the silane compound with an amino group attached to the end is adsorbed onto the silicon oxide film, forming a self-assembled monolayer (SAM).

[0097] Next, the sample is immersed in a solution of Pd nanoparticles (particle size: 4 nm) at room temperature, allowing the Pd nanoparticles to adsorb to the surface. This is because the amino groups (NH2) adsorbed to the sample by the silane coupling treatment have NH3+ between them, resulting in a positive charge, while the Pd nanoparticles are negatively charged, allowing the Pd nanoparticles to adsorb due to electrostatic interactions. The surface of the Pd nanoparticles is covered with the dispersant PVP (polyvinylpyrrolidone), which makes them less likely to aggregate.

[0098] Step 3: A CoMn film was formed on the substrate that had been subjected to pre-plating treatment and catalytic treatment by electroless plating. The plating bath had the following composition: Water was used as the solvent.

[0099] Cobalt salt: Cobalt chloride (Fujifilm Wako Pure Chemical Industries, Ltd.) 0.07 mol / L Mn salt: Manganese chloride (Fujifilm Wako Pure Chemical Industries, Ltd.) 0.025 mol / L Reducing agent: Hydrazine monohydrate (Fujifilm Wako Pure Chemical Industries, Ltd.) 0.25 mol / L Complexing agent: Ammonium chloride (Fujifilm Wako Pure Chemical Industries, Ltd.) 1.0 mol / L Complexing agent: L(+)-tartaric acid (Fujifilm Wako Pure Chemical Industries, Ltd.) 0.3 mol / L The plating conditions were pH 12.8, bath temperature 70°C, and film thickness 100 nm. Potassium hydroxide and hydrochloric acid were used as pH adjusters.

[0100] Using the electroless plating solution prepared as above, a CoMn film was deposited to a thickness of 100 nm on the base substrate (on the insulating film 5) under the above plating conditions. In the electroless plating solution prepared as above, the molar concentration of the Mn salt was 35.7% of the molar concentration of the Co salt. This ratio satisfies the above-mentioned condition of 15% to 400%.

[0101] Next, the CoMn film was pre-annealed at 200° C. The pre-annealing atmosphere was air.

[0102] <Comparative Example 1> The same substrate body 4 as in Example 1 was used and subjected to the same catalytic treatment as in Example 1, causing Pd catalyst nanoparticles to be adsorbed onto the surface of the substrate body 4. Thereafter, electroless plating deposition of a CoWB film was performed. The plating bath had the following composition. Water was used as the solvent.

[0103] Metal salts: Cobalt sulfate 0.16 mol / L Metal salt: tungstic acid 5.0 x 10 -3 mol / L Complexing agent: citric acid 0.48 mol / L Reducing agent: dimethylamine borane 0.05 mol / L The plating conditions were pH 9.5, plating bath temperature 45°C, and film thickness 80 nm.

[0104] Using the electroless plating solution prepared as described above, a CoWB film was deposited on the base substrate (on the insulating film 5) under the above plating conditions to a thickness of 80 nm. Thereafter, the CoWB film was pre-annealed under the same conditions as in Example 1.

[0105] <Comparative Example 2> The same substrate body 4 as in Example 1 was used and subjected to the same catalytic treatment as in Example 1, causing Pd catalyst nanoparticles to be adsorbed onto the surface of the substrate body 4. Thereafter, electroless plating deposition of a CoB film was performed. The plating bath had the following composition. Water was used as the solvent.

[0106] Metal salts: Cobalt sulfate heptahydrate 0.16 mol / L Complexing agent: citric acid 0.48 mol / L Reducing agent: dimethylamine borane 0.05 mol / L The plating conditions were pH 9.5, plating bath temperature 45°C, and film thickness 100 nm.

[0107] Using the electroless plating solution prepared as above, a CoB film was deposited to a thickness of 100 nm on the base substrate (on the insulating film 5) under the above plating conditions. Thereafter, the CoB film was pre-annealed under the same conditions as in Example 1.

[0108] <Comparative Example 3> The same substrate body 4 as in Example 1 was used and subjected to the same catalytic treatment as in Example 1, causing Pd catalyst nanoparticles to be adsorbed onto the surface of the substrate body 4. Thereafter, electroless plating deposition of a CoMnB film was performed. The plating bath had the following composition. Water was used as the solvent.

[0109] Cobalt salt: Cobalt sulfate heptahydrate 0.16 mol / L Mn salt: Manganese sulfate pentahydrate 0.5 mol / L Complexing agent: citric acid 0.48 mol / L Reducing agent: dimethylamine borane 0.05 mol / L The plating conditions were pH 9.5, plating bath temperature 45°C, and film thickness 100 nm.

[0110] Using the electroless plating solution prepared as above, a CoMnB film was deposited to a thickness of 100 nm on the base substrate (on the insulating film 5) under the above plating conditions. Thereafter, the CoB film was pre-annealed under the same conditions as in Example 1.

[0111] Example 3 The film of Example 3 was obtained by forming a film under the same conditions as in Example 1, except that the Mn salt content in the plating bath (electroless plating solution) was 0.1 mol / L. In the electroless plating solution prepared as described above, the molar concentration of the Mn salt was 142.9% of the molar concentration of the Co salt. This ratio satisfies the above-mentioned condition of 15% to 400%.

[0112] <Comparative Example 4> Similarly, a film of Comparative Example 4 was obtained by forming a film under the same conditions as in Example 1, except that the Mn salt content in the plating bath was 0.01 mol / L.

[0113] On each of the films of Examples 1 and 3 and Comparative Examples 1, 2, 3, and 4, a Cu film was deposited to a thickness of 200 nm and a TiN film was deposited to a thickness of 30 nm by electroless plating, and heat treatment was performed at 350°C to examine the interdiffusion between the Cu film and each of the films of Examples 1 and 3 and Comparative Examples 1, 2, 3, and 4 by SIMS analysis.

[0114] FIG. 4 shows the results of SIMS analysis of a sample having a CoMn film according to Example 1 of the present invention. FIG. 5 shows the results of SIMS analysis of a sample having a CoWB film according to Comparative Example 1. FIG. 6 shows the results of SIMS analysis of a sample having a CoB film according to Comparative Example 2. FIG. 7 shows the results of SIMS analysis of a sample having a CoMnB film according to Comparative Example 3. FIG. 20 shows the results of SIMS analysis of a sample having a CoMn film according to Example 3 of the present invention. FIG. 21 shows the results of SIMS analysis of a sample having a CoMn film according to Comparative Example 4. In FIGS. 4 to 7, 20, and 21, the vertical axis represents intensity, and the horizontal axis represents the depth from the surface. In FIGS. 4 to 7, 20, and 21, the graphs for Cu are indicated by bold lines.

[0115] As shown in Fig. 5, a large amount of Cu atoms diffused from the Cu film into the interior of the CoWB film in Comparative Example 1. Similarly, as shown in Fig. 6, a large amount of Cu atoms diffused from the Cu film into the interior of the CoB film in Comparative Example 2. Similarly, as shown in Fig. 7, a large amount of Cu atoms diffused from the Cu film into the interior of the CoMnB film in Comparative Example 3.

[0116] In contrast, as shown in Figures 4 and 20, only a small amount of Cu diffuses into the CoMn films of Examples 1 and 3. This means that the CoMn films of Examples 1 and 3 exhibit very strong diffusion barrier properties.

[0117] 7, it is found that B segregates at the interface between the Cu film and the CoMnB film in the CoMnB film of Comparative Example 3. This suggests that the B contained in the CoMnB film adversely affects the Cu diffusion barrier property of the CoMn oxide film.

[0118] 21, Cu atoms diffuse from the Cu film into the CoMn film of Comparative Example 4, even though the CoMn film does not contain B or W. This indicates that when the molar concentration of the Mn salt in the electroless plating solution is low, the Mn content in the CoMn film formed by electroless plating is low, and even if pre-annealing is performed, Mn does not segregate at the boundary with the Cu film to an extent that it exhibits Cu diffusion barrier properties.

[0119] (Elemental composition of the barrier layer) Next, the results of a depth distribution analysis of the atomic ratio by X-ray photoelectron spectroscopy (XPS) for the CoMn film of Example 1, the CoMn film of Example 3, the CoMnB film of Comparative Example 3, and the CoMn film of Comparative Example 4 will be described.

[0120] A CVD-SiO2 substrate was used as the substrate body 4, and a CoMn film having a thickness of 80 nm was formed under the same conditions as in Example 1, and pre-annealing was performed under the same conditions as in Example 1 to prepare a sample. Similarly, a CoMnB film having a thickness of 80 nm was formed under the same conditions as in Comparative Example 3, and pre-annealing was performed under the same conditions as in Example 1 to prepare a sample.

[0121] Similarly, a CoMn film was formed and pre-annealed under the same conditions as in Example 3, i.e., under the same conditions as in Example 1 except that the Mn salt in the plating bath composition was 0.1 mol / L, and a sample was prepared. Similarly, a CoMn film was formed and pre-annealed under the same conditions as in Comparative Example 4, i.e., under the same conditions as in Example 1 except that the Mn salt in the plating bath composition was 0.01 mol / L, and a sample was prepared.

[0122] These samples were subjected to depth profile analysis of atomic ratio by X-ray photoelectron spectroscopy (XPS). Fig. 8 shows the results of elemental analysis by X-ray photoelectron spectroscopy of the sample having the CoMn film of Example 1 of the present invention. Fig. 9 is a diagram enlarging the vertical axis of Fig. 8 by 10% or less. The vertical axis represents elemental composition, and the unit is atomic ratio %.

[0123] Fig. 22 shows the results of elemental analysis by X-ray photoelectron spectroscopy of the sample having the CoMn film of Example 3 of the present invention. Fig. 23 shows the results of elemental analysis by X-ray photoelectron spectroscopy of the sample having the CoMn film of Comparative Example 4.

[0124] Table 1 shows the atomic ratio % of elements contained in the CoMn film obtained by elemental analysis by XPS of the sample having the CoMn film of Example 1. Table 2 shows the atomic ratio % of elements contained in the CoMnB film of the sample having the CoMnB film of Comparative Example 2 obtained by elemental analysis by X-ray photoelectron spectroscopy. [Table 1]

[0125] [Table 2] In elemental analysis using XPS, depth analysis is performed by repeating Ar ion beam etching and XPS surface analysis multiple times. In Figures 8, 9, 22, and 23, the vertical axis indicates the content, and the horizontal axis indicates the number of etching cycles. The etching depth per cycle is approximately 3.5 nm. In Figure 8 (Figure 9), which shows the results for the sample of Example 1, the concentration of MnCl in the plating bath is 0.025 mol / L. In Figure 22, which shows the results for the sample of Example 3, the concentration of MnCl in the plating bath is 0.1 mol / L. In Figure 23, which shows the results for the sample of Comparative Example 4, the concentration of MnCl in the plating bath is 0.01 mol / L.

[0126] As shown in Table 1, the average contents of elements contained in the pre-annealed CoMn film throughout the entire layer were 0.45 atomic ratio % for Mn, 91.3 atomic ratio % for Co, and 6.4 atomic ratio % for O. In this case, the content of elements other than Co, Mn, and O in the CoMn film was 1.85 atomic ratio %.

[0127] As shown in Table 2, the average contents of elements contained in the pre-annealed CoMnB film, averaged over the entire layer, were 1.3 atomic ratio % for Mn, 78.5 atomic ratio % for Co, 7.4 atomic ratio % for B, and 12.8 atomic ratio % for O. In this case, the content of B in the CoMnB film, as an element other than Co, Mn, and O, was 7.4 atomic ratio %.

[0128] As shown in the results in Table 1, by forming a CoMn film by electroless plating using hydrazine hydrate as a reducing agent, the content of elements other than Co, Mn, and O in the CoMn film can be reduced to an extremely low level of 1.85 atomic percent. Furthermore, as shown in the results in Table 2, when dimethylamine borane is used as a reducing agent, the content of B, an element other than Co, Mn, and O, is increased to 5 atomic percent or more. This impurity, B, segregates at the interface between the Cu film and the CoMnB film, as shown in Figure 7, and as a result, an effective CoMn oxide film is not formed at the interface, which is thought to adversely affect the diffusion barrier properties.

[0129] Furthermore, as shown in Table 1, in the CoMn film of Example 1, in the surface layer 7 nm from the interface where the Cu wiring layer 3 is formed, the Mn content in the CoMn film was 1.15 atomic ratio %, the Co content was 68.9 atomic ratio %, and the O content was 25.4 atomic ratio %. In this case, the total content of Co and Mn in the surface 7 nm layer of the CoMn film was 70.1 atomic ratio %. Therefore, the condition that the total content of Co and Mn contained in the surface layer of the CoMn film is 50 atomic ratio % or more is satisfied, and good electrical conductivity with an electrical resistivity of the surface layer of 1000 μΩm or less can be ensured.

[0130] Furthermore, in the CoMn film of Example 1, the average contents of elements contained in the CoMn film, averaged over the entire layer, were 0.45 atomic percent for Mn, 91.3 atomic percent for Co, and 6.4 atomic percent for O. In this case, the total content of Co and Mn in the CoMn film, averaged over the entire layer, was 91.75 atomic percent. Therefore, the condition that the total content of Co and Mn be 80 atomic percent or more, averaged over the entire layer with a thickness of 15 nm or more, is satisfied, and the electrical resistivity of the CoMn film is made less than 10 μΩm, ensuring the advantage of use as a wiring material.

[0131] 9 and 22, which show the results for the CoMn films of Examples 1 and 3, Mn segregation is observed in the surface layer 7 nm deep from the surface where the Cu wiring layer 3 is formed (cycle number 2 on the horizontal axis), but no Mn segregation is observed in Fig. 23, which shows the results for the CoMn film of Comparative Example 4. This shows that in order to obtain Cu diffusion barrier properties, Mn segregation is required in the surface layer 7 nm deep from the surface where the Cu wiring layer 3 is formed, and Cu diffusion barrier properties can be obtained by setting the Mn content in the surface layer within 7 nm deep to 0.5 atomic ratio % or more.

[0132] (Evaluation of barrier layer adhesion) The adhesion strength of the CoMn film formed using the electroless plating method will now be described. A CoMn film was formed on an SiO2 substrate under the conditions described in Example 1, and the adhesion strength was measured. Two samples with film thicknesses of 80 nm and 120 nm were prepared by varying the formation conditions and plating time of Example 1. Two samples with film thicknesses of 80 nm and 100 nm were prepared under the same conditions as Comparative Example 1 but varying the plating time. The measurement results are shown in Table 3.

[0133] [Table 3] As shown in Table 3, at a film thickness of 80 nm, the adhesion strength of both the CoWB film and the CoMn film is roughly the same. However, when the film thickness exceeds 80 nm, the CoMn film has a stronger adhesion strength. At a film thickness of 100 nm, the adhesion strength of the CoWB film is 0, while that of the CoMn film is 13 MPa. An adhesion strength of 10 MPa is strong enough to prevent film peeling during CMP (Chemical Mechanical Polisher), and is a strength that is practical.

[0134] (film thickness measurement) In Example 2, a CoMn film was formed as a barrier layer 2 on the inner wall 10 of the bottomed hole BH using electroless plating under the conditions shown below, and the film thickness was measured by observing an SEM image. The results are described below.

[0135] <Example 2> A CVD-SiO2 substrate was used as the substrate body 4, which serves as the base for the CoMn film. A bottomed hole BH with a diameter of φ2 μm and a depth of 20 μm was formed in the CVD-SiO2 substrate. An SiO2-based insulating film was then formed on the CVD-SiO2 substrate, including the inside of the bottomed hole BH, using an ozone-TEOS-based raw material as the insulating film 5. A CoMn film was formed in the bottomed hole BH of the base substrate under the same conditions as in Example 1. The aspect ratio of the bottomed hole BH was 10.

[0136] Fig. 10 is a diagram illustrating the locations where film thicknesses were measured. Fig. 11 shows the measurement results together with an SEM image of Example 2. As shown in Fig. 11, the SEM image was used to measure the film thickness T1 at the first opening 11 of the bottomed hole BH, the film thickness T2 at the bottom 13 of the bottomed hole BH, and the film thickness T3 at the intermediate portion between the first opening 11 and the bottom 13 at three locations shown in Fig. 10. From the measured film thicknesses T1 and T2, the bottom coverage rate was calculated as T2 / T1 × 100.

[0137] As shown in Figure 11, the film thickness T2 at the bottom 13 where the flow of the electroless plating solution is stagnant is thinner than the film thickness T1. However, the film thickness T2 is 56 nm compared to the film thickness T1 of 98 nm, resulting in a bottom coverage of 57%. If a CoMn film is formed in a bottomed hole BH of the same size using a sputtering method, the bottom coverage will be less than 10%.

[0138] Although SEM images are not shown, in the case of through holes TH, the electroless plating solution flows through, so the film thicknesses T1 and T2 are approximately the same, and T2 / T1 is close to 100%. In the case of trenches TR, the electroless plating solution flows through more than in blind holes BH because of the trench structure. Therefore, T2 / T1 is larger than in blind holes BH and smaller than in through holes TH.

[0139] [Embodiment 3] Another embodiment of the present invention will be described below. For ease of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated. In this embodiment, a specific substrate 100 having a wiring structure 1 will be described.

[0140] (Applied to stacking LSI substrates) Fig. 12 is a cross-sectional view schematically showing a main part of a semiconductor device 200 in which two LSI substrates 100A are connected by TSVs having wiring structures 1. Fig. 13 is a cross-sectional view schematically showing each step from forming TSVs having wiring structures 1 on the LSI substrates to stacking them.

[0141] As shown by reference numeral 901 in Fig. 13, an insulating film 5 made of SiO2 or an organic insulating film is formed on one surface, including the inner wall 10, of a through hole TH, which is a via, formed in a Si substrate, which is a substrate body 4, of an LSI substrate. A metal wiring 9 is buried in one end (opening) of the through hole TH. As a result, the through hole TH becomes a bottomed hole BH.

[0142] Next, as shown in symbol 902, pre-plating treatment and catalytic treatment are performed to adsorb Pd nanoparticles 6 onto the insulating film 5 formed on the surface of the substrate body 4 and the inner wall 10 of the bottomed hole BH, and onto the surface of the metal wiring 9 which is the bottom of the bottomed hole BH.

[0143] Next, as shown by the symbol 903, a CoMn film that becomes the barrier layer 2 is formed on the insulating film 5 formed on the surface of the substrate body 4 and the inner wall 10 of the bottomed hole BH, and on the surface of the metal wiring 9 that is the bottom of the bottomed hole BH, by electroless plating using the above-mentioned electroless plating solution that uses hydrazine hydrate as a reducing agent, and then pre-annealed.

[0144] Next, as shown by the symbol 904, a Cu film that will become the Cu wiring layer 3 is formed by bottom-up deposition using electroplating on the insulating film 5 formed on the surface of the substrate body 4 and the inner wall 10 of the bottomed hole BH, and on the CoMn film formed on the surface of the metal wiring 9 that is the bottom of the bottomed hole BH.

[0145] Next, as indicated by the reference numeral 905, the Cu film and the CoMn film formed in areas other than the inside of the bottomed holes BH are removed by CMP, thereby obtaining an LSI substrate 100A having the wiring structure 1.

[0146] Next, as shown by reference numeral 905, bumps 8 are formed on the Cu wiring layer 3 of the LSI substrate 100A, and the LSI substrates 100A are stacked. For example, a CuSn alloy is used as the metal for the bumps 8. The LSI substrates 100A may be stacked by Cu-Cu bonding.

[0147] (Applies to buried wiring) 14A to 14C are cross-sectional views schematically showing the steps of forming a substrate 100B having a wiring structure 1 formed in a trench TR.

[0148] As shown by reference numeral 1001 in FIG. 14, in the semiconductor device, an SiO 2 or organic insulating film is formed as an insulating film 5 on one surface including an inner wall 10 of a trench groove TR formed in an Si substrate as a substrate body 4.

[0149] Next, as shown by reference numeral 1002, plating pretreatment and catalytic treatment are carried out to adsorb Pd nanoparticles 6 onto the insulating film 5 formed on the surface of the substrate body 4 and the inner wall 10 of the trench groove TR.

[0150] Next, as shown by the reference numeral 1003, a CoMn film that will become the barrier layer 2 is formed on the insulating film 5 formed on the surface of the substrate body 4 and the inner wall 10 of the trench groove TR by electroless plating using the above-mentioned electroless plating solution that uses hydrazine hydrate as a reducing agent, and then pre-annealed.

[0151] Next, as shown by reference numeral 1003, a Cu film to become the Cu wiring layer 3 is formed by bottom-up deposition using electrolytic plating on the insulating film 5 formed on the surface of the substrate body 4 and the inner wall 10 of the trench groove TR, and then the Cu film and CoMn film formed outside the inside of the trench groove TR are removed by CMP, thereby obtaining a substrate 100B having the wiring structure 1.

[0152] (Applicable to glass substrates with through holes) 15A to 15C are cross-sectional views schematically showing the steps of forming a glass substrate 100C with through holes having a wiring structure 1. A glass substrate with through holes is called a TGV (TSV: Through Glass Via).

[0153] As shown by reference numeral 1101 in FIG. 15, through holes TH, which are Vias, are formed in an SiO 2 substrate as the substrate body 4.

[0154] Next, as shown by reference numeral 1102, plating pretreatment and catalytic treatment are carried out to adsorb Pd nanoparticles 6 onto the surface of the substrate body 4 including the inner walls 10 of the through-holes TH.

[0155] Next, as shown by reference numeral 1103, a CoMn film that will become the barrier layer 2 is formed on the surface of the substrate body 4, including the inner wall 10 of the through hole TH, by electroless plating using the above-mentioned electroless plating solution that uses hydrazine hydrate as a reducing agent, and pre-annealed. Thereafter, a Cu film that will become the Cu wiring layer 3 is formed on the CoMn film by electrolytic plating.

[0156] Next, as shown by reference numeral 1104, the Cu film and the CoMn film formed outside the interior of the through-holes TH are removed by CMP, thereby obtaining a glass substrate 100C with through-holes and having the wiring structure 1.

[0157] The glass substrate 100C with through holes can be applied to a semiconductor device having a structure in which a silicon chip is mounted on the upper side, a resin substrate is disposed below, and multiple bumps are disposed on the lower side of the resin substrate. The wiring structure 1 can suppress Cu diffusion into the SiO2 substrate, thereby preventing deterioration of the insulating properties of the SiO2 substrate.

[0158] (Application to interposers) 16A to 16C are cross-sectional views schematically showing the steps of forming an interposer 100D that employs a TSV having a wiring structure 1. A silicon interposer is exemplified as the intermediate substrate.

[0159] As shown by reference numeral 1201 in FIG. 16, a through hole TH is formed in a Si substrate as the substrate body 4, and SiO2 as the insulating film 5 is formed on the surface of the substrate body 4 including the inner wall 10 of the through hole TH.

[0160] Next, as shown by reference numeral 1202, plating pretreatment and catalytic treatment are carried out to adsorb Pd nanoparticles 6 onto the insulating film 5 formed on the surface of the substrate body 4 including the inner walls 10 of the through-holes TH.

[0161] Next, as shown by the reference numeral 1203, a CoMn film that will become the barrier layer 2 is formed on the insulating film 5 formed on the surface of the substrate body 4 including the inner wall 10 of the through hole TH by electroless plating using the above-mentioned electroless plating solution that uses hydrazine hydrate as a reducing agent, and then pre-annealed.

[0162] Next, as shown by the reference numeral 1204, a Cu film to become the Cu wiring layer 3 is formed by electroplating on the CoMn film formed on the insulating film 5 formed on the surface of the substrate body 4 including the inner wall 10 of the through hole TH.

[0163] Next, as shown by reference numeral 1205, the Cu film and the CoMn film formed outside the interior of the through-hole TH are removed by CMP, thereby forming an interposer 100D having the wiring structure 1. After this, a bump metal (e.g., a CuSn alloy) is deposited to bond the upper and lower substrates.

[0164] A semiconductor chip is mounted above the interposer 100D via an RDL (Redistribution Layer) as an upper substrate, and a package substrate is disposed below the interposer 100D as a lower substrate.

[0165] [Embodiment 4] Another embodiment of the present invention will be described below. For convenience of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated. In this embodiment, another wiring structure using the electroless plating method of the present invention will be described.

[0166] (Application to wiring metal coating film) 17 is a cross-sectional view schematically showing a wiring structure in which a Cu wiring 3α is covered with a CoMn barrier layer 2α, which is an embodiment of the electroless plating method of the present invention. Reference numeral 1301 in FIG. 17 indicates a structure in which the Cu wiring 3α is formed on a substrate body 4, and reference numeral 1302 indicates a structure in which the Cu wiring 3α is embedded in the substrate body 4.

[0167] As shown by reference numeral 1301, first, a pre-plating process and catalytic treatment are performed on an insulating film 5 made of an organic material such as SiO2 or polyimide. Then, a thin (100 nm) CoMn barrier layer 2α is formed on the insulating film 5 using the electroless plating solution described above, which uses hydrazine hydrate as a reducing agent, and pre-annealing is performed. Next, a Cu film that will become the Cu wiring 3α is formed and patterned. The pattern is formed using a lift-off method using lithography or a wet etching method. After that, a CoMn film 2α is formed on the top and side surfaces of the Cu wiring 3α using the same electroless plating process, covering the Cu wiring 3α.

[0168] When forming an embedded wiring, as shown by reference numeral 1302, first, a trench groove 4V is formed in the substrate body 4 by dry etching, and then an insulating film 5 made of an organic material such as SiO2 or polyimide is formed on the surface of the substrate body 4, including the inner wall of the trench groove 4V. Next, after plating pretreatment and catalytic treatment, a barrier layer 2α of a CoMn film is formed by electroless plating using the aforementioned electroless plating solution that uses hydrazine hydrate as a reducing agent, and pre-annealing is performed. After that, a Cu film that will become the Cu wiring 3α is deposited by electroplating. After that, excess Cu film and CoMn film are removed by CMP, and the embedded wiring is formed.

[0169] This structure improves the electromigration (EM) and stress migration (SM) reliability of Cu wiring. The role of the CoMn film is to prevent Cu atoms from diffusing into the insulating film, strengthen the insulation resistance, reduce thermal stress generated in the Cu wiring, and provide mechanical strength. It can be formed more cheaply than forming a CoMn film by sputtering.

[0170] (Additional notes) The preferred conditions 1, 2, and 3 for the CoMn film described in the first embodiment are not limited to CoMn films formed by electroless plating using hydrazine hydrate as a reducing agent. In other words, they are also effective conditions for Mn-doped Co films (CoMn films) formed by sputtering, which have been previously proposed by the present inventors.

[0171] Here, a method for forming a CoMn film using a sputtering method will be described as a reference example. When a CoMn film formed by electroless plating or sputtering has a wiring structure that satisfies any of the above-mentioned preferred conditions 1, 2, or 3, the reference example shown below is an embodiment.

[0172] (Reference example) A 100 nm thick CoMn 2% sputtered film was deposited on a Si / SiO2 substrate and pre-annealed at 200°C for 30 minutes. A Cu film of approximately 50 nm and a TiN film of approximately 30 nm were then sputter-deposited. This laminated film was then heat-treated at 350°C (vacuum atmosphere) for 30 minutes, and the interdiffusion behavior of Cu and CoMn was investigated using time-of-flight secondary ion mass spectrometry (TOF-SIMS).

[0173] The results of SIMS analysis of the sample having the CoMn film of the reference example are shown in Figure 18. As shown in Figure 18, in the CoMn film of the reference example, Cu diffused only slightly, similar to the CoMn film of Example 1. In other words, it is clear that the CoMn film of the reference example exhibits very strong diffusion barrier properties.

[0174] Furthermore, the results of a depth distribution analysis of the atomic ratio of the CoMn film of the reference example by X-ray photoelectron spectroscopy (XPS) are shown in Figure 19. As shown in Figure 19, Mn and O are localized on the sample surface, and CoMn oxides are present in the surface layer.

[0175] The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present invention. [Explanation of symbols]

[0176] 1 Wiring structure 2. Barrier layer 2A Oxide layer 3 Cu wiring layer 4. Board body 5. Insulating film 10 Inner wall 11 First opening 12 Second opening 100,100B board 100A LSI board (board) 100C Glass substrate with through holes (substrate) 100D interposer (substrate) 101 Circuit board section

Claims

1. a barrier layer provided on an inner wall of a through hole, a bottomed hole, or a groove having an aspect ratio of 5 or more; a Cu wiring layer formed on the barrier layer, The barrier layer is The film includes a Mn-doped Co film containing Co as a main component and Mn added thereto, the content of elements other than Co, Mn, and O in the Mn-added Co film is less than 5 atomic percent, and the content of Mn in a surface layer within a range of 7 nm from the surface on the Cu wiring layer side in the Mn-added Co film is 0.5 atomic percent or more; A wiring structure in which, when the thickness of the barrier layer on the side of the first opening in the through hole, the bottomed hole, or the trench is T1, the thickness of the barrier layer on the side opposite the first opening is T2, and T1≧T2, T2 / T1 is 10% or more.

2. 2. The wiring structure according to claim 1, wherein the Mn-added Co film has a CoMn oxide containing oxygen mixed therein on the Cu wiring layer side, the total content of Co, Mn, and O in the CoMn oxide being 90 atomic % or more, and the Mn content in the Mn-added Co film being 0.1 atomic % or more.

3. 2. The wiring structure according to claim 1, wherein the total content of Co and Mn in the surface layer within a range of 7 nm from the surface on the Cu wiring layer side of said Mn-added Co film is 50 atomic percent or more.

4. the side of the first opening is a region within 2 μm from the edge of the first opening, The side opposite to the first opening is In the case of the through hole, the region is within 2 μm from the second opening opposite to the first opening, In the case of the bottomed hole, the region is within 2 μm from the bottom of the bottomed hole, 2. The wiring structure according to claim 1, wherein in the case of the groove, the region is within 2 [mu]m from the bottom of the groove.

5. 2. The wiring structure according to claim 1, wherein the T2 is 5 nm or more.

6. 4. The wiring structure according to claim 3, wherein the Mn content in said Mn-added Co film is 20 atomic percent or less.

7. a substrate portion having a through hole, a bottomed hole, or a groove with an aspect ratio of 5 or more; A substrate comprising: the wiring structure according to claim 1 provided in the through hole, the blind hole, or the groove in the substrate portion.

8. a barrier layer forming step of contacting a substrate having through holes, bottomed holes or grooves with an electroless plating solution containing at least a Co salt for donating Co ions, a Mn salt for donating Mn ions, and hydrazine hydrate as a reducing agent, to form a barrier layer on a surface of the substrate including the inner walls of the through holes, bottomed holes or grooves, the barrier layer comprising a Mn-doped Co film containing Co as a main component with Mn added, the Mn-doped Co film having a content of elements other than Co, Mn and O being less than 5 atomic percent; a pre-annealing step of pre-annealing the barrier layer; a Cu wiring layer forming step of forming a Cu wiring layer in contact with the barrier layer after the pre-annealing step, The method for forming a wiring structure, wherein in the electroless plating solution, the molar concentration of the Mn salt is 15% or more of the molar concentration of the Co salt.

9. 9. The method for forming a wiring structure according to claim 8, wherein the concentration of the hydrazine hydrate in the electroless plating solution is 0.01 mol / L or more and 10.0 mol / L or less.

10. 9. The method for forming a wiring structure according to claim 8, wherein the pH of the electroless plating solution is 11.0 or more and 14.0 or less.

11. a surface to be treated is brought into contact with an electroless plating solution containing at least a Co salt for donating Co ions, a Mn salt for donating Mn ions, and hydrazine hydrate as a reducing agent, to form a Mn-doped Co film on the surface to be treated, the Mn-doped Co film being composed mainly of Co with Mn added, and having a content of elements other than Co, Mn, and O of less than 5 atomic percent; The electroless plating method, wherein the molar concentration of the Mn salt in the electroless plating solution is 15% or more of the molar concentration of the Co salt.

12. a barrier layer forming step of contacting a substrate having through holes, bottomed holes or grooves with an electroless plating solution containing at least a Co salt for donating Co ions, a Mn salt for donating Mn ions, and hydrazine hydrate as a reducing agent, and forming a barrier layer comprising a Mn-doped Co film containing Co as a main component with Mn added thereto on a surface of the substrate including the inner walls of the through holes, bottomed holes or grooves by electroless plating, the Mn-doped Co film having a content of elements other than Co, Mn and O of less than 5 atomic percent; a pre-annealing step of pre-annealing the barrier layer; a Cu wiring layer forming step of forming a Cu wiring layer in contact with the barrier layer after the pre-annealing step; a removing step of removing the barrier layer and the Cu wiring layer formed on areas other than the inner walls of the through holes, the bottomed holes, or the grooves by polishing the surface of the substrate portion after the Cu wiring layer forming step, In the electroless plating solution, the molar concentration of the Mn salt is 15% or more of the molar concentration of the Co salt.

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