Virtual circuit generation device, virtual circuit generation program, and virtual circuit generation method

Abstract

To provide a virtual circuit generation device, a virtual circuit generation program, and a virtual circuit generation method for improving the diversity of a virtual circuit, and for achieving time reduction and labor saving in the generation of the virtual circuit.SOLUTION: When a device identifier which is an identifier for specifying a type of a semiconductor device is received from a user terminal, a variable setting process of setting a plurality of numerical variables related to numerical values in components constituting the semiconductor device of the type indicated by the device identifier, a variable selection process of randomly selecting a numerical variable of which a value is changeable from the plurality of numerical variables for a basic circuit associated with the semiconductor device, a variable changing process of randomly changing the value of the selected numerical variable, and a virtual circuit generation process of generating a virtual circuit based on the changed value are performed.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present invention relates to a virtual circuit generation device, a virtual circuit generation program, and a virtual circuit generation method that generate a plurality of virtual circuits using a circuit of a semiconductor device as a basic circuit based on predetermined design information, in particular design information of the semiconductor device provided as a PDK (Process Design Kit). [Background technology]

[0002] Conventionally, when designing a circuit for a semiconductor device, the materials required for the design, known as PDK, are provided by the foundry that manufactures the semiconductor. The semiconductor PDK designer must then verify the validity of the PDK.

[0003] Semiconductor devices have a large number of parameters. When verifying the validity of a PDK, the PDK designer typically manually sets the values ​​of each parameter one by one. To improve the accuracy of verifying the validity of a PDK, it is necessary to generate a large number of virtual circuit symbols (hereinafter referred to as "virtual circuits") while varying the values ​​of each parameter. This means that verifying the validity of a PDK takes an enormous amount of time.

[0004] To address the above-mentioned problem, the program described in Patent Document 1 automatically generates a virtual circuit of a PDK library by having the PDK designer set the types and values ​​of some parameters. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Chinese Patent No. 10383889 Summary of the Invention [Problem to be solved by the invention]

[0006] However, parameter input is still required, and the final virtual circuit type is a combination of the input parameter types and values. Therefore, it may not be sufficient for the PDK designer to set only some parameter values ​​to define the virtual circuit type.

[0007] The present invention has been made in view of the above circumstances, and its object is to provide a virtual circuit generation device, a virtual circuit generation method, and a virtual circuit generation program that can increase the diversity of virtual circuits while shortening the time and labor required for generating virtual circuits. [Means for solving the problem]

[0008] To achieve the above object, a virtual circuit generation device according to one aspect of the present invention has the following features.

[0009] One aspect of the present invention made to solve the above problem is: (1) A virtual circuit generation device comprising an information processing device, a variable setting process for setting, upon receiving from a user terminal a device identifier that is an identifier for identifying a type of semiconductor device, a plurality of numerical variables relating to numerical values ​​of components that constitute a semiconductor device of the type indicated by the device identifier; a variable selection process for randomly selecting, for a basic circuit associated with the semiconductor device, a numerical variable whose value can be changed from the plurality of numerical variables set by the variable setting process; a variable change process for randomly changing the values ​​of the numerical variables selected by the variable selection process; a virtual circuit generation process for generating a virtual circuit based on the values ​​changed by the variable change process; The control unit performs the above. According to the aspect described in (1) above, for a basic circuit associated with a semiconductor device, numerical variables whose values ​​can be changed are randomly selected from a plurality of numerical variables, the values ​​of the selected numerical variables are randomly changed, and a virtual circuit based on the changed values ​​is generated, thereby increasing the diversity of the virtual circuit and reducing the time and labor required for generating the virtual circuit.

[0010] (2) In the virtual circuit generating device according to (1), The control unit may further perform a maximum / minimum value setting process to set maximum and minimum values ​​of the plurality of numerical variables set by the variable setting process, and in the variable change process, may randomly change the value of the numerical variable selected by the variable selection process within a range between the minimum and maximum values ​​of the numerical variable. According to the aspect described in (2) above, the value of the numerical variable is changed randomly within the range between the minimum and maximum values, thereby increasing the diversity of the virtual circuits. (3) In the virtual circuit generating device according to (1), In addition to numerical variables, the targets that can be set in the variable setting process and that can be selected in the variable selection process include layout variables related to the layout of circuits among the components that make up the semiconductor device, the layout variable can have, as its value, at least a first content corresponding to the basic circuit and a second content different from the first content; When a layout variable is selected in the variable selection process, the control unit may decide to select the first content or the second content in the variable change process. According to the aspect described in (3) above, in addition to numerical variables, the targets that can be set in the variable setting process and that can be selected in the variable selection process include layout variables related to the layout of circuits among the components that make up the semiconductor device, thereby further increasing the diversity of virtual circuits. (4) In the virtual circuit generation device according to (1), In addition to numerical variables, targets that can be set in the variable setting process and that can be selected in the variable selection process include a possible / possible state variable, which is a state related to whether a specific numerical variable can be changed, and the possible / possible state variable can take on at least one value: an unchangeable state in which the specific numerical variable is not allowed to be changed, and a changeable state in which the specific numerical variable is allowed to be changed.When the control unit selects the possible / possible change variable in the variable selection process, it may decide on the possible / possible change state or the changeable state in the variable change process, and when the possible / possible change variable is in the changeable state, it may be possible to change the value of the specific numerical variable in the variable change process. According to the aspect described in (4) above, in addition to numerical variables, targets that can be set in the variable setting process and that can be selected in the variable selection process include a possible / prohibitive state variable, which is a state relating to whether a specific numerical variable can be changed, and the possible / prohibitive state variable can take on at least one value: an unchangeable state in which the specific numerical variable is not allowed to be changed, and a changeable state in which the specific numerical variable is allowed to be changed. This increases the randomness of the virtual circuit generation process, and as a result, further increases the diversity of virtual circuits. (5) In the virtual circuit generation device according to any one of (1) to (4), When there are a plurality of selection targets in the variable selection process, the control unit may select the selection targets in the variable selection process in a random order for each virtual circuit. According to the aspect described in (5) above, the selection candidates are selected in a random order for each virtual circuit, which increases the randomness of the virtual circuit generation process, thereby further increasing the diversity of the virtual circuits. (6) In the virtual circuit generation device according to any one of (1) to (4), If the number of variables that can be selected in the variable selection process is smaller than the number of variables that are set in the variable setting process, the control unit randomly selects a selection target for each virtual circuit in the variable selection process; The variables selected in the variable selection process for one of the virtual circuits may be different from the variables selected in the variable selection process for another of the virtual circuits. According to the aspect described in (6) above, selection targets are selected randomly for each virtual circuit, and the variables selected in the variable selection process for one virtual circuit are different from the variables selected in the variable selection process for another virtual circuit. Therefore, under the condition that the number of variables that can be selected in the variable selection process is smaller than the number of variables set in the variable setting process, the randomness of the virtual circuit generation process is increased, and as a result, the diversity of the virtual circuits is further increased.

[0011] In order to achieve the above object, a virtual circuit generation program according to one aspect of the present invention has the following features. (7) A computer is caused to function as the virtual circuit generating device according to any one of (1) to (6).

[0012] Furthermore, in order to achieve the above object, a virtual circuit generation method according to one aspect of the present invention has the following features. (8) a first step of, upon receiving a device identifier that is an identifier for identifying a type of semiconductor device from a user terminal, setting a plurality of numerical variables relating to numerical values ​​of components that constitute a semiconductor device of the type indicated by the device identifier; a second step of randomly selecting, for a basic circuit associated with the semiconductor device, a numerical variable whose value can be changed from the plurality of numerical variables set in the first step; a third step of randomly changing the values ​​of the numerical variables selected in the second step; a fourth step of generating a virtual circuit based on the values ​​changed in the third step; It has. According to the aspect described in (8) above, for a basic circuit associated with a semiconductor device, a numerical variable whose value can be changed is randomly selected from a plurality of numerical variables, the values ​​of the selected numerical variable are randomly changed, and a virtual circuit based on the changed value is generated, thereby increasing the diversity of the virtual circuit and reducing the time and labor required for generating the virtual circuit. [Effects of the Invention]

[0013] The virtual circuit generating device, virtual circuit generating program, and virtual circuit generating method according to the present invention can increase the diversity of virtual circuits, and can also reduce the time and labor required to generate virtual circuits. [Brief explanation of the drawings]

[0014] [Figure 1] 1 is a schematic diagram showing the overall configuration of a virtual circuit generation system according to a first embodiment of the present invention. [Figure 2] FIG. 2 is a block diagram showing a characteristic functional configuration of a management server. [Figure 3] FIG. 2 is an explanatory diagram of each database. [Figure 4] 1 is a table for explaining variables related to an N-channel MOSFET. [Figure 5] 10 is a flowchart showing a virtual circuit generation process. [Figure 6] 10 is a flowchart showing an initial setting process. [Figure 7] 10 is a flowchart showing a virtual circuit generation execution process. [Figure 8] FIG. 10 is a diagram showing an example of a circuit diagram generated by the virtual circuit generation process. [Figure 9] This is a distribution diagram of values ​​with the gate length (variable 2) on the horizontal axis and the width per finger (variable 3) on the vertical axis. [Figure 10] 1 is a flowchart of a virtual circuit generation method. DETAILED DESCRIPTION OF THE INVENTION

[0015] (First embodiment) A first embodiment of the present invention will be described below. In this specification, "information" and "data" are synonymous and are used without any particular distinction. Furthermore, when "information" and "data" are written, the number and format thereof are not limited. Furthermore, data stored or stored in a storage medium in a so-called table format is also included in the "information" and "data" referred to here.

[0016] (Overall configuration of virtual circuit generation system 1) FIG. 1 is a schematic diagram showing the overall configuration of a virtual circuit generation system 1 according to this embodiment. The virtual circuit generation system 1 generates a large number of virtual circuits for verifying the correctness of a model of a semiconductor device included in a certain PDK. In the following, the virtual circuit generation system 1 will be simply referred to as "system 1." Furthermore, generating a large number of virtual circuits using the virtual circuit generation system 1 will be referred to as "testing."

[0017] As shown in Fig. 1, system 1 has a management server 2 managed by the operator of system 1 and a user terminal 3 used by a user. Management server 2 and user terminal 3 are connected via a communication network 4 so as to be able to send and receive information (data) between them. Communication network 4 may be configured, for example, with the Internet, a LAN, a telephone line, a mobile communication network, Wi-Fi (Wireless Fidelity) (registered trademark), other communication lines, or a combination thereof, and may be wired or wireless.

[0018] The management server 2 is configured as a general information processing device, and although not shown, includes a CPU (Central Processing Unit) that controls the entire system, RAM (Random Access Memory) that functions as the CPU's work area, ROM (Read Only Memory) that stores various programs, a storage device that stores various data, an input unit including a keyboard and mouse, a display unit that displays images, and a transmission / reception unit that communicates with external devices. However, the management server 2 may be configured as a single information processing device (one physical computer), or may be configured as multiple information processing devices (multiple physical computers) that work together to perform its functions (it may be configured in a cloud environment). Details of the management server 2 will be described later.

[0019] The user terminal 3 is configured as a general communication terminal, and although not shown, includes a CPU that controls the entire device, RAM that functions as a work area for the CPU, ROM that stores various programs, a storage device that stores various data, an input unit including a keyboard and mouse, a display unit that displays images, and a transmission / reception unit that communicates with external devices. Specifically, the user terminal 3 can be a desktop PC, a notebook PC, a PDA (Personal Digital Assistant), a tablet terminal, a smartphone, or the like. In this embodiment, the user terminal 3 is configured as a desktop PC.

[0020] As will be described later, a PDK designer of a semiconductor device inputs a device identifier for identifying the type of semiconductor device (semiconductor type) into the user terminal 3. When the device identifier is input, the user terminal 3 transmits the device identifier to the management server 2. When the management server 2 receives the device identifier transmitted from the user terminal 3, it generates a large number of virtual circuits using the circuit of the semiconductor device indicated by the device identifier as a basic circuit. At this time, the management server 2 controls the PDK designer to repeatedly change the values ​​of variables in the basic circuit and generate virtual circuits.

[0021] (Management Server 2) Next, a description will be given of the management server 2. Fig. 2 is a block diagram showing the characteristic functional configuration of the management server 2. The management server 2 includes a server communication unit 21, a server control unit 22, and a server storage unit 23.

[0022] The server communication unit 21 is configured with an interface that communicates with the user terminal 3 and transmits and receives data. Note that the communication format between the server communication unit 21 and the user terminal 3 may be either wireless or wired.

[0023] The server storage unit 23 is configured by a storage device such as a memory or a disk drive provided by a storage area of ​​a physical device that is a computer-readable recording medium. That is, the server storage unit 23 stores various programs including an operating system program and a driver program, as well as various data used during the execution of these programs.

[0024] The server storage unit 23 stores a management program 23a to be executed by the server control unit 22, which will be described later.

[0025] The server storage unit 23 includes a PDK storage area 23b for storing PDKs. PDKs provided by multiple foundries are stored in the PDK storage area 23b. PDKs provided by new foundries can also be added to the PDK storage area 23b.

[0026] The PDK contains information (basic design information) necessary to design the basic circuits and layouts of each semiconductor element, such as SPICE models (macro models) for various semiconductor elements and libraries of various semiconductor elements. Therefore, the basic design information includes, for example, information such as the type of semiconductor element, the components included in each semiconductor element, and the dimensions of each component, as well as information about the structure (circuit layout) of each semiconductor element.

[0027] Furthermore, server storage unit 23 includes database 23c storing various data used during execution of management program 23a or various data that can be edited during execution of management program 23a. Database 23c includes semiconductor type database 23c1, variable database 23c2, maximum / minimum value database 23c3, and test result database 23c4. Figure 3 is an explanatory diagram of each database.

[0028] The semiconductor type database 23c1, the variable database 23c2, and the maximum / minimum value database 23c3 store various data constituting one record using a device identifier as a key. The device identifier is identification information for identifying a specific semiconductor device type (semiconductor type), in other words, identification information assigned to each semiconductor type.

[0029] The test result database 23c4 stores various data constituting one record using a virtual circuit identifier as a key. The virtual circuit identifier is identification information for identifying one virtual circuit assigned to each virtual circuit generated in the virtual circuit generation process described below.

[0030] The semiconductor type database 23c1 stores semiconductor type data, each of which constitutes one record using a device identifier as a key. Each record of semiconductor type data is associated with a device identifier and includes a plurality of pieces of semiconductor type identification information that identify a specific semiconductor type, such as the foundry that provides the PDK, the component type associated with the foundry, the first classification, and the second classification.

[0031] The device-specific information includes information about the foundry that provides the PDK, the component type, and the classification for subdividing the component type. Classifications include the first classification, the second classification that is lower than the first classification, the third classification that is lower than the second classification, etc.

[0032] Examples of foundries that provide PDKs include Company A, Company B, Company C, etc. Examples of component types include diodes, transistors, light-emitting devices, light-receiving devices, and sensors. However, the component types included in the PDK vary depending on the foundry.

[0033] For example, if the component type is a transistor from Company A, an example of the first classification would be bipolar transistors and MOS field-effect transistors (MOSFETs) based on the structure. Furthermore, an example of the second classification would be NPN transistors and PNP transistors if the first classification is bipolar transistors. Furthermore, an example of the second classification would be N-channel MOSFETs, P-channel MOSFETs, and complementary MOSFETs if the first classification is MOS field-effect transistors. However, the classifications included in the PDK vary depending on the foundry.

[0034] It is assumed that the server control unit 22 can acquire basic design information for the semiconductor type corresponding to the device identifier from the PDK storage area 23b based on the device identifier.

[0035] The variable database 23c2 stores variable data constituting one record using a device identifier as a key. Each variable data contains information about multiple variables set for the semiconductor type associated with the device identifier. The values ​​of the variables can be changed by the server control unit 22 during the virtual circuit generation process.

[0036] There are three types of variables: numerical variables, layout variables, and state variables. Each variable has an initial value. Specific examples of variables are described below.

[0037] The maximum / minimum value database 23c3 stores maximum / minimum value data constituting one record using a device identifier as a key. Each maximum / minimum value data contains information on the maximum / minimum values ​​of a numerical variable, described below, such as the maximum / minimum values ​​of a specific portion of a specific component among components of a semiconductor type associated with the device identifier. That is, as described below, the server control unit 22 can change the dimensions of the specific portion of the specific component in various ways within the range between the minimum and maximum values ​​indicated by the maximum / minimum value data.

[0038] For example, when the semiconductor device is an N-channel MOSFET, the maximum / minimum values ​​are appropriately set for the gate length, width per finger, drain diffusion area, source diffusion area, drain perimeter, and source perimeter.

[0039] The test result database 23c4 stores test result data, each record of which is formed using a virtual circuit identifier as a key. Each test result data contains the values ​​of various variables set for the semiconductor type associated with the device identifier that is the target of the virtual circuit generation process. As will be described later, the server control unit 22 can generate a virtual circuit corresponding to the virtual circuit identifier of the test result data, based on the test result data and the basic design information stored in the PDK storage area 23b.

[0040] The server storage unit 23 has a circuit generation counter 23d1, a device identifier storage area 23d2, a variable storage area 23d3, a maximum / minimum value storage area 23d4, a test identifier storage area 23d5, a virtual circuit identifier storage area 23d6, and a selected variable storage area 23d7.

[0041] The circuit generation counter 23d1 counts the number of circuit generations. The number of circuit generations is the number of times a virtual circuit is generated in the virtual circuit generation execution process described below. The number of circuit generations in one virtual circuit generation execution process is set in advance. In the initial setting process described below, the set number is set in the circuit generation counter 23d1. Then, each time a virtual circuit is generated in the virtual circuit generation execution process, the counter value of the circuit generation counter 23d1 is decremented by "1." Note that, hereinafter, the preset number of circuit generations in the virtual circuit generation execution process will be referred to as the "specified number of circuit generations," and the current number of circuit generations indicated by the counter value of the circuit generation counter 23d1 will be referred to as the "measured number of circuit generations."

[0042] The device identifier storage area 23d2 stores a device identifier. The variable storage area 23d3 stores various variables associated with the semiconductor type indicated by the device identifier. The maximum / minimum value storage area 23d4 stores the maximum / minimum values ​​of various numerical variables among the various variables associated with the semiconductor type indicated by the device identifier (described later).

[0043] The test identifier storage area 23d5 stores test identifiers. The test identifier is identification information for identifying one test assigned to a test by the virtual circuit generation process. The virtual circuit identifier storage area 23d6 stores virtual circuit identifier data indicating the virtual circuit identifier. The selected variable storage area 23d7 stores selected variable data indicating variables selected in the process of generating one virtual circuit.

[0044] The server storage unit 23 also has a circuit diagram file area 23e. The circuit diagram file area 23e stores circuit diagram files for displaying circuit diagrams showing each circuit generated by the virtual circuit generation process. The circuit diagram file is generated corresponding to one test for one semiconductor type. The circuit diagrams include a circuit diagram of a basic circuit that is the basis for that semiconductor type, and a circuit diagram of a virtual circuit that is modified based on the basic circuit.

[0045] Next, we will explain the server control unit 22. The server control unit 22 is a processor, that is, a processing device that performs operations, processing, and transfer of data, executes programs, and controls other devices, and is composed of a CPU and various registers.

[0046] The server control unit 22 centrally controls the management server 2 by executing various programs stored in the server storage unit 23. Furthermore, by executing the management program 23a, the server control unit 22 realizes the function of generating a large number of virtual circuits, just as a PDK designer designs a large number of new circuits (virtual circuits) by changing the components of one basic circuit (basic circuit).

[0047] The following describes each functional block realized by the server control unit 22. As shown in Fig. 2, the server control unit 22 has a semiconductor type setting unit 22a, an initial setting unit 22b, and a virtual circuit generation unit 22c. Each of the units 22a to 22c corresponds to a function that can be realized by the server control unit 22. Note that the configuration of each of the units 22a to 22c corresponding to the functions of the server control unit 22 is not limited to this, and each of these units 22a to 22c may be integrated as appropriate, and each of the units 22a to 22c may be further subdivided as appropriate.

[0048] When accessed from the user terminal 3, the semiconductor type setting unit 22a displays a screen (semiconductor type input screen) on the display unit of the user terminal 3 for specifying the semiconductor type of the target virtual circuit to be designed. Although not shown, the semiconductor type input screen has an area for inputting a device identifier associated with the semiconductor type. When a device identifier is input into the area by a predetermined operation on the user terminal 3 and transmitted to the management server 2, the semiconductor type setting unit 22a stores (memorizes) the device identifier in the device identifier storage area 23d2. In other words, the semiconductor type is specified by the user. Note that the method for specifying the semiconductor type is not particularly limited and may be changed as appropriate. For example, the semiconductor type setting unit 22a may display a list of semiconductor types accompanied by selection buttons on the display unit of the user terminal 3, and when the user selects a selection button, the device identifier associated with the selected semiconductor type is transmitted to the management server 2.

[0049] The initial setting unit 22b can perform initial settings for generating a virtual circuit of a semiconductor type specified by a user. Specifically, the initial setting unit 22b sets various variables associated with the semiconductor type specified by the user, sets maximum and minimum values ​​of various numerical variables among the various variables associated with the semiconductor type specified by the user, sets a specified number of circuit generation attempts, assigns a test identifier, and creates a circuit diagram file. Note that the initial setting by the initial setting unit 22b is performed immediately after the semiconductor type is specified by the semiconductor type setting unit 22a.

[0050] The virtual circuit generation unit 22c can generate a specified number of virtual circuits in which some or all of the components of a basic circuit related to a semiconductor type specified by the user have been changed. Specifically, the virtual circuit generation unit 22c first generates one virtual circuit by changing some or all of the components of the basic circuit related to the semiconductor type specified by the user. Next, the virtual circuit generation unit 22c changes some or all of the components of the first virtual circuit to generate a second virtual circuit. Thereafter, the virtual circuit generation unit 22c repeatedly generates a new virtual circuit based on the previously generated virtual circuit until the number of circuit generation measurements reaches the specified number of circuit generation times.

[0051] In this way, when the management server 2 receives a device identifier, which is an identifier for specifying the type of semiconductor device, from the user terminal 3, it sets multiple numerical variables related to the numerical values ​​of the components that make up the semiconductor device of the type indicated by the device identifier, randomly selects numerical variables whose values ​​can be changed from the multiple set numerical variables for the basic circuit associated with the semiconductor device, randomly changes the values ​​of the selected numerical variables, and generates a virtual circuit based on the changed values. In other words, the management server 2 constitutes the virtual circuit generation device of the present invention.

[0052] (Virtual circuit generation process) Next, control relating to virtual circuit generation by server control unit 22 will be described with reference to Figs. 5 to 7. Fig. 5 is a flowchart showing virtual circuit generation processing, which is the overall processing for generating a virtual circuit a specified number of times, in other words, the virtual circuit generation processing corresponding to one test. Fig. 6 is a flowchart showing the initial setting processing in the virtual circuit generation processing, and Fig. 7 is a flowchart showing the virtual circuit generation execution processing in the virtual circuit generation processing. Note that the flowcharts showing each process of control relating to virtual circuit generation described below are merely examples. The execution order of multiple processes in the flowcharts can be changed as appropriate or executed in parallel, as long as no contradictions occur in the process content.

[0053] The server control unit 22 performs a virtual circuit generation process when accessed by the user terminal 3. In the virtual circuit generation process, the server control unit 22 sequentially performs a semiconductor type setting process (S1), an initial setting process (S2), and a virtual circuit generation execution process (S3).

[0054] In the semiconductor type setting process (S1), the server control unit 22 first displays a semiconductor type input screen on the display unit of the user terminal 3. As described above, the semiconductor type input screen has an area for inputting a device identifier. When a device identifier is sent to the management server 2 by a predetermined operation on the user terminal 3, the semiconductor type setting unit 22a stores (memorizes) the device identifier in the device identifier storage area 23d2. Here, it is assumed that a device identifier representing an N-channel MOSFET has been stored (memorized) in the device identifier storage area 23d2, and the following initial setting process (S2) and virtual circuit generation execution process (S3) will be described.

[0055] Next, before describing the initial setting process (S2) and the virtual circuit generation execution process (S3), an example of variables and variable properties related to an N-channel MOSFET will be described. First, the variables will be described.

[0056] 4 is a table for explaining variables related to N-channel MOSFETs. As shown in FIG. 4, the following variables are set for the N-channel MOSFET: multiplier (variable 1), gate length (variable 2), width per finger (variable 3), presence / absence of maximum gate width (variable 4), number of gates (variable 5), availability / application of maximum gate width change (variable 6), maximum gate width change (variable 7), S / D connection (variable 8), switch S / D (variable 9), pre-change status of specific variables (variable 10), post-change status of specific variables (variable 11), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15). Hereinafter, the possible changes of the variables may be referred to as "change patterns."

[0057] The multiplier (variable 1) is the number of N-channel MOSFETs to be placed, and the change pattern can take a range between the minimum and maximum values ​​of the multiplier. The multiplier value, minimum value, and maximum value are integers. The minimum value is at least "1."

[0058] The gate length (variable 2) is the distance between the drain and the source, and the change pattern can take a range between the minimum and maximum values ​​of the gate length.

[0059] The width per finger (variable 3) is the so-called "gate width" of one gate, and the change pattern can take a range between the minimum and maximum values ​​of the gate width.

[0060] The state of whether or not there is a maximum value for the gate width (variable 4) refers to the state related to the maximum value of the total number of gate widths, and the possible change patterns are a state in which no maximum value is set (no maximum value state) and a state in which the maximum value of the total number of gate widths is set to the specified maximum value of 50 μm (maximum value specified state).

[0061] The number of gates (variable 5) is the number of gates included in one N-channel MOSFET of interest, and can be changed within the range between the minimum and maximum values ​​of the number of gates. The value, minimum, and maximum of the number of gates are integers. The minimum value is at least "1."

[0062] The state of whether or not the maximum gate width change value can be applied (variable 6) refers to the state of whether or not a change value (maximum change value) other than the specified maximum value is applied to the maximum value of the total number of gate widths.The change patterns can be a state in which the change value is not applied (change value not applicable state) or a state in which the change value is applied (change value applicable state).

[0063] The maximum gate width change value (variable 7) is a maximum value (maximum change value) that is different from the specified maximum value of the total number of gate widths, and the change pattern can take a range between the minimum and maximum values ​​of the maximum gate width change value. Note that the maximum gate width change value (variable 7) can be changed when the maximum gate width change applicability state (variable 6) is in the change value applicable state.

[0064] The S / D connection (variable 8) refers to the state of whether or not a short connection is made, and the connection mode if a short connection is made.The change patterns include a state where no short connection is made (no connection state), a state where the source is connected (source connection state), a state where the drain is connected (drain connection state), and a state where the source and drain are connected (both connection state).

[0065] The switch S / D (variable 9) refers to the state of the source and drain positions, and the change patterns can be the normal state (normal state) or a state in which the source and drain positions are reversed (special state).

[0066] The pre-stage state of whether a specific variable can be changed (variable 10) refers to the state relating to whether the post-stage state of whether a specific variable can be changed (variable 11) can be changed, and the change patterns can be a state in which the post-stage state of whether a specific variable can be changed cannot be taken (pre-stage unchangeable state), and a state in which the post-stage state of whether a specific variable can be changed can be taken (pre-stage changeable state).

[0067] The specific variable changeability later stage state (variable 11) refers to a state relating to whether a specific variable can be changed, and the change pattern can be a state in which the specific variable cannot be changed (later stage unchangeable state) or a state in which the specific variable can be changed (later stage changeable state). The specific variables are the drain diffusion area (variable 12), the source diffusion area (variable 13), the drain perimeter (variable 14), and the source perimeter (variable 15). The specific variable changeability later stage state (variable 11) can be changed when the specific variable changeability earlier stage state (variable 10) is in the earlier stage changeable state.

[0068] The drain diffusion area (variable 12) is the total area of ​​the diffusion of the drain terminal, which is one of the terminals of the MOSFET, and the variation pattern can take a range between the minimum and maximum values ​​of the drain diffusion area.

[0069] The source diffusion area (variable 13) is the total area of ​​the diffusion of the source terminal, which is one of the terminals of the MOSFET, and the change pattern can take a range between the minimum and maximum values ​​of the source diffusion area.

[0070] The drain perimeter (variable 14) is the perimeter of the diffusion of the drain terminal, and the change pattern can take a range between the minimum and maximum values ​​of the drain perimeter.

[0071] The source perimeter (variable 15) is the perimeter of the diffusion of the source terminal, and the change pattern can take a range between the minimum and maximum values ​​of the source perimeter.

[0072] In addition, the types of variables related to variables related to N-channel MOSFETs include numerical variables whose contents are composed of numerical values, layout variables whose contents are composed of components related to the circuit layout, and feasibility state variables whose contents are composed of the state regarding the feasibility of specific items.

[0073] The multiplier (variable 1), gate length (variable 2), width per finger (variable 3), number of gates (variable 5), maximum gate width change (variable 7), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15) are numerical variables, the presence / absence state of the maximum gate width (variable 4), S / D connection (variable 8), and switch S / D (variable 9) are layout variables, and the applicability state of the maximum gate width change (variable 6), the pre-stage state of whether a specific variable can be changed (variable 10), and the post-stage state of whether a specific variable can be changed (variable 11) are applicability state variables.

[0074] As mentioned above, the maximum / minimum value database 23c3 stores the maximum / minimum values ​​of the numerical variables associated with each semiconductor type. Although specific numerical values ​​will not be described, it is assumed that the maximum / minimum values ​​of the numerical variables associated with each semiconductor type, including N-channel MOSFETs, are appropriately set.

[0075] An initial value is set for each variable. The basic design information corresponding to the numerical variables and layout variables related to the semiconductor type constitutes the initial values ​​of the numerical variables and layout variables. Regarding the applicability state variables, the negation state is set as the initial value. That is, the initial value of the maximum gate width change applicability state (variable 6) is the change value application inapplicable state, the initial value of the specific variable change applicability pre-stage state (variable 10) is the pre-stage inapplicable state, and the initial value of the specific variable change applicability post-stage state (variable 11) is the post-stage inapplicable state.

[0076] The total number of gate widths is calculated by multiplying the width per finger (variable 3) by the number of gates (variable 5), and the maximum value of the total number of gate widths is determined by a specified maximum value related to the presence or absence of a maximum gate width (variable 4) and a changeable maximum value related to the maximum change value of the gate width (variable 7).

[0077] When the maximum change applicability state (variable 6) is in the change value applicable state, the value (maximum change value) of the maximum change value for gate width (variable 7) is applied to the maximum total number of gate widths, regardless of the content of the maximum gate width presence / absence state (variable 4). When the maximum change applicability state (variable 6) is in the change value inapplicability state, the maximum total number of gate widths is set according to the content of the maximum gate width presence / absence state (variable 4). In other words, when there is no maximum value, the maximum total number of gate widths is not set, and when the maximum value is specified, the specified maximum value of "50 μm" is set as the maximum total number of gate widths.

[0078] Therefore, as will be described later, the maximum total number of gate widths reflected at any given time varies depending on the order in which the presence or absence of a maximum gate width value (variable 4), the applicability of the maximum change value (variable 6), and the maximum change value for gate width (variable 7) are selected. If the total number of gate widths calculated by multiplying the width per finger (variable 3) by the number of gates (variable 5) exceeds the maximum total number of gate widths reflected at that time, the width per finger or the number of gates is adjusted according to a predetermined process so that it falls within the maximum gate width. This process of executing predetermined processing when data is input is called callback processing.

[0079] As will be described later, in the virtual circuit generation unit process, a change determination is executed to determine whether or not to change each variable. Then, in the change determination, the server control unit 22 randomly determines whether or not to "change the value of the selected variable." Here, "random" means that even for the same variable, the probability varies with each change determination. However, the server control unit 22 may determine to "change the value of the selected variable" with a predetermined probability in the change determination. In this case, for example, the probability of determining to "change the value of the selected variable" (change determination probability) may be set in advance for each variable and stored in the maximum / minimum value database 23c3. In the change determination, the server control unit 22 performs a change determination for each variable so that the change determination probability for each variable is met. The change determination probability can be set as appropriate.

[0080] Next, we will explain variable properties. Variable properties are attributes related to whether variables 1 to 15 can be changed, and there are two states: a changeable state, in which they can be changed, and an immutable state, in which they cannot be changed. Variables are classified into variables that maintain a changeable state regardless of the contents of other variables (changeable persistent variables), and variables whose variable properties change depending on the contents of other variables (changeable variable variables).

[0081] The variable variables are the multiplier (variable 1), gate length (variable 2), width per finger (variable 3), maximum gate width (variable 4), number of gates (variable 5), maximum gate width change (variable 6), S / D connection (variable 8), switch S / D (variable 9), and pre-change state (variable 10). The variable variables are the maximum gate width change (variable 7), post-change state (variable 11), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15).

[0082] The maximum gate width change value (variable 7) is changeable when the maximum gate width change applicability state (variable 6) is in the maximum change applicability state, and is unchangeable when it is not in the maximum change applicability state. The changeability post-stage state (variable 11) is changeable when the changeability pre-stage state (variable 10) is in the pre-stage possible state, and is unchangeable when it is not in the pre-stage possible state. The drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15) are changeable when the changeability pre-stage state (variable 10) is in the pre-stage possible state and the changeability post-stage state (variable 11) is in the post-stage possible state, and are unchangeable when the changeability pre-stage state (variable 10) is in the pre-stage possible state and the changeability post-stage state (variable 11) is not in the post-stage possible state.

[0083] When the virtual circuit generation execution process (S3) is started, the variable properties of each changeable variable variable are appropriately set in association with the semiconductor type. However, the variable properties of each changeable variable variable when the virtual circuit generation execution process (S3) is started may be arbitrarily set according to the PDK library, cell type, and application.

[0084] Next, the initial setting process (S2) will be described. In the initial setting process (S2), the server control unit 22 first sets various variables (S201). As described above, the various variables related to S201 are associated with device identifiers. Therefore, the server control unit 22 reads out, from the variable database 23c2, variable data associated with the device identifier stored in the device identifier storage area 23d2 in the semiconductor type setting process (S1), and stores the variable data in the variable storage area 23d3.

[0085] In the initial setting process (S2), after S201, the server control unit 22 sets maximum / minimum values ​​of various numeric variables (S202). As described above, the maximum / minimum values ​​of various numeric variables in S202 are associated with the device identifier. Therefore, the server control unit 22 reads out, from the maximum / minimum value database 23c3, the maximum / minimum value data associated with the device identifier stored in the device identifier storage area 23d2 in the semiconductor type setting process (S1), and stores the maximum / minimum values ​​of various numeric variables in the maximum / minimum value storage area 23d4 in association with the numeric variables.

[0086] In the initial setting process (S2), after S202, the server control unit 22 sets the specified number of circuit generation times in the circuit generation counter (S203), assigns a test identifier (S204), creates a circuit diagram file (S205), and ends the initial setting process.

[0087] In S203, the server control unit 22 sets the counter value of the circuit generation counter to the specified number of circuit generation times associated with the semiconductor type indicated by the device identifier. In the first embodiment, the specified number of circuit generation times for an N-channel MOSFET is set to 2000 times.

[0088] In S204, the server control unit 22 appropriately generates a test identifier corresponding to the virtual circuit generation that is about to be started, and stores the test identifier in the test identifier storage area 23d5.

[0089] In S205, the server control unit 22 appropriately generates a circuit diagram file for writing the circuit diagram of the virtual circuit to be generated in association with the test identifier, and stores the file in the circuit diagram file area 23e.

[0090] Next, the virtual circuit generation execution process (S3) will be described. In the virtual circuit generation execution process (S3), the server control unit 22 first generates a basic circuit of the semiconductor type (here, N-channel MOSFET) indicated by the device identifier stored (memorized) in the device identifier storage area 23d2 (S301). In S301, the server control unit 22 generates a virtual circuit identifier indicating the "0th" virtual circuit and stores it in the virtual circuit identifier storage area 23d6. Furthermore, in S301, the server control unit 22 stores variable data indicating the initial values ​​of various variables in the test result database 23c4 in association with the generated virtual circuit identifier, and writes the basic circuit that will serve as the base point for subsequent changes to the circuit diagram file.

[0091] Furthermore, in storing the variable data related to S301 in test result database 23c4, server control unit 22 reads basic design information related to the numerical variables and layout variables of the semiconductor type (here, N-channel MOSFET) associated with the device identifier from PDK storage area 23b, and stores the basic design information as initial values ​​of the numerical variables and layout variables in test result database 23c4. Furthermore, server control unit 22 stores a preset state as an initial value for each success / failure state variable in test result database 23c4.

[0092] After S301, the server control unit 22 then prepares to generate a new virtual circuit. Specifically, the server control unit 22 updates the virtual circuit identifier stored in the virtual circuit identifier storage area 23d6 by adding "1" to the virtual circuit identifier. The server control unit 22 also associates the variable data related to the numeric variables, layout variables, and feasibility state variables associated with the immediately previous virtual circuit identifier stored in the test result database 23c4 with the updated new virtual circuit identifier and stores them in the test result database 23c4. Thereafter, a new virtual circuit is generated by modifying the variable data newly stored in the test result database 23c4. Furthermore, the server control unit 22 clears the selected variable storage area 23d7 in S302.

[0093] After S302, the server control unit 22 subsequently selects one variable (S303). Here, the server control unit 22 randomly selects one variable using a predetermined algorithm. Randomly means that the order in which variables related to each virtual circuit generation process (S302 to S314) are selected is irregular. Therefore, the order in which variables related to all virtual circuit generation processes in the virtual circuit generation process (S3) are selected may be different from each other, or the order in which variables related to one virtual circuit generation process are selected may coincidentally be the same as the order in which variables related to another virtual circuit generation process are selected. Furthermore, the server control unit 22 uses a predetermined algorithm to ensure that the same variable is not selected more than once in one virtual circuit generation process. In other words, the server control unit 22 does not select a variable that has been selected once in one virtual circuit generation process again using the predetermined algorithm. Therefore, in one virtual circuit generation process, there are variables that are not subject to the change determination described below.

[0094] After S303, the server control unit 22 subsequently stores selected variable data indicating the variables selected in S303 in the selected variable storage area 23d7 (S304). By checking the selected variable storage area 23d7, the server control unit 22 can grasp the variables selected in the process of generating the virtual circuit. Therefore, for example, by checking the selected variable storage area 23d7, the server control unit 22 may prevent the same variable from being selected more than once in the generation of the virtual circuit.

[0095] After S304, the server control unit 22 subsequently checks the variable properties of the variables selected in S303 (S305).

[0096] After S305, the server control unit 22 subsequently determines whether the variable properties of the selected variables are changeable (S306). As mentioned above, some variables cannot be changed depending on the contents of other variables. For example, even if the drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15) are selected, they are not determined to be changeable unless the specific variable changeability later-stage state (variable 11) is in the later-stage changeable state. Furthermore, the specific variable changeability later-stage state (variable 11) is not determined to be changeable unless the specific variable changeability earlier-stage state (variable 10) is in the earlier-stage changeable state. Furthermore, the maximum change value of the gate width (variable 7) is not determined to be changeable unless the maximum change value applicability state of the gate width (variable 6) is in the maximum changeable state. On the other hand, when the multiplier (variable 1), gate length (variable 2), width per finger (variable 3), maximum gate width status (variable 4), number of gates (variable 5), maximum gate width change applicability status (variable 6), S / D connection (variable 8), switch S / D (variable 9), and specific variable change availability status (variable 10) are selected in S303, they are always determined to be in a changeable state in S306.

[0097] If the server control unit 22 determines in S306 that the variable property is not in a changeable state (NO in S306), the process proceeds to S311, whereas if the server control unit 22 determines in S306 that the variable property is in a changeable state (YES in S306), the process proceeds to S307.

[0098] If the server control unit 22 determines in S306 that the variable property is in a changeable state, it performs a change determination as to whether or not to change the value of the selected variable (S307). As described above, the probability of determining that "the value of the selected variable is changed" in the change determination is random.

[0099] After S307, the server control unit 22 subsequently determines whether the result of the change determination is "change the value of the variable" (S308). If the server control unit 22 determines in S308 that the result of the change determination is not "change the value of the variable" (NO in S308), the process proceeds to S310, whereas if the server control unit 22 determines in S308 that the result of the change determination is "change the value of the variable" (YES in S308), the process proceeds to S309.

[0100] When the process proceeds to S309, the server control unit 22 changes the value of the variable (S309). Here, if the variable is the multiplier (variable 1), gate length (variable 2), width per finger (variable 3), number of gates (variable 5), maximum gate width change value (variable 7), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), or source perimeter (variable 15), the server control unit 22 randomly generates a value between the minimum and maximum values ​​of the variable using a predetermined algorithm. Furthermore, if the variable is the maximum gate width change status (variable 4), S / D connection (variable 8), or switch S / D (variable 9), the server control unit 22 randomly changes the status to another status using a predetermined algorithm. Furthermore, if the variable is the maximum gate width change status (variable 6), the specific variable change status (variable 10), or the specific variable change status (variable 11), the server control unit 22 changes the status to the other status. In S309, the server control unit 22 reflects the changed variable value in the variable data associated with the virtual circuit identifier stored in the test result database 23c4.

[0101] After S308 or S309, the server control unit 22 subsequently executes a callback to the virtual circuit based on the current variable data associated with the virtual circuit identifier (S310).

[0102] After S310, the server control unit 22 subsequently checks the selected variable storage area 23d7 to determine whether all variables have been stored, in other words, whether all variables have been selected in S303 and the variable properties of all variables have been confirmed in S305 in the process of generating the virtual circuit (S311). If the server control unit 22 determines in S311 that all variables have not been selected (NO in S311), the process returns to S303, whereas if the server control unit 22 determines in S311 that all variables have been selected (YES in S311), the process proceeds to S312.

[0103] After proceeding to S303, the server control unit 22 repeats the processes of S303 to S311 until all variables have been selected in S303. Meanwhile, after proceeding to S312, the server control unit 22 generates a virtual circuit based on the variable data associated with the virtual circuit identifier stored in the test result database 23c4, and adds a circuit diagram of the virtual circuit to the circuit diagram file. When the circuit diagram of the virtual circuit is added to the circuit diagram file, it is written immediately to the right of the latest circuit layout.

[0104] After S312, the server control unit 22 subsequently subtracts "1" from the counter value of the circuit generation counter 23d1 (S313).

[0105] After S313, the server control unit 22 subsequently determines whether the counter value of the circuit generation counter 23d1 is 0, i.e., whether a virtual circuit has been generated the specified number of times (S314). If the server control unit 22 determines in S314 that a virtual circuit has not been generated the specified number of times (NO in S314), the process proceeds to S302. On the other hand, if the server control unit 22 determines in S314 that a virtual circuit has been generated the specified number of times (YES in S314), the process ends the virtual circuit generation execution process.

[0106] After proceeding to S302, server control unit 22 repeats the processes of S302 to S313 until it determines in S314 that virtual circuits have been generated a specified number of times. Note that, hereinafter, the process for generating one virtual circuit made up of S302 to S313 will be referred to as a "virtual circuit generation unit process."

[0107] An example of a circuit diagram generated by the virtual circuit generation process is shown in Fig. 8. As shown in Fig. 8, in the first embodiment, the basic circuit is displayed on the left side, and then the virtual circuit is displayed on the right side in the order of generation.

[0108] Next, a predetermined algorithm for generating the value of the numerical variable by the server control unit 22 will be described. This algorithm may be a known algorithm or a new algorithm. Furthermore, the randomness of the value of the numerical variable may be such that the values ​​are generated evenly distributed across the entire range between the minimum and maximum values, or may be biased toward a specific range within the range between the minimum and maximum values. The specific range may be, for example, lower than the center of the range between the minimum and maximum values, the center of the range between the minimum and maximum values, or a value higher than the center of the range between the minimum and maximum values. In other words, the randomness may be weighted.

[0109] An example of the generated values ​​of the numerical variables is shown in Figure 9. Figure 9 is a distribution diagram of gate length (variable 2) and width per finger (variable 3) for each virtual circuit identifier, with gate length (variable 2) on the horizontal axis and width per finger (variable 3) on the vertical axis. In Figure 9, both gate length (variable 2) and width per finger (variable 3) are generated with a bias toward the lower side from the center. In this way, by weighting the randomness of the numerical variable values, it is possible to focus verification on a desired range.

[0110] (Virtual circuit generation method) Next, a virtual circuit generation method will be described in which the management server 2 generates a virtual circuit by executing the management program 23a. Fig. 10 is a flowchart of the virtual circuit generation method. The virtual circuit generation method includes a variable setting step S10 (first step), a variable selection step S20 (second step), a variable change step S30 (third step), and a virtual circuit generation step S40 (fourth step).

[0111] In the variable setting process S10 (first process), when a device identifier, which is an identifier for identifying the type of semiconductor device, is received from the user terminal 3, multiple numerical variables related to the numerical values ​​of the components that make up the semiconductor device of the type indicated by the device identifier are set.

[0112] In the variable selection step S20 (second step), a numerical variable whose value can be changed is randomly selected from the plurality of numerical variables set in the variable setting step S10 (first step) for the basic circuit associated with the semiconductor device.

[0113] In the variable changing step S30 (third step), the values ​​of the numerical variables selected in the variable selecting step S20 (second step) are changed randomly.

[0114] In the virtual circuit generation step S40 (fourth step), a virtual circuit is generated based on the values ​​changed in the variable change step S30 (third step).

[0115] As described above, according to the virtual circuit generation device of the first embodiment, when a device identifier that is an identifier for specifying the type of semiconductor device is received from the user terminal 3, the virtual circuit generation device performs a variable setting process (the server control unit 22 that performs S201: a part of the initial setting unit 22b) that sets a plurality of numerical variables (multiplier (variable 1), gate length (variable 2), width per finger (variable 3), number of gates (variable 5), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15)) related to the numerical values ​​of the components that make up the semiconductor device of the type indicated by the device identifier; The server control unit 22 includes a control unit (server control unit 22) that performs a variable selection process (the server control unit 22 that performs S303: a part of the virtual circuit generation unit 22c) that randomly selects, for a basic circuit associated with a semiconductor device, a numeric variable whose value can be changed from among a plurality of numeric variables set by a variable setting process, a variable change process (the server control unit 22 that performs S309: a part of the virtual circuit generation unit 22c) that randomly changes the values ​​of the numeric variables selected by the variable selection process, and a virtual circuit generation process (the server control unit 22 that performs S312: a part of the virtual circuit generation unit 22c) that generates a virtual circuit based on the values ​​changed by the variable change process. Since the process randomly selects, for a basic circuit associated with a semiconductor device, a numeric variable whose value can be changed from among a plurality of numeric variables, randomly changes the values ​​of the selected numeric variables, and generates a virtual circuit based on the changed values, it is possible to increase the diversity of virtual circuits and reduce the time and labor required for generating virtual circuits.

[0116] Furthermore, according to the virtual circuit generation device 2 of the first embodiment, the control unit further performs a maximum / minimum value setting process (the server control unit 22 that performs S202: part of the initial setting unit 22b) that sets the maximum and minimum values ​​of the multiple numerical variables set by the variable setting process, and in the variable change process, the value of the numerical variable selected by the variable selection process is changed randomly within the range between the minimum and maximum values ​​of the numerical variable. Because the value of the numerical variable is changed randomly within the range between the minimum and maximum values, the diversity of the virtual circuit is increased. Furthermore, according to the virtual circuit generation device 2 of the first embodiment, in addition to numerical variables, targets that can be set in the variable setting process and that can be selected in the variable selection process include layout variables related to the layout of the circuits among the components that make up the semiconductor device (the presence or absence of a maximum gate width (variable 4), the S / D connection (variable 8), and the switch S / D (variable 9)). The layout variables can take on at least a first content corresponding to the basic circuit and a second content different from the first content. When a layout variable is selected in the variable selection process, the control unit may decide on the first content or the second content in the variable change process. Since targets that can be set in the variable setting process and that can be selected in the variable selection process include, in addition to numerical variables, layout variables related to the layout of the circuits among the components that make up the semiconductor device, the diversity of virtual circuits is further increased. Furthermore, according to the virtual circuit generation device 2 of the first embodiment, in addition to numerical variables, the targets that can be set in the variable setting process and that can be selected in the variable selection process include state variables (state of applicability of maximum gate width change (variable 6), state before specific variable change is possible (variable 10), state after specific variable change is possible (variable 11)) that are states related to whether specific numerical variables (maximum gate width change value (variable 7), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15)) can be changed. The state variables can take at least an unchangeable state in which the specific numerical variable is not allowed to be changed, and a changeable state in which the specific numerical variable is allowed to be changed. When a changeable variable is selected in the variable selection process, the control unit may decide on the unchangeable state or the changeable state in the variable change process. When the changeable variable is in the changeable state, it is possible to change the value of the specific numerical variable in the variable change process. In addition to numerical variables, targets that can be set in the variable setting process and that can be selected in the variable selection process include feasibility state variables, which are states related to whether or not a specific numerical variable can be changed.The feasibility state variables can take on at least two values: an unchangeable state in which the specific numerical variable is not allowed to be changed, and a changeable state in which the specific numerical variable is allowed to be changed.This increases the randomness of the virtual circuit generation process, and as a result, further increases the diversity of virtual circuits. Furthermore, according to the virtual circuit generation device 2 of the first embodiment, when there are multiple selection targets in the variable selection process, the control unit selects the selection targets for each virtual circuit in a random order in the variable selection process. Because the selection targets are selected in a random order for each virtual circuit, the randomness of the virtual circuit generation process is increased, and as a result, the diversity of the virtual circuits is further increased.

[0117] Furthermore, according to the virtual circuit generation method of the first embodiment, when a device identifier, which is an identifier for specifying the type of semiconductor device, is received from the user terminal 3, the method includes a first step of setting a plurality of numerical variables (multiplier (variable 1), gate length (variable 2), width per finger (variable 3), number of gates (variable 5), drain diffusion area (variable 12), source diffusion area (variable 13), drain perimeter (variable 14), and source perimeter (variable 15)) relating to the numerical values ​​of the components that make up the semiconductor device of the type indicated by the device identifier; a second step of randomly selecting, for a basic circuit associated with the semiconductor device, numerical variables whose values ​​can be changed from the plurality of numerical variables set in the first step; a third step of randomly changing the values ​​of the numerical variables selected in the second step; and a fourth step of generating a virtual circuit based on the values ​​changed in the third step. For a basic circuit associated with a semiconductor device, a numerical variable whose value can be changed is randomly selected from a plurality of numerical variables, the values ​​of the selected numerical variable are randomly changed, and a virtual circuit based on the changed value is generated, thereby increasing the diversity of the virtual circuit and reducing the time and labor required to generate the virtual circuit.

[0118] (Variation) The present invention has been described above based on the embodiments. These embodiments are merely examples, and it will be understood by those skilled in the art that various modifications are possible in terms of the combination of the respective components, and that such modifications are also within the scope of the present invention.

[0119] In the first embodiment, all variables are necessarily selected in S303 in the process of generating one virtual circuit and are subject to confirmation of variable properties in S305, but the number and types of variables selected in the process of generating one virtual circuit may be set appropriately.

[0120] For example, the server control unit 22 may randomly select variables so that the number of variables selected in a virtual circuit generation process is the same as that in another virtual circuit generation process, but the types of variables selected in a virtual circuit generation process are different from the types of variables selected in another virtual circuit generation process. In this case, the randomness of the virtual circuit generation process is increased, resulting in greater diversity in the virtual circuits. Furthermore, the server control unit 22 may select different numbers of variables in a virtual circuit generation process from the number of variables selected in another virtual circuit generation process.

[0121] In the first embodiment, the order in which variables are selected in each virtual circuit generation process (S302 to S314) is irregular, but the order may be regular. For example, there may be only one type of order, or multiple types of order, and the type of order may be selected in each virtual circuit generation process (S302 to S314). Furthermore, in the first embodiment, the same variable is not selected more than once in each virtual circuit generation process, but it may be selected more than once. In this case, the condition for terminating one virtual circuit generation process may be the number of times a variable is selected in S303 or the number of times a change determination is made in S307. Furthermore, the condition for terminating one virtual circuit generation process may be, other than "all variables have been selected" as in the first embodiment, the number of times a variable is selected in S303 or the number of times a change determination is made in S307, and the termination condition may be set randomly for each virtual circuit generation process (S302 to S314).

[0122] Furthermore, in the first embodiment, numerical variables, layout variables, and feasibility state variables are set as the types of variables related to virtual circuits, but there may also be cases where numerical variables and layout variables are set, or where numerical variables and feasibility state variables are set.

[0123] In addition, in the first embodiment, the provided PDK is stored in the management server 2, but it may also be stored in a server other than the management server 2, and basic design information related to the semiconductor device of the type indicated by the device identifier may be obtained by accessing that server.

[0124] Furthermore, in the above-described embodiment, the server control unit 22 realizes various functions based on various programs and information stored in the server memory unit 23 provided in the management server 2, but the various programs stored in the server memory unit 23 may also be stored in a cloud base connected to the management server 2 via the communication network 4.

[0125] Furthermore, the processes disclosed in the above-described embodiments may be executed by hardware such as a single CPU, multiple CPUs, or ASIC, or a combination thereof. Also, the processes disclosed in the above-described embodiments may be realized in various ways, such as a recording medium on which a program for executing the processes is recorded, or a method.

[0126] Furthermore, by generating a layout based on a circuit diagram in which the highly diverse virtual circuits generated in the first embodiment are arranged and executing DRC (design rule check) and LVS (Layout versus schematic), etc., the possibility of detecting errors when executing DRC and LVS can be increased, thereby improving the quality of the PDK library.

[0127] Similarly, by running SPICE (Simulation Program with Integrated Circuit Emphasis) based on the circuit diagram generated in the first embodiment, SPICE results can be obtained for a wide variety of input data. By running SPICE under a variety of conditions, the validity of the obtained characteristic values ​​can be verified, improving the quality of the PDK library.

[0128] In the first embodiment, many variable changes are made during circuit diagram generation, and by analyzing this situation, it is possible to detect errors or abnormal states during virtual circuit generation or layout generation. By generating a variety of virtual circuits, the possibility of detecting these can be increased. [Explanation of symbols]

[0129] 1...Virtual circuit generation system 2...Management server (virtual circuit generator) 3...User terminal 4. Communication Network 21...Server communication section 22...Server control unit 22a...Semiconductor type setting section 22b…Initial setting section 22c...Virtual circuit generation unit 23...Server storage unit 23b…PDK storage area 23c1...Semiconductor type database 23c2...variable database 23c3...Max / Min value database 23c4…Test Results Database 23d1...Circuit generation counter 23e...Circuit diagram file area

Claims

1. A virtual circuit generation device comprising an information processing device, a variable setting process for setting, upon receiving from a user terminal a device identifier that is an identifier for identifying a type of semiconductor device, a plurality of numerical variables relating to numerical values ​​of components that constitute a semiconductor device of the type indicated by the device identifier; a variable selection process for randomly selecting, for a basic circuit associated with the semiconductor device, a numerical variable whose value can be changed from the plurality of numerical variables set by the variable setting process; a variable change process for randomly changing the values ​​of the numerical variables selected by the variable selection process; a virtual circuit generation process for generating a virtual circuit based on the values ​​changed by the variable change process; A virtual circuit generating device comprising a control unit that performs the above.

2. 2. The virtual circuit generation device according to claim 1, The control unit further performing a maximum / minimum value setting process for setting maximum and minimum values ​​of the plurality of numerical variables set by the variable setting process; In the variable change process, the values ​​of the numerical variables selected in the variable selection process are randomly changed within a range between a minimum value and a maximum value of the numerical variables. Virtual circuit generator.

3. 2. The virtual circuit generation device according to claim 1, In addition to numerical variables, the targets that can be set in the variable setting process and that can be selected in the variable selection process include layout variables related to the layout of circuits among the components that make up the semiconductor device, the layout variable can have, as its value, at least a first content corresponding to the basic circuit and a second content different from the first content; When the control unit selects a layout variable in the variable selection process, the control unit may determine the first content or the second content in the variable change process. Virtual circuit generator.

4. 2. The virtual circuit generation device according to claim 1, In addition to numerical variables, targets that can be set in the variable setting process and that can be selected in the variable selection process include a status variable that is a status relating to whether a specific numerical variable can be changed, the permission / non-permission state variable can take at least one of a non-changeable state in which the specific numeric variable is not permitted to be changed and a changeable state in which the specific numeric variable is permitted to be changed; The control unit When a changeable variable is selected in the variable selection process, the changeable state may be determined in the variable change process; When the changeable variable is in the changeable state, the value of the specific numeric variable can be changed in the variable change process. Virtual circuit generator.

5. 5. A virtual circuit generation device according to claim 1, When there are a plurality of selection targets in the variable selection process, the control unit selects the selection targets in a random order for each virtual circuit in the variable selection process. Virtual circuit generator.

6. 5. A virtual circuit generation device according to claim 1, If the number of variables that can be selected in the variable selection process is smaller than the number of variables that are set in the variable setting process, the control unit randomly selects a selection target for each virtual circuit in the variable selection process; The variables selected in the variable selection process for one of the virtual circuits may differ from the variables selected in the variable selection process for another of the virtual circuits. Virtual circuit generator.

7. 7. A virtual circuit generating program for causing a computer to function as the virtual circuit generating device according to claim 1.

8. a first step of receiving a device identifier, which is an identifier for identifying a type of semiconductor device, from a user terminal and setting a plurality of numerical variables relating to numerical values ​​of components constituting a semiconductor device of the type indicated by the device identifier; a second step of randomly selecting, for a basic circuit associated with the semiconductor device, a numerical variable whose value can be changed from the plurality of numerical variables set in the first step; a third step of randomly changing the values ​​of the numerical variables selected in the second step; a fourth step of generating a virtual circuit based on the values ​​changed in the third step; A virtual circuit generation method comprising:

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