Semiconductor device

Abstract

A semiconductor device capable of holding analog data SOLUTION: Two holding circuits, two bootstrap circuits, and one source follower circuit are formed using four transistors and two capacitors. Each of the two holding circuits is provided with a memory node, a data potential is written to one of the memory nodes, and a reference potential is written to the other memory node. When data is read, the potential of one storage node is boosted by one bootstrap circuit, and the potential of the other storage node is boosted by the other bootstrap circuit. To output a potential difference between two storage nodes by using a source follower circuit. By using the source follower circuit, the output impedance can be reduced.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field relates to an article, a method, or a manufacturing method. , process, machine, manufacture, or composition of matter Therefore, one embodiment of the present invention disclosed in this specification more specifically relates to The technical fields include semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, power storage devices, and imaging devices. Devices, storage devices, signal processing devices, processors, electronic devices, systems, driving methods thereof, These manufacturing methods and inspection methods can be cited as examples. [Background technology]

[0003] In recent years, various electronic devices such as personal computers, smartphones, and digital cameras have become The device includes a central processing unit (CPU) and a graphics processing unit. The electronic components used are microscopic. Improvements are being made in various aspects, such as speed and power consumption.

[0004] In particular, the amount of data handled by electronic devices has increased in recent years, and storage devices with large storage capacities are becoming increasingly Therefore, it is necessary to store multi-value data or analog data in one memory element. The development of a memory device that can store multi-valued data is being considered. A semiconductor device that enables writing and reading of data is disclosed. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-256400 [Patent Document 2] Japanese Patent Application Laid-Open No. 2014-199707 Summary of the Invention [Problem to be solved by the invention]

[0006] Long-term retention of analog data and accurate reading of the retained analog data are realized. There is a need for semiconductor devices that can

[0007] A transistor that contains silicon in the semiconductor layer where the channel is formed (called a "Si transistor"). In semiconductor devices, miniaturization of elements is progressing along with the shrinking of process rules. As miniaturization progresses, the gate insulating film becomes thinner, and leakage current through the gate insulating film becomes an issue. This becomes an issue.

[0008] An object of one embodiment of the present invention is to provide a semiconductor device capable of holding analog data. Alternatively, one aspect of the present invention is to accurately read out the stored analog data. Another object of the present invention is to provide a semiconductor device that can Another object of the present invention is to provide a semiconductor device with reduced area. Another object of the present invention is to provide a semiconductor device with reduced power consumption. An object of one embodiment of the present invention is to provide a semiconductor device with a large storage capacity. An object of one embodiment of the present invention is to provide a highly reliable semiconductor device. An object of one embodiment of the present invention is to provide a novel semiconductor device.

[0009] Note that the problems of one embodiment of the present invention are not limited to the above-listed problems. This does not preclude the existence of other issues. Other issues may be discussed in the following sections. Problems not mentioned in this section are problems that a person skilled in the art would be able to solve by reading the specification or can be derived from the descriptions in the drawings, etc., and can be extracted appropriately from these descriptions. One aspect of the present invention is to achieve at least one of the above-listed objects and other objects. One aspect of the present invention is to solve the above-listed problems and other problems. You don't need to solve all the problems. [Means for solving the problem]

[0010] One embodiment of the present invention is a semiconductor memory device including two holding circuits and a transistor using four transistors and two capacitors. This is a semiconductor device that comprises two bootstrap circuits and one source follower circuit. A storage node is provided in each of the two holding circuits, and a data potential is written to one of the storage nodes. When data is read, a reference potential is written to one memory node. The potential of one storage node is boosted by the bootstrap circuit, and the potential of the other storage node is boosted by the bootstrap circuit. The potential of the other storage node is boosted by the path. By using a source follower circuit, the output impedance is It can be made smaller.

[0011] Another embodiment of the present invention is a semiconductor device including first to fifth circuits, The first circuit has a function of maintaining the first potential, the second circuit has a function of boosting the first potential, and the third circuit The fourth circuit has a function of boosting the second potential, and the fifth circuit has a function of maintaining the second potential. The path outputs a third potential corresponding to the potential difference between the boosted first potential and the boosted second potential. It is a semiconductor device having a function.

[0012] The semiconductor device includes, for example, first to fourth transistors, a first capacitance element, and a second capacitance element. The first circuit may include a first transistor and a first capacitance element. the second circuit includes a second transistor and a first capacitance element, and the third circuit includes a third transistor the fourth circuit includes a fourth transistor and a second capacitance element; the fifth circuit may include a second transistor and a fourth transistor. .

[0013] Another embodiment of the present invention is a semiconductor device including first to fourth transistors, a first capacitor, a second capacitor, and , and one of the source and drain of the first transistor is electrically connected to the first terminal. The other of the source or drain of the first transistor is connected to the gate of the second transistor. The gate of the first transistor is electrically connected to the second terminal, and the gate of the third transistor is electrically connected to the second terminal. One of the source and drain of the transistor is electrically connected to the third terminal. The other of the source and drain of the fourth transistor is electrically connected to the gate of the fourth transistor. The gate of the third transistor is electrically connected to the fourth terminal, and the source of the second transistor is One of the source and drain of the second transistor is electrically connected to the fifth terminal. The other of the drain and the source of the fourth transistor is electrically connected to the seventh terminal. One of the drains is electrically connected to the sixth terminal and is the source or drain of the fourth transistor. The other electrode of the first capacitor is electrically connected to the seventh terminal, and one electrode of the first capacitor is electrically connected to the second transistor. The other electrode of the first capacitance element is electrically connected to the seventh terminal. One electrode of the second capacitance element is electrically connected to the gate of the fourth transistor. the other electrode of the second capacitance element is electrically connected to the seventh terminal. .

[0014] The third terminal and the sixth terminal may be electrically connected to each other. The transistor preferably contains an oxide semiconductor in a semiconductor layer in which a channel is formed. In addition, the second transistor and the fourth transistor have a semiconductor layer in which a channel is formed, and an oxide is added to the semiconductor layer. The oxide semiconductor preferably contains at least one of indium and zinc. It is preferable to include one of them. [Effects of the Invention]

[0015] According to one embodiment of the present invention, a semiconductor device capable of holding analog data can be provided. Alternatively, a semiconductor device capable of accurately reading out stored analog data can be provided. Alternatively, a semiconductor device with a reduced area can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided. Alternatively, a semiconductor device with high reliability can be provided. Alternatively, a novel semiconductor device can be provided.

[0016] The effects of one embodiment of the present invention are not limited to the effects listed above. This does not preclude the existence of other effects. Other effects are described below. The effects not mentioned in this section are obvious to those skilled in the art from the description or can be derived from the descriptions in the drawings, etc., and can be extracted appropriately from these descriptions. One aspect of the present invention has at least one of the effects listed above and other effects. Therefore, one aspect of the present invention is a method for manufacturing a semiconductor device that does not have the effects listed above. There are also. [Brief explanation of the drawings]

[0017] [Figure 1] 1A and 1B are circuit diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 2] 2A and 2B are circuit diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 3] 3A and 3B are circuit diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 4] 4A and 4B are diagrams showing circuit symbols for transistors. [Figure 5] 5A and 5B are diagrams illustrating a source follower circuit. [Figure 6] FIG. 6 is a timing chart illustrating an example of the operation of the semiconductor device. [Figure 7] 7A and 7B are diagrams illustrating an example of the operation of the semiconductor device. [Figure 8] 8A and 8B are diagrams illustrating an example of the operation of the semiconductor device. [Figure 9] FIG. 9 is a circuit diagram of a semiconductor device according to one embodiment of the present invention. [Figure 10] Fig. 10A is a block diagram illustrating a configuration example of a semiconductor device, and Fig. 10B is a perspective view of the semiconductor device. [Figure 11] FIG. 11 is a block diagram illustrating the CPU. [Figure 12] 12A and 12B are perspective views of the semiconductor device. [Figure 13]13A and 13B are perspective views of the semiconductor device. [Figure 14] 14A and 14B are perspective views of the semiconductor device. [Figure 15] 15A and 15B are diagrams illustrating an example of the configuration of a neural network. [Figure 16] FIG. 16 is a diagram showing an example of the structure of a semiconductor device. [Figure 17] 17A to 17C are diagrams showing examples of the configuration of a transistor. [Figure 18] FIG. 18A is a diagram illustrating the classification of IGZO crystal structures, FIG. 18B is a diagram illustrating the XRD spectrum of crystalline IGZO, and FIG. 18C is a diagram illustrating the electron microbeam diffraction pattern of crystalline IGZO. [Figure 19] FIG. 19A is a perspective view showing an example of a semiconductor wafer, FIG. 19B is a perspective view showing an example of a chip, and FIGS. 19C and 19D are perspective views showing an example of an electronic component. [Figure 20] 20A to 20J are diagrams illustrating an example of an electronic device. [Figure 21] 21A to 21E are diagrams illustrating an example of an electronic device. [Figure 22] 22A to 22C are diagrams illustrating an example of an electronic device. [Figure 23] 23A and 23B are diagrams according to an embodiment. [Figure 24] FIG. 24 is a diagram according to an embodiment. [Figure 25] FIG. 25 is a diagram according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0018] The following describes an embodiment of the present invention. However, one embodiment of the present invention is not limited to the following description. and variations in form and details may be made without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that modifications may be made thereto. The present invention is not to be construed as being limited to the description of the following embodiments.

[0019] In this specification, a semiconductor device is a device that utilizes semiconductor characteristics, and is a semiconductor element ( circuits including transistors, diodes, photodiodes, etc., and devices that have such circuits. It also refers to any device that can function by utilizing the characteristics of semiconductors. For example, integrated circuits , chips with integrated circuits, or electronic components that house chips in a package are called semiconductors. In addition, a storage device, a display device, a light-emitting device, a lighting device, an electronic device, etc. , may themselves be semiconductor devices or may contain semiconductor devices.

[0020] In addition, in this specification, when it is stated that X and Y are connected, it means that X and Y When X and Y are electrically connected, when X and Y are functionally connected, and when X and Y are The case where the two are directly connected is considered to be disclosed in this specification. The specific connection relationships, for example, are not limited to the connection relationships shown in the drawings or text, but are not limited to the connection relationships shown in the drawings or text. Connections other than those shown are also assumed to be disclosed in the drawings or text. The object (e.g., device, element, circuit, wiring, electrode, terminal, conductive film, layer, etc.) .

[0021] An example of an electrical connection between X and Y is The elements to be considered (e.g., switches, transistors, capacitance elements, inductors, resistance elements, One or more devices (such as diodes, display devices, light-emitting devices, and loads) are connected between X and Y. The switch has a function to control the on and off states. That is, the switch can be in a conducting state (ON state) or a non-conducting state (OFF state). It has the function of controlling whether or not current flows.

[0022] An example of a functional connection between X and Y is a function that allows the functional connection between X and Y. Circuits that perform the above functions (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion Conversion circuits (digital-analog conversion circuits, analog-to-digital conversion circuits, gamma correction circuits, etc.) , potential level conversion circuits (power supply circuits (booster circuits, step-down circuits, etc.) voltage sources, current sources, switching circuits, amplifier circuits (such as level shifter circuits that Circuits that can increase the amount of current, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc. There are one or more circuits between X and Y (e.g., a power supply circuit, a signal generating circuit, a memory circuit, a control circuit, etc.) It is possible to connect X and Y. For example, if another circuit is inserted between X and Y, However, if the signal output from X is transmitted to Y, then X and Y are functionally connected. It shall be.

[0023] When explicitly stating that X and Y are electrically connected, it means that X and Y are electrically When the X and Y are directly connected (i.e., when there is another element or circuit between X and Y) X and Y are directly connected (i.e., there is no other This includes when the device is connected without any intervening element or other circuit.

[0024] Also, for example, "X and Y and the source (or first terminal, etc.) and drain ( or the second terminal, etc.) are electrically connected to each other, and X, the source terminal of the transistor, the drain (or first terminal, etc.) of the transistor, the drain (or second terminal, etc.) of the Y The transistors are electrically connected in this order. The source (or first terminal, etc.) is electrically connected to X, and the drain ( or the second terminal, etc.) is electrically connected to Y, and X, the source (or the first terminal, etc.) of the transistor. 1 terminal, etc.), the drain (or second terminal, etc.) of the transistor, and Y, in that order. This can be expressed as "electrically connected" or "X is the The Y and the voltage are connected via the source (or first terminal, etc.) and drain (or second terminal, etc.). The transistor is electrically connected to the source (or first terminal, etc.) of the transistor. The drain (or second terminal, etc.), Y, is connected in this order. Using the same representation as these examples, the order of connections in a circuit configuration can be determined. By defining the source (or first terminal, etc.) and drain of a transistor as (or second terminal, etc.) and the technical scope can be determined by distinguishing them. These representation methods are merely examples, and the present invention is not limited to these representation methods. ,objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.) do.

[0025] In addition, the circuit diagram shows independent components as if they are electrically connected to each other. Even if the components are different, one component may have the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductive film functions as both the wiring and the electrode. Therefore, the present invention has the functions of both the electrode and the electrode. Electrical connection means that one conductive film has the functions of multiple components. This case will also be included in that category.

[0026] In this specification, the term "resistance element" refers to a resistor having a resistance value higher than 0 Ω. It can be a circuit element, wiring, etc. Therefore, in this specification, etc., the term "resistance element" is used. is a wiring with resistance, a transistor in which current flows between the source and drain, and a diode. , coils, etc. Therefore, the term "resistive element" is used to refer to "resistance" and "load" ", "area with a resistance value" and so on, and conversely, "resistance", "load", " The term "region having a resistance value" can be replaced with the term "resistance element" or the like. The resistance value is, for example, preferably 1 mΩ or more and 10 Ω or less, more preferably 5 mΩ or more. The resistance can be set to 5Ω or less, and more preferably 10 mΩ or more and 1Ω or less. 1Ω or more 1×10 9 It may be set to Ω or less.

[0027] In this specification, the term "capacitance element" refers to a capacitance element having a capacitance value higher than 0 F. Circuit elements with capacitance values, wiring regions with capacitance values, parasitic capacitances, gate capacitances of transistors Therefore, in this specification, a "capacitive element" refers to a pair of electrodes. and a dielectric material included between the electrodes, as well as a circuit element including wiring and the wiring. The parasitic capacitance that appears between the gate and the source or drain of the transistor. This includes the gate capacitance that is generated by the capacitor. Terms such as "capacity" can be replaced with terms such as "capacity" and vice versa. The term can be replaced with terms such as "capacitor," "parasitic capacitance," and "gate capacitance." Also, the term "pair of electrodes" in "capacitance" can be used to mean "pair of conductors" or "pair of conductive regions." This can be rephrased as a "pair of regions." The capacitance value can be, for example, It can be set to 0.05 fF or more and 10 pF or less. For example, it can be set to 1 pF or more and 10 μF or less. The following may also be used.

[0028] In this specification, a transistor is referred to as a gate, a source, and a drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as the source or drain are the input and output terminals of the transistor. The two input / output terminals are used to select the transistor conductivity type (n-channel or p-channel) and Depending on the potential applied to the three terminals of the transistor, one becomes the source and the other becomes the drain. Therefore, in this specification and the like, the terms source and drain are interchangeable. In other words, in this specification and the like, the connection relationship of the transistors is When explaining, "either the source or the drain" (or the first electrode, or the first terminal), The other of the source or drain (or second electrode, or second terminal) is used. Depending on the structure of the transistor, in addition to the three terminals mentioned above, a back gate may be used. In this case, in this specification and the like, the gate or back of the transistor may have a One of the gates is called the first gate, and the other is the gate or back gate of the transistor. It is sometimes called the second gate. Furthermore, in the same transistor, there are two gates: a "gate" and a "valve". The terms "gate" and "gate" are sometimes interchangeable. In the case where there are three or more gates, each gate is referred to as a first gate in this specification. It is sometimes called the first gate, second gate, third gate, etc.

[0029] In this specification, the term "on-state current" refers to the current flowing between the source and the transistor when the transistor is in the on state. The term "off-state current" may refer to the current that flows between the drain and the transistor. It can also refer to the current that flows between the source and drain when the device is in an open state.

[0030] In this specification, a node may be defined as a node that is connected to a circuit configuration and / or a device structure. These can be referred to as terminals, wirings, electrodes, conductive layers, conductors, impurity regions, etc. In addition, terminals, wiring, etc. can be referred to as nodes.

[0031] In addition, in this specification and the like, the terms "voltage" and "potential" can be interchanged as appropriate. "Voltage" refers to the potential difference from a reference potential. For example, If we use the term "potential" as the ground potential, then "voltage" can be rephrased as "potential." The round potential does not necessarily mean 0V. Also, the potential is relative, By changing the reference potential, the potential given to the wiring, the potential applied to the circuit, etc. The potential output from the circuit, etc. also changes.

[0032] In this specification, the high power supply potential VDD (hereinafter simply referred to as "VDD") , which indicates a power supply potential higher than the low power supply potential VSS (hereinafter simply referred to as "VSS"). VSS refers to a power supply potential that is lower than VDD. (sometimes simply called "GND") can also be used as VDD or VSS. For example, VD When D is at ground potential, VSS is at a potential lower than ground potential, and when VSS is at ground potential, In this case, VDD is at a potential higher than ground potential.

[0033] "Current" refers to the phenomenon of the movement of electric charges (electrical conduction). For example, "the electric current of a positively charged body" The statement "electrical conduction is occurring in the opposite direction" means "electrical conduction is occurring in the negatively charged body." Therefore, in this specification and the like, unless otherwise specified, the term "current" is used. In this case, the term "electrical conduction" refers to the phenomenon of charge transfer accompanying the movement of carriers. Carriers include electrons, holes, anions, cations, complex ions, etc., and are the carriers through which current flows. The carriers differ depending on the system (e.g., semiconductor, metal, electrolyte, vacuum, etc.). The "direction of current" in a wire, etc. is the direction in which positive carriers move, and is expressed as a positive current amount. In other words, the direction in which negative carriers move is opposite to the direction of the current, and the negative Therefore, in this specification, the positive and negative currents (or current direction) are used to indicate the flow rate. Unless otherwise specified, statements such as "current flows from element A to element B" are interpreted as "current flows from element B to element A." This can be rephrased as "current flows through element A." A description such as "current is input" can be rephrased as "current is output from element A" Let's say.

[0034] In addition, in this specification, the ordinal numbers "first," "second," and "third" refer to the order of the constituent elements. The numbers are added to avoid confusion and do not limit the number of components. The order of the components is not limited. A component referred to as "first" in the specification may be used in other embodiments or in the claims. In addition, for example, in the implementation of this specification, etc. A component referred to as "first" in one embodiment may be used in other embodiments or in a patent. It may be omitted in the claims.

[0035] In addition, the terms "above" and "below" mean that the positional relationship of the components is directly above or directly below, and For example, the expression "electrode B on insulating layer A" does not necessarily mean that the electrodes are in contact with each other. In this case, electrode B does not need to be formed directly on insulating layer A. This does not exclude the inclusion of other components between the two.

[0036] Furthermore, the positional relationship between the components changes appropriately depending on the direction in which each component is depicted. Therefore, the present invention is not limited to the words and phrases described in the specification, etc., and can be rephrased appropriately depending on the situation. For example, in this specification, the words "above" and "below" that indicate the arrangement are used to refer to the configuration. The positional relationship of elements may be used for convenience in explaining the drawings. Therefore, the expression "insulator located on top of conductor" is written by rotating the drawing 180 degrees. By rotating it, it can be rephrased as "an insulator located on the underside of a conductor." In addition, the expression "insulator located on top of conductor" rotates the drawing by 90 degrees. By doing so, it can be rephrased as "the insulator located on the left (or right) surface of the conductor." This can be done.

[0037] Similarly, in this specification, the term "overlap" refers to the stacking order of components. For example, the expression "electrode B overlapping insulating layer A" should be interpreted as "insulating layer It is not limited to the situation where "electrode B is formed on insulating layer A," but rather "electrode B is formed under insulating layer A." or "Electrode B is formed on the right (or left) side of insulating layer A." Do not exclude any.

[0038] In addition, in this specification and the like, the terms "adjacent" and "nearby" mean that components are in direct contact with each other. For example, if the expression is "electrode B adjacent to insulating layer A," The insulating layer A and the electrode B do not need to be in direct contact with each other, and there is no need for other layers to be formed between the insulating layer A and the electrode B. This does not exclude those that contain elements of

[0039] In addition, in this specification, the terms "film" and "layer" are interchangeable depending on the situation. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer." In some cases, or depending on the circumstances, it may be possible to change the term to " Depending on the circumstances, it is possible to avoid using terms such as "film" and "layer" and to substitute other terms. For example, the term "conductive layer" or "conductive film" may be changed to the term "conductor." Alternatively, for example, the terms "insulating layer" and "insulating film" may be changed to "insulating It may be possible to change the term to "body."

[0040] In addition, in this specification, terms such as "electrode," "wiring," and "terminal" refer to these components. It is not limited by function. For example, an "electrode" can be used as part of a "wiring." Furthermore, the terms "electrode" and "wiring" are used interchangeably. This also includes cases where the "electrode" and the "wiring" are integrally formed. "Terminal" is sometimes used as part of "wiring" and "electrode", and vice versa. Furthermore, the term "terminal" is used to refer to a combination of multiple "electrodes," "wiring," "terminals," etc. Therefore, for example, "electrode" is not a "wiring" or a "terminal." For example, a "terminal" can be a part of a "wiring" or an "electrode." In addition, terms such as "electrode," "wiring," and "terminal" may be used interchangeably with "area." It may be replaced with terms such as "region."

[0041] In addition, in this specification, terms such as "wiring," "signal line," and "power line" may be used in some cases. Or, depending on the situation, they can be interchanged. For example, "wiring" It may be possible to change the term to "signal line". In some cases, it may be possible to change the term "wiring" to a term such as "power line." The reverse is also true; terms such as "signal line" and "power line" should be changed to "wiring." It may be possible to change terms such as "power line" to terms such as "signal line." In addition, the reverse is also true, and terms such as "signal line" may be used interchangeably with "power line" In some cases, it may be possible to change the term to something like "potential" applied to the wiring. In some cases or situations, the term "signal" may be changed to "signal" or similar. And vice versa, terms such as "signal" may be used in conjunction with "potential." It may be possible to change the term to something like this.

[0042] In this specification, impurities in a semiconductor include, for example, substances other than the main component that constitutes a semiconductor layer. For example, elements with a concentration of less than 0.1 atomic percent are impurities. This can lead to, for example, an increase in the density of defect states in semiconductors and a decrease in carrier mobility. When the semiconductor is an oxide semiconductor, the semiconductor Impurities that change the properties of the material include, for example, elements of Group 1, Group 2, and Group 13, There are elements of Group 14, Group 15, transition metals other than the main component, etc., especially, for example, hydrogen ( (Also found in water), lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. Specifically, when the semiconductor is silicon, the impurities that change the properties of the semiconductor are For example, oxygen, Group 1 elements excluding hydrogen, Group 2 elements, Group 13 elements, and Group 15 elements etc.

[0043] In this specification, a switch is a device that can be in a conducting state (ON state) or a non-conducting state (OFF state). It refers to a device that has the function of controlling whether or not current flows by entering a state where it is in a non-transitory state. A switch is a device that has the function of selecting and switching the path through which current flows. The switch can be an electrical switch, a mechanical switch, or the like. The current control element is not limited to a specific one, and may be any element capable of controlling the current.

[0044] An example of an electrical switch is a transistor (e.g., a bipolar transistor, M OS transistors, etc.), diodes (e.g., PN diodes, PIN diodes, Schottky diode, MIM (Metal Insulator Metal) diode MIS (Metal Insulator Semiconductor) diodes diodes, diode-connected transistors, etc.), or logic circuits that combine these. When using a transistor as a switch, the "conduction state ( The "on state" is when the source and drain of the transistor are considered to be electrically shorted. The "non-conducting state (off state)" of a transistor refers to the state in which the This refers to a state in which the source and drain are considered to be electrically isolated. When operating as a simple switch, the polarity (conductivity type) of the transistor is not particularly limited. I can't.

[0045] An example of a mechanical switch is a MEMS (microelectromechanical system). There are switches that use the technology known as "electrode switch." These switches have electrodes that can be moved mechanically. The electrodes move to control conduction and non-conduction.

[0046] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case of -5° or more and 5° or less. "Aligned" or "Approximately parallel" means that two straight lines are arranged at an angle of between -30° and 30°. Also, "perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. "Almost perpendicular" or "roughly perpendicular" means that two straight lines are arranged at an angle of 60° or more and 120° or less. This refers to the state in which something is done.

[0047] In this specification, metal oxide refers to a metal oxide in a broad sense. Metal oxides are oxides. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). , oxide semiconductors (also called "OS"), For example, when a metal oxide is used in the active layer of a transistor, the metal oxide In other words, metal oxides have amplifying, rectifying, and and a channel forming region of a transistor having at least one of a switching function and a When the metal oxide can be formed, the metal oxide is called a metal oxide semiconductor. In addition, when it is referred to as an OS transistor, In this case, the transistor can be referred to as a transistor having a metal oxide or an oxide semiconductor. Cut.

[0048] In this specification and the like, metal oxides containing nitrogen are also referred to as metal oxides. Nitrogen-containing metal oxides are also called metal oxynitrides (met). It may also be called hydroxybenzoxanthate (hydroxybenzoxanthate).

[0049] In addition, in this specification and the like, the configurations shown in each embodiment may be used in combination with the configurations shown in other embodiments. The above-mentioned embodiments can be combined appropriately to form one aspect of the present invention. When a plurality of configuration examples are shown, the configuration examples can be combined with each other as appropriate.

[0050] Note that the content (or even a part of the content) described in one embodiment may be used in conjunction with that embodiment. Another content (or part of the content) described in one or more other embodiments Apply, combine, and apply to at least one of the contents (or a part of the contents) , or substitution, etc. can be performed.

[0051] The contents described in the embodiments refer to the following in each embodiment (or example): The content described using various figures or the text in the specification is.

[0052] In addition, a drawing (or a part thereof) described in one embodiment may be different from another part of the drawing, Another figure (or a part thereof) described in the embodiment and one or more other embodiments A combination of at least one of the figures (or a part thereof) described in the form By doing so, even more figures can be constructed.

[0053] The embodiments described in this specification will be described with reference to the drawings. The present invention can be embodied in many different ways, and all such variations and modifications will be apparent to those skilled in the art without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications can be made to the form and details of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments. In the configuration of the invention of the embodiment, the same parts or parts having similar functions are denoted by the same reference numerals. Reference numerals may be used in common between different drawings, and repeated explanations may be omitted. To make it easier to understand the surface, some components are shown in perspective views or top views. It may be omitted.

[0054] In the present specification and the like, in the block diagrams, the components are classified by function and are independent of each other. However, in actual circuits, components are divided into blocks according to their functions. When it is difficult to separate the circuits and multiple functions are involved in one circuit, or when multiple circuits are involved, Therefore, the blocks in the block diagram are The components are not limited to those described above, but may be rephrased appropriately depending on the situation.

[0055] Also, in the drawings of this specification, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the size and aspect ratio are not necessarily limited. Please note that the drawings are merely ideal examples and are not limited to the shapes or values ​​shown in the drawings. For example, variations in signal, voltage, or current due to noise or timing This may include variations in signal, voltage, or current due to timing misalignment.

[0056] In this specification and the like, when the same reference numeral is used for a plurality of elements, it is not necessary to distinguish them. When there is a code, an identifying code such as "_1", "[n]", or "[m,n]" is added to the code. For example, one of two wirings GL is written as wiring GL[1]. The other may be referred to as wiring GL[2].

[0057] (Embodiment 1) A semiconductor device 100 according to one embodiment of the present invention will be described with reference to the drawings.

[0058] <Configuration Example of Semiconductor Device 100> FIG. 1A shows a circuit diagram of a semiconductor device 100 according to one embodiment of the present invention. The semiconductor device 100 can function as a memory circuit capable of storing analog data. The semiconductor device 100 can function as a memory element capable of storing analog data. Transistor Tr11, transistor Tr12, transistor Tr21, transistor Tr22 , a capacitance element Cb1, and a capacitance element Cb2.

[0059] The semiconductor device 100 also includes a holding circuit 110a, a holding circuit 110b, a bootstrap circuit a circuit 120a, a bootstrap circuit 120b, and a source follower circuit 130. .

[0060] The holding circuit 110a includes a transistor Tr11 and a capacitance element Cb1, and the holding circuit 110b The bootstrap circuit 120a includes a transistor Tr21 and a capacitance element Cb2. The bootstrap circuit 120b includes a transistor Tr12 and a capacitance element Cb1. The source follower circuit 130 includes a transistor Tr22 and a capacitance element Cb2. Includes r12 and transistor Tr22.

[0061] The gate of the transistor Tr11 is electrically connected to the terminal WW1. One of the source and drain of the transistor T The source or drain of transistor Tr12 is electrically connected to the gate of transistor Tr12. One is electrically connected to the terminal PS1, and the other is electrically connected to the terminal OUT.

[0062] The gate of the transistor Tr21 is electrically connected to the terminal WW2. One of the source and drain of the transistor T The source or drain of transistor Tr22 is electrically connected to the gate of transistor Tr22. One is electrically connected to the terminal OUT, and the other is electrically connected to the terminal PS2.

[0063] One electrode of the capacitance element Cb1 is electrically connected to the gate of the transistor Tr12. The other electrode is electrically connected to the terminal OUT. One electrode is electrically connected to the terminal OUT, and the other electrode is electrically connected to the gate of the transistor Tr22. are connected to the network.

[0064] The other of the source or drain of the transistor Tr11, the gate of the transistor Tr12, The node where one electrode of the capacitance element Cb1 is electrically connected is node SN1. The other of the source or drain of the transistor Tr21, The node where the gate of capacitor Cb2 is electrically connected to the other electrode of capacitor Cb2 is The other electrode constituting the capacitance element Cb1 functions as the capacitor SN2. The node where the terminal OUT is electrically connected to the other electrode functions as node BN. Note that the nodes SN1 and SN2 each function as a storage node.

[0065] The holding circuit 110a holds the potential ( The holding circuit 110b has a function of holding a charge (charge). It has the function of retaining the potential (charge) written to the node SN2.

[0066] Specifically, a voltage that turns on the transistor Tr11 is applied to the gate of the transistor Tr11. and connects the source and drain of the transistor Tr11 to the node SN1. Charge is supplied to set node SN1 to a predetermined potential. Then, transistor Tr11 A potential that turns off the transistor Tr11 is supplied to the gate of the transistor Tr1. By turning off node SN1, the charge written to node SN1 is maintained.

[0067] Similarly, a potential that turns on the transistor Tr21 is applied to the gate of the transistor Tr21. and connects the node SN2 to the source and drain of the transistor Tr21. Then, the gate of the transistor Tr21 is turned on. A potential that turns off the transistor Tr21 is supplied to the output. By turning it off, the charge written to node SN2 is retained. The transistors Tr11 and SN2 are also called "holding nodes." The transistor Tr21 is also called a "write transistor."

[0068] Transistor Tr11, transistor Tr12, transistor Tr21, and transistor The semiconductor layer of the transistor 22 may be a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or a non-crystalline semiconductor. The semiconductor materials include amorphous semiconductors, which can be used alone or in combination. For example, silicon or germanium can be used. Compound semiconductors such as ruthenium, silicon carbide, gallium arsenide, oxide semiconductors, and nitride semiconductors A conductor may also be used.

[0069] Note that the semiconductor layer used in the transistor may be a stack of a plurality of semiconductor layers. When layers are stacked, semiconductors having different crystal states may be used. Different semiconductor materials may be used.

[0070] In particular, the transistors Tr11 and Tr21 are semiconductors in which channels are formed. A transistor containing an oxide semiconductor in its body layer (also called an "OS transistor"). Since the oxide semiconductor has a band gap of 2 eV or more, the off-state current is significantly reduced. OS transistors are used for transistors Tr11 and Tr21. The charge written to the retention node can be retained for a long period of time. When OS transistors are used for the transistors Tr1 and Tr21, the semiconductor device 100 can be It can be called "OS memory."

[0071] OS memory can be written for more than one year, or even more than ten years, even if the power supply is cut off. Therefore, the OS memory can be considered non-volatile memory. It is also possible.

[0072] In addition, since the amount of charge written into the OS memory is unlikely to change over a long period of time, the OS memory is binary ( It is possible to store not only 1 bit but also multi-value (multi-bit) information.

[0073] In addition, since OS memory writes charge to the node via the OS transistor, It does not require the high voltage required for conventional flash memory, and also enables high-speed write operations. In addition, the erase operation before rewriting data in flash memory is performed in the same way as the OS memory. In addition, charge injection and extraction into the floating gate or charge trapping layer is not required. Since there is no data being written to or removed from the OS memory, data can be written to and read from the OS memory virtually unlimited times. The OS memory is less susceptible to deterioration and has a high Reliability is gained.

[0074] In addition, the OS memory is magnetoresistive memory (MRAM) or resistive random access memory (ReRAM) ) does not involve structural changes at the atomic level. Therefore, OS memory is a magnetoresistive memory. It has better rewrite endurance than memory and resistive change memory.

[0075] Furthermore, the off-state current of OS transistors hardly increases even in high-temperature environments. The off-state current hardly increases even in ambient temperatures above 200°C and below. The on-state current is unlikely to decrease even in high-temperature environments. In addition, the OS transistor has a stable insulation between the source and drain. By using OS transistors as transistors in a semiconductor device, A semiconductor device with stable operation and good reliability even in a high-temperature environment can be realized. Transistor Tr11, transistor Tr21, transistor Tr12, and transistor It is preferable to use an OS transistor for the starter transistor 22.

[0076] In addition, if the gate insulating film of transistor Tr12 and transistor Tr22 is extremely thin, The charges written to the nodes SN1 and SN2 leak out through the gate insulating film. This may cause a gate leakage (also known as "gate leakage"). The thickness of the gate insulating film of the transistor Tr22 is the same as that of the transistors Tr11 and Tr21. It is preferable that the thickness of the gate insulating film is approximately the same as that of the gate insulating film.

[0077] For example, if the transistors Tr11 and Tr21 are OS transistors, and using Si transistors for transistors Tr12 and Tr22. The Si transistors used for the transistors Tr12 and Tr22 are To achieve this, a Si transistor with a structure that minimizes gate leakage may be used.

[0078] Since Si transistors operate faster than OS transistors, transistor Tr12 By using a Si transistor for transistor Tr22, the data read speed can be increased.

[0079] As shown in FIG. 1B, the gate of the transistor Tr11 and the gate of the transistor Tr21 The port may be electrically connected to the wiring WWL.

[0080] Also, as shown in FIG. 2A, the transistors Tr12 and Tr22 are backed up. In FIG. 2A, the buffer of transistor Tr12 is The back gate of transistor Tr22 is electrically connected to terminal BG14. This shows an example of electrical connection with BG24. By controlling the potential of terminal BG14, The threshold voltage of the transistor Tr12 can be changed by controlling the potential of the terminal BG24. By controlling this, the threshold voltage of the transistor Tr22 can be changed.

[0081] Also, as shown in FIG. 2B, the transistors Tr11 and Tr21 are backed up. In FIG. 2B, the buffer of the transistor Tr11 is The back gate of transistor Tr21 is electrically connected to terminal BG13, and the back gate of transistor Tr21 is electrically connected to terminal BG14. This shows an example of electrically connecting to BG23. By controlling the potential of terminal BG13, The threshold voltage of the transistor Tr11 can be changed by controlling the potential of the terminal BG23. By controlling this, the threshold voltage of the transistor Tr21 can be changed.

[0082] In addition, in FIG. 3A, the transistors Tr11, Tr12, and Tr2 1 and transistor Tr22, the gate and back gate are electrically connected. In FIG. 3B, the back gate of the transistor Tr22 is connected to the This shows an example of electrically connecting the other of the source and drain of the battery. By providing a gate, the electric field generated outside the transistor acts on the channel formation region. This makes it difficult for the semiconductor device to operate, stabilizing the operation and improving the reliability of the semiconductor device. do.

[0083] In addition, transistors Tr11, Tr12, Tr21, and Each of the transistors Tr22 may be a double-gate transistor. A shows an example of a circuit symbol for a double-gate transistor 180A.

[0084] The transistor 180A has a structure in which a transistor Tr1 and a transistor Tr2 are connected in series. In FIG. 4A, either the source or the drain of the transistor Tr1 is connected to the terminal S. The other of the source and drain of the transistor Tr1 is electrically connected to the It is electrically connected to either the source or drain of transistor Tr2. The other of the drains is electrically connected to terminal D. In this case, the gates of the transistors Tr1 and Tr2 are electrically connected and the terminal The state in which it is electrically connected to the child G is shown.

[0085] The transistor 180A shown in FIG. 4A changes the potential of the terminal G, thereby switching the terminals S and D. Therefore, the double-gate transistor has the function of switching between the conductive state and the non-conductive state. The transistor 180A is a transistor that connects the transistor Tr1 and the transistor Tr2. In other words, in FIG. 4A, the transistor Either the source or the drain of the transistor 180A is electrically connected to the terminal S. The other end of the drain is electrically connected to terminal D, and the gate is electrically connected to terminal G. It can be said that.

[0086] In addition, transistors Tr11, Tr12, Tr21, and Each of the transistors Tr22 may be a triple-gate transistor. 4B shows an example circuit symbol for a triple-gate transistor 180B.

[0087] The transistor 180B is connected to the transistor Tr1, the transistor Tr2, and the transistor In FIG. 4B, the source of transistor Tr1 is connected in series with transistor Tr3. One of the drains is electrically connected to the terminal S, and the source or drain of the transistor Tr1 is The other input is electrically connected to either the source or the drain of the transistor Tr2. The other of the source or drain of transistor Tr2 is connected to the source or drain of transistor Tr3. The other of the source or drain of transistor Tr3 is electrically connected to 4B shows a state in which the transistor T The gates of r1, transistor Tr2, and transistor Tr3 are electrically connected, 10 shows a state in which the terminal G is electrically connected to the terminal G.

[0088] The transistor 180B shown in FIG. 4B changes the potential of the terminal G, thereby switching the terminals S and D. Therefore, the triple gate type The transistor 180B includes transistors Tr1 and Tr2. , and transistor Tr3 are included and function as one transistor. That is, in FIG. 4B, one of the source and drain of transistor 180B is connected to terminal S. The other of the source and drain is electrically connected to terminal D, and the gate is It can be said that it is electrically connected to terminal G.

[0089] have multiple gates, such as transistor 180A and transistor 180B, and A transistor with multiple gates electrically connected is called a "multi-gate transistor." These are sometimes called "multi-gate transistors" or "multi-gate transistors."

[0090] <Operation Example of Semiconductor Device 100> An operation example of the semiconductor device 100 will be described with reference to the drawings. The semiconductor device 100 uses the transistor Tr12 and the transistor Tr22 to: A source follower circuit 130 is formed.

[0091] Here, the source follower circuit will be explained. Figure 5A shows a circuit including a transistor M1 and a resistor The circuit diagram of the source follower circuit 901 includes the element R1. The transistor M1 is an n-channel In the source follower circuit 901 shown in FIG. The source of the transistor M1 is electrically connected to one terminal of the resistor element R1. VDD is supplied to the drain of transistor M1, and VSS is supplied to the other terminal of the resistor element. The gate of transistor M1 is electrically connected to terminal IN, and the input voltage Vi The source of the transistor M1 is electrically connected to the terminal OUT, and the terminal OU The output voltage Vout is output via T.

[0092] The transistors that make up the source follower circuit must be operated in the saturation region. If the threshold voltage of the transistor M1 is Vth, then the transistor M1 is connected as shown in Equation 1. It is necessary to operate under conditions that satisfy the relationship.

[0093]

number

[0094] Next, the operation of the source follower circuit 901 will be described. Since the source voltage of transistor M1 is Vin, the output voltage Vout is always approximately Vth. More precisely, the output voltage Vout changes to satisfy Equation 2. .

[0095]

number

[0096] In Equation 2, μ n is the mobility, C OX is the gate capacitance, W is the channel width, and L is the channel length , Vin is the voltage input via the terminal IN (the gate voltage of the transistor M1), and Vth is the threshold voltage of the transistor M1, and R1 is the resistance value of the resistor element R1.

[0097] In the source follower circuit 901, when the input voltage Vin changes, the output voltage Vout changes It changes in response to changes in voltage Vin.

[0098] Next, the input voltage Vin is constant and the input impedance of the load connected to the OUT terminal varies. Let Id be the current flowing between the source and drain of the transistor M1, and let The current flowing through the element R1 is Ir, and the gate-source voltage of the transistor M1 (gate voltage ) is Vgs.

[0099] When no load is connected to the OUT terminal, Id and Ir are equal. When a load is connected and its input impedance becomes small, part of Id is supplied to the load. , Ir decreases. Then, the voltage generated in the resistor element R1 decreases. That is, Vo ut decreases.

[0100] On the other hand, a decrease in Vout means a decrease in the source potential of the transistor M1. The increase in Id is roughly Vout = Vin - Vth. More precisely, the output voltage Vout increases until it satisfies Equation 2.

[0101] Also, if the input impedance of the load connected to the OUT terminal increases, the As a result, the current Ir flowing through the resistor R1 increases. The voltage generated at 1 increases. In other words, Vout increases.

[0102] On the other hand, an increase in Vout means an increase in the source potential of the transistor M1. The reduction in Id is approximately Vout = Vin - Vth. More precisely, the output voltage Vout decreases until it satisfies Equation 2.

[0103] In this way, the source follower circuit always outputs a constant current even if the input impedance of the load changes. In other words, the source follower circuit has the function of power amplification (changing the output voltage). It has the function of amplifying the current value without converting it into a signal.

[0104] Also, as in the source follower circuit 902 shown in FIG. 5B, the resistor The resistor R1 can be replaced by a transistor M2. In the source follower circuit 902, the transistors M1 and M2 are also and transistor M2 is operated in the saturation region.

[0105] In the source follower circuit 902, the gate of the transistor M1 is electrically connected to the terminal IN1. The gate of the transistor M2 is electrically connected to the terminal IN2. The drain of M2 is electrically connected to the terminal OUT. is supplied with the low power supply voltage VSS.

[0106] The source follower circuit 902 also has a function of performing power amplification. In this case, the current flowing between the source and drain of the transistor M1 operating in the saturation region is Id 1. Let Id2 be the current flowing between the source and drain of transistor M2 operating in the saturation region. Then, Id1 can be expressed by Equation 3, and Id2 can be expressed by Equation 4.

[0107]

number

[0108] In Equation 3, μ n is the mobility, C OX is the gate capacitance, W is the channel width, and L is the channel length , Vin1 is the voltage input via terminal IN1 (the gate voltage of transistor M1), V th1 is the threshold voltage of transistor M1.

[0109]

number

[0110] In Equation 4, μ n is the mobility, C OX is the gate capacitance, W is the channel width, and L is the channel length , Vin2 is the voltage input via terminal IN2 (the gate voltage of transistor M2), V th2 is the threshold voltage of transistor M2.

[0111] In the source follower circuit 902, Id1 and Id2 are equal. When the configuration and transistor characteristics of the transistor M1 and the transistor M2 are the same, the source follower circuit 9 The output voltage Vout of 02 can be expressed by Equation 5.

[0112]

number

[0113] Returning to the explanation of the operation example of the semiconductor device 100, FIG. 7 and 8 are timing charts for explaining the operation state of the semiconductor device 100. This is a diagram for

[0114] In drawings, etc., "VDD" or "VSS" or other symbols may be displayed next to terminals and wiring. Symbols indicating potential (also called "potential symbols") may be used. To make it easier to understand which potential changes occurred, the terminals and wiring where the potential changes occurred are marked. The potential symbol may be written in a box. Also, an "x" may be placed over a transistor in the off state. Symbols may be added.

[0115] [Data write operation] Before the data write operation starts, the potentials of terminals WW1 and WW2 are set to L potential. , terminal PS1, terminal PS2, terminal IN1, terminal IN2, node SN1, node SN2, and The potential of the terminal OUT is VSS. The potential that can turn off the transistor is called the L potential. The L potential may be, for example, VSS, but Furthermore, in this specification and the like, when a transistor is turned on, The potential that can be set to this state is called the H potential. The H potential may be, for example, VDD, but it does not mean a specific potential. It is not something to do.

[0116] For example, if it is written that "L potential is supplied" to each of two wires, In this case, the L potentials supplied to the two wirings do not have to be equal to each other. Similarly, for the two wires, it is written that "H potential is supplied" to each. In this case, the H potentials supplied to the two wirings do not have to be equal to each other.

[0117] During the period T31, the H potential is supplied to the terminals WW1 and WW2, and the transistor Tr 11 and transistor Tr21 are turned on (see FIG. 7A). and the data Vdata is connected to the reference voltage Vref (reference potential) via the transistor Tr11. The voltage (Vdata+Vref) obtained by adding these two is supplied to node SN1.

[0118] Also, the reference voltage Vre is output as Vin2 via the terminal IN2 and the transistor Tr21. f is supplied to node SN2. Transistor Tr22 operates in the saturation region during a read operation. Therefore, the reference voltage Vref is set to the threshold voltage Vth of the transistor Tr22. It is preferable that the transistor Tr12 and the transistor Tr22 are equal to or smaller than 2. If the transistor characteristics are the same, Vref=Vth1=Vth2.

[0119] During the period T32, the L potential is supplied to the terminals WW1 and WW2, and the transistor Tr 11 and transistor Tr21 are turned off (see FIG. 7B). When node SN1 is turned off, node SN1 is floating, and node SN The potential (charge) of No. 1 is maintained. The node SN2 is brought into a floating state, and the potential (charge) of the node SN2 is maintained.

[0120] [Data read operation] During the period T41, VDD is supplied to the terminal PS1. A current flows through the transistor Tr12, and a charge is supplied to the node BN. This shows the state immediately after the start of step 1.

[0121] The potential of the node BN rises as a result of the charge being supplied to the node BN. The node SN1 is in a floating state and is connected to the node BN via the capacitance element Cb1. Because the voltage is coupled to the node SN1, the voltage at node SN1 (Vsn1) Similarly, in the period T41, the node SN2 is in a floating state. In this state, the node SN2 is capacitively coupled to the node BN via the capacitance element Cb2. The potential of node SN2 (also called "Vsn2") also rises due to the bootstrap effect. (See FIG. 8B).

[0122] In this way, the semiconductor device 100 includes a block including the transistor Tr12 and the capacitance element Cb1. The bootstrap circuit 120a is connected to the node SN1. The semiconductor device 100 also has a function of boosting the potential of the transistors Tr22 and Tr23. and a bootstrap circuit 120b including a capacitance element Cb2. 120b has a function of boosting the potential of the node SN2.

[0123] In the semiconductor device 100, the potential of the node BN can be interpreted as the output voltage Vout. The potential of node BN (output voltage Vout) is the potential difference between node SN1 and node SN2. The potential at node BN (output voltage Vout) is calculated by the above formula. 5 is satisfied. Specifically, it changes until it becomes Vsn1-Vsn2. Finally, the potential of the node BN (output voltage Vout) becomes Vdata.

[0124] At this time, it can be said that the transistor Tr22 is operating in the saturation region. To operate Tr12 in the saturation region, the potential Vi supplied to terminal IN1 during write operation is n1 must satisfy Equation 6.

[0125]

number

[0126] In addition, by setting the potential supplied to terminal IN2 to VSS, Vin1 = Vdata. For example, as shown in FIG. 9, a transistor T Either the source or drain of r21 is electrically connected to terminal PS2 instead of terminal IN2. By setting the potential supplied to the terminal IN2 to VSS, Vref can be applied to Vin1. Since there is no need to add a driver circuit, the driver circuit of the semiconductor device 100 can be made smaller. As a result, the area occupied by the semiconductor device including the semiconductor device 100 can be reduced. This improves the design freedom and also improves the reliability of the semiconductor device.

[0127] If the potential supplied to terminal IN2 is VSS, Vdata must satisfy formula 7. .

[0128]

number

[0129] In this way, the semiconductor device 100 according to one aspect of the present invention has a function of holding analog data. The stored analog data is power amplified and output. Since the data is power amplified when it is read, a power amplifier circuit, etc., is used after the data is read. Alternatively, the number or size of the power amplifier circuits can be reduced. Cut.

[0130] Furthermore, the semiconductor device 100 according to one aspect of the present invention has a negative terminal connected to the output terminal (terminal OUT). Even if the load impedance fluctuates, the stored data is output (read) stably. Note that the semiconductor device 100 according to one embodiment of the present invention can handle not only analog data but also other data. It can also hold digital data.

[0131] This embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0132] (Embodiment 2) In this embodiment, a semiconductor device including a memory device or a semiconductor device according to one embodiment of the present invention will be described. Let me explain about 400.

[0133] 10A is a block diagram showing an example of the configuration of a semiconductor device 400. The device 400 includes a driving circuit 410 and a memory array 420. The semiconductor device 100 functions as a memory cell. In FIG. 10A, a memory array 420 is arranged in a matrix form in a plurality of semiconductor devices 10. 0 is shown.

[0134] The drive circuit 410 includes a PSW 241 (power switch), a PSW 242, and a peripheral circuit 4. The peripheral circuit 415 includes a peripheral circuit 411, a control circuit 412 (Cont control circuit), and a voltage generation circuit 428.

[0135] In the semiconductor device 400, each circuit, each signal, and each voltage may be appropriately selected or omitted as needed. Alternatively, other circuits or signals may be added. , GW, CLK, WAKE, ADDR, WDA, PON1, and PON2 are external input signals. The signal RDA is an output signal to the outside. The signal CLK is a clock signal.

[0136] The signals BW, CE, and GW are control signals. The signal CE is a chip enable signal. signal, signal GW is the global write enable signal, and signal BW is the byte write enable signal. The signal ADDR is the address signal. The signal WDA is the write enable signal. The signal PON1 and PON2 are the power-on data and the signal RDA is the read data. The signals PON1 and PON2 are used for gating control. It may be generated in 412.

[0137] The control circuit 412 is a logic circuit having a function of controlling the overall operation of the semiconductor device 400. For example, the control circuit may be a logic circuit that converts the signals CE, GW, and BW into logic signals. The operation mode (for example, write operation, read operation) of the semiconductor device 400 is determined by calculation. Alternatively, the control circuit 412 may set the peripherals to perform this mode of operation. Generates a control signal for circuit 411.

[0138] The voltage generating circuit 428 has a function of generating a negative voltage. For example, when a high-level signal is given to WAKE, When this signal is input, the signal CLK is input to the voltage generating circuit 428, and the voltage generating circuit 428 generates a negative voltage. Complete.

[0139] The peripheral circuit 411 is used to write and read data to and from the semiconductor device 100. The peripheral circuit 411 includes a row decoder 441, a column decoder 442, a Decoder 442 (Column Decoder), row driver 423 (Row Dri ver), a column driver 424 (Column Driver), an input circuit 425 (Inp ut Cir.) and an output circuit 426 (Output Cir.). , a sense amplifier, etc. may be provided.

[0140] The row decoder 441 and the column decoder 442 have the function of decoding the signal ADDR. The row decoder 441 is a circuit for specifying the row to be accessed, and the column decoder 442 is a circuit for specifying the row to be accessed. is a circuit for specifying a column to be accessed. The column driver 424 has a function of selecting a wiring designated by the semiconductor device 1. 00, a function to read data from the semiconductor device 100, and a function to write the read data to It has functions such as holding.

[0141] The input circuit 425 has a function of holding the signal WDA. The output data of the input circuit 425 is output to the column driver 424. The data (Din) written to 0 by the column driver 424 is The output circuit 426 outputs the data (Dout) to the output circuit 426. The output circuit 426 also has the function of outputting Dout to the outside of the semiconductor device 400. The data output from the output circuit 426 is the signal RDA.

[0142] The PSW 241 has a function of controlling the supply of VDD to the peripheral circuit 415. has the function of controlling the supply of VHM to the row driver 423. The high power supply voltage of 400 is VDD, and the low power supply voltage is GND (ground potential). HM is a high power supply voltage used to set the word line to a high level, and is higher than VDD. The signal PON1 controls the on / off of the PSW 241, and the signal PON2 controls the In FIG. 10A, in the peripheral circuit 415, VD Although the number of power domains to which D is supplied is set to 1, it can also be set to multiple. , a power switch may be provided for each power domain.

[0143] The driving circuit 410 and the memory array 420 of the semiconductor device 400 may be provided on the same plane. 10B, the drive circuit 410 and the memory array 420 may be provided overlapping each other. By overlapping the driver circuit 410 and the memory array 420, the signal propagation distance can be reduced. It can be shortened.

[0144] In addition, the semiconductor device 400 includes a control circuit 412 that is connected to a CPU. (Central Processing Unit) and / or GPU (Grap A processing unit such as a CP (Computer Processing Unit) may also be used. By using a U and / or a GPU, the semiconductor device 400 having a processing function can be It can be achieved.

[0145] This embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0146] (Embodiment 3) In this embodiment mode, an arithmetic processing device that can be provided with the semiconductor device described in the above embodiment mode will be described. An example of the device will be described.

[0147] FIG. 11 shows a block diagram of the processing unit 1100. In FIG. 1 shows an example of a CPU configuration that can be used for the .

[0148] The arithmetic processing device 1100 shown in FIG. 11 includes an ALU 1191 (ALU: A rithmetic logic unit, arithmetic circuit), ALU controller 1192 , instruction decoder 1193, interrupt controller 1194, timing A register controller 1195, a register 1196, a register controller 1197, a bus interface interface 1198), cache 1199, and cache interface 11 The substrate 1190 may be a semiconductor substrate, an SOI substrate, a glass substrate, or the like. It may have a rewritable ROM and a ROM interface. The cache 1199 and the cache interface 1189 may be provided on separate chips.

[0149] The cache 1199 is a main memory and cache interface on a separate chip. The cache interface 1189 is connected to the main memory. It has the function of supplying a part of the data held in the cache 1199. The data storage device 1199 has the function of storing the data.

[0150] The arithmetic processing device 1100 shown in FIG. 11 is merely an example showing a simplified configuration, and in reality The arithmetic processing device 1100 has a wide variety of configurations depending on its application. For example, The arithmetic processing device 1100 shown in FIG. 1 or a configuration including an arithmetic circuit is regarded as one core, and the core is It has multiple cores and each core operates in parallel, like a GPU. In addition, the arithmetic processing unit 1100 may use the internal arithmetic circuit and the bits that can be handled by the data bus. The numbers can be, for example, 8-bit, 16-bit, 32-bit, 64-bit, etc.

[0151] An instruction input to the processor 1100 via the bus interface 1198 is The signal is input to the instruction decoder 1193, decoded, and then passed to the ALU controller 1 192, interrupt controller 1194, register controller 1197, timing The signal is input to the signal controller 1195.

[0152] ALU controller 1192, interrupt controller 1194, register controller The timing controller 1197 and the timing controller 1195 control various Specifically, the ALU controller 1192 controls the operation of the ALU 1191. The interrupt controller 1194 also generates a signal for the arithmetic processing unit 11. During program execution, an interrupt request from an external I / O device or peripheral circuit is The register controller 1197 determines the priority and mask state and processes it accordingly. The address of the register 1196 is generated and the address of the register 1196 is written to the register 1196 according to the state of the arithmetic processing unit 1100. 196 reads and writes.

[0153] The timing controller 1195 controls the ALU 1191 and the ALU controller 119 2, an instruction decoder 1193, an interrupt controller 1194, and It generates a signal to control the timing of the operation of the register controller 1197. The timing controller 1195 generates an internal clock signal based on the reference clock signal. The internal clock generator supplies an internal clock signal to the various circuits.

[0154] In the processor 1100 shown in FIG. 11, a register 1196 and a cache 1199 As the storage device, for example, the semiconductor device shown in the above embodiment may be used. The semiconductor device 100 may also be used.

[0155] In the arithmetic processing device 1100 shown in FIG. 11, the register controller 1197 According to the instruction from 1191, the holding operation is selected in register 1196. , in the memory cells of the register 1196, data is held by the flip-flops The flip-flop can be used to select whether to hold the data by using the capacitor element. When data retention is selected, the power supply voltage to the memory cells in the register 1196 is When data retention in the capacitive element is selected, the data is supplied to the capacitive element. The data is rewritten, and the supply of the power supply voltage to the memory cells in the register 1196 is stopped. It is possible.

[0156] The arithmetic processing unit 1100 is not limited to a CPU, but may be a GPU, a DSP (Digital Signal Processor), or the like. Signal Processor), FPGA (Field-Programmabl e Gate Array) or the like.

[0157] The semiconductor device 400 and the arithmetic processing device 1100 shown in the above embodiment may be provided in an overlapping manner. 12A and 12B are perspective views of a semiconductor device 1150A. 1150A is a semiconductor device 400 that functions as a memory device on the arithmetic processing device 1100. The arithmetic processing unit 1100 and the semiconductor device 400 have an overlapping area. In order to make it easier to understand the configuration of the processor 1100 and the processor 1150A, FIG. 12B shows only the processor 1100 and the processor 1150A. 1 and the semiconductor device 400 are shown separately.

[0158] By stacking the semiconductor device 400 and the arithmetic processing unit 1100, the connection distance between them can be shortened. Therefore, the communication speed between the two can be increased. Because it is short, power consumption can be reduced.

[0159] Furthermore, a plurality of semiconductor devices 400 may be provided on top of the arithmetic processing device 1100. 13A and 13B show perspective views of the semiconductor device 1150B. The arithmetic processing device 1100 includes a semiconductor device 400a and a semiconductor device 400b. The processing device 1100, the semiconductor device 400a, and the semiconductor device 400b are arranged in overlapping areas. In order to make the configuration of the semiconductor device 1150B easier to understand, FIG. 13B shows only the arithmetic processing area. The processing device 1100, the semiconductor device 400a, and the semiconductor device 400b are shown separately.

[0160] The semiconductor device 400a and the semiconductor device 400b function as memory devices. A NOR type memory device is used for one of the semiconductor device 400a and the semiconductor device 400b, and a A NAND type memory device may also be used. Both may be NAND type memory devices, or may be NOR type memory devices. OR type memory devices include DRAM and SRAM. NOR type memory devices are Since it can operate at a higher speed than a NAND type memory device, for example, a part of the semiconductor device 400a can be used as a main memory and / or cache 1199. The order in which the semiconductor device 400a and the semiconductor device 400b are stacked may be reversed.

[0161] 14A and 14B are perspective views of the semiconductor device 1150C. The semiconductor device 400a and the semiconductor device 400b have a configuration in which the arithmetic processing unit 1100 is sandwiched between them. The arithmetic processing unit 1100, the semiconductor device 400a, and the semiconductor device 400b are mutually In order to make the configuration of the semiconductor device 1150C easier to understand, the In B, the arithmetic processing unit 1100, the semiconductor device 400a, and the semiconductor device 400b are separated. It shows.

[0162] By configuring the semiconductor device 1150C, the semiconductor device 400a and the arithmetic processing device 1100 and the communication speed between the semiconductor device 400b and the arithmetic processing unit 1100. Moreover, the power consumption can be reduced compared to the semiconductor device 1150B.

[0163] The semiconductor device according to one aspect of the present invention can be used in an artificial neural network. An example of the configuration of an artificial neural network is described below.

[0164] Figure 15A shows an example of the configuration of the neural network NN. It can be composed of an input layer IL, an output layer OL, and an intermediate layer (hidden layer) HL. The IL, output layer OL, and hidden layer HL each have one or more neurons (units). The intermediate layer HL may be one layer or two or more layers. A neural network with an intermediate layer (HL) is called a DNN (Deep Neural Network). Learning using deep neural networks can be called deep learning. It is also possible.

[0165] Input data is input to each neuron in the input layer IL, and previous data is input to each neuron in the hidden layer HL. The output signal of the neurons in the layer OL or the subsequent layer is input, and each neuron in the output layer OL receives the signal of the neurons in the previous layer. The output signal of each neuron is input. Each neuron is connected to all the neurons in the previous and next layers. It may be connected to all neurons (fully connected) or to a portion of neurons.

[0166] Figure 15B shows an example of a neuron operation. Here, we consider a neuron N and a neuron The figure shows two neurons in the previous layer that output signals to N. Neuron N has a The output of the neuron x1 and the output of the neuron x2 in the previous layer are input. In N, the multiplication result of output x1 and weight w1 (x1w1) and the multiplication result of output x2 and weight w2 After the sum of the results (x2w2) x1w1+x2w2 is calculated, a bias b is added if necessary. The value a is calculated by the activation function h. and the neuron N outputs an output signal y=h(a).

[0167] In this way, the operation of a neuron involves adding the product of the output of the previous layer neuron and the weight. This multiplication and addition operation is called multiplication and addition (x1w1+x2w2 above). This may be done on software using a program, or on hardware. When the multiply-and-accumulate operation is performed by hardware, a multiply-and-accumulate circuit can be used. This product-sum operation circuit may be a digital circuit or an analog circuit. When an analog circuit is used for the sum-of-products operation circuit, the circuit size of the sum-of-products operation circuit can be reduced. Alternatively, the number of times memory is accessed can be reduced, thereby improving processing speed and reducing power consumption. This can be done.

[0168] In addition, when an analog circuit is used for the sum-of-products operation circuit, analog data is used as weight information. The semiconductor device 100 according to one aspect of the present invention converts analog data into a digital value. Therefore, the DAC (Digital to Analog Converter) rter) and / or ADC (Analog to Digital Converter It is possible to reduce the number of conversion circuits such as FETs, thereby reducing power consumption and the area required. .

[0169] This embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0170] (Fourth embodiment) In this embodiment mode, a transistor structure applicable to the semiconductor device described in the above embodiment mode will be described. As an example, a structure in which transistors having different electrical characteristics are stacked will be described. This configuration will be described. By using this configuration, it is possible to increase the degree of freedom in designing a semiconductor device. Furthermore, by stacking transistors having different electrical characteristics, a semiconductor device can be The degree of integration can be increased.

[0171] A part of the cross-sectional structure of the semiconductor device is shown in FIG. 17A shows a transistor 500 and a capacitor element 600. 17B is a top view of the resistor 500. FIG. 17B is a top view of the portion L1-L2 shown by the dashed line in FIG. 17C is a cross-sectional view of the transistor 500 taken along the channel length direction. 17A is a cross-sectional view of the transistor 5 taken along the line W1-W2 in FIG. 500 is a cross-sectional view in the channel width direction. The semiconductor device 100 shown in FIG. 1 has an OS transistor, that is, an oxide semiconductor in a channel formation region. The transistor 550 corresponds to a transistor having a conductor. The driver circuit 410 has a Si transistor, that is, a transistor having silicon in a channel forming region. This corresponds to a transistor that

[0172] The transistor 500 is an OS transistor. Therefore, the data voltage written to the storage node via the transistor 500 is In other words, the frequency of refresh operations of the storage nodes can be reduced. Since the frequency is reduced or refresh operation is not required, the power consumption of the semiconductor device is reduced. It can be reduced.

[0173] In FIG. 16, the transistor 500 is provided above the transistor 550, and the capacitance element 60 0 is provided above transistor 550 and transistor 500.

[0174] The transistor 550 is provided on a substrate 371. The substrate 371 is, for example, a p-type silicon The substrate 371 may be an n-type silicon substrate. The oxide layer 374 is 71 is formed by a buried oxide (BO The transistor 550 is preferably made of a silicon oxide layer, for example. A single crystal silicon, so-called SOI (Silicon on Insulator), is provided on the substrate 371 via an oxide layer 374. It is mounted on an Insulator-On-Insulator (Ion-Insulator) substrate.

[0175] The substrate 371 in the SOI substrate is provided with an insulator 373 that functions as an element isolation layer. The substrate 371 also has a well region 372. The well region 372 is a region where the transistor 5 The region is given n-type or p-type conductivity depending on the conductivity type of the SOI substrate. The single crystal silicon in the semiconductor region 375, which acts as a source region or a drain region, A low resistance region 376a and a low resistance region 376b are provided on the well region 372. has a low resistance region 376c.

[0176] The transistor 550 is formed on a well region 372 to which an impurity element is added to give conductivity. The well region 372 can be provided with an independent potential via the low resistance region 376c. By changing the gate electrode of the transistor 550, Therefore, the threshold voltage of the transistor 550 can be controlled. Applying a negative potential to well region 372 reduces the threshold voltage of transistor 550 Therefore, the off-current can be reduced by increasing the well region 372 By applying a negative potential to the gate electrode of the Si transistor, the potential applied to the gate electrode of the Si transistor becomes 0V. As a result, the drain current of the transistor 550 can be reduced. This reduces power consumption due to through current in the calculation circuit, improving calculation efficiency. Cut.

[0177] The transistor 550 has a semiconductor layer whose top surface and side surfaces in the channel width direction are formed with an insulator 377 interposed therebetween. It is preferable that the transistor is a so-called fin type, which is covered with a conductor 378. By making the transistor 550 a fin type, the effective channel width is increased, The on-state characteristics of the transistor 550 can be improved. Since the voltage Vcc can be reduced, the off-state characteristics of the transistor 550 can be improved.

[0178] The transistor 550 may be a p-channel transistor or an n-channel transistor. Either a transistor or a gate driver may be used.

[0179] The conductor 378 may function as a first gate (also called a top gate) electrode. The well region 372 may also function as a second gate (also called a bottom gate) electrode. In this case, the potential applied to the well region 372 is applied via the low resistance region 376c. It can be controlled.

[0180] The region where the channel of the semiconductor region 375 is formed, the region nearby, the source region, or the drain region The low resistance region 376a and the low resistance region 376b, which are to be the drain region, and the well region 372 In the low resistance region 376c connected to the electrode for controlling the potential, a silicon-based semiconductor It is preferable that the semiconductor contains a material selected from the group consisting of silicon and silicon dioxide, and it is preferable that the semiconductor contains a material selected from the group consisting of silicon dioxide and silicon dioxide. (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), G It may also be formed from a material having a crystal lattice such as gallium aluminum arsenide (AlAs). The structure is made of silicon, in which the effective mass is controlled by applying stress to the silicon and changing the lattice spacing. Alternatively, the transistor 550 may be made of H by using GaAs and GaAlAs. It may also be an EMT.

[0181] Well region 372, low resistance region 376a, low resistance region 376b, and low resistance region 376 c is a semiconductor material applied to the semiconductor region 375, as well as an n-type conductive material such as arsenic or phosphorus. It contains an element that imparts p-type conductivity, or an element that imparts p-type conductivity, such as boron.

[0182] The conductor 378 that functions as the gate electrode is made of an element that gives n-type conductivity, such as arsenic or phosphorus. Semiconductor materials such as silicon that contain elements that impart p-type conductivity, such as silicon or boron A conductive material such as a metal material, an alloy material, or a metal oxide material can be used. The conductor 378 may also be made of a silicide such as nickel silicide.

[0183] In addition, since the work function is determined by the conductor material, by selecting the conductor material, Specifically, the threshold voltage of the transistor can be adjusted by using titanium nitride as the conductor. It is preferable to use a material such as tantalum nitride or tantalum nitride. To achieve this compatibility, metal materials such as tungsten or aluminum are used as layers for the conductors. It is preferable to use tungsten, and it is particularly preferable to use tungsten in terms of heat resistance.

[0184] The low resistance region 376a, the low resistance region 376b, and the low resistance region 376c are formed of another conductive material, For example, a structure in which silicide such as nickel silicide is stacked may be used. By doing so, the conductivity of the region that functions as an electrode can be increased. The side of the conductor 378 functions as a gate electrode, and the insulating layer functions as a gate insulating layer. The sides of the body are covered with an insulator that acts as a sidewall spacer (also called a sidewall insulating layer). By adopting such a configuration, the conductor 378 and the low resistance region 376a and low resistance region 376b can be prevented from being in a conductive state.

[0185] Over the transistor 550, an insulator 379, an insulator 381, an insulator 383, and an insulator The bodies 385 are stacked one on top of the other.

[0186] The insulators 379, 381, 383, and 385 may be, for example, oxides. Silicon, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, oxide Aluminum oxynitride, aluminum nitride oxide, aluminum nitride, etc. may be used.

[0187] In this specification, silicon oxynitride refers to a material containing more oxygen than nitrogen as its composition. Silicon nitride oxide refers to a material that contains more nitrogen than oxygen. In this specification, aluminum oxynitride refers to a material with a large amount of aluminum. It refers to a material that contains more oxygen than nitrogen, and aluminum oxide nitride is a material with a indicates a material that contains more nitrogen than oxygen.

[0188] The insulator 381 smooths out the steps caused by the transistor 550 and other components provided below it. For example, the top surface of the insulator 381 may have a function as a planarizing film. To improve flatness, the surface is flattened by a planarization process such as chemical mechanical polishing (CMP). It's fine.

[0189] The insulator 383 is also provided with a substrate 371 or a transistor 550 or the like. A film having a barrier property to prevent hydrogen and impurities from diffusing into the region where the capacitor 500 is provided. It is preferable to use

[0190] An example of a film having a barrier property against hydrogen is silicon nitride formed by a CVD method. Here, a semiconductor having an oxide semiconductor such as the transistor 500 can be used. The diffusion of hydrogen into the element may cause a deterioration in the characteristics of the semiconductor element. A film that suppresses hydrogen diffusion is used between the transistor 500 and the transistor 550. Specifically, the film that suppresses hydrogen diffusion is a film that has a small amount of hydrogen desorption. The membrane.

[0191] The amount of desorbed hydrogen can be analyzed using, for example, thermal desorption spectroscopy (TDS). For example, the amount of hydrogen desorption from the insulator 383 was measured by TDS analysis when the surface temperature of the film was 5 In the range of 0 to 500°C, the amount of desorption converted to hydrogen atoms is Converted to 10 x 10 15 atoms / cm 2 Less than or equal to 5 x 10 15 at oms / cm 2 The following is fine.

[0192] It is preferable that the insulator 385 has a lower dielectric constant than the insulator 383. For example, The dielectric constant of the insulator 385 is preferably less than 4, more preferably less than 3. The relative dielectric constant of 85 is preferably 0.7 times or less the relative dielectric constant of insulator 383, and 0.6 times or less is preferable. It is more preferable to use a material with a low dielectric constant as the interlayer film to reduce the parasitic capacitance that occurs between wiring. It is possible.

[0193] The insulators 379, 381, 383, and 385 are connected to the capacitance element 6. 00, or the conductor 328 and the conductor 330 connected to the transistor 500 are filled in. The conductors 328 and 330 are plugs or wiring. In addition, the conductor having the function of a plug or wiring may have a plurality of configurations. In addition, in this specification and the like, a wiring and a wiring-connected The conductive material may be an integral part of the plug that connects to the conductive material. In some cases, a part of the conductor functions as a plug.

[0194] The materials for each plug and wiring (conductor 328, conductor 330, etc.) include metal materials, alloys, and the like. Conductive materials such as gold, metal nitride, or metal oxide materials are used as single or multilayered layers. It can be used with materials such as tungsten or molybdenum, which have both heat resistance and electrical conductivity. It is preferable to use a high melting point material, and it is preferable to use tungsten. It is preferable to form the conductive layer from a low resistance conductive material such as aluminum or copper. By using this material, the wiring resistance can be reduced.

[0195] A wiring layer may be provided on the insulator 385 and the conductor 330. For example, in FIG. An insulator 350, an insulator 352, and an insulator 354 are stacked in this order. A conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring that connects to the transistor 550. The conductor 356 is made of the same material as the conductors 328 and 330. It can be established.

[0196] For example, the insulator 350 has a barrier property against hydrogen, similar to the insulator 383. It is preferable to use an insulator. In addition, the conductor 356 has a barrier property against hydrogen. It is preferable that the insulating material 350 contains a conductor. In particular, the insulating material 350 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 550 and the transistor 500 may be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 550 to the transistor 500.

[0197] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 550 can be suppressed while maintaining the conductivity of the transistor 550. In this case, the tantalum nitride layer having a barrier property against hydrogen has a barrier property against hydrogen. It is preferable that the insulating material 350 is in contact with the insulating material 350.

[0198] A wiring layer may be provided on the insulator 354 and the conductor 356. For example, in FIG. An insulator 360, an insulator 362, and an insulator 364 are stacked in this order. A conductor 366 is formed in the insulators 360, 362, and 364. The conductor 366 functions as a plug or wiring. The conductive material 328 and the conductive material 330 can be formed using the same materials.

[0199] For example, the insulator 360 has a barrier property against hydrogen, similar to the insulator 383. It is preferable to use an insulator. The conductor 366 has a barrier property against hydrogen. It is preferable that the insulating material 360 contains a conductor. In particular, the insulating material 360 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 550 and the transistor 500 may be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 550 to the transistor 500.

[0200] A wiring layer may be provided on the insulator 364 and the conductor 366. For example, in FIG. An insulator 370, an insulator 369, and an insulator 368 are stacked in this order. A conductor 376 is formed in the insulator 370, the insulator 369, and the insulator 368. The conductor 376 functions as a plug or wiring. The conductive material 328 and the conductive material 330 can be formed using the same materials.

[0201] For example, the insulator 370 has a barrier property against hydrogen, similar to the insulator 383. It is preferable to use an insulator. In addition, the conductor 376 has a barrier property against hydrogen. It is preferable that the insulating material 370 contains a conductor. In particular, the insulating material 370 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 550 and the transistor 500 may be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 550 to the transistor 500.

[0202] A wiring layer may be provided on the insulator 368 and the conductor 376. For example, in FIG. An insulator 380, an insulator 382, ​​and an insulator 384 are stacked in this order. A conductor 386 is formed on the insulators 380, 382, ​​and 384. The conductor 386 functions as a plug or wiring. The conductive material 328 and the conductive material 330 can be formed using the same materials.

[0203] For example, the insulator 380 has a barrier property against hydrogen, similar to the insulator 383. It is preferable to use an insulator. The conductor 386 has a barrier property against hydrogen. It is preferable that the insulating material 380 has a barrier property against hydrogen. In the opening, a conductor having a barrier property against hydrogen is formed. The transistor 550 and the transistor 500 may be separated by a barrier layer. This can suppress the diffusion of hydrogen from the resistor 550 to the transistor 500.

[0204] In the above, the wiring layer including the conductor 356, the wiring layer including the conductor 366, and the conductor 376 The wiring layer including the conductor 386 has been described above. The semiconductor device is not limited to this. Alternatively, the number of wiring layers may be three or less, or five or more wiring layers similar to the wiring layer including the conductor 356 may be provided. Good too.

[0205] On the insulator 384, an insulator 510, an insulator 512, an insulator 514, and an insulator 516 are formed. , and are stacked in this order. It is preferable that either of the insulating layers 516 is made of a material that has a barrier property against oxygen and hydrogen. I wish.

[0206] For example, the insulator 510 and the insulator 514 may include, for example, a substrate 371 or a transistor. The area where the transistor 500 is to be provided is provided with hydrogen and impurities. It is preferable to use a film that has a barrier property against substances. Various materials can be used.

[0207] As an example of a film with barrier properties against hydrogen, silicon nitride formed by CVD is used. Here, a semiconductor element including an oxide semiconductor such as the transistor 500 can be The diffusion of hydrogen may deteriorate the characteristics of the semiconductor device. A film that suppresses hydrogen diffusion is used between the transistor 500 and the transistor 550. is preferred.

[0208] In addition, as a film having a barrier property against hydrogen, for example, an insulator 510 and an insulator 5 14 uses metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide. It is preferable.

[0209] In particular, aluminum oxide is a material that can absorb oxygen and hydrogen, which can cause fluctuations in the electrical characteristics of transistors. Therefore, it has a high blocking effect that prevents impurities such as acid and moisture from passing through the membrane. Aluminum oxide is resistant to hydrogen, moisture, etc. during and after the transistor manufacturing process. It is possible to prevent impurities from being mixed into the transistor 500. This can suppress the release of oxygen from the oxide that makes up the transistor. Suitable for use as a protective film against 500.

[0210] For example, the insulators 512 and 516 are made of the same material as the insulator 379. In addition, by using materials with a relatively low dielectric constant for these insulators, , the parasitic capacitance occurring between the wirings can be reduced. The body 516 may be a silicon oxide film, a silicon oxynitride film, or the like.

[0211] In addition, the insulators 510, 512, 514, and 516 are provided with conductors 5 18, and conductors (for example, conductor 503) that constitute the transistor 500 are embedded. The conductor 518 is connected to the capacitor 600 or the transistor 550. The conductor 518 functions as a plug or wiring. The conductor 330 can be formed using the same material.

[0212] In particular, the insulator 510 and the conductor 518 in the area in contact with the insulator 514 are free of oxygen, hydrogen, It is preferable that the conductive material has a barrier property against water. The transistor 550 and the transistor 500 have a barrier property against oxygen, hydrogen, and water. The layer separating the transistor 550 from the transistor 500 can separate the hydrogen Diffusion can be suppressed.

[0213] Above the insulator 516 is the transistor 500 .

[0214] As shown in FIGS. 17A-17C, transistor 500 includes an insulator 514 and an insulator The conductor 503 is disposed so as to be embedded in the insulator 516 and the conductor 50 3, an insulator 520 disposed on the insulator 520, and an insulator 522 disposed on the insulator 520. An insulator 524 is disposed on the insulator 522, and an oxide 53 is disposed on the insulator 524. 530a, oxide 530b disposed on oxide 530a, and oxide 530b disposed on oxide 530b. Conductor 542a and conductor 542b are spaced apart, and conductor 542a and conductor 542b, and an opening is formed between and overlapping the conductors 542a and 542b. an insulator 580 disposed on the bottom and side of the opening; an insulator 545 disposed on the bottom and side of the opening; and a conductor 560 disposed on the forming surface.

[0215] 17B and 17C, the oxide 530a, the oxide 530b, the conductor 542a, and an insulator 544 is disposed between the conductor 542b and the insulator 580. 17A to 17C, the conductor 560 is preferably an insulator 545. and a conductor 560a provided inside the conductor 560a so as to be embedded inside the conductor 560a. 17B and 17C. As shown, the insulator 574 is disposed on the insulator 580, the conductor 560, and the insulator 545. It is preferable that this be done.

[0216] In this specification and the like, the oxide 530a and the oxide 530b are collectively referred to as oxides. Sometimes it's 530.

[0217] In the transistor 500, the region where the channel is formed and the vicinity thereof are oxidized. 5 shows a structure in which two layers of a metal 530a and an oxide 530b are stacked. For example, a single layer of oxide 530b or a stack of three or more layers may be used. A configuration may be provided.

[0218] In addition, although the conductor 560 in the transistor 500 has a two-layer structure, The invention is not limited to this. For example, the conductor 560 may have a single layer structure. However, it may have a laminated structure of three or more layers. The transistor 500 is an example, and the circuit configuration and / or driving An appropriate transistor may be used depending on the method, etc.

[0219] Here, conductor 560 serves as the gate electrode of transistor 500, and conductor 542 The conductor 542a and the conductor 542b function as a source electrode and a drain electrode, respectively. As noted above, the conductor 560 is inserted through the opening in the insulator 580 and the conductors 542a and 542b. The conductor 560, the conductor 542a, and the conductor 542b are formed so as to be embedded in the region sandwiched between them. The placement of the conductor 542b is selected to be self-aligned with the opening in the insulator 580. That is, in the transistor 500, the gate electrode is disposed between the source electrode and the drain electrode. Therefore, the conductor 560 can be arranged in a self-aligned manner. Since the transistor 500 can be formed without providing a gate electrode, the area occupied by the transistor 500 can be reduced. This allows for miniaturization and high integration of semiconductor devices.

[0220] Furthermore, a conductor 560 is formed in a self-aligned manner in the region between the conductors 542a and 542b. Therefore, the conductor 560 has an overlapping area with the conductor 542a or the conductor 542b. This prevents the formation of a gap between the conductor 560 and the conductors 542a and 542b. Therefore, the parasitic capacitance of the transistor 500 can be reduced. It is possible to improve the speed and have high frequency characteristics.

[0221] Conductor 560 functions as a first gate (also called gate or top gate) electrode. In addition, the conductor 503 may be a second gate (also called a back gate or a bottom gate). In this case, the potential applied to the conductor 503 may be By changing the potential applied to the transistor 50 independently of the potential applied to the body 560, the In particular, by applying a negative potential to the conductor 503, As a result, the threshold voltage of the transistor 500 can be increased and the off-state current can be reduced. Therefore, applying a negative potential to the conductor 503 is more effective than not applying a negative potential. Therefore, the drain current when the potential applied to the conductor 560 is 0 V can be reduced. Cut.

[0222] The conductor 503 is arranged to overlap the oxide 530 and the conductor 560. Therefore, when a potential is applied to the conductor 560 and the conductor 503, The electric field generated by the conductor 503 is connected to the electric field generated by the conductor 503, and the chalcogenide formed in the oxide 530 The chel forming area can be covered.

[0223] In this specification, a pair of gate electrodes (a first gate electrode and a second gate electrode) The structure of a transistor in which the channel formation region is electrically surrounded by the electric field of This is called a surrounded channel (S-channel) configuration. The disclosed S-channel configuration is different from the Fin type and planar type configurations. By adopting a -channel structure, the resistance to short channel effects is increased. This makes it possible to provide a transistor in which the short channel effect is less likely to occur.

[0224] The conductor 503 has the same structure as the conductor 518, and the insulators 514 and 5 Conductor 503a is formed in contact with the inner wall of opening 16, and conductor 503b is formed further inside. In the transistor 500, the conductor 503a and the conductor 503b are Although a stacked structure is shown, the present invention is not limited to this. The electric conductor 503 may be provided as a single layer or as a laminated structure of three or more layers.

[0225] Here, the conductor 503a prevents the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. It is preferable to use a conductive material that has the function of suppressing the impurities (i.e., the impurities are less likely to permeate). Alternatively, the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) is suppressed. It is preferable to use a conductive material that has the above-mentioned function (i.e., that is difficult for oxygen to permeate). In this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of the above impurities or oxygen. The function is to suppress the diffusion of any one or all of the above oxygen.

[0226] For example, the conductor 503a has a function of suppressing the diffusion of oxygen, so that the conductor 503b This can prevent the conductivity from decreasing due to oxidation.

[0227] When the conductor 503 also functions as a wiring, the conductor 503b is made of tungsten, copper, Alternatively, it is preferable to use a highly conductive material containing aluminum as a main component. In this embodiment, the conductor 503 is illustrated as a stack of conductors 503a and 503b. However, the conductor 503 may have a single layer structure.

[0228] The insulators 520, 522, and 524 function as a second gate insulating film. It has.

[0229] Here, the insulator 524 in contact with the oxide 530 has more oxygen than the stoichiometric composition. It is preferable to use an insulator containing oxygen. The oxygen is released from the film by heating. In this specification and elsewhere, the oxygen released by heating may be referred to as "excess oxygen." That is, a region containing excess oxygen (also called an "excess oxygen region") is formed in the insulator 524. It is preferable that the insulator containing such excess oxygen is in contact with the oxide 530. By providing the oxide 530, oxygen vacancies (V O :oxygen vacancy and This can reduce the oxidation (also referred to as oxidation) and improve the reliability of the transistor 500. When hydrogen enters the oxygen vacancy in the substance 530, the defect (hereinafter referred to as V O It may be called H. ) can act as a donor, generating electrons as carriers. The oxygen atom may bond with the metal atom to generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen has a normally-on characteristic. In addition, hydrogen in oxide semiconductors tends to move due to stresses such as heat and electric fields. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor will decrease. In one embodiment of the present invention, V in the oxide 530 O Reduce H as much as possible, It is preferable to make it highly pure or substantially highly pure. O H is enough To obtain an oxide semiconductor with reduced impurities, it is necessary to remove impurities such as moisture and hydrogen from the oxide semiconductor. (also called "dehydration" or "dehydrogenation treatment") and supplying oxygen to the oxide semiconductor. It is important to compensate for the oxygen deficiency by adding oxygen (also called "oxygenation treatment"). O H, etc. To use an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor This allows stable electrical properties to be imparted.

[0230] As an insulator having an excess oxygen region, specifically, an oxide film in which some oxygen is released by heating is used. It is preferable to use a material that releases oxygen when heated. In the normal desorption spectroscopy (DDS) analysis, The calculated amount of oxygen released is 1.0 x 10 18 atoms / cm 3 More than 1.0x, preferably 10 19 atoms / cm 3 More preferably, 2.0 × 10 19 atoms / cm 3 or more, or 3.0 x 10 20 atoms / cm 3 The oxide film is as described above. The surface temperature of the film during the TDS analysis was 100°C or higher and 700°C or lower, or 10 The temperature is preferably in the range of 0°C or higher and 400°C or lower.

[0231] In addition, the insulator having the excess oxygen region is brought into contact with the oxide 530 and then subjected to heat treatment. One or more of the following may be performed: microwave processing, RF processing, or the like. By this, water or hydrogen in the oxide 530 can be removed. In 30, a reaction occurs in which the VoH bond is broken, in other words, "V O H→Vo+H This reaction occurs, and some of the hydrogen generated is dehydrogenated. The oxide 530 or the insulator adjacent to the oxide 530 is removed by combining with the element to form H2O. In addition, some of the hydrogen may be gettered by the conductor 542a and the conductor 542b. It may be pinged.

[0232] The microwave treatment may be carried out using, for example, an apparatus having a power source for generating high-density plasma, Alternatively, it is preferable to use an apparatus having a power source for applying RF to the substrate side. By using a gas containing oxygen and high density plasma, high density oxygen radicals are generated. By applying RF to the substrate side, the oxide generated by the high-density plasma can be The atomic radicals can be efficiently introduced into the oxide 530 or into the insulator in the vicinity of the oxide 530. The microwave treatment can be carried out at a pressure of 133 Pa or more, preferably 200 Pa or more. The pressure may be a or more, more preferably 400 Pa or more. The gas introduced into the device is, for example, oxygen and argon, and the oxygen flow ratio (O2 / The gas is preferably heated at a concentration of (O2 + Ar) of 50% or less, preferably 10% or more and 30% or less.

[0233] In addition, during the manufacturing process of the transistor 500, when the surface of the oxide 530 is exposed, The heat treatment is preferably performed at a temperature of 100° C. or higher and 450° C. or lower. More preferably, the temperature is 350° C. or higher and 400° C. or lower. or an inert gas atmosphere, or an oxidizing gas of 10 ppm or more, 1% or more, or 1 For example, it is preferable to carry out the heat treatment in an oxygen atmosphere. By this, oxygen is supplied to the oxide 530, and oxygen vacancies (VO ) can be reduced. The heat treatment may be carried out under reduced pressure or in an atmosphere of nitrogen gas or inert gas. After heat treatment in an oxidizing gas atmosphere, 10ppm of oxidizing gas was added to compensate for the oxygen that was removed. The oxidation may be carried out in an atmosphere containing 1% or more, 1% or more, or 10% or more. After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, The heat treatment may be performed in a nitrogen gas or inert gas atmosphere.

[0234] By subjecting the oxide 530 to oxygen addition treatment, oxygen vacancies in the oxide 530 are filled. In other words, it promotes the reaction "Vo + O → null" Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 530. This allows the hydrogen to be removed as H2O (dehydration). The hydrogen remaining in 530 recombines with the oxygen vacancy and V O By suppressing the formation of H This can be done.

[0235] Also, if the insulator 524 has an excess oxygen region, the insulator 522 may be oxygen-resistant (e.g., It has the function of suppressing the diffusion of oxygen (element atoms, oxygen molecules, etc.) (the oxygen mentioned above is less likely to permeate) is preferred.

[0236] The insulator 522 has a function of suppressing the diffusion of oxygen and impurities, and thus the oxide 530 The oxygen contained in the conductor 503 is preferably not diffused to the insulator 520 side. However, the reaction with oxygen contained in the insulator 524 and / or the oxide 530 is suppressed. This can be done.

[0237] The insulator 522 may be, for example, aluminum oxide, hafnium oxide, aluminum and hafnium oxide. oxides containing ammonium (hafnium aluminate), tantalum oxide, zirconium oxide, titanium Lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (B Insulators containing so-called high-k materials such as a,Sr)TiO3 (BST) are deposited as single layers or As transistors become smaller and more highly integrated, Thinning the gate insulating film can cause problems such as leakage current. By using high-k materials as insulators that function as a transistor, the physical thickness can be maintained. This makes it possible to reduce the gate potential during start operation.

[0238] In particular, it has the function of suppressing the diffusion of impurities and oxygen (the oxygen is difficult to penetrate) ) Insulators containing oxides of one or both of aluminum and hafnium, which are insulating materials It is recommended to use an insulator containing oxides of either or both aluminum and hafnium. , aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium It is preferable to use such a material as the insulator 5. When the insulator 522 is formed, the insulator 522 prevents oxygen from being released from the oxide 530 and the transistor This layer functions as a layer that suppresses the intrusion of impurities such as hydrogen from the periphery of the capacitor 500 into the oxide 530. do.

[0239] Alternatively, for example, aluminum oxide, bismuth oxide, or germanium oxide may be added to these insulators. Niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, Alternatively, zirconium oxide may be added to these insulators, or these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the insulator.

[0240] The insulator 520 is preferably thermally stable. For example, silicon oxide and Silicon oxide nitride and silicon oxynitride are suitable because they are thermally stable. By combining the insulator with silicon oxide or silicon oxynitride, thermally stable and It is possible to obtain an insulator 520 having a laminated structure with a high relative dielectric constant.

[0241] 17A to 17C, the second transistor 500 has a three-layer stacked structure. As the gate insulating film, an insulator 520, an insulator 522, and an insulator 524 are shown. However, the second gate insulating film may have a single layer, two layers, or a laminated structure of four or more layers. In this case, the laminated structure is not limited to the same material, but may be made of different materials. Good too.

[0242] The transistor 500 has an oxide 530 including a channel formation region, which functions as an oxide semiconductor. For example, the oxide 530 is an In-M-Zn oxide (element M is aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron Metals, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, and celery Choose from tungsten, neodymium, hafnium, tantalum, magnesium, etc. It is preferable to use a metal oxide such as one or more metal oxides.

[0243] The metal oxide that functions as an oxide semiconductor may be formed by a sputtering method. Alternatively, the ALD (Atomic Layer Deposition) method may be used. The metal oxide functioning as an oxide semiconductor will be described in detail in another embodiment. do.

[0244] In addition, the metal oxide that functions as a channel formation region in the oxide 530 is a band gap metal oxide. A metal oxide having a gap of preferably 2 eV or more, more preferably 2.5 eV or more is used. In this way, by using a metal oxide with a large band gap, The off-state current of the transistor can be reduced.

[0245] The oxide 530 has the oxide 530a under the oxide 530b, so that the oxide 530 is thicker than the oxide 530a. This can suppress the diffusion of impurities from the underlying structure into the oxide 530b. Cut.

[0246] The oxide 530 has a laminated structure of a plurality of oxide layers each having a different atomic ratio of each metal atom. Specifically, in the metal oxide used for the oxide 530a, the constituent elements are preferably The atomic ratio of element M in the oxide 530b is It is preferable that the atomic ratio of the metal oxide used for the oxide 530a is larger than that of the element M. In the oxide 530b, the atomic ratio of the element M to In is It is preferable that the atomic ratio of element M to In is larger than that of element M. In the metal oxide used, the atomic ratio of In to the element M is It is preferable that the atomic ratio of In to the element M in the metal oxide is larger than that of In.

[0247] In addition, the energy of the conduction band minimum of the oxide 530a is smaller than that of the oxide 530b. In other words, the electron affinity of the oxide 530a is preferably higher than the energy. , preferably smaller than the electron affinity of oxide 530b.

[0248] Here, at the junction between the oxide 530a and the oxide 530b, the energy of the conduction band minimum is In other words, the junction of oxide 530a and oxide 530b The energy level of the conduction band minimum in this region is said to change continuously or to form a continuous junction. To achieve this, the oxide 530a and the oxide 530b must be at the interface between them. This can reduce the defect level density of the mixed layer formed by the above process.

[0249] Specifically, the oxide 530a and the oxide 530b have a common element other than oxygen (main component). By using a mixed layer with a low defect level density, for example, an oxide When 530b is an In-Ga-Zn oxide, the oxide 530a is an In-Ga-Zn oxide. It is preferable to use gallium oxide, Ga-Zn oxide, gallium oxide, etc.

[0250] At this time, the main path of the carriers is the oxide 530b. This reduces the defect state density at the interface between the oxide 530a and the oxide 530b. Therefore, the influence of interface scattering on carrier conduction is reduced, and the The transistor 500 can obtain a high on-state current.

[0251] On the oxide 530b, a conductor 542a is formed, which functions as a source electrode and a drain electrode. The conductor 542a and the conductor 542b are provided as follows: , aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum , tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconia Sodium, beryllium, indium, ruthenium, iridium, strontium, lanthanum or an alloy containing the above metal elements, or It is preferable to use a combination of alloys, for example, tantalum nitride, titanium nitride, tantalum titanium and aluminum nitrides, tantalum and aluminum nitrides, Ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, lanthanum It is preferable to use oxides containing nickel. , nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide Ruthenium, ruthenium nitride, oxides containing strontium and ruthenium, lanthanum and nickel Oxides containing oxygen are conductive materials that are resistant to oxidation or that maintain conductivity even after absorbing oxygen. Furthermore, metal nitride films such as tantalum nitride are preferable because they can be easily etched by hydrogen or oxygen. It is preferable because it has a barrier property against elements.

[0252] In addition, although the conductor 542a and the conductor 542b are shown as having a single layer configuration in FIG. Alternatively, a laminated structure of two or more layers may be used. For example, a tantalum nitride film and a tungsten film may be laminated. Alternatively, a titanium film and an aluminum film may be stacked. Two-layer structure with an aluminum film laminated on a copper-magnesium-aluminum alloy film, and a copper film on a copper-magnesium-aluminum alloy film Two-layer structure with a copper film on a titanium film, two-layer structure with a copper film on a tungsten film A two-layer structure may also be used.

[0253] Also, a titanium film or titanium nitride film and an aluminum film overlaid on the titanium film or titanium nitride film are used. A titanium film or a copper film is laminated, and a titanium film or a titanium nitride film is further formed on the aluminum film or a copper film. Three-layer structure: a molybdenum film or molybdenum nitride film and a molybdenum film or molybdenum nitride film. An aluminum film or copper film is laminated on top of the molybdenum film, and then a molybdenum film or The molybdenum nitride film may be formed as a three-layer structure. A transparent conductive material containing zinc oxide may also be used.

[0254] 17B, ​​the oxide 530 and the conductor 542a (conductor 542b) At the interface and its vicinity, a region 543a and a region 543b are formed as low resistance regions. In this case, the region 543a functions as either a source region or a drain region. The region 543b functions as the other of the source region and the drain region. A channel forming region is formed in the region sandwiched between region 543a and region 543b.

[0255] By providing the conductor 542a (conductor 542b) so as to be in contact with the oxide 530, The oxygen concentration in the region 543a (region 543b) may decrease. The metal contained in the conductor 542a (conductor 542b) and the oxide 530 are mixed in the region 543b. In such a case, a metal compound layer containing the metal compound may be formed in the region 543a (region The carrier density in the region 543a (region 543b) increases, and the region 543a (region 543b) becomes a low resistance region. do.

[0256] The insulator 544 is provided to cover the conductor 542a and the conductor 542b. The insulator 544 prevents oxidation of the oxide 542a and the conductor 542b. 530 and may be provided to be in contact with the insulator 524.

[0257] Insulator 544 includes hafnium, aluminum, gallium, yttrium, and zirconium. Aluminum, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, or a metal oxide containing one or more selected from magnesium, etc. The insulator 544 may be made of silicon nitride oxide, silicon nitride, or the like. can also be used.

[0258] In particular, the insulator 544 may be an oxide of aluminum or hafnium, or both. Insulators containing aluminum oxide, hafnium oxide, aluminum, and hafnium It is preferable to use oxides containing hafnium (hafnium aluminate). Hafnium aluminate has higher heat resistance than hafnium oxide. This is preferable because it is difficult to crystallize during the heat treatment. 542b is a material that is oxidation-resistant, or the conductivity does not decrease significantly even when it absorbs oxygen. In the case of a material, the insulator 544 is not an essential component. , can be designed appropriately.

[0259] By providing the insulator 544, impurities such as water and hydrogen contained in the insulator 580 are converted into acids. In addition, the excess of the insulator 580 can be prevented from diffusing into the oxide 530b. Oxidation of the conductor 542 due to oxygen can be suppressed.

[0260] The insulator 545 functions as a first gate insulating film. Similar to 524, it is made using an insulator that contains excess oxygen and releases oxygen when heated. It is preferable to form

[0261] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, and nitride silicon dioxide, fluorine-doped silicon dioxide, carbon-doped silicon dioxide, carbon, and Silicon oxide doped with nitrogen and silicon oxide having vacancies can be used. Silicon oxide and silicon oxynitride are preferred because they are stable to heat.

[0262] By providing an insulator containing excess oxygen as the insulator 545, the oxide In addition, oxygen can be effectively supplied to the channel forming region of the insulator 530b. As in 24, the concentration of impurities such as water or hydrogen in the insulator 545 is reduced. It is preferable that the thickness of the insulator 545 is 1 nm or more and 20 nm or less. The microwave treatment described above may be performed before and / or after the formation of the insulator 545. stomach.

[0263] In addition, in order to efficiently supply excess oxygen contained in the insulator 545 to the oxide 530, A metal oxide may be provided between the body 545 and the conductor 560. The metal oxide may be an insulator. It is preferable to suppress the diffusion of oxygen from 545 to the conductor 560. The metal oxide prevents excess oxygen from diffusing from the insulator 545 to the conductor 560. In other words, it is possible to suppress a decrease in the amount of excess oxygen supplied to the oxide 530. This can prevent the conductor 560 from being oxidized by excess oxygen. Any material that can be used for the insulator 544 may be used.

[0264] Note that the insulator 545 may have a stacked structure similar to the second gate insulating film. As the miniaturization and high integration of devices progresses, the gate insulating film becomes thinner, which reduces leakage current and other issues. Therefore, the insulator that functions as the gate insulating film is made of high-k material. By using a laminated structure of a material that is thermally stable and a material that is thermally stable, the thickness of the material is maintained while the It is possible to reduce the gate potential during transistor operation. It may have a laminated structure.

[0265] The conductor 560 functioning as the first gate electrode has a two-layer structure in FIGS. 17B and 17C. However, it may have a single layer structure or a laminated structure of three or more layers.

[0266] The conductor 560a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, a nitrogen oxide molecule ( Conductive material with the function of suppressing the diffusion of impurities such as N2O, NO, NO2, etc., copper atoms, etc. It is preferable to use a material containing at least oxygen (for example, oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material that has the function of suppressing the diffusion of the conductor 56. Oa has the function of suppressing oxygen diffusion, so the oxygen contained in the insulator 545 This can prevent the conductor 560b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing this include tantalum, tantalum nitride, and ruthenium. It is preferable to use ruthenium or ruthenium oxide as the conductor 560a. In this case, an oxide semiconductor that can be used for the oxide 530 can be used. By forming a film of conductor 560b by sputtering, the electrical resistance value of conductor 560a is reduced. This is called an OC (Oxide Conductor) electrode. This can be done.

[0267] The conductor 560b is a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 560b also functions as a wiring, It is preferable to use a highly conductive material, such as tungsten, copper, or aluminum. The conductor 560b can be made of a conductive material containing silicon as a main component. For example, a laminated structure of titanium or titanium nitride and the above conductive material may be used. good.

[0268] The insulator 580 is provided on the conductor 542a and the conductor 542b via the insulator 544. Preferably, the insulator 580 has an excess oxygen region. For example, the insulator 58 0, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, fluorine silicon oxide doped with carbon, silicon oxide doped with carbon, and acid doped with nitrogen. It is particularly preferable that the insulating layer 100 has a silicon oxide, a silicon oxide having pores, or a resin. Silicon oxide and silicon oxynitride are preferred because they are thermally stable. Silicon oxide and silicon oxide with vacancies easily form excess oxygen regions in later processes. This is preferable because it is possible to

[0269] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580, oxygen in the insulator 580 is efficiently supplied to the oxide 530. It should be noted that the concentration of impurities such as water or hydrogen in the insulator 580 is reduced. It is preferable.

[0270] The opening in the insulator 580 is formed to overlap the region between the conductor 542a and the conductor 542b. As a result, the conductor 560 is inserted through the opening in the insulator 580 and the conductor 542a and the conductor 542b. It is formed so as to be embedded in the region sandwiched between 542b.

[0271] In miniaturizing semiconductor devices, it is required to shorten the gate length. Therefore, the thickness of the conductor 560 must be increased. As a result, the conductor 560 can have a shape with a high aspect ratio. In order to embed the conductor 560 in the opening of the insulator 580, the conductor 560 is formed to have an aspect ratio Even if the shape is high, the conductor 560 can be formed without collapsing during the process. do.

[0272] The insulator 574 is connected to the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 545. The insulator 574 is preferably provided in contact with the , insulator 545, and insulator 580. From this excess oxygen region, oxygen can be supplied into the oxide 530 .

[0273] For example, the insulator 574 may be hafnium, aluminum, gallium, yttrium, or di zinc, tungsten, titanium, tantalum, nickel, germanium, or magnesium Metal oxides containing one or more metals selected from the group consisting of sodium, do.

[0274] In particular, aluminum oxide has a high barrier property and is a thin film of 0.5 nm to 3.0 nm. Therefore, the diffusion of hydrogen and nitrogen can be suppressed even if the sputtering method is used. The aluminum oxide film formed by this method is both an oxygen source and a barrier to impurities such as hydrogen. It can also function as a membrane.

[0275] In addition, it is preferable to provide an insulator 581 that functions as an interlayer film over the insulator 574. The insulator 581, like the insulator 524, has a low impurity concentration such as water or hydrogen. It is preferably reduced.

[0276] Also, openings formed in the insulators 581, 574, 580, and 544 Conductor 540a and conductor 540b are placed in the mouth. The conductors 540a and 540b are provided opposite each other with the conductor 560 in between. b has the same configuration as conductor 546 and conductor 548 described later.

[0277] An insulator 582 is provided on the insulator 581. The insulator 582 is a material that contains oxygen and hydrogen. Therefore, the insulator 582 is preferably made of a material having a barrier property against the The insulator 582 can be made of a material similar to that of the insulator 514. For example, the insulator 582 can be made of aluminum oxide. It is preferable to use metal oxides such as aluminum, hafnium oxide, and tantalum oxide.

[0278] In particular, aluminum oxide is a material that can absorb oxygen and hydrogen, which can cause fluctuations in the electrical characteristics of transistors. Therefore, it has a high blocking effect that prevents impurities such as acid and moisture from passing through the membrane. Aluminum oxide is resistant to hydrogen, moisture, etc. during and after the transistor manufacturing process. It is possible to prevent impurities from being mixed into the transistor 500. This can suppress the release of oxygen from the oxide that makes up the transistor. Suitable for use as a protective film against 500.

[0279] In addition, an insulator 586 is provided on the insulator 582. The insulator 586 is 79. In addition, these insulators have a relatively low dielectric constant. By applying the material, it is possible to reduce the parasitic capacitance that occurs between wiring. For example, The body 586 may be a silicon oxide film, a silicon oxynitride film, or the like.

[0280] Also, the insulator 520, the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator The body 574, the insulator 581, the insulator 582, and the insulator 586 are provided with the conductor 546 and and a conductor 548 and the like are embedded therein.

[0281] The conductor 546 and the conductor 548 are connected to the capacitor 600, the transistor 500, or the transistor 500. The conductor 546 functions as a plug or wiring that connects to the transistor 550. The conductor 548 is formed using the same material as the conductor 328 and the conductor 330. It is possible.

[0282] After the transistor 500 is formed, an opening is formed to surround the transistor 500. An insulator having high barrier properties against hydrogen or water may be formed so as to cover the opening. By encasing the transistor 500 in the insulator with high barrier properties, moisture and It is possible to prevent the intrusion of hydrogen and oxygen. Alternatively, the transistor may be wrapped in an insulator that has a high barrier property against hydrogen or water. When forming an opening to surround the transistor 500, for example, the insulator 522 or the insulator 5 14, and the burr 522 or 514 is in contact with the insulator 522 or 514. If a highly insulating material is formed, it can be used as part of the manufacturing process of the transistor 500. In addition, examples of insulators with high barrier properties against hydrogen or water include: A material similar to that of the insulator 522 or the insulator 514 may be used.

[0283] Next, a capacitor 600 is provided above the transistor 500. 00 has a conductor 610, a conductor 620, and an insulator 630.

[0284] Moreover, a conductor 612 may be provided on the conductor 546 and the conductor 548. 12 has a function as a plug or wiring that connects to the transistor 500. The conductor 610 functions as an electrode of the capacitor 600. The conductors 610 can be formed at the same time.

[0285] The conductor 612 and the conductor 610 may be made of molybdenum, titanium, tantalum, or tungsten. a metal film containing an element selected from aluminum, copper, chromium, neodymium, and scandium; Or a metal nitride film containing the above-mentioned elements (tantalum nitride film, titanium nitride film, molybdenum nitride film, etc.) Indium tin oxide (ITO) or tungsten nitride (Tungsten nitride) can be used. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide oxide, indium oxide with titanium oxide, indium tin oxide with titanium oxide, Conductive materials such as indium zinc oxide and indium tin oxide with added silicon oxide are used You can also do this.

[0286] In this embodiment, the conductor 612 and the conductor 610 are shown as having a single-layer structure. For example, a conductive material having a barrier property and a conductive material having a barrier property may be laminated. Conductors with barrier properties are placed between the highly conductive conductors and those with high conductivity. A highly adhesive conductor may be formed.

[0287] The conductor 620 is provided so as to overlap with the conductor 610 with the insulator 630 interposed therebetween. The conductor 620 is made of a conductive material such as a metal material, an alloy material, or a metal oxide material. High-melting point materials such as tungsten or molybdenum, which have both heat resistance and electrical conductivity, are used. It is preferable to use a material, and it is particularly preferable to use tungsten. When forming the same structure as other components, low resistance metal materials such as Cu (copper) or Al ( Aluminum) or the like may be used.

[0288] An insulator 640 is provided on the conductor 620 and the insulator 630. The insulator 640 can be formed using a material similar to that of the insulator 379. It may also function as a planarizing film that covers the underlying unevenness.

[0289] By using this structure, a semiconductor device including a transistor having an oxide semiconductor This allows for miniaturization or high integration.

[0290] This embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0291] (Embodiment 5) In this embodiment, the semiconductor device can be used for the OS transistor described in the above embodiment. Metal oxides (hereinafter also referred to as oxide semiconductors) will be described.

[0292] The metal oxide preferably contains either indium or zinc. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. It is preferable that the alloy contains boron, silicon, titanium, iron, etc. , nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , hafnium, tantalum, tungsten, magnesium, cobalt, etc. Or, multiple types may be included.

[0293] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to FIG. 18A. FIG. 18A shows an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn). FIG. 1 is a diagram illustrating the classification of crystal structures of metals (oxides).

[0294] As shown in FIG. 18A, oxide semiconductors are broadly divided into "amorphous" and ", "Crystalline" and "Crystal" Also, "Amorphous" includes completely amorp Also, "Crystalline" includes CAAC (c-ax is-aligned crystalline), nc(nanocrystalli ne), and Cloud-Aligned Composite (CAC). The classification of "Crystalline" includes single crystal, pol Crystalline and completely amorphous materials are excluded. "Crystal" includes single crystal and poly crystal. Contains stal.

[0295] The structures enclosed in the bold frame in Figure 18A are classified into "Amorphous" and "Cry It is an intermediate state between "crystal" and "new crystal" This structure belongs to the line phase. Stable "Amorphous" or "Crystal" is This can be rephrased as a completely different structure.

[0296] The crystal structure of the film or substrate can be determined by X-ray diffraction (XRD). It can be evaluated using the "Crystalline" spectrum. CAAC-IGZO films classified as The XRD spectrum obtained by the GIXD measurement is shown in Figure 18B. This is also called the Seemann-Bohlin method. The XRD spectrum obtained by the method shown in FIG. 18B is simply referred to as the XRD spectrum. The composition of the AAC-IGZO film is approximately In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in FIG. 18B is 500 nm.

[0297] As shown in Figure 18B, the XRD spectrum of the CAAC-IGZO film shows clear crystallinity. Specifically, the XRD spectrum of the CAAC-IGZO film shows the following peaks: A peak indicating the c-axis orientation is detected near 2θ=31°. The peak near 2θ=31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0298] The crystal structure of the film or substrate was also analyzed by nanobeam electron diffraction (NBED). Diffraction patterns observed by electron diffraction (microelectron It can be evaluated by the diffraction pattern of the CAAC-IGZO film. The pattern is shown in Figure 18C. Figure 18C shows the pattern obtained by NBE, in which the electron beam is incident parallel to the substrate. The diffraction pattern observed by the CAAC-IGZO film shown in Figure 18C is The composition is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In the diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0299] As shown in Figure 18C, the diffraction pattern of the CAAC-IGZO film shows multiple c-axis orientations. spots are observed.

[0300] <<Structure of oxide semiconductor>> When focusing on the crystal structure, oxide semiconductors may be classified differently from those shown in FIG. 18A. For example, oxide semiconductors are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors and pseudo-non-crystalline oxide semiconductors. amorphous-like oxide semiconductor (a-like OS) semiconductor), amorphous oxide semiconductor, etc.

[0301] Here, for details of the above-mentioned CAAC-OS, nc-OS, and a-like OS, Give an explanation.

[0302] [CAAC-OS] The CAAC-OS has multiple crystalline regions, each of which has its c-axis aligned in a specific direction. The specific direction is the thickness direction of the CAAC-OS film. The direction normal to the surface on which the CAAC-OS film is formed or the direction normal to the surface of the CAAC-OS film. The crystalline region is a region in which the atomic arrangement has periodicity. When viewed as an arrangement, the crystalline region is also a region with a uniform lattice arrangement. S has a region where multiple crystalline regions are connected in the ab-plane direction, and this region has strain. The distortion is a distortion of the lattice arrangement in the region where multiple crystal regions are connected. A place where the orientation of the lattice arrangement changes between a uniform area and a uniform area with a different lattice arrangement. In other words, the CAAC-OS has a c-axis orientation and no clear orientation in the ab-plane direction. It is an oxide semiconductor that does not contain

[0303] Each of the plurality of crystalline regions is made up of one or more minute crystals (maximum diameter 10n If a crystalline region is made up of a single microcrystal, The maximum diameter of the crystalline region is less than 10 nm. When the crystallized region is formed, the size of the crystallized region may be approximately several tens of nanometers.

[0304] In-M-Zn oxide (where element M is aluminum, gallium, yttrium, or tin) In the case of titanium, CAAC-OS is one or more selected from the group consisting of indium and titanium. A layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the In layer) are A layered crystal structure (also called a layered structure) is formed by stacking a layer having the formula (hereinafter, the (M, Zn) layer) and a layer having the formula (hereinafter, the (M, Zn) layer). ) It should be noted that indium and element M can be substituted for each other. The (M,Zn) layer may contain indium. The In layer may contain the element M. The In layer may contain Zn. The layered structure may be, for example, It is observed as a lattice image in high-resolution TEM images.

[0305] For example, when the structure of the CAAC-OS film is analyzed using an XRD device, the θ / 2θ shift In the out-of-plane XRD measurement using a tuner, the peak indicating the c-axis orientation was = 31° or its vicinity. The position of the peak indicating the c-axis orientation (2θ value) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0306] In addition, for example, in the electron diffraction pattern of the CAAC-OS film, multiple bright spots (spots) ) is observed. Note that one spot and another spot are the result of the incident electron beam passing through the sample. The spot (also called the direct spot) is the center of symmetry, and the observed positions are point-symmetric. do.

[0307] When the crystalline region is observed from the specific direction, the lattice arrangement within the crystalline region is a hexagonal lattice. The unit cell is not necessarily a regular hexagon, but may be a non-regular hexagon. The above distortion may have a lattice arrangement such as a pentagon or heptagon. In the OS, clear grain boundaries were confirmed even near the strain. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the arrangement of oxygen atoms in the CAAC-OS is dense in the ab-plane direction. The substitution of metal atoms causes changes in the bond distance between atoms, resulting in distortion. This is thought to be because it can tolerate the

[0308] The crystal structure in which clear grain boundaries are observed is called polycrystalline. The grain boundaries act as recombination centers, trapping carriers and forming transistor on-states. Therefore, it is highly likely that this will cause a decrease in the on-state current and a decrease in the field-effect mobility. CAAC-OS, which has no visible grain boundaries, has a crystal structure suitable for the semiconductor layer of a transistor. It is one of the crystalline oxides that can be used to form CAAC-OS. For example, In-Zn oxide and In-Ga-Zn oxide are preferable. This is preferable because it can suppress the occurrence of grain boundaries more effectively than the material.

[0309] The CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to the decrease in electron mobility caused by the grain boundaries. In addition, the crystallinity of oxide semiconductors is reduced by the incorporation of impurities and the generation of defects. Therefore, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of oxide semiconductors containing CAAC-OS are stable. Therefore, oxide semiconductors having CAAC-OS are heat-resistant and highly reliable. CAAC-OS is stable even under high temperatures (so-called thermal budget) in the manufacturing process. Therefore, using a CAAC-OS for an OS transistor allows for greater flexibility in the manufacturing process. It is possible to widen the range.

[0310] [nc-OS] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 3 nm). In other words, nc-OS has a periodic atomic arrangement in the region of microscopic The size of the minute crystals is, for example, 1 nm or more and 10 nm or less. In particular, since the size of these tiny crystals is between 1 nm and 3 nm, they are also called nanocrystals. In nc-OS, there is no regularity in the crystal orientation between different nanocrystals. Therefore, depending on the analytical method, nc-OS may be classified as a-like In some cases, it is difficult to distinguish between an OS film and an amorphous oxide semiconductor. When the structure was analyzed using an XRD device, the out-of-p In lane XRD measurement, no peaks indicating crystallinity were detected. In contrast, electron beams with a probe diameter larger than that of nanocrystals (e.g., 50 nm or larger) are used. When electron diffraction (also called selected area electron diffraction) is performed, a diffraction pattern like a halo pattern is obtained. On the other hand, for the nc-OS film, the size of the nanocrystals is close to or smaller than that of the nanocrystals. Electron beam diffraction (nanobeam) using an electron beam with a small probe diameter (for example, 1 nm to 30 nm) When electron diffraction is performed, a ring-shaped area around the direct spot is detected. In some cases, an electron diffraction pattern is obtained in which multiple spots are observed.

[0311] [a-like OS] The a-like OS is an oxide semiconductor with a structure between the nc-OS and amorphous oxide semiconductor. Conductive. A-like OS has voids or low density regions. The OS has lower crystallinity than the nc-OS and CAAC-OS. The OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0312] <<Oxide semiconductor structure>> Next, the details of the CAC-OS will be explained. Regarding.

[0313] [CAC-OS] CAC-OS is, for example, a metal oxide in which the elements constituting the metal oxide are 0.5 nm or more and 10 nm or less. Preferably, a material unevenly distributed in a size of 1 nm or more and 3 nm or less, or in the vicinity thereof. In the following, it is assumed that one or more metal elements are unevenly distributed in a metal oxide, and the The region having the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A state where the mixture is at or near this size is also called a mosaic or patch state.

[0314] Furthermore, CAC-OS is a mosaic structure in which the material is separated into a first region and a second region. The first region is in a cloud-like shape, and the first region is distributed throughout the film (hereinafter also referred to as a cloud-like shape). In other words, the CAC-OS is a mixture of the first and second regions. It is a composite metal oxide having the following structure.

[0315] Here, the ratio of In to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide is The atomic ratios of In, Ga, and Zn are expressed as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is In this region, [In] is larger than [In] in the composition of the CAC-OS film. The second region is where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region has [In] higher than the [In] in the second region. The first region is larger than the second region, and [Ga] is smaller than [Ga] in the first region. In the second region, [Ga] is larger than [Ga] in the first region, and [In ] is a region smaller than [In] in the first region.

[0316] Specifically, the first region is mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region in which the gallium oxide, gallium zinc oxide, etc. In other words, the first region is called a region where In is the main component. The second region can be rephrased as a region containing Ga as the main component. This can be done.

[0317] It should be noted that there are cases where a clear boundary between the first region and the second region cannot be observed.

[0318] For example, in the case of CAC-OS, an In-Ga-Zn oxide, energy dispersive X-ray spectroscopy Law(EDX:Energy Dispersive X-ray spectrosco The EDX mapping obtained using the py) identified the region containing In as the main component (first region ) and a region (second region) mainly composed of Ga are unevenly distributed and mixed. It can be confirmed that:

[0319] When CAC-OS is used in a transistor, the conductivity due to the first region and the conductivity due to the second region are The insulating properties caused by the above work complementary to each other, resulting in a switching function (On / Off). In other words, CAC-OS is , a part of the material has a conductive function and a part of the material has an insulating function, and the whole of the material has a The material functions as a semiconductor. By separating the conductive function from the insulating function, Therefore, when using CAC-OS in transistors, This allows for a high on-state current (I on ), high field-effect mobility (μ), and good switching This allows for realizing a locking operation.

[0320] Oxide semiconductors have a variety of structures, each of which has different characteristics. Oxide semiconductors include amorphous oxide semiconductors, polycrystalline oxide semiconductors, a-like OS, and CA Two or more of C-OS, nc-OS, and CAAC-OS may be included.

[0321] <Transistors containing oxide semiconductors> Next, a case where the oxide semiconductor is used in a transistor will be described.

[0322] By using the oxide semiconductor in a transistor, a transistor with high field-effect mobility can be realized. Furthermore, a highly reliable transistor can be realized.

[0323] It is preferable to use an oxide semiconductor with a low carrier concentration for the transistor. The carrier concentration of oxide semiconductors is 1×10 17 cm -3 Less than 1 × 10 15 cm -3or less, more preferably 1 × 10 13 cm -3 Less than or equal to 1×10 11 c m -3 or less, more preferably 1 × 10 10 cm -3 Less than 1 x 10 -9 cm -3 In addition, when the carrier concentration of the oxide semiconductor film is reduced, the oxide semiconductor This can be achieved by lowering the impurity concentration in the conductor film and lowering the defect level density. A low impurity concentration and a low defect level density are called high purity intrinsic or substantially high purity intrinsic. Note that the oxide semiconductor having a low carrier concentration may be a highly purified intrinsic or substantially highly purified intrinsic oxide. They are sometimes called solid semiconductors.

[0324] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may also be low.

[0325] In addition, it takes a long time for the charges trapped in the trap levels of the oxide semiconductor to disappear. Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. There are cases where this happens.

[0326] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor is In order to reduce the impurity concentration in the oxide semiconductor, It is also preferable to reduce the impurity concentration in the film in contact with the film. Potassium metal, alkaline earth metal, iron, nickel, silicon, etc.

[0327] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0328] When an oxide semiconductor contains silicon or carbon, which is one of the group 14 elements, it becomes an oxide. Defect levels are formed in the oxide semiconductor. The concentration of silicon and carbon near the interface with the oxide semiconductor (secondary ion Secondary Ion Mass Spectrometer (SIMS) The concentration obtained by 18 atoms / cm 3 Below, preferably 2x 10 17 atoms / cm 3 The following applies.

[0329] In addition, when an alkali metal or an alkaline earth metal is contained in an oxide semiconductor, a defect level is formed. Therefore, alkali metals or alkaline earth metals are not included. A transistor using an oxide semiconductor that has been used in the past tends to be normally on. Therefore, the concentration of alkali metals or alkaline earth metals in the oxide semiconductor obtained by SIMS , 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0330] In addition, when nitrogen is contained in an oxide semiconductor, electrons that act as carriers are generated, and the carriers As a result, the concentration of nitrogen in the oxide semiconductor increases, making it easier to convert it into an n-type semiconductor. The transistor using the oxide semiconductor is likely to be normally on. If nitrogen is contained, trap levels may be formed. The electrical properties may become unstable. The nitrogen concentration is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atom s / cm 3 Less than or equal to 1×10 18 atoms / cm 3 The following is more preferably is 5 x 10 17 atoms / cm 3 Do the following:

[0331] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the electrons acting as carriers are released. In addition, some of the hydrogen may combine with the oxygen that is bonded to the metal atom, forming a carrier. Therefore, it is necessary to use an oxide semiconductor containing hydrogen. Therefore, hydrogen in the oxide semiconductor It is preferable that the SIM is reduced as much as possible. The hydrogen concentration obtained by S is 1×10 20 atoms / cm 3 Less than 1x1 0 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than, More preferably, 1 × 10 18 atoms / cm 3 Make it less than.

[0332] To use an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor This allows stable electrical properties to be imparted.

[0333] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. .

[0334] (Embodiment 6) In this embodiment mode, a semiconductor wafer on which the semiconductor device or the like shown in the above embodiment mode is formed, An example of an electronic component incorporating the semiconductor device is also shown.

[0335] <Semiconductor wafer> First, an example of a semiconductor wafer on which a semiconductor device or the like is formed will be described with reference to FIG. 19A. .

[0336] The semiconductor wafer 4800 shown in FIG. 19A includes a wafer 4801 and a substrate 4802 provided on the upper surface of the wafer 4801. The wafer 4801 has a plurality of circuit portions 4802. The portion without the path portion 4802 is a spacing 4803, which is an area for dicing.

[0337] The semiconductor wafer 4800 has a plurality of circuit parts formed on the surface of the wafer 4801 by a previous process. After that, the wafer 4801 can be fabricated by forming a plurality of layers. The surface opposite to the surface on which the circuit portion 4802 is formed is ground to thin the wafer 4801. This process reduces warpage of the wafer 4801 and allows for miniaturization of the components. It is possible.

[0338] The next step is the dicing process. Scribe line SCL1 and scribe line SCL2 (dicing line, or cutting line) The spacing 4803 is the same as the dicing To facilitate the process, multiple scribe lines SCL1 are arranged in parallel. The scribe lines SCL2 are arranged parallel to the scribe lines SCL1 and SCL2. It is preferable that the scribe line SCL2 be provided vertically.

[0339] By performing a dicing process, chips 4800a as shown in FIG. 19B are obtained as semiconductor wafers. The chip 4800a can be cut out from the wafer 4800. The path portion 4802 and the spacing 4803a are included. In this case, it is preferable to make the distance between the adjacent circuit portions 4802 as small as possible. The width of the spacing 4803 is the width of the cutting allowance of the scribe line SCL1 or the width of the scribe line SCL2. It is sufficient if the length is approximately the same as the cutting allowance of the brine SCL2.

[0340] The shape of the element substrate according to one embodiment of the present invention is the same as that of the semiconductor wafer 4800 shown in FIG. 19A. The shape of the element substrate is not limited to a specific one. For example, the element substrate may be a rectangular semiconductor wafer. can be appropriately changed depending on the device manufacturing process and the device manufacturing apparatus. Cut.

[0341] <Electronic components> FIG. 19C shows electronic component 4700 and a substrate on which electronic component 4700 is mounted (mounting substrate 470 19C shows a perspective view of the electronic component 4700 shown in FIG. The chip 4800a includes a memory device according to one embodiment of the present invention. can be used.

[0342] FIG. 19C is partially cut away to show the inside of electronic component 4700. 00 has lands 4712 on the outside of the mold 4711. The lands 4712 are electrode pads. The electrode pad 4713 is electrically connected to the chip 4800a and the wire 471 4. The electronic component 4700 is electrically connected to a printed circuit board 4702, for example. A number of such electronic components are combined and mounted on a printed circuit board 47. By electrically connecting them on 02, the mounting board 4704 is completed.

[0343] 19D shows a perspective view of the electronic component 4730. The electronic component 4730 is a SiP (System in Package) m in package) or MCM (Multi Chip Module) The electronic component 4730 is an example of an interconnection on a package substrate 4732 (printed circuit board). An interposer 4731 is provided, and a semiconductor device 4735 and a plurality of A number of semiconductor devices 4710 are provided.

[0344] The semiconductor device 4710 may be, for example, a chip 4800a, a semiconductor device described in the above embodiment, or the like. Semiconductor devices, High Bandwidth Memory (HBM), etc. The semiconductor device 4735 can be a CPU, a GPU, an FPGA, a memory device, or the like. An integrated circuit (semiconductor device) such as a semiconductor device can be used.

[0345] The package substrate 4732 is a ceramic substrate, a plastic substrate, or a glass epoxy. The interposer 4731 can be a silicon interposer, A resin interposer or the like can be used.

[0346] The interposer 4731 has multiple wirings and connects multiple integrated circuits with different terminal pitches. The wiring has a function of electrically connecting the wiring. The wiring is provided in a single layer or in multiple layers. The interposer 4731 is a package substrate that supports an integrated circuit mounted on the interposer 4731. It has the function of electrically connecting to the electrode provided on the plate 4732. The interposer is sometimes called a "rewiring board" or "intermediate board." A through electrode is provided in the substrate 4731, and the through electrode is used to connect the integrated circuit to the package substrate 473. 2 may be electrically connected. In addition, in silicon interposers, , TSV (Through Silicon Via) can also be used.

[0347] It is preferable to use a silicon interposer as the interposer 4731. Since an interposer does not require active elements, it can be manufactured at a lower cost than an integrated circuit. On the other hand, the wiring of the silicon interposer is formed by the semiconductor process. This makes it easy to form fine wiring, which is difficult to do with resin interposers.

[0348] In HBM, many wires must be connected to achieve a wide memory bandwidth. Therefore, the interposer that mounts HBM requires fine and high-density wiring. Therefore, a silicon interposer should be used for implementing HBM. is preferred.

[0349] In addition, SiP and MCM using silicon interposers are used to connect the integrated circuit and the interface. The reliability is less likely to decrease due to the difference in the expansion coefficient between the silicon interposers. The silicon interposer has a high level of surface flatness, allowing for easy contact between the integrated circuit and the silicon In particular, when multiple integrated circuits are mounted on an interposer, poor connection between the In a 2.5D package (2.5-dimensional mounting), silicon interposers are used to mount the devices side by side. It is preferable to use a laser.

[0350] A heat sink (heat dissipation plate) may be provided on top of the electronic component 4730. When providing an integrated circuit on the interposer 4731, it is preferable to align the height of the integrated circuit provided on the interposer 4731. For example, in the electronic component 4730 shown in this embodiment, the semiconductor device 4710 and the semiconductor It is preferable to align the height of the devices 4735 .

[0351] In order to mount the electronic component 4730 on another substrate, electrodes 47 are attached to the bottom of the package substrate 4732. 19D shows an example in which the electrode 4733 is formed by a solder ball. By providing solder balls in a matrix on the bottom of the package substrate 4732, a BGA (Ball Grid Array) mounting can be realized. The bottom of the package substrate 4732 may be provided with conductive pins in a matrix. By providing this, PGA (Pin Grid Array) mounting can be achieved.

[0352] Electronic component 4730 is not limited to BGA and PGA, but can be mounted on other boards using various mounting methods. For example, SPGA (Staggered Pin Grid Arrangement) ray), LGA (Land Grid Array), QFP (Quad Flat Package), QFJ(Quad Flat J-leaded package) , or QFN (Quad Flat Non-leaded package) The implementation method can be used.

[0353] This embodiment mode can be appropriately combined with other embodiment modes described in this specification.

[0354] (Embodiment 7) In this embodiment, application examples of a semiconductor device according to one embodiment of the present invention will be described.

[0355] The semiconductor device according to one embodiment of the present invention can be used in, for example, various electronic devices (for example, information terminals, computers, etc.). computers, smartphones, e-book readers, digital still cameras, video cameras, recording and playback devices It can be applied to storage devices for devices such as video equipment, navigation systems, and game consoles. Used in image sensors, IoT (Internet of Things), healthcare, etc. In this case, the computer can be a tablet computer, a laptop, or a In addition to laptop and desktop computers, there are also server systems. This includes large computers.

[0356] An example of an electronic device including a semiconductor device according to one embodiment of the present invention will be described. 20A to 20J and 21A to 21E show an electronic component 470 having the semiconductor device. 0 or electronic component 4730 is included in each electronic device.

[0357] [mobile phone] The information terminal 5500 shown in FIG. 20A is a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 includes a housing 5510 and a display unit 5511. As a user interface, a touch panel is provided on the display unit 5511, and buttons are provided on the housing 5512. It is provided in 510.

[0358] The information terminal 5500 can be used for various applications by applying a semiconductor device according to one embodiment of the present invention. Temporary files generated when running applications (for example, cache files when using a web browser) It can hold a variety of items, such as a wallet, wallet card, or wallet.

[0359] [Wearable devices] FIG. 20B illustrates an information terminal 5900, which is an example of a wearable terminal. The information terminal 5900 includes a housing 5901, a display unit 5902, an operation switch 5903, an operation switch 5904, an operation switch 5905, an operation switch 5906, an operation switch 5907, an operation switch 5908, an operation switch 5909, an operation switch 5910, an operation switch 5911, an operation switch 5912, an operation switch 5913, an operation It has a switch 5904, a band 5905, etc.

[0360] The wearable terminal, like the information terminal 5500 described above, is a semiconductor device according to one embodiment of the present invention. By applying the device, temporary files generated during application execution are saved. It is possible.

[0361] [Information terminal] Also shown in Figure 20C is a desktop information terminal 5300. The information terminal 5300 includes a main body 5301 of the information terminal, a display unit 5302, and a keyboard 53 03 and has.

[0362] The desktop information terminal 5300 is an embodiment of the present invention, similar to the information terminal 5500 described above. By applying the semiconductor device related to the above, temporary data generated during application execution can be You can keep the file.

[0363] In the above, the electronic devices include smartphones, wearable devices, and desktop information devices. 20A to 20C are examples of information terminals, but smartphones, It is possible to apply information terminals other than wearable terminals and desktop information terminals. Information terminals other than smartphones, wearable terminals, and desktop information terminals include, for example, For example, PDA (Personal Digital Assistant), notebook information Examples include terminals and workstations.

[0364] [electric appliances] FIG. 20D also illustrates an electric refrigerator-freezer 5800 as an example of an electrical appliance. The electric refrigerator-freezer 5800 includes a housing 5801, a refrigerator door 5802, a freezer door 5803, etc. For example, the electric refrigerator-freezer 5800 is equipped with IoT (Internet of Things) This is an electric refrigerator-freezer that is compatible with ings.

[0365] The semiconductor device according to one embodiment of the present invention can be applied to the electric refrigerator-freezer 5800. Electric refrigerator-freezer 5800 is a refrigerator-freezer that can be used to store food and drink. Information such as expiry dates can be sent and received to information terminals via the Internet, etc. The electric refrigerator-freezer 5800 stores the temporary file generated when transmitting the information. can be held in the semiconductor device.

[0366] In this example, an electric refrigerator-freezer was described as an electrical appliance, but other electrical appliances may also be used. For example, vacuum cleaners, microwave ovens, electric ovens, rice cookers, water boilers, induction cookers, Water server, heating and cooling appliances including air conditioner, washing machine, dryer, Examples include audiovisual equipment.

[0367] [Game consoles] FIG. 20E also shows a portable game machine 5200, which is an example of a game machine. The portable game machine 5200 includes a housing 5201, a display portion 5202, buttons 5203, and the like.

[0368] Furthermore, FIG. 20F illustrates a stationary game machine 7500, which is an example of a game machine. The stationary game console 7500 includes a main unit 7520 and a controller 7522. The main body 7520 can be connected to a controller 7522 by wireless or wired means. Although not shown in FIG. 20F, the controller 7522 can also display game images. A display that displays the image, a touch panel that serves as an input interface other than buttons, and a stick , a rotary knob, a sliding knob, etc. 22 is not limited to the shape shown in FIG. 20F, and may be changed to any shape depending on the genre of the game. The shape of 522 may be changed in various ways. For example, FPS (First Person Shooting) In shooting games such as "Shooter," the trigger is a button and the shape is like a gun. In addition, for example, in a music game, a controller with a musical instrument, a sound, etc. can be used. Controllers shaped like musical instruments can be used. The drone does not use a controller, but instead is equipped with a camera, depth sensor, microphone, etc. as a form of control by the game player's gestures and / or voice Good too.

[0369] In addition, the images of the above-mentioned game machines can be displayed on television sets, personal computer displays, etc. Display devices such as play, game displays, and head-mounted displays It can be output.

[0370] The portable game machine 5200 or the stationary game machine 7500 is provided with the semiconductor device described in the above embodiment. By applying the semiconductor device, a low-power portable game machine 5200 or a low-power In addition, the low power consumption allows the circuit This reduces the heat generated by the circuit itself, peripheral circuits, and This can reduce the impact on the module.

[0371] Furthermore, the portable game machine 5200 or the stationary game machine 7500 may be By applying this semiconductor device, temporary flash memory required for calculations that occur during game execution can be It is possible to store files, etc.

[0372] As an example of a game machine, a portable game machine is shown in FIG. 20E. Also, a home-use stationary game machine is shown in FIG. 20F. Note that the electronic device of one embodiment of the present invention is not limited to this. As one aspect of the electronic device, for example, a device installed in an entertainment facility (game center, amusement park, etc.) arcade game machines, and batting practice pitching machines installed in sports facilities. Examples include:

[0373] [Moving object] The semiconductor device described in the above embodiment is applicable to automobiles, which are moving objects, and the area around the driver's seat of an automobile. Can be applied to edges.

[0374] FIG. 20G illustrates an automobile 5700 as an example of a moving object.

[0375] The driver's seat of the 5700 car is equipped with a speedometer, tachometer, odometer, and fuel gauge. It provides various information by displaying the gear status, air conditioning settings, etc. In addition, a display device showing this information is installed around the driver's seat. It may be provided.

[0376] In particular, the display device receives an image from an imaging device (not shown) installed in the automobile 5700. By projecting an image, it is possible to compensate for the visibility obstructed by pillars, blind spots in the driver's seat, etc. That is, the image pickup device provided on the outside of the automobile 5700 can By displaying images from the device, blind spots can be filled in and safety can be improved.

[0377] The semiconductor device described in the above embodiment can temporarily store data. For example, the computer may be used as an automatic driving system for an automobile 5700, Used to store necessary temporary information in systems that provide route guidance, hazard prediction, etc. The display device can be configured to display temporary information such as road guidance and hazard prediction. In addition, the video of the driving recorder installed in the automobile 5700 may be recorded. It may be configured to hold the same.

[0378] In the above description, an automobile is used as an example of a moving body. For example, the moving object may be a train, a monorail, a ship, or an aircraft (helicopter). , unmanned aerial vehicles (drones), airplanes, and rockets).

[0379] [camera] The semiconductor device described in the above embodiment can be applied to a camera.

[0380] FIG. 20H shows a digital camera 6240, which is an example of an imaging device. The camera 6240 includes a housing 6241, a display unit 6242, an operation switch 6243, a shutter, and a The digital camera 6240 has a detachable lens 62 46 is attached. In this example, the digital camera 6240 is attached to the lens 6246. The lens 6246 and the housing 6241 can be removed and replaced. The digital camera 6240 may be integrated with the body 6241. A configuration may be adopted in which a camera, a viewfinder, etc. can be separately attached.

[0381] By applying the semiconductor device described in the above embodiment to the digital camera 6240, This makes it possible to realize a low-power digital camera 6240. This reduces heat generated by the circuit, preventing damage to the circuit itself, peripheral circuits, and And the impact on the module can be reduced.

[0382] [Video camera] The semiconductor device described in the above embodiment can be applied to a video camera.

[0383] FIG. 20I shows a video camera 6300, which is an example of an imaging device. The camera 6300 includes a first housing 6301, a second housing 6302, a display unit 6303, and an operation switch. 6304, a lens 6305, a connection part 6306, etc. The lens 6305 is provided in the first housing 6301, and the display unit 6303 is provided in the second housing 6302. The first housing 6301 and the second housing 6302 are connected by a connection portion 6306. The angle between the first housing 6301 and the second housing 6302 is The image on the display unit 6303 can be changed by the connection unit 6306. It may be configured to switch according to the angle between the first housing 6301 and the second housing 6302. .

[0384] When recording video taken with the 6300 video camera, the encoding is performed according to the data recording format. By using the semiconductor device described above, the video camera 630 0 allows you to store temporary files generated during encoding.

[0385] [ICD] The semiconductor device described in the above embodiment can be applied to an implantable cardioverter defibrillator (ICD). can be done.

[0386] 20J is a cross-sectional view showing an example of an ICD. The ICD main body 5400 includes a battery. 5401, an electronic component 4700, a regulator, a control circuit, an antenna 5404, It has at least a wire 5402 to the right atrium and a wire 5403 to the right ventricle.

[0387] The ICD body 5400 is placed in the body by surgery, and two wires are inserted into the subclavian vein 5 405 and the superior vena cava 5406, one wire tip is inserted into the right ventricle, and the other wire The tip of the catheter should be placed in the right atrium.

[0388] The ICD main body 5400 has a function as a pacemaker and detects when the heart rate is out of the specified range. If the heart rate does not improve with pacing, In some cases (such as rapid ventricular tachycardia or ventricular fibrillation), treatment is with an electric shock.

[0389] The ICD 5400 constantly monitors the heart rate to ensure proper pacing and shock delivery. Therefore, the ICD main body 5400 has a sensor for detecting the heart rate. The ICD main body 5400 also stores the heart rate data acquired by the sensor. The electronic component 4700 can store the data, the number of times pacing therapy was performed, and the time. can.

[0390] In addition, the antenna 5404 can receive power, which is then used to charge the battery 5401. In addition, the ICD main unit 5400 has multiple batteries, which increases safety. Specifically, if some of the batteries in the ICD unit 5400 become unusable, Even if the battery is depleted, the remaining battery can still function, so it can also function as an auxiliary power source.

[0391] In addition to the antenna 5404 that can receive power, an antenna that can transmit physiological signals is provided. For example, physiological signals such as pulse, respiratory rate, heart rate, and body temperature may be monitored by an external monitor. The system may be configured to monitor cardiac activity such that it can be seen at the device.

[0392] [PC expansion device] The semiconductor device described in the above embodiment is a PC (Personal Computer). The present invention can be applied to expansion devices for computers and information terminals such as the above.

[0393] FIG. 21A shows a portable chip that can store information as an example of the expansion device. The figure shows an expansion device 6100 that is externally connected to a PC and has a built-in expansion card. The 6100 can be connected to a PC via, for example, USB (Universal Serial Bus). By connecting to the chip, information can be stored. Although the expansion device 6100 is shown in a portable form, it is not limited to the embodiment of the present invention. The expansion device is not limited to this, and may be, for example, a relatively large device equipped with a cooling fan. It may also be an expansion device in a different form.

[0394] The expansion device 6100 includes a housing 6101, a cap 6102, a USB connector 6103, and The substrate 6104 is housed in a housing 6101. The circuit 04 is provided with a circuit for driving the semiconductor device or the like described in the above embodiment mode. For example, the electronic component 4700 and the controller chip 6106 are mounted on the substrate 6104. The USB connector 6103 is an interface for connecting to an external device. It functions as such.

[0395] [SD card] The semiconductor device described in the above embodiment is applicable to electronic devices such as information terminals and digital cameras. It can be applied to SD cards that can be attached to the

[0396] FIG. 21B is a schematic diagram of the external appearance of an SD card, and FIG. 21C is a schematic diagram of the internal structure of an SD card. The SD card 5110 includes a housing 5111, a connector 5112, and a board 5113. A connector 5112 functions as an interface for connecting to an external device. The substrate 5113 is housed in a housing 5111. The substrate 5113 includes a semiconductor device and For example, the substrate 5113 is provided with four electronic components. 700 and a controller chip 5115 are attached. The circuit configuration of the controller chip 5115 is not limited to the above description, and may vary depending on the situation. For example, the circuit configuration may be changed as needed. The circuit, row driver, readout circuit, etc. are not electronic components 4700, but controller chip It may also be configured to be incorporated into 5115.

[0397] By providing electronic components 4700 on the back side of the substrate 5113, the capacity of the SD card 5110 can be increased. In addition, a wireless chip having a wireless communication function is provided on the substrate 5113. This allows wireless communication between the external device and the SD card 5110. This makes it possible to read and write data from and to the electronic component 4700.

[0398] [SSD] The semiconductor device described in the above embodiment is a semiconductor device that can be attached to an electronic device such as an information terminal. This can be applied to D (Solid State Drive).

[0399] FIG. 21D is a schematic diagram of the external appearance of an SSD, and FIG. 21E is a schematic diagram of the internal structure of an SSD. The SSD 5150 includes a housing 5151, a connector 5152, and a board 5153. The connector 5152 functions as an interface for connecting to an external device. 53 is housed in a housing 5151. The substrate 5153 has a semiconductor device and a semiconductor device For example, the board 5153 is provided with an electronic component 4700, a memory The board 5153 is equipped with a chip 5155 and a controller chip 5156. By installing electronic component 4700 on the back side, the capacity of the SSD5150 can be increased. The memory chip 5155 has a built-in working memory. The controller chip 5156 may be a DRAM chip. The processor, ECC circuit, etc. are built in. The circuit configurations of the 5155 and the controller chip 5115 are not limited to those described above. The circuit configuration may be changed as appropriate depending on the situation. The memory 156 may also be provided with a memory that functions as a work memory.

[0400] [Calculator] The computer 5600 shown in FIG. 22A is an example of a large computer. A plurality of rack-mounted computers 5620 are stored in a rack 5610.

[0401] The computer 5620 can have, for example, the configuration shown in the perspective view of FIG. In the above, the computer 5620 has a motherboard 5630, and the motherboard 5630 It has a plurality of slots 5631 and a plurality of connection terminals. In addition, the PC card 5621 is connected to the connector 5623 and the connector 5624 and a connection terminal 5625, which are connected to a motherboard 5630. .

[0402] The PC card 5621 shown in FIG. 22C is a processing board equipped with a CPU, a GPU, a semiconductor device, etc. The PC card 5621 has a board 5622. 22 is a connection terminal 5623, a connection terminal 5624, a connection terminal 5625, and a semiconductor device 5 626, a semiconductor device 5627, a semiconductor device 5628, and a connection terminal 5629. 22C shows a semiconductor device 5626, a semiconductor device 5627, and a semiconductor device Although semiconductor devices other than 5628 are shown, those semiconductor devices are described below. Please refer to the description of the semiconductor device 5626, the semiconductor device 5627, and the semiconductor device 5628. Just pour some drinks.

[0403] The connection terminal 5629 is shaped so that it can be inserted into the slot 5631 of the motherboard 5630. The connection terminal 5629 connects the PC card 5621 to the motherboard 5630. It functions as an interface for connecting the 5629 connector. For example, PCIe is one example.

[0404] The connection terminals 5623, 5624, and 5625 are, for example, the PC card 562 1, it can be used as an interface for supplying power, inputting signals, etc. In addition, for example, the interface for outputting signals calculated by the PC card 5621 is The connection terminal 5623, the connection terminal 5624, the connection terminal 56 The 25 standards include, for example, USB (Universal Serial Bus), SATA (Serial ATA), SCSI (Small Compute r System Interface). Also, connection terminal 5623, When outputting video signals from connection terminals 5624 and 5625, the respective standards are Examples of such standards include HDMI (registered trademark).

[0405] The semiconductor device 5626 has a terminal (not shown) for inputting and outputting signals. By inserting the terminal into a socket (not shown) provided on the board 5622, The device 5626 and the board 5622 can be electrically connected.

[0406] The semiconductor device 5627 has a plurality of terminals, and the terminals are connected to the wiring board 5622. For example, by performing reflow soldering on the wire, the semiconductor device 5627 and the board are connected. The semiconductor device 5627 can be, for example, FPGA (Field Programmable Gate Array), GPU, The semiconductor device 5627 may include, for example, an electronic component 4730. It is possible.

[0407] The semiconductor device 5628 has a plurality of terminals, and the terminals are connected to the wiring board 5622. The semiconductor device 5628 and the board are connected by, for example, reflow soldering the wires. The semiconductor device 5628 can be, for example, As the semiconductor device 5628, for example, the electronic component 4700 It can be used.

[0408] The computer 5600 can also function as a parallel computer. This makes it possible to perform the large-scale calculations required for, for example, artificial intelligence learning and inference. Cut.

[0409] By using the semiconductor device of one embodiment of the present invention in the various electronic devices described above, The semiconductor device according to one embodiment of the present invention can be made smaller, faster, or consumes less power. The semiconductor device has low power consumption, which reduces heat generation from the circuit. This reduces the adverse effects of heat generation on the circuit itself, peripheral circuits, and modules. Furthermore, by using the semiconductor device of one embodiment of the present invention, the operation can be stabilized even in a high-temperature environment. Therefore, the reliability of the electronic device can be improved.

[0410] This embodiment mode can be appropriately combined with other embodiment modes described in this specification. [Example]

[0411] The operation of the semiconductor device 100 shown in FIG. 1A was verified using a circuit simulator. The data used was SmartSpice from Silvaco.

[0412] As a verification condition, the channel length and The OS transistors are assumed to have a channel width of 60 nm. The transistor Tr22 is a Si transistor with a channel length and width of 1 μm. The capacitance values ​​of the capacitors Cb1 and Cb2 are assumed to be 1 pF. In addition, VSS was set to 0.0V and VDD to 6.0V.

[0413] Vin1 held at node SN1 is set to five levels (0.9V, 1.1V, 1.3V, 1.5V , 1.7V), Vref held at node SN2 is assumed to be at two levels (0.0V, 0.7V). The output voltage Vout for all combinations was calculated using a circuit simulator. Each of the five levels of 1 satisfies the formula 6 and formula 7 shown in the above embodiment.

[0414] The calculation results are shown in Figures 23A and 23B. The vertical axis of Figures 23A and 23B represents the output voltage V In this example, the horizontal axis indicates the time (Time). It is assumed that the write operation described in the above embodiment has been completed. The period T32 described in the above embodiment ends, and the nodes SN1 and SN2 The potential is maintained.

[0415] Figure 23A shows the output voltage Vout for each Vin1 level when Vref is 0.7V. FIG. 23B shows the output voltage Vout for each Vin1 level when Vref is 0.0V. are.

[0416] In the semiconductor device 100, VSS is supplied to the terminals PS1 and PS2 until time 0.5 μs. At 0.5 μs, the read operation begins. VDD is supplied to the slave PS1, and an output voltage Vout is supplied to the terminal OUT.

[0417] The source-drain voltage Vds_Tr12 of the transistor Tr12 after the start of the read operation The calculation results are shown in Figure 24. The potential of the node BN is VSS (0 .0V), so immediately after the potential of terminal PS1 changes from VSS to VDD (6.0V), In this case, Vds_Tr12 is approximately 6V.

[0418] Also, since Vin1 is equal to or higher than the threshold voltage of transistor Tr12, the voltage at terminal PS1 When the potential becomes VDD, current flows between the source and drain of transistor Tr12, and node B The potential of N rises. The current flowing between the source and drain of transistor Tr12 is The larger Vin1 is, the more the potential at node BN rises. That is, the larger Vin1 is, the smaller Vds_Tr12 is. If f is constant, the larger Vin1 is, the larger Vout is.

[0419] 23A and 23B show the output voltage Vout as explained in the above embodiment. It shows that a voltage corresponding to the formula 5 can be obtained. In this embodiment, the voltage not included in the formula 5 can be obtained. The Vin2 corresponds to Vref.

[0420] FIG. 25 is a graph showing the relationship between Vin1 and Vout calculated by a circuit simulator. In the figure, the circle ("○") indicates the relationship between Vin1 and Vout when Vref is 0.0V. The square ("□") indicates the relationship between Vin1 and Vout when Vref is 0.7V. There are.

[0421] In addition, approximate lines 851 and 852 are also shown in FIG. is the approximate straight line of the circle ("○") mentioned above, and when Vref is 0.0V, Vin1 and V The approximate line 852 is the approximate line of the square ("□") mentioned above. This line approximates the relationship between Vin1 and Vout when Vref is 0.7V. Coefficient of determination R of the quasi-linear line 851 2 (Contribution ratio) is 0.9966, and the determining factor of the approximate line 852 Number R 2 (contribution rate) was 0.9955. From this, when Vref is constant, Vin It can be seen that the output voltage Vout also changes in response to changes in 1.

[0422] By verification using a circuit simulator, the semiconductor device 100 according to one aspect of the present invention was found to have a Vr It was found that when ef is constant, the output voltage Vout also changes in response to changes in Vin1. Furthermore, the semiconductor device 100 according to one aspect of the present invention accurately converts the analog data it holds. I found that I could read it. [Explanation of symbols]

[0423] 100: semiconductor device, 110a: holding circuit, 110b: holding circuit, 120a: bootstrap Tr11: bootstrap circuit, 120b: bootstrap circuit, 130: source follower circuit : Transistor, Tr12: Transistor, Tr21: Transistor, Tr22: Transistor register, SN1: node, SN2: node, BN: node, Cb1: capacitance element, Cb2: Capacitance element, IN1: terminal, IN2: terminal, PS1: terminal, PS2: terminal, WW1: terminal, WW2:Terminal

Claims

1. The transistor includes first to fourth transistors, a first capacitance element, and a second capacitance element, one of the source and the drain of the first transistor is electrically connected to a first terminal; the other of the source and the drain of the first transistor is electrically connected to a first gate of the second transistor; a first gate of the first transistor electrically connected to a second terminal; one of the source and the drain of the third transistor is electrically connected to a third terminal; the other of the source and the drain of the third transistor is electrically connected to a first gate of the fourth transistor; a first gate of the third transistor electrically connected to a fourth terminal; one of the source and the drain of the second transistor is electrically connected to a fifth terminal; the other of the source and the drain of the second transistor is electrically connected to a seventh terminal; one of the source and the drain of the fourth transistor is electrically connected to a sixth terminal; the other of the source and the drain of the fourth transistor is electrically connected to the seventh terminal; a second gate of the first transistor electrically connected to an eighth terminal; a second gate of the second transistor electrically connected to a ninth terminal; a second gate of the third transistor electrically connected to a tenth terminal; a second gate of the fourth transistor electrically connected to an eleventh terminal; one electrode of the first capacitance element is electrically connected to a first gate of the second transistor; the other electrode of the first capacitance element is electrically connected to the seventh terminal, one electrode of the second capacitance element is electrically connected to a first gate of the fourth transistor; the other electrode of the second capacitance element is electrically connected to the seventh terminal.

2. In claim 1, The semiconductor device is configured such that analog data is supplied to the first terminal.

3. In claim 1 or claim 2, The first to fourth transistors are semiconductor devices each including an oxide semiconductor in a semiconductor layer in which a channel is formed.

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