Output circuit and integrated circuit

Abstract

To provide an output circuit and an integrated circuit capable of preventing an excessive output voltage from being supplied to a load when a feedback terminal is opened or short-circuited.SOLUTION: An output circuit according to an aspect of an embodiment includes a control unit. The control unit measures an on-time of a MOS transistor that controls an output voltage by being turned on or off according to a feedback voltage obtained from the output voltage. The control unit turns off a switch connected to the gate of the MOS transistor when the measured on-time becomes equal to or greater than a threshold.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] SUMMARY OF THE INVENTION The disclosed embodiments relate to output circuits and integrated circuits. [Background technology]

[0002] Conventionally, in a DC / DC converter, a MOS transistor is provided between an input side to which a voltage is input and an output side to which a voltage is output, and a technology has been proposed in which the output voltage is controlled by the MOS transistor (see, for example, Patent Document 1). Specifically, in the conventional technology, the output voltage is controlled by comparing a feedback voltage obtained by dividing the output voltage with a reference voltage, and adjusting the on-time of the MOS transistor according to the comparison result. In addition, in the conventional technology, a short circuit of the MOS transistor is detected. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2018-74762 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the prior art, if the feedback terminal to which the feedback voltage is input becomes open or shorted, an excessive output voltage may be supplied to the load, potentially affecting the load. Specifically, the MOS transistor is turned on to increase the output voltage when the feedback voltage is less than the reference voltage. If an open circuit or other problem occurs in the feedback terminal, no feedback voltage is obtained, resulting in a voltage of 0 (zero), which makes the feedback voltage less than the reference voltage and keeps the MOS transistor turned on. This causes the output voltage to continue to increase, potentially resulting in an excessive output voltage being supplied to the load, potentially affecting the load.

[0005] One aspect of the embodiment has been made in consideration of the above, and aims to provide an output circuit and an integrated circuit that can prevent an excessive output voltage from being supplied to a load when a feedback terminal is open or shorted. [Means for solving the problem]

[0006] In order to solve the above problems and achieve the object, an output circuit according to one aspect of the embodiment includes a control unit. The control unit measures an on-time of a MOS transistor that controls the output voltage by turning the transistor on or off in response to a feedback voltage obtained from the output voltage. When the measured on-time is equal to or greater than a threshold, the control unit turns off a switch connected to the gate of the MOS transistor. [Effects of the Invention]

[0007] In one aspect of the embodiment, the control unit turns off a switch connected to the gate of the MOS transistor when the measured on-time of the MOS transistor is equal to or greater than a threshold. This allows the MOS transistor to be turned off in a situation where the feedback terminal is open or shorted and there is a possibility that the MOS transistor will continue to be on because no feedback voltage is obtained. By turning off the MOS transistor, the output voltage decreases rather than increases, thereby preventing an excessive output voltage from being supplied to the load. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is an explanatory diagram showing an example of the configuration of an integrated circuit including an output circuit according to an embodiment. [Figure 2] FIG. 2 is a timing chart for explaining the process of turning off the switch by the counter circuit. [Figure 3] FIG. 3 is a flowchart illustrating an example of processing executed by the counter circuit of the output circuit according to the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments of an output circuit and an integrated circuit disclosed in the present application will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the embodiments described below.

[0010] An integrated circuit including an output circuit according to an embodiment will be described with reference to Fig. 1. Fig. 1 is an explanatory diagram showing an example of the configuration of an integrated circuit including an output circuit according to an embodiment.

[0011] As shown in Fig. 1, an integrated circuit 100 including an output circuit 10 is a power supply circuit and is mounted on a DC / DC converter 1. The DC / DC converter 1 steps down an input voltage Vin and supplies an output voltage Vout to a load 200. The DC / DC converter 1 is mounted on, for example, a vehicle, but is not limited to this. The load 200 is an electrical load that receives the output voltage Vout, and is, for example, an in-vehicle device such as an audio device or a car navigation system, but is not limited to this.

[0012] The DC / DC converter 1 includes an integrated circuit 100, a first MOS transistor 40, a second MOS transistor 50, a coil 60, a resistor 70, a capacitor 80, and a voltage divider circuit 90.

[0013] The first MOS transistor 40 and the second MOS transistor 50 are switching elements that are turned on or off in response to a control signal from the output circuit 10 of the integrated circuit 100. The first MOS transistor 40 and the second MOS transistor 50 are alternately turned on (conductive) in response to the control signal, thereby stepping down the input voltage Vin to the desired output voltage Vout and maintaining it at that level. Note that the first and second MOS transistors 40 and 50 may be, for example, P-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), but are not limited to this.

[0014] The first MOS transistor 40 has a gate 41 connected to the output circuit 10 (more precisely, a driver circuit 19, which will be described later). The source 42 of the first MOS transistor 40 is connected to an input terminal to which an input voltage Vin is input. The drain 43 of the first MOS transistor 40 is connected to the source 52 of the second MOS transistor 50, the coil 60, and the output circuit 10.

[0015] The second MOS transistor 50 has a gate 51 connected to the output circuit 10 (more precisely, the driver circuit 19). The source 52 of the second MOS transistor 50 is connected to the drain 43 of the first MOS transistor 40, the coil 60, and the output circuit 10. The drain 53 of the second MOS transistor 50 is connected to the ground potential.

[0016] The first MOS transistor 40 is a high-side MOS transistor, and the second MOS transistor 50 is a low-side MOS transistor. The first MOS transistor 40 is an example of a MOS transistor.

[0017] One end of the coil 60 is connected to the drain 43 of the first MOS transistor 40 and the source 52 of the second MOS transistor 50, and the other end is connected to the resistor 70. One end of the resistor 70 is connected to the coil 60, and the other end is connected to the load 200. The capacitor 80 is connected between the other end of the resistor 70 and the ground potential. The output voltage Vout output by control of the first MOS transistor 40 and the second MOS transistor 50 is smoothed by an LC filter formed by the coil 60 and the capacitor 80 and then output to the load 200.

[0018] The voltage-dividing circuit 90 is connected between the other end of the resistor 70 and the ground potential. The voltage-dividing circuit 90 includes voltage-dividing resistors 91 and 92 connected in series. The voltage-dividing circuit 90 divides the output voltage Vout using the voltage-dividing resistors 91 and 92, and feeds back the divided voltage as a feedback voltage to the output circuit 10 of the integrated circuit 100. Specifically, the feedback voltage from the voltage-dividing circuit 90 is input to a feedback terminal 100a of the integrated circuit 100.

[0019] The integrated circuit 100 (hereinafter may be referred to as IC (Integrated Circuit) 100) includes an output circuit 10. The output circuit 10 controls the first and second MOS transistors 40, 50 according to a feedback voltage obtained by voltage division and a current obtained by feeding back a current flowing through a coil 60. In other words, the output circuit 10 performs current mode control of the DC / DC converter 1.

[0020] The output circuit 10 includes an error amplifier 11, a reference voltage circuit 12, a PWM (Pulse Width Modulation) comparator 13, a current detection circuit 14, a slope compensation circuit 15, an adder 16, an oscillation circuit 17, a logic circuit 18, and a driver circuit 19.

[0021] The positive (+) input terminal of the error amplifier 11 is connected to the feedback terminal 100a and receives a feedback voltage. The negative (-) input terminal of the error amplifier 11 is connected to the reference voltage circuit 12 and receives a reference voltage. The output terminal of the error amplifier 11 is connected to the negative input terminal of the PWM comparator 13.

[0022] When the DC / DC converter 1 is started, the reference voltage circuit 12 is started by receiving an activation signal from the terminal 100b of the IC 100, and generates a reference voltage (reference voltage) to be compared with the feedback voltage. The reference voltage circuit 12 outputs the generated reference voltage to the error amplifier 11. The error amplifier 11 compares the feedback voltage with the reference voltage, and outputs a comparison result signal corresponding to the potential difference between the feedback voltage and the reference voltage to the PWM comparator 13.

[0023] The current detection circuit 14 detects the current flowing through the coil 60. The current detection circuit 14 converts the current flowing through the coil 60 into a voltage and outputs a signal corresponding to the converted voltage to the adder 16. The current detection circuit 14 also detects an overcurrent, which is an excessively large output current caused, for example, by a short circuit in the wiring connected to the load 200. Specifically, the current detection circuit 14 detects the potential difference across the resistor 70 and determines that an overcurrent has occurred when the potential difference exceeds a value indicating an overcurrent. When the current detection circuit 14 determines that an overcurrent has occurred, it outputs a signal to stop the IC 100, thereby stopping the IC 100 and protecting the output circuit 10, the first and second MOS transistors 40 and 50, etc.

[0024] The slope compensation circuit 15 performs slope compensation on the output of the current detection circuit 14 in order to suppress, for example, subharmonic oscillation. The slope compensation circuit 15 outputs a slope compensation signal to the adder 16.

[0025] The adder 16 is connected to the positive input terminal of the PWM comparator 13. The adder 16 adds the slope compensation signal to the signal corresponding to the voltage input from the current detection circuit 14 and outputs the result to the positive input terminal of the PWM comparator 13.

[0026] The output terminal of the PWM comparator 13 is connected to the logic circuit 18. The PWM comparator 13 compares a comparison result signal corresponding to the potential difference between the feedback voltage input from the error amplifier 11 and the reference voltage with the signal input from the adder 16, and outputs a signal indicating the comparison result to the logic circuit 18.

[0027] The oscillator circuit 17 generates a clock signal having a frequency corresponding to the switching frequency of the DC / DC converter 1 in response to the clock signal input from the external synchronization terminal 100c, and outputs the clock signal to the logic circuit .

[0028] The logic circuit 18 determines the timings for turning on and off (on and off cycles) of the first and second MOS transistors 40, 50 in accordance with the clock signal from the oscillation circuit 17 and a signal indicating the comparison result from the PWM comparator 13. The logic circuit 18 outputs a signal indicating the determined on and off timings of the first and second MOS transistors 40, 50 to the driver circuit 19.

[0029] The driver circuit 19 outputs a control signal to the first and second MOS transistors 40, 50 in response to a signal indicating the on / off timing input from the logic circuit 18, thereby turning the first and second MOS transistors 40, 50 on or off. Specifically, the driver circuit 19 outputs a control signal to the gate 41 of the first MOS transistor 40 at the timing to turn on the first MOS transistor 40, thereby turning on the first MOS transistor 40. The driver circuit 19 also outputs a control signal to the gate 51 of the second MOS transistor 50 at the timing to turn on the second MOS transistor 50, thereby turning on the second MOS transistor 50. As a result, the first and second MOS transistors 40, 50 are alternately turned on.

[0030] The output circuit 10 configured as described above can increase the output voltage Vout by turning on the first MOS transistor 40 and turning off the second MOS transistor 50, for example, when the feedback voltage is lower than the reference voltage. Furthermore, the output circuit 10 can decrease the output voltage Vout by turning off the first MOS transistor 40 and turning on the second MOS transistor 50, for example, when the feedback voltage is higher than the reference voltage. This makes it possible to control the output voltage Vout to a desired voltage. In this way, the first MOS transistor 40 controls the output voltage Vout by turning on or off in accordance with the feedback voltage obtained from the output voltage Vout.

[0031] The output circuit 10 according to this embodiment is configured to prevent an excessive output voltage Vout from being supplied to the load 200 when the feedback terminal 100a is open or shorted to ground. Note that the above-described case where the feedback terminal 100a is open or shorted may also include a case where the wiring connecting the feedback terminal 100a and the voltage divider circuit 90 is open or shorted.

[0032] More specifically, the output circuit 10 according to this embodiment further includes a switch 20 and a counter circuit 30. The switch 20 is connected to the gate 41 of the first MOS transistor 40. More specifically, the switch 20 is provided on a signal line (wiring) A that connects the driver circuit 19 and the gate 41 of the first MOS transistor 40. The switch 20 is capable of electrically connecting and disconnecting the driver circuit 19 and the gate 41 of the first MOS transistor 40. The switch 20 is normally turned on when no open circuit or the like occurs in the feedback terminal 100a.

[0033] The counter circuit 30 may be configured by a microcomputer having a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), etc. Such a microcomputer may be configured in part or in whole by hardware such as an ASIC (Application Specific Integrated Circuit) or FPGA (Field Programmable Gate Array). The counter circuit 30 is an example of a control unit (controller).

[0034] The counter circuit 30 detects a control signal output from the driver circuit 19 to the gate 41 of the first MOS transistor 40, and measures the time during which the control signal is detected as the on-time of the first MOS transistor 40. Specifically, the counter circuit 30 is connected to a signal line A and a node B. The counter circuit 30 measures (counts) the time during which a gate voltage indicating a drive signal on the signal line A is input to the gate 41 of the first MOS transistor 40 as the on-time of the first MOS transistor 40. Furthermore, when the gate voltage indicating a drive signal is not detected on the signal line A and the first MOS transistor 40 is turned off, the counter circuit 30 resets the measured on-time; more specifically, it resets the counter indicating the measured on-time.

[0035] The on-time of the first MOS transistor 40 is reset by turning off the first MOS transistor 40 at an appropriate control timing under normal circumstances when no open circuit or other problem occurs at the feedback terminal 100a. However, if an open circuit or other problem occurs at the feedback terminal 100a, the output circuit 10 does not obtain a feedback voltage and the voltage becomes 0 (zero). This causes the feedback voltage to become less than the reference voltage, keeping the first MOS transistor 40 on. In other words, the on-time of the first MOS transistor 40 continues to increase. Therefore, the counter circuit 30 according to this embodiment is configured to turn off the switch 20 when the on-time of the first MOS transistor 40 becomes equal to or greater than a threshold value.

[0036] The process of turning off the switch 20 by the counter circuit 30 will be described in detail with reference to Fig. 2. Fig. 2 is a timing chart for explaining the process of turning off the switch 20 by the counter circuit 30. Fig. 2 shows, from top to bottom, the feedback voltage, the on / off state of the first MOS transistor 40, the on time measured by the counter circuit 30, the on / off state of the switch 20, and the output voltage Vout.

[0037] 2, the output circuit 10 turns the first MOS transistor 40 on or off depending on the feedback voltage. For example, if the feedback voltage becomes less than the reference voltage at time T0, the output circuit 10 turns on the first MOS transistor 40. This causes the output voltage Vout to increase. Also, the counter circuit 30 starts measuring the on-time of the first MOS transistor 40 at time T0.

[0038] If the feedback voltage becomes larger than the reference voltage at time T1, the output circuit 10 turns off the first MOS transistor 40. This causes the output voltage Vout to decrease. Furthermore, since the first MOS transistor 40 has been turned off, the counter circuit 30 resets the measured on-time. Furthermore, at times T2 and T3, the same processing as at times T0 and T1 is performed.

[0039] Assume that an open or short circuit occurs at the feedback terminal 100a at time T4, which is after time T3. In this case, the output circuit 10 does not obtain a feedback voltage and the voltage becomes 0 V. This causes the feedback voltage to become less than the reference voltage, turning on the first MOS transistor 40. This causes the output voltage Vout to increase. At time T4, the counter circuit 30 begins measuring the on-time of the first MOS transistor 40.

[0040] Since the output circuit 10 does not obtain a feedback voltage even after time T4, the first MOS transistor 40 continues to be turned on, and therefore the output voltage Vout continues to rise. Then, when the on time of the first MOS transistor 40 becomes equal to or greater than the threshold (see time T5), the counter circuit 30 turns off the switch 20. By turning off the switch 20, the first MOS transistor 40 turns off and the output voltage Vout decreases. This makes it possible to prevent the output voltage Vout from continuing to rise and an excessive output voltage Vout from being supplied to the load 200.

[0041] The threshold value is set to an arbitrary value in advance. For example, the threshold value is set according to the characteristics of the load 200 that receives the output voltage Vout. Specifically, an allowable voltage Va that is an allowable input is set as a characteristic of the load 200. The allowable voltage Va is an upper limit value of the voltage that can be input to the load 200, and if a voltage greater than this is input to the load 200, it is a value that may have an effect on the load 200, such as causing a breakdown. In this embodiment, the threshold value is set to a value that makes the output voltage Vout equal to or less than the allowable voltage Va that is allowable for the load 200. In other words, the threshold value is set to a value that makes it possible to turn off the switch 200 before the output voltage Vout exceeds the allowable voltage Va of the load 200.

[0042] By setting the threshold value to a value equal to or less than the allowable voltage Va of the load 200, the counter circuit 30 can reliably turn off the switch 20 when the output voltage Vout is equal to or less than the allowable voltage Va. In other words, the counter circuit 30 can reliably turn off the switch 20 before the output voltage Vout exceeds the allowable voltage Va of the load 200.

[0043] Furthermore, the threshold value is set to a value longer than the on-time that may turn on the first MOS transistor 40 under normal circumstances when no open circuit or the like occurs in the feedback terminal 100a. This makes it possible to prevent the counter circuit 30 from turning off the switch 20 under normal circumstances.

[0044] Next, a process executed by the counter circuit 30 of the output circuit 10 according to the embodiment will be described with reference to Fig. 3. Fig. 3 is a flowchart showing an example of a process executed by the counter circuit 30 of the output circuit 10 according to the embodiment. The process shown in Fig. 3 is repeatedly executed by the counter circuit 30.

[0045] 3, the counter circuit 30 measures the on-time of the first MOS transistor 40 (step S10). The counter circuit 30 starts measuring the on-time when the first MOS transistor 40 is turned on, and resets the measured on-time when the first MOS transistor 40 is turned off.

[0046] Next, the counter circuit 30 determines whether the measured ON time of the first MOS transistor 40 is equal to or greater than a threshold (step S11). If the counter circuit 30 determines that the ON time of the first MOS transistor 40 is not equal to or greater than the threshold (step S11, No), it skips the subsequent processing.

[0047] On the other hand, if it is determined that the on-time of the first MOS transistor 40 is equal to or longer than the threshold (step S11, Yes), the counter circuit 30 turns off the switch 20 connected to the gate 41 of the first MOS transistor 40 (step S12).

[0048] As described above, the output circuit 10 according to the embodiment includes a counter circuit (an example of a control unit) 30. The counter circuit 30 measures the on-time of a first MOS transistor 40 (an example of a MOS transistor) that controls the output voltage Vout by turning it on or off in response to a feedback voltage obtained from the output voltage Vout. When the measured on-time is equal to or greater than a threshold, the counter circuit 30 turns off the switch 20 connected to the gate 41 of the first MOS transistor 40.

[0049] In this way, the counter circuit 30 turns off the switch 20 when the measured on-time of the first MOS transistor 40 becomes equal to or greater than the threshold. This makes it possible to turn off the first MOS transistor 40 in a situation where the feedback terminal 100a is open or shorted, and there is a possibility that the first MOS transistor 40 will continue to be on without obtaining a feedback voltage. By turning off the first MOS transistor 40, the output voltage Vout decreases rather than increases, making it possible to prevent an excessive output voltage Vout from being supplied to the load 200.

[0050] Although the above example shows the counter circuit 30 functioning as a control unit that controls the switch 20, the present invention is not limited to this. For example, another circuit such as the driver circuit 19 may function as a control unit that measures the on-time of the first MOS transistor 40 and turns off the switch 20 when the on-time is equal to or greater than a threshold value.

[0051] Further advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described above. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. [Explanation of symbols]

[0052] 10 Output circuit 20 Switch 30 Counter Circuit 40 first MOS transistor 100 IC 100a Feedback terminal

Claims

1. measuring an on-time of a MOS transistor that controls the output voltage by being turned on or off in response to a feedback voltage obtained from the output voltage; a control unit that turns off a switch connected to the gate of the MOS transistor when the measured on-time is equal to or greater than a threshold value; An output circuit comprising:

2. The threshold value is The output voltage is set to a value that is equal to or less than an allowable voltage that is allowed in a load that receives the output voltage.

2. The output circuit of claim 1.

3. a feedback terminal to which a feedback voltage obtained from the output voltage is input; an output circuit including a control unit that measures an on-time of a MOS transistor that controls the output voltage by being turned on or off in response to the feedback voltage, and turns off a switch connected to a gate of the MOS transistor when the measured on-time becomes equal to or greater than a threshold; , an integrated circuit.

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