Printed circuit board

Abstract

The present invention provides a printed circuit board that ensures adhesion of the seed metal layer and prevents the occurrence of unplated areas during fill plating when via holes are formed in a glass layer, such as a glass core, and then filled with plating. [Solution] The present disclosure relates to a printed circuit board including metal vias, comprising a glass layer having through holes, an insulating material disposed within the through holes and having via holes, and a first metal layer disposed within the via holes and at least a portion substantially conformally arranged on the walls of the via holes, a second metal layer at least a portion substantially conformally arranged on the first metal layer, and a third metal layer disposed on the second metal layer and filling at least a portion of the via holes.

Description

Technical Field

[0001] The present disclosure relates to a printed circuit board.

Background Art

[0002] Recently, for the high performance of package substrates, larger area, higher multi-layer, finer, etc. are required. On the other hand, as the core substrate included in the package substrate, usually CCL (Copper Clad Laminate) is used. However, in the case of CCL, warpage is likely to occur due to low modulus and high coefficient of thermal expansion, and there is a limit to the realization of fine circuits. Accordingly, there is a need for a new material that can suppress warpage with high modulus and low coefficient of thermal expansion and is easy to realize fine circuits by having a smooth surface, for example, a core substrate containing glass. However, in the case of a glass core, it is difficult to ensure adhesion in the process of forming a seed metal layer in the via hole, and in the process of filling plating, non-plating may occur in the central part of the via hole, and there is a possibility of via open failure.

Summary of the Invention

Problems to be Solved by the Invention

[0003] One of the various objects of the present disclosure is to provide a printed circuit board capable of ensuring the adhesion of a seed metal layer and preventing non-plating during filling plating when forming a via hole in a glass layer, for example, a glass core and filling it with plating.

Means for Solving the Problems

[0004] One of the various solutions proposed through the present disclosure is to form a through hole in a glass layer, for example, a glass core, fill the through hole with an insulating material, form a via hole in the insulating material, and form a metal via including a plurality of seed layers in the via hole.

[0005] For example, a printed circuit board according to one example includes a glass layer having through holes, a first insulating material disposed within the through holes and having first via holes, and a first metal via disposed within the first via holes, wherein the first metal via may include a first metal layer substantially conformally disposed on the wall surface of the first via hole, a second metal layer substantially conformally disposed on the first metal layer, and a third metal layer disposed on the second metal layer and filling at least a portion of the first via hole.

[0006] For example, a printed circuit board according to one example includes a core portion comprising a glass core having through holes, an insulating material disposed within the through holes and having via holes, and metal vias disposed within the via holes; and a build-up portion comprising an insulating body disposed on the core portion, one or more wiring layers disposed on or within the insulating body, and one or more via layers disposed within the insulating body, wherein the metal vias may include a first metal layer at least partially substantially conformally disposed on the wall surface of the via holes, a second metal layer at least partially substantially conformally disposed on the first metal layer, and a third metal layer disposed on the second metal layer to fill at least part of the via holes. [Effects of the Invention]

[0007] One of the various effects of this disclosure is that, when via holes are formed in a glass layer, such as a glass core, and filled with plating, it is possible to provide a printed circuit board that can ensure the adhesion of the seed metal layer and prevent the occurrence of unplated areas during fill plating. [Brief explanation of the drawing]

[0008] [Figure 1] This is a block diagram illustrating an example of an electronic equipment system. [Figure 2] This is a schematic cross-sectional view showing an example of a printed circuit board. [Figure 3a]Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3b] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3c] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3d] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3e] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3f] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3g] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3h] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3i] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3j] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3k] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3l] Figure 2 is a schematic cross-sectional view showing various shapes of through holes, via holes, and metal vias that can be applied to a printed circuit board. [Figure 3m]It is a cross-sectional view schematically showing various shapes of through holes, via holes, and metal vias that can be applied to the printed circuit board of FIG. 2. [Figure 4] It is a process diagram schematically showing an example of manufacturing the printed circuit board of FIG. 2. [Figure 5] It is a cross-sectional view schematically showing a modified example of the printed circuit board of FIG. 2. [Figure 6] It is a cross-sectional view schematically showing another example of a printed circuit board. [Figure 7] It is a process diagram schematically showing an example of manufacturing the printed circuit board of FIG. 6. [Figure 8] It is a cross-sectional view schematically showing a modified example of the printed circuit board of FIG. 6. [Figure 9] It is a cross-sectional view schematically showing yet another example of a printed circuit board. [Figure 10] It is a process diagram schematically showing an example of manufacturing the printed circuit board of FIG. 9. [Figure 11] It is a cross-sectional view schematically showing a modified example of the printed circuit board of FIG. 9. [Figure 12] It is a cross-sectional view schematically showing yet another example of a printed circuit board. [Figure 13] It is a process diagram schematically showing an example of manufacturing the printed circuit board of FIG. 12. [Figure 14] It is a cross-sectional view schematically showing a modified example of the printed circuit board of FIG. 12.

Mode for Carrying Out the Invention

[0009] Hereinafter, the present disclosure will be described with reference to the accompanying drawings. The shape, size, etc. of the elements in the drawings may be enlarged or reduced (or highlighted or simplified) for a clearer explanation.

[0010] FIG. 1 is a block diagram schematically showing an example of an electronic device system.

[0011] Referring to the drawing, the electronic device 1000 houses the main board 1010. The main board 1010 is physically and / or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040, etc. These, in combination with other electronic components described later, form various signal lines 1090.

[0012] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPUs), graphics processors (e.g., GPUs), digital signal processors, cryptographic processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Furthermore, these chip-related components 1020 can be combined with each other. The chip-related components 1020 can also be in the form of a package containing the aforementioned chips or electronic components.

[0013] Network-related component 1030 includes, but is not limited to, any other wireless and wired protocols designated as Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE (Long Term Evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and later. It may also include any other numerous wireless or wired standards or protocols. Furthermore, network-related component 1030 can be combined with chip-related component 1020.

[0014] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCCs (low-temperature co-firing ceramics), EMI (electromagnetic interference) filters, and MLCCs (multi-layer ceramic condensers). However, they are not limited to these, and may also include passive elements in the form of chip components used for various other applications. Furthermore, other components 1040 can be combined with chip-related components 1020 and / or network-related components 1030.

[0015] Depending on the type of electronic device 1000, it may include other electronic components that are physically and / or electrically connected to the main board 1010, or not connected. Examples of other electronic components include a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. However, it is not limited to these, and may also include audio codecs, video codecs, power amplifiers, compasses, accelerometers, gyroscopes, speakers, mass storage devices (e.g., hard disk drives), CDs (compact disks), DVDs (digital versatile disks), etc. In addition, depending on the type of electronic device 1000, it may also include other electronic components used for various purposes.

[0016] Electronic device 1000 can be a smartphone, personal digital assistant, digital video camera, digital still camera, network system, computer, monitor, tablet, laptop, netbook, television, video game, smartwatch, automobile, etc. However, it is not limited to these, and can also be any other electronic device that processes data.

[0017] Figure 2 is a schematic cross-sectional view showing an example of a printed circuit board.

[0018] Referring to the drawings, the printed circuit board 100A may include a glass layer 110 having through holes h, an insulating material 120 disposed within the through holes h and having via holes v, and metal vias 130 disposed within the via holes v. The metal vias 130 may include a first metal layer m1 which is substantially conformally disposed on the wall surface of the via hole v, a second metal layer m2 which is substantially conformally disposed on the first metal layer m1, and a third metal layer m3 which is disposed on the second metal layer m2 and fills at least a portion of the via hole v. The first and second metal layers m1 and m2 may be seed metal layers m1 and m2, and the third metal layer m3 may be a fill-plated metal layer m3.

[0019] Thus, the printed circuit board 100A can have through-holes h formed in the glass layer 110 that penetrate between the upper and lower surfaces of the glass layer 110, fill these through-holes h with insulating material 120, then form via holes v penetrating between the upper and lower surfaces of the insulating material 120 within the through-holes h, and form metal vias 130 containing multiple seed metal layers m1, m2 and a fill-plated metal layer m3 in the via holes v. In other words, by forming multiple seed metal layers m1, m2 in the via holes v formed in the insulating material 120 rather than the glass layer 110, sufficient coverage can be ensured, and the problem of adhesion between the seed metal layers m1, m2 can be effectively improved. Furthermore, since the fill-plated metal layer m3 can be formed after sufficient coverage has been ensured, the problem of via openings due to unplated areas can be effectively improved.

[0020] On the other hand, the insulating material 120 may include an organic insulating material. For example, the insulating material 120 may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or an inorganic filler and / or organic filler together with the resin. For example, the insulating material 120 may be ABF (Ajinomoto Build-up Film), in which case it may be easier to form the insulating material 120 in the through hole h, and it may be easier to process via holes v in the insulating material 120, but it is not limited to this.

[0021] Furthermore, the seed metal layers m1 and m2 can be formed by sputtering and electroless plating. For example, the first metal layer m1 can be formed by sputtering and may include, for example, sputtered metal. The second metal layer m2 can be formed by electroless plating and may include, for example, chemical copper. In this case, adhesion can be ensured through the first metal layer m1 and coverage can be ensured through the second metal layer m2. For example, if the thickness of the glass layer 110 is thick, there may be areas on the wall surface in the central region of the via hole v where the first metal layer m1 is not formed. However, even in this case, the second metal layer m2 can cover the areas on the wall surface of the via hole v where the first metal layer m1 is not formed, thus ensuring coverage. The second metal layer m2 formed by electroless plating can be even thicker than the first metal layer m1 formed by sputtering. The thickness can be confirmed by the cross-section or cross-plane of the metal via 130, and if the thickness is not constant, the average value at any five points can be compared.

[0022] Furthermore, the first metal layer m1 can include multiple sputtering layers, for example, a first sputtering layer connected to the wall surface of the via hole v and a second metal layer m2, for example, a second sputtering layer connected to chemical copper. The first sputtering layer can include titanium (Ti) from the viewpoint of bonding strength with the insulating material 120, and the second sputtering layer can include copper (Cu) from the viewpoint of bonding strength with the second metal layer m2, but is not limited to these. When the second sputtering layer includes copper (Cu) and the second metal layer m2 includes chemical copper, nanovoids can be formed at the boundary between the sputtered copper and the chemical copper, and these can be confirmed using high-resolution SEM (Scanning Electron Microscope), TEM (Transmission Electron Microscope), STEM (Scanning Transmission Electron Microscopy), FIB (Focused Ion Beam), etc. In addition, the shape and size of grains can be confirmed and compared using SEM, TEM, STEM, FIB, etc., and they can be classified accordingly. Furthermore, analysis using EDX (Energy Dispersive X-ray Spectroscopy) or similar methods may reveal that the concentration of nickel (Ni) is relatively concentrated in the chemical copper, allowing for differentiation between the two materials.

[0023] Furthermore, the third metal layer m3, for example, the fill-plated metal layer m3, can be formed by electroplating. For example, the third metal layer m3 can contain electroplated copper. Since the above-mentioned seed metal layers m1 and m2 can be formed on the walls of the via holes v, at least a portion of the via holes v can be easily filled with the third metal layer m3 without special plating defects. For example, via opening defects such as unplated areas in the center of the via holes v can be prevented. On the other hand, chemical copper and electroplated copper can be distinguished by checking and comparing the shape and size of the grains using SEM, TEM, STEM, FIB, etc. Also, when analyzed using EDX, etc., the concentration of nickel (Ni) may be relatively concentrated in chemical copper compared to electroplated copper, and they can also be distinguished through this.

[0024] The printed circuit board 100A may further include a first metal pattern 132 connected to the upper side of the metal via 130 and a second metal pattern 134 connected to the lower side of the metal via 130. The first and second metal patterns 132 and 134 may be lands and / or pads of the metal via 130. If necessary, different metal patterns 136 and 138 may be further arranged on the upper and lower surfaces of the glass layer 110, respectively, and the other metal patterns 136 and 138 may include line patterns, pad patterns, etc. The metal patterns 136 and 138 different from the first and second metal patterns 132 and 134 may include the first to third metal layers m1, m2, and m3 described above, respectively. For example, the first metal pattern 132 may include a first metal layer m1 substantially conformally extending over the upper surface of the insulating material 120 and the upper surface of the glass layer 110, a second metal layer m2 substantially conformally extending over the first metal layer m1 from the upper surface of the insulating material 120 and the upper surface of the glass layer 110, and a third metal layer m3 extending over the second metal layer m2 from the upper surface of the first insulating material and the upper surface of the glass layer 110 and projecting above the via hole v. The second metal pattern 134 may also include a first metal layer m1 substantially conformally extending over the lower surface of the insulating material 120 and the lower surface of the glass layer 110, a second metal layer m2 substantially conformally extending over the first metal layer m1 from the lower surface of the insulating material 120 and the lower surface of the glass layer 110, and a third metal layer m3 extending over the second metal layer m2 from the lower surface of the insulating material 120 and the lower surface of the glass layer and projecting below the via hole v.

[0025] On the other hand, the extended portion of the first metal layer m1 can directly contact the upper and lower surfaces of the insulating material 120, and the upper and lower surfaces of the glass layer 110, respectively. For example, the upper and lower surfaces of the glass layer 110 may not be covered by the insulating material 120. For example, a laminated structure can be formed inside the via hole v in the order of glass layer 110 / insulating material 120 / first metal layer m1 / second metal layer m2 / third metal layer m3, whereas a laminated structure can be formed on the upper and / or lower surfaces of the glass layer 110 in the order of glass layer 110 / first metal layer m1 / second metal layer m2 / third metal layer m3. Therefore, an unnecessary increase in thickness can be prevented. Also, since patterns can be formed directly on the surface of the glass layer 110, a fine pitch can be more easily achieved. On the other hand, the upper surface of the glass layer 110 may be substantially co-plane with the upper surface of the insulating material 120, and the lower surface of the glass layer 110 may be substantially co-plane with the lower surface of the insulating material 120. Therefore, substantially flat surfaces can be more easily provided on the upper and / or lower surfaces of the glass layer 110.

[0026] The components of the printed circuit board 100A will be described in more detail below with reference to the drawings.

[0027] The glass layer 110 may include glass, which is an amorphous solid. Examples of glass include pure silicon dioxide (approximately 100% SiO2), soda-lime glass, borosilicate glass, and aluminosilicate glass. However, it is not limited to these; alternative glass materials, such as fluoroglass, phosphoric acid glass, and chalcogenide glass, can also be used. Furthermore, other additives may be included to form glass with specific physical properties. Such additives may include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates and / or oxides of these elements and other elements. The glass layer 110 can be distinguished from organic insulating materials, such as glass fiber (glass cloth, glass fabric), specifically CCL (copper clad laminate), PPG (prepreg), etc. For example, the glass layer 110 may include a glass plate.

[0028] The through-hole h can penetrate between the upper and lower surfaces of the glass layer 110. For example, the through-hole h can be a TGV (Through Glass Via). The through-hole h can have an hourglass shape, with the narrowest width in the center of the cross-section through which it penetrates, but is not limited to this. Multiple such through-holes h can be formed in the glass layer 110. Multiple through-holes h can be formed in the glass layer 110 spaced apart from each other. The number of multiple through-holes h is not particularly limited.

[0029] The insulating material 120 may include an organic insulating material. For example, the insulating material 120 may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or an inorganic filler and / or organic filler together with the resin. For example, the insulating material 120 may be ABF (Ajinomoto Build-up Film), in which case it may be easier to form the insulating material 120 in the through hole h and it may be easier to process via holes v in the insulating material 120, but it is not limited to this. The insulating material 120 may be placed between the glass layer 110 and the metal via 130 in the through hole h and may continuously surround the side surface of the metal via 130.

[0030] The via hole v can penetrate between the upper and lower surfaces of the insulating material 120 within the through hole h. For example, the via hole v can be a TV (Through Via). The via hole v may, but is not limited to, have an hourglass shape with the narrowest width in the central part of the cross-section through which the via hole v penetrates. When multiple through holes h are formed in the glass layer 110, insulating material 120 can be placed in each of the multiple through holes h, and multiple via holes v can be formed in each of such insulating material 120.

[0031] The metal via 130 may contain metals such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the metal via 130 may contain first to third metal layers m1, m2, and m3. The first and second metal layers m1 and m2 may be seed metal layers m1 and m2 formed using sputtering and electroless plating, and the third metal layer m3 may be a fill metal layer m3 formed using electroplating. The first metal layer m1 may contain multiple sputtering layers. For example, the first metal layer m1 may contain a composite layer of sputtered titanium and sputtered copper, the second metal layer m2 may contain chemical copper, and the third metal layer m3 may contain electroplated copper. The metal via 130 can perform various functions depending on the design. For example, it may contain signal vias, power vias, ground vias, etc. When multiple via holes v are formed, multiple metal vias 130 can be placed in each of the multiple via holes v.

[0032] The first and second metal patterns 132 and 134 can each contain metal. The metals can include, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first and second metal patterns 132 and 134 can each contain the first to third metal layers m1, m2, and m3 described above. The first and second metal patterns 132 and 134 can each perform various functions depending on the design. For example, they can include signal patterns, power patterns, ground patterns, etc., and these patterns can each have the form of pads and / or lands. When multiple metal vias 130 are formed, multiple first metal patterns 132 and multiple second metal patterns 134 can be arranged above and below the multiple metal vias 130, respectively.

[0033] Other metal patterns 136 and 138 can each contain metals. These metals can include, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, other metal patterns 136 and 138 can each contain the first to third metal layers m1, m2, and m3 as described above. Other metal patterns 136 and 138 can each perform various functions depending on the design, and can include, for example, signal patterns, power patterns, ground patterns, etc. These patterns can have various forms such as lines, planes, pads, and lands.

[0034] Figures 3a to 3m are schematic cross-sectional views illustrating various shapes of through-holes, via holes, and metal vias that may be applied to the printed circuit board shown in Figure 2.

[0035] Referring to the drawings, on the cross section through which the through-hole h and via-hole v intersect, the shapes of the through-hole h and via-hole v can be substantially corresponding to each other or independent of each other. For example, referring to Figure 3a, the through-hole h and via-hole v can each have an hourglass shape with the narrowest width at the center. Alternatively, referring to Figure 3b, the through-hole h and via-hole v can each have a rectangular shape with substantially vertical walls. Alternatively, referring to Figure 3c, the through-hole h can have a rectangular shape with substantially vertical walls, while the via-hole v can have a tapered shape with the upper end wider than the lower end. Alternatively, referring to Figure 3d, the through-hole h can have a rectangular shape with substantially vertical walls, while the via-hole v can have an hourglass shape with the narrowest width at the center. Alternatively, referring to Figure 3e, the through-hole h and via-hole v can each have a tapered shape with the upper end wider than the lower end. Alternatively, referring to Figure 3f, the through-hole h may have a tapered shape where the width at the upper end is wider than the width at the lower end, while the via hole v may have an hourglass shape where the width is narrowest in the center. Alternatively, referring to Figure 3g, the through-hole h may have an hourglass shape where the width is narrowest in the center, while the via hole v may have a tapered shape where the width at the upper end is wider than the width at the lower end. Alternatively, referring to Figure 3h, the through-hole h may have an hourglass shape where the width is narrowest in the center, while the via hole v may have a rectangular shape with substantially vertical walls. On the other hand, referring to Figures 3i to 3m, in the structures described in Figures 3a, 3b, 3d, 3f, and 3h above, the sputtering step coverage may be insufficient, and there may be areas on the wall surface in the central region of the via hole v where the first metal layer m1 is not formed. However, even in this case, the second metal layer m2 can cover the areas on the wall surface of the via hole v where the first metal layer m1 is not formed, and therefore sufficient coverage can be ensured as a result. For example, in the central part of the via hole v, a laminated structure can be formed in which the glass layer 110 / insulating material 120 / second metal layer m2 / third metal layer m3 are arranged in that order.For example, in the center of the via hole v, the second metal layer m2 can come into direct contact with the insulating material 120. Further explanations can be substantially applied in the same manner as those described for the printed circuit board 100A, etc.

[0036] Figure 4 is a schematic process diagram showing an example of the manufacturing process for the printed circuit board shown in Figure 2.

[0037] Referring to the drawing, first, through holes h can be formed in the glass layer 110. The glass layer 110 can be a glass plate or the like. The through holes h can be formed by chemical and / or mechanical methods such as etching, blasting, laser, and plasma. Next, the through holes h can be filled by applying insulating material 120 to the glass layer 110. For example, ABF lamination can be used. If necessary, the insulating material 120 can be composed of multiple layers, and the boundaries between the multiple layers may or may not be separated. Next, the portions of the insulating material 120 that are placed on the upper and lower surfaces of the glass layer 110 can be removed. Polishing processes such as CMP (Chemical Mechanical Planarization) or etching can be used to remove the insulating material 120. Next, via holes v can be formed in the insulating material 120. Laser processing using carbon dioxide gas can be used to process the via holes v. If necessary, desmearing can be performed after processing the via holes v. Next, sputtering and electroless plating can be performed sequentially to form first and second metal layers m1 and m2 on the glass layer 110 and inside the via holes v. Then, a third metal layer m3 can be formed on the glass layer 110 and inside the via holes v in a circuit process including electroplating. This allows for the formation of metal vias 130 and metal patterns 136 and 138 that are different from the first and second metal patterns 132 and 134. A printed circuit board 100A can be manufactured through this series of processes. Further explanations can be substantially applied in the same manner as those described for printed circuit board 100A, etc.

[0038] Figure 5 is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 2.

[0039] Referring to the drawings, the printed circuit board 500A can be a multilayer printed circuit board including a core portion 100-1, a first build-up portion 210 located above the core portion 100-1, and a second build-up portion 220 located below the core portion 100-1. For example, the printed circuit board 500A can be used as an FCB (Filp-Chip Board), BGA (Ball Grid Array), interposer board, package board, etc. However, it is not limited to these, and can be applied to various other forms of boards. In this case, the core portion 100-1 can include the structure described above for the printed circuit board 100A, and therefore can substantially include the technical features described above.

[0040] The printed circuit board 500A may further include a plurality of semiconductor chips 310 mounted on the first build-up section 210. Each of the plurality of semiconductor chips 310 may be surface-mounted on the first build-up section 210 via a plurality of first electrical coupling metals 410. For example, each of the plurality of terminals P of the plurality of semiconductor chips 310 may be connected via the plurality of first electrical coupling metals 410 to the uppermost pad pattern of one or more first wiring layers 212 of the first build-up section 210. If necessary, the printed circuit board 500A may further include a molding material 320 covering the plurality of semiconductor chips 310, an underfill material 330 positioned between the plurality of semiconductor chips 310 and the first build-up section 210 and surrounding the plurality of first electrical coupling metals 410, and / or a plurality of second electrical coupling metals 420 positioned below the second build-up section 220.

[0041] The components of the printed circuit board 500A will be described in more detail below with reference to the drawings.

[0042] The core portion 100-1 may include a glass core 110, a plurality of metal vias 130 that penetrate the glass core 110, a plurality of first metal patterns 132 positioned on the upper surface of the glass core 110 and connected to the upper side of the plurality of metal vias 130, and a plurality of second metal patterns 134 positioned on the lower surface of the glass core 110 and connected to the lower side of the plurality of metal vias 130. For example, the core portion 100-1 may include the structure described in the printed circuit board 100A above. In addition, various shapes described in Figures 3a to 3m can also be applied to the core portion 100-1. A redundant explanation of these will be omitted.

[0043] The first build-up section 210 may include a first insulating body 211 positioned above the core section 100-1, one or more first wiring layers 212 positioned on or inside the first insulating body 211, and one or more first via layers 213 positioned inside the first insulating body 211. The second build-up section 220 may include a second insulating body 221 positioned below the core section 100-1, one or more second wiring layers 222 positioned on or inside the second insulating body 221, and one or more second via layers 223 positioned inside the second insulating body 221.

[0044] The first and second insulating bodies 211 and 221 may each contain an organic insulating material. The organic insulating material may be a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or may contain an inorganic filler, an organic filler, and / or glass fiber (glass cloth, glass fabric) together with the resin. For example, the first and second insulating bodies 211 and 221 may each contain, but are not limited to, PPG (Prepreg), ABF (Ajinomoto Build-up Film), PID (Photo Imageable Dielectric), SR (Solder Resist), etc. If necessary, the first and second insulating bodies 211 and 221 may each consist of multiple layers. In this case, adjacent layers may have boundaries with each other, or they may be integrated with each other without boundaries. Each layer may contain, but is not limited to, substantially the same organic insulating material, and may also contain different organic insulating materials.

[0045] The first and second wiring layers 212 and 222 can each contain a metal. The metal can include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, it can contain copper (Cu), but is not limited thereto. The first and second wiring layers 212 and 222 can each perform various functions depending on the design. For example, they can include signal patterns, power patterns, ground patterns, etc. These patterns can each have various forms such as lines, planes, pads, and lands. The first and second wiring layers 212 and 222 can each contain a seed layer and a plating layer. The seed layer can be formed by electroless plating or sputtering, or both can be used. The plating layer can be formed by electroplating. The first and second wiring layers 212 and 222 can each consist of multiple layers, in which case they can have the same number of layers, but are not limited thereto.

[0046] The first and second via layers 213 and 223 may each contain a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, it may contain copper (Cu), but is not limited thereto. The first and second via layers 213 and 223 can each perform various functions depending on the design. For example, they may include signal vias, power vias, ground vias, etc. The first and second via layers 213 and 223 may each contain filled vias, in which the via holes are filled with metal, or they may contain conformal vias, in which the metal is arranged along the walls of the via holes. The first and second via layers 213 and 223 can provide electrical paths within the first and second build-up sections 210 and 220, respectively, and can also provide electrical paths between the core section 100-1 and the first and second build-up sections 210 and 220, respectively. The first and second via layers 213 and 223 can each have a tapered shape in cross-section, for example, tapered in opposite directions in cross-section. The first and second via layers 213 and 223 can each include the same seed layer and plating layer as the first and second wiring layers 212 and 222, respectively. The first and second via layers 213 and 223 can each consist of multiple layers.

[0047] The semiconductor chip 310 may include an integrated circuit (IC) die in which hundreds to millions or more elements are integrated within a single chip. In this case, the integrated circuit may be, but is not limited to, logic chips such as a central processor (e.g., CPU), graphics processor (e.g., GPU), field-programmable gate array (FPGA), digital signal processor, cryptographic processor, microprocessor, microcontroller, application processor (e.g., AP), analog-to-digital converter, or ASIC (application-specific IC). It may also be other types such as memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, HBM (High Bandwidth Memory), or PMIC (Power Management IC).

[0048] The semiconductor chip 310 can be formed on an active wafer, in which case silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc., can be used as the base material for each body. Various circuits can be formed on the body. Connection pads can be formed on the body, and the connection pads can include conductive materials such as aluminum (Al) and copper (Cu). The semiconductor chip 310 can be a bare die, in which case terminals P such as metal bumps can be placed on the connection pads. The semiconductor chip 310 can also be a packaged die, in which case a redistribution layer is further formed on the connection pads, and terminals P such as metal bumps can be placed on the redistribution layer.

[0049] The molding material 320 can protect the semiconductor chip 310 during the semiconductor packaging process and provide mechanical strength. From this perspective, the molding material 320 may include an EMC (Epoxy Molding Compound) with excellent protective performance, thermal properties, mechanical strength, electrical insulation, and environmental stability. However, it is not limited to this, and other polymer materials besides epoxy may also be used.

[0050] The underfill material 330 can fill the gap between the semiconductor chip 310 and the first build-up section 210 during the semiconductor packaging process, thereby improving mechanical strength and increasing resistance to thermal and mechanical stress. The underfill material 330 may include, but is not limited to, resin materials capable of performing such functions, such as CUF (Capillary Underfill), NUF (No-Flow Underfill), and MUF (Molded Underfill).

[0051] The first and second electrical connecting metals 410 and 420 can connect the printed circuit board 500A to other boards or electronic components. The first and second electrical connecting metals 410 and 420 can each be formed from a conductive material, such as solder, but this is just one example and the material is not particularly limited thereto. The first and second electrical connecting metals 410 and 420 can each be balls, pins, etc. The first and second electrical connecting metals 410 and 420 can each be formed from multiple layers or a single layer. When formed from multiple layers, it may include copper columns and solder formed on the copper columns, and when formed from a single layer, it may include, but is not limited to, tin-silver solder or copper. There can each be multiple first and second electrical connecting metals 410 and 420.

[0052] Other explanations can be substantially applied in the same way as those described for printed circuit board 100A, etc.

[0053] Figure 6 is a schematic cross-sectional view showing another example of a printed circuit board.

[0054] Referring to the drawing, in the printed circuit board 100B, the upper surface of the insulating material 120 can be recessed below the upper surface of the glass layer 110, and the lower surface of the insulating material 120 can be recessed above the lower surface of the glass layer 110, compared to the printed circuit board 100A described above. Therefore, the first and second metal patterns 132 and 134 can have stepped structures S on the upper and lower surfaces of the insulating material 120, respectively. For example, the first to third metal layers m1, m2, and m3 can each have steps on the upper and lower surfaces of the insulating material 120.

[0055] Thus, since the printed circuit board 100B has a structure that is basically similar to that of the printed circuit board 100A described above, it can substantially include the same technical effects as described above. Furthermore, because it has a stepped structure S, it can be more effective in dispersing thermal and mechanical stress, diversify the electrical signal paths to improve the characteristics of high-frequency signals, and help reduce electromagnetic interference (EMI). In addition, it can mitigate the problem of heat generation by allowing heat to spread over a wide area instead of concentrating in one place, increase the electrical contact area to reduce electrical contact resistance, and increase the physical contact area to further improve reliability.

[0056] On the other hand, the various shapes of the through holes h and via holes v described in Figures 3a to 3m can also be applied to the printed circuit board 100B. For example, in the various shapes described above, the stepped structure S described above can be applied to the upper and lower surfaces of the insulating material 120, respectively. The rest of the explanation can be substantially applied in the same way as the explanation given for the printed circuit board 100A, etc.

[0057] Figure 7 is a schematic process diagram showing an example of the manufacturing process for the printed circuit board shown in Figure 6.

[0058] Referring to the drawing, first, through holes h can be formed in the glass layer 110. Next, insulating material 120 can be applied to the glass layer 110 to fill the through holes h. Next, the portions of insulating material 120 that are placed on the upper and lower surfaces of the glass layer 110 can be removed. At this time, excessive etching of the insulating material 120 can cause the upper and lower surfaces of the insulating material 120 to have steps compared to the upper and lower surfaces of the glass layer 110, respectively. Next, via holes v can be formed in the insulating material 120. Next, first and second metal layers m1 and m2 can be formed on the glass layer 110 and inside the via holes v. Next, a third metal layer m3 can be formed on the glass layer 110 and inside the via holes v. This allows the formation of metal vias 130 and metal patterns 136 and 138 that are different from the first and second metal patterns 132 and 134. The printed circuit board 100B described above can be manufactured through this series of processes. Other explanations can be substantially applied in the same way as those described in the sections on printed circuit boards 100A and 100B, and the manufacturing example of printed circuit board 100A.

[0059] Figure 8 is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 6.

[0060] Referring to the drawings, the printed circuit board 500B can include the structure described in printed circuit board 100B in the core portion 100-2 of the printed circuit board 500A, instead of the structure described in printed circuit board 100A. Therefore, the technical features and resulting technical effects described in printed circuit boards 100A, 100B, and 500A can be included in substantially the same way. In addition, the various shapes described in Figures 3a to 3m can also be applied to the core portion 100-2. A redundant explanation for this will be omitted. Other explanations can be substantially applied in the same way as those described in printed circuit boards 100A, 100B, and 500A.

[0061] Figure 9 is a schematic cross-sectional view showing yet another example of a printed circuit board.

[0062] Referring to the drawings, the printed circuit board 100C may further have a through-hole H in the printed circuit board 100A described above, in which the glass layer 110 is separated from the through-hole h, and a second insulating material 120' having a plurality of second via holes V may be placed in the through-hole H, and a plurality of second metal vias 150 may be placed in each of the plurality of second via holes V. The plurality of second metal vias 150 may include a fourth metal layer m1' which is at least partially substantially conformally arranged on the respective walls of each of the plurality of second via holes V, a fifth metal layer m2' which is at least partially substantially conformally arranged on the fourth metal layer m1', and a sixth metal layer m3' which is placed on the fifth metal layer m2' and fills at least a portion of each of the plurality of second via holes V. The fourth and fifth metal layers m1', m2' may be seed metal layers m1', m2', and the sixth metal layer m3' may be a fill-plated metal layer m3'.

[0063] Thus, since the printed circuit board 100C has a structure that is basically similar to that of the printed circuit board 100A described above, it can substantially include the technical effects described above. Furthermore, a second insulating material 120' can be placed in the through-hole H which is larger in size than the through-hole h, and a plurality of second via holes V can be formed in the second insulating material 120', and a plurality of second metal vias 150 can be placed in each of the plurality of second via holes V. Such a structure can be easily applied when a region of close via contact is required within the substrate, or it may be easier to adjust the via pitch.

[0064] On the other hand, each of the multiple second metal vias 150 can be connected to each of the multiple third metal patterns 152 on its upper side. Each of the multiple third metal patterns 152 may include a fourth metal layer m1' substantially conformally extending onto the upper surface of the second insulating material 120', a fifth metal layer m2' substantially conformally extending from the upper surface of the second insulating material 120' onto the fourth metal layer m1', and a sixth metal layer m3' extending from the upper surface of the second insulating material 120' onto the fifth metal layer m2' and projecting onto the upper side of each of the multiple second via holes V. The upper surface of each of the multiple third metal patterns 152 may be substantially coplane with the upper surface of the first metal pattern 132.

[0065] Furthermore, each of the multiple second metal vias 150 can be connected to each of the multiple fourth metal patterns 154 on its upper and lower sides. Each of the multiple fourth metal patterns 154 may include a fourth metal layer m1' substantially conformally extending onto the lower surface of the second insulating material 120', a fifth metal layer m2' substantially conformally extending from the lower surface of the second insulating material 120' onto the fourth metal layer m1', and a sixth metal layer m3' extending from the lower surface of the second insulating material 120' onto the fifth metal layer m2' and projecting downwards to each of the multiple second via holes V. The lower surface of each of the multiple fourth metal patterns 154 may be substantially coplane with the lower surface of the second metal pattern 134.

[0066] Furthermore, the second insulating material 120' can be substantially identical to the first insulating material 120, for example, the second insulating material 120' can be formed at the same time as the first insulating material 120, based on the same materials and processes. Also, the fourth to sixth metal layers m1', m2', and m3' can be substantially identical to the first to third metal layers m1, m2, and m3, for example, the fourth to sixth metal layers m1', m2', and m3' can be formed at the same time as the first to third metal layers m1, m2, and m3, based on the same materials and processes, respectively.

[0067] On the other hand, the various shapes of the through-holes h and via holes v described in Figures 3a to 3m can also be applied to the printed circuit board 100C. For example, the various shapes described above can be applied substantially identically or similarly to the through-holes h and first via holes v, and to the through-holes H and multiple second via holes V. The rest of the explanation can be substantially applied in the same way as the explanation given for printed circuit boards 100A, 100B, etc.

[0068] Figure 10 is a schematic process diagram showing an example of the manufacturing process of the printed circuit board shown in Figure 9.

[0069] On the other hand, the drawing on the left shows a schematic cross-sectional view of the process, while the drawing on the right shows a schematic top view of the cross-sectional view on the left.

[0070] Referring to the drawing, first, through holes h and through-holes H can be formed in the glass layer 110. The through-holes H, like the through holes h, can be formed by chemical and / or mechanical methods such as etching, blasting, laser, or plasma. These can be formed together through the same process. Next, insulating materials 120 and 120' can be applied to the glass layer 110 to fill the through holes h and through-holes H. After this, the portions of the insulating materials 120 and 120' that are positioned on the upper and lower surfaces of the glass layer 110 can be removed. In this process, the portion of the insulating materials 120 and 120' that fills the through holes h can become the first insulating material 120, and the portion that fills the through-holes H can become the second insulating material 120'. Next, a first via hole v can be formed in the first insulating material 120, and multiple second via holes V can be formed in the through-holes H. Laser processing using carbon dioxide gas can be used to process the first via hole v and the multiple second via holes V. These can be formed together through the same process. Next, by sequentially performing sputtering and electroless plating, first and second metal layers m1 and m2 can be formed on the glass layer 110 and inside the first via hole v, and fourth and fifth metal layers m1' and m2' can be formed on the glass layer 110 and inside the multiple second via holes V. The first and second metal layers m1 and m2 and the fourth and fifth metal layers m1' and m2' can be formed together through the same process. Next, in a circuit process including electroplating, a third metal layer m3 can be formed on the glass layer 110 and inside the first via hole v, and a sixth metal layer m3' can be formed on the glass layer 110 and inside the multiple second via holes V. The third metal layer m3 and the sixth metal layer m3' can be formed together through the same process. Through this, a first metal via 130, first and second metal patterns 132 and 134, multiple second metal vias 150, and multiple third and fourth metal patterns 152 and 154 can be formed. If necessary, the other metal patterns 136 and 138 described above can also be formed. The printed circuit board 100C described above can be manufactured through a series of processes.Other explanations can be substantially applied in the same way as those described in the sections on printed circuit boards 100A and 100C, and the manufacturing example of printed circuit board 100A.

[0071] Figure 11 is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 9.

[0072] Referring to the drawings, the printed circuit board 500C may include the structure described in printed circuit board 100C in the core portion 100-3 of the printed circuit board 500A, instead of the structure described in printed circuit board 100A. Therefore, the technical features and resulting technical effects described in printed circuit boards 100A, 100C, and 500A can be included in substantially the same way. In addition, the various shapes described in Figures 3a to 3m can also be applied to the core portion 100-3. A redundant explanation for this will be omitted. Other explanations can be substantially applied in the same way as those described in printed circuit boards 100A, 100C, and 500A.

[0073] Figure 12 is a schematic cross-sectional view showing yet another example of a printed circuit board.

[0074] Referring to the drawing, in the printed circuit board 100C described above, the upper and lower surfaces of the second insulating material 120' can each have concave portions U, and at least one or all of the multiple second via holes V can penetrate between the concave upper and lower surfaces of the second insulating material 120'. Therefore, at least one or all of the upper surfaces of the multiple third metal patterns 152 can be positioned below the upper surface of the first metal pattern 132. Also, at least one or all of the lower surfaces of the multiple fourth metal patterns 154 can be positioned above the lower surface of the second metal pattern 134. Furthermore, at least one or all of the lower surfaces of the multiple third metal patterns 152 can be inclined. Also, at least one or all of the upper surfaces of the multiple fourth metal patterns 154 can be inclined.

[0075] Thus, since the printed circuit board 100D has a structure that is basically similar to that of the printed circuit board 100C described above, it can substantially include the technical effects described above. Furthermore, the upper and lower surfaces of the second insulating material 120' can each have a concave portion U, and such a concave portion U can form a plurality of second metal vias 150 with a small height or thickness. Such a structure can be more easily applied to via-congested regions, which can reduce the height or thickness of vias formed in such via-congested regions, and further reduce the via pitch.

[0076] On the other hand, the various shapes of the through-holes h and via holes v described in Figures 3a to 3m can also be applied to the printed circuit board 100D. For example, the various shapes described above can be applied substantially identically or similarly to the through-holes h and the first via holes v, and to the through-holes H and the multiple second via holes V. The rest of the explanation can be substantially applied in the same way as the explanation given for printed circuit boards 100A, 100C, etc.

[0077] Figure 13 is a schematic process diagram showing an example of the manufacturing process of the printed circuit board shown in Figure 12.

[0078] On the other hand, the drawing on the left shows a schematic cross-sectional view of the process, while the drawing on the right shows a schematic top view of the cross-sectional view on the left.

[0079] Referring to the drawing, first, through holes h and through-holes H can be formed in the glass layer 110. Next, insulating materials 120 and 120' can be applied to the glass layer 110 to fill the through holes h and through-holes H, and after this, the portions of insulating materials 120 and 120' that are placed on the upper and lower surfaces of the glass layer 110 can be removed. In this process, the portion of insulating materials 120 and 120' that fills the through holes h can become the first insulating material 120, and the portion that fills the through-holes H can become the second insulating material 120'. At this time, undulations may occur on the upper and / or lower surfaces of the second insulating material 120' during the process of filling the through-holes H and / or removing a portion of the second insulating material 120'. Next, a first via hole v can be formed in the first insulating material 120, and a plurality of second via holes V can be formed in the through-holes H. Next, first and second metal layers m1 and m2 can be formed on the glass layer 110 and inside the first via hole v, and fourth and fifth metal layers m1' and m2' can be formed on the glass layer 110 and inside the multiple second via holes V. Next, a third metal layer m3 can be formed on the glass layer 110 and inside the first via hole v, and a sixth metal layer m3' can be formed on the glass layer 110 and inside the multiple second via holes V. This allows for the formation of a first metal via 130, first and second metal patterns 132 and 134, multiple second metal vias 150, and multiple third and fourth metal patterns 152 and 154. If necessary, other metal patterns 136 and 138 described above can also be formed. The printed circuit board 100D described above can be manufactured through a series of processes. Further explanations can be substantially applied to printed circuit boards 100A, 100C, and 100D, as well as to the manufacturing examples of printed circuit boards 100A and 100C.

[0080] Figure 14 is a schematic cross-sectional view showing a modified example of the printed circuit board shown in Figure 12.

[0081] Referring to the drawings, the printed circuit board 500D may include the structure described in printed circuit board 100D in the core portion 100-4 of the printed circuit board 500C described above, instead of the structure described in printed circuit board 100C. Therefore, the technical features and resulting technical effects described in printed circuit boards 100A, 100C, 100D, 500A, and 500C described above can be included substantially similarly. In addition, the various shapes described in Figures 3a to 3m can also be applied to the core portion 100-4. A redundant explanation for this will be omitted. Other explanations can be substantially applied similarly to those described in printed circuit boards 100A, 100C, 100D, 500A, and 500C.

[0082] In this disclosure, substantially conformally arranged can be interpreted as being formed along the surface of the target component (e.g., wall, bottom, side, etc.) with a thin film thickness of approximately 1000 nm or less.

[0083] In this disclosure, the expression "cover" can include not only covering the entire surface but also covering at least a portion of it, and can include not only direct covering but also indirect covering. Similarly, the expression "fill" can include not only completely filling the surface but also filling at least a portion of it, and can also include roughly filling the surface. For example, it can include cases where there are some gaps or voids. Similarly, the expression "enclose" can include not only completely enclosing the surface but also partially enclosing or roughly enclosing it. Similarly, "expose" can include not only completely exposing the surface but also partially exposing it, and exposure can mean being exposed from what embeds the structure in question. For example, an opening exposing a pad means exposing the pad from the resist layer, and a surface treatment layer or the like may be further placed on the exposed pad.

[0084] In this disclosure, being positioned within a through-hole, through-hole, or via-hole includes not only cases where the object is completely positioned within the through-hole, through-hole, or via-hole, but also cases where it partially protrudes upward or downward from the cross-section. For example, if an object can be positioned within a through-hole, through-hole, or via-hole on a plane, it can be determined to be positioned within a through-hole, through-hole, or via-hole in a broader sense.

[0085] In this disclosure, the determination can be made including process errors, positional deviations, and measurement errors that occur during the manufacturing process. For example, substantially perpendicular means not only when perfectly perpendicular, but also when approximately perpendicular. Similarly, substantially coplane means not only when they are on the exact same plane, but also when they are on the approximately same plane.

[0086] In this disclosure, substantially identical insulating materials can mean not only completely identical insulating materials, but also insulating materials of the same type. Therefore, the composition of the insulating materials may be substantially the same, but their specific composition ratios may differ slightly.

[0087] In this disclosure, "cross-sectional" can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed from the side. "Planar" can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed from the top or bottom.

[0088] In this disclosure, terms such as "lower side," "bottom," and "bottom surface" are used for convenience to mean the downward direction relative to the cross-section of the drawing, while terms such as "upper side," "top," and "top surface" are used to mean the opposite direction. However, this is merely a definition of direction for explanatory purposes, and the scope of the claims is not specifically limited by such descriptions of direction, and the concepts of "upper" and "lower" can change at any time.

[0089] In this disclosure, the term "connected" includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, the term "electrically connected" includes both physically connected and non-connected cases. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of those components. In some cases, without departing from the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component.

[0090] In this disclosure, thickness, width, length, depth, line width, spacing, pitch, separation distance, surface roughness, etc., can be measured using a scanning microscope or optical microscope based on a cross-section obtained by polishing or cutting the printed circuit board. The cut cross-section can be a vertical or horizontal cross-section, and the values ​​can be measured based on the required cut cross-section. For example, the width of the upper and / or lower ends of a via can be measured on a cross-section obtained by cutting the central axis of the via. In this case, if the values ​​are not constant, the values ​​can be determined by taking the average of the values ​​measured at any five points.

[0091] The expression "example" as used in this disclosure does not mean that each embodiment is identical to the others, but is provided to highlight and illustrate the unique and distinct features of each embodiment. However, the examples presented above do not preclude their implementation in combination with features of other examples. For example, even if a matter described in one example is not described in another example, it can be understood as a description related to the other example, unless there is a description in the other example that contradicts or inconsistes with that matter.

[0092] The terms used in this disclosure are for illustrative purposes only and are not intended to limit the disclosure. Where otherwise, singular expressions include plural expressions unless the context clearly indicates otherwise. [Explanation of symbols]

[0093] 1000 electronic equipment 1010 Mainboard 1020 Chip-related components 1030 Network-related components 1040 Other parts 1050 Camera 1060 Antenna 1070 Display 1080 Battery 1090 signal line 1100 Smartphone 1110 Motherboard 1120 parts 1121 Parts Package 1130 Camera Module 1140 speakers 100A, 100B, 100C, 100D, 500A, 500B, 500C, 500D Printed Circuit Boards 100-1, 100-2, 100-3, 100-4 Core section 110 Glass layer (glass core) 120, 120' Insulating material 130, 150 metal vias 132, 134, 136, 138, 152, 154 Metal Patterns 210, 220 Build-up section 211, 221 Insulating body 212, 222 wiring layer 213, 223 via layers h Through hole H Penetration v, V Beer Hall m1, m2, m3, m1', m2', m3' metal layer 310 semiconductor chips 320 Molding Material 330 Underfill material 410, 420 Electrically connected metals

Claims

1. A glass layer having through holes, A first insulating material having a first via hole is placed inside the through hole, The first metal via is located within the first via hall, A printed circuit board comprising: a first metal layer, at least a portion of which is substantially conformally arranged on the wall surface of the first via hole; a second metal layer, at least a portion of which is substantially conformally arranged on the first metal layer; and a third metal layer, disposed on the second metal layer and filling at least a portion of the first via hole.

2. The first insulating material includes an organic insulating material. The first metal layer contains sputtered metal, The second metal layer contains chemical copper, The printed circuit board according to claim 1, wherein the third metal layer contains electrolytic copper.

3. The first metal layer includes a first sputtering layer connected to the wall surface of the first via hole and a second sputtering layer connected to the chemical copper. The first sputtering layer contains titanium, The printed circuit board according to claim 2, wherein the second sputtering layer contains copper.

4. The printed circuit board according to claim 1, wherein the second metal layer is even thicker than the first metal layer.

5. A first metal pattern connected to the upper side of the first metal via, The present invention further includes a second metal pattern connected to the lower side of the first metal via, The first metal pattern includes a first metal layer substantially conformally extending over the upper surface of the first insulating material and the upper surface of the glass layer, a second metal layer substantially conformally extending over the first metal layer from the upper surface of the first insulating material and the upper surface of the glass layer, and a third metal layer extending over the second metal layer from the upper surface of the first insulating material and the upper surface of the glass layer and projecting above the first via hole. The printed circuit board according to claim 1, wherein the second metal pattern includes a first metal layer substantially conformally extending over the lower surface of the first insulating material and the lower surface of the glass layer, a second metal layer substantially conformally extending over the first metal layer from above the lower surface of the first insulating material and the lower surface of the glass layer, and a third metal layer extending over the second metal layer from above the lower surface of the first insulating material and the lower surface of the glass layer and projecting below the first via hole.

6. The printed circuit board according to claim 5, wherein the extended portion of the first metal layer is in direct contact with the upper and lower surfaces of the first insulating material and the upper and lower surfaces of the glass layer, respectively.

7. The upper surface of the first insulating material is substantially coplane with the upper surface of the glass layer. The printed circuit board according to claim 5, wherein the lower surface of the first insulating material is substantially coplane with the lower surface of the glass layer.

8. The upper surface of the first insulating material is recessed below the upper surface of the glass layer. The lower surface of the first insulating material is recessed above the lower surface of the glass layer. The first metal pattern has a stepped structure on the upper surface of the first insulating material. The printed circuit board according to claim 5, wherein the second metal pattern has a stepped structure on the lower surface of the first insulating material.

9. On the cross-section that penetrates the through hole and the first via hole, The printed circuit board according to claim 1, wherein the shape of the through hole and the shape of the first via hole are independent of each other.

10. The glass layer further has a through portion separated from the through hole, A second insulating material having a plurality of second via holes is placed inside the aforementioned penetration. Multiple second metal vias are arranged within each of the aforementioned multiple second via holes. The printed circuit board according to claim 1, wherein each of the plurality of second metal vias includes a fourth metal layer, at least a portion of which is substantially conformally arranged on the wall surface of each of the plurality of second via holes; a fifth metal layer, at least a portion of which is substantially conformally arranged on the fourth metal layer on the wall surface of each of the plurality of second via holes; and a sixth metal layer, disposed on the fifth metal layer, which fills at least a portion of each of the plurality of second via holes.

11. The second insulating material includes an organic insulating material. The fourth metal layer contains sputtered metal, The fifth metal layer contains chemical copper, The printed circuit board according to claim 10, wherein the sixth metal layer contains electrolytic copper.

12. The aforementioned plurality of second metal vias are each connected to a plurality of third metal patterns on the upper side. The plurality of second metal vias are each connected to a plurality of fourth metal patterns on the lower side. Each of the plurality of third metal patterns includes a fourth metal layer substantially conformally extending on the upper surface of the second insulating material, a fifth metal layer substantially conformally extending from the upper surface of the second insulating material onto the fourth metal layer, and a sixth metal layer extending from the upper surface of the second insulating material onto the fifth metal layer and projecting above each of the plurality of second via holes. The printed circuit board according to claim 10, wherein each of the plurality of fourth metal patterns includes a fourth metal layer substantially conformally extending on the lower surface of the second insulating material, a fifth metal layer substantially conformally extending from the lower surface of the second insulating material onto the fourth metal layer, and a sixth metal layer extending from the lower surface of the second insulating material onto the fifth metal layer and protruding below each of the plurality of second via holes.

13. The upper and lower surfaces of the second insulating material each have a concave portion. The printed circuit board according to claim 10, wherein at least one of the plurality of second via holes penetrates between the concave upper and lower surfaces of the second insulating material.

14. A plurality of third metal patterns are connected to the upper side of each of the plurality of second metal vias, A plurality of fourth metal patterns are connected to the lower side of each of the plurality of second metal vias, A first metal pattern connected to the upper side of the first metal via, The present invention further includes a second metal pattern connected to the lower side of the first metal via, At least one of the plurality of third metal patterns has an upper surface that is positioned below the upper surface of the first metal pattern. The printed circuit board according to claim 13, wherein the lower surface of at least one of the plurality of fourth metal patterns is positioned above the lower surface of the second metal pattern.

15. The printed circuit board according to claim 1, wherein at least another portion of the second metal layer is in direct contact with the first insulating material at the center of the first via hole.

16. A core portion comprising a glass core having through holes, an insulating material disposed within the through holes and having via holes, and metal vias disposed within the via holes, The build-up portion includes an insulating body disposed on the core, one or more wiring layers disposed on or within the insulating body, and one or more via layers disposed within the insulating body. A printed circuit board comprising a first metal layer, at least a portion of which is substantially conformally arranged on the wall surface of the via hole; a second metal layer, at least a portion of which is substantially conformally arranged on the first metal layer; and a third metal layer, disposed on the second metal layer and filling at least a portion of the via hole.

17. The printed circuit board according to claim 16, further comprising a semiconductor chip mounted on the build-up portion.

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