Heat dissipation structure and heat dissipation method thereof
The heat dissipation structure with a duct and airflow generator effectively addresses heat dissipation challenges in high-density electronic devices by using ultrasonic air pulses to maintain performance and safety.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-09-03
- Publication Date
- 2026-03-16
AI Technical Summary
Conventional cooling methods for high-density electronic devices, such as System-on-a-chip (SoC) technology, struggle to effectively dissipate heat due to limited space and waterproofing requirements, leading to performance drops or shutdowns, necessitating innovative active cooling solutions.
A heat dissipation structure comprising a duct with channels and an airflow generating device that uses ultrasonic pulse rate air pulses to induce unidirectional airflow for efficient heat dissipation, utilizing modulation and demodulation means to generate sufficient airflow without blades.
The solution effectively dissipates heat from high-density electronic devices, maintaining performance and safety by generating a steady airflow that absorbs and expels heat, overcoming space and waterproofing constraints.
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Figure 2026048060000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a heat dissipation structure and a heat dissipation method thereof, and more specifically, to a heat dissipation structure and a heat dissipation method thereof for cooling electronic equipment and the like. [Background technology]
[0002] System-on-a-chip (SoC) technology increases integration density but concentrates heat in smaller areas. As electronic devices become smaller and more powerful due to the demands of AI, 5G, and advanced applications, cooling is becoming a critical challenge. Limited space and waterproofing requirements hinder the use of conventional active cooling (e.g., fans). On the other hand, conventional passive cooling solutions such as heat spreaders, vapor chambers, heat sinks, and advanced thermal materials can only suppress temperatures. If heat cannot be effectively dissipated, it becomes necessary to rely on thermal management such as throttling, which can lead to a 50% performance drop or even device shutdown. As power density continues to rise, future compact devices (e.g., DIMM (Dual In-Line Memory Module) cards) may require innovative active cooling solutions to ensure high performance and user safety. [Overview of the project] [Problems that the invention aims to solve]
[0003] Therefore, the main objective of this application is to provide a heat dissipation structure and a heat dissipation method thereof that improve upon the shortcomings of the prior art.
[0004] Embodiments of the present application disclose a heat dissipation structure comprising a duct having channels formed within the duct and an airflow generating device. The heat dissipation structure is disposed on or by a semiconductor device and configured to dissipate heat generated from the semiconductor device, and the airflow generating device is configured to generate an airflow that flows through the channels in the duct in order to dissipate heat generated from the semiconductor device.
[0005] Another embodiment of the present application includes forming a channel across a semiconductor device and generating an air flow through the channel by an air flow generating device, and the air flow dissipates heat generated from the semiconductor device, and discloses a heat dissipation method.
[0006] These and other objects of the present invention will undoubtedly become clear to those skilled in the art after reading the following detailed description of the preferred embodiments shown in various figures and drawings.
Brief Description of the Drawings
[0007] [Figure 1] FIG. 1 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 2] FIG. 2 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 3] FIG. 3 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 4] FIG. 4 is a schematic side view of a heat dissipation structure according to an embodiment of the present invention. [Figure 5] FIG. 5 is a schematic cross-sectional view of a heat dissipation structure according to an embodiment of the present invention. [Figure 6] FIG. 6 is a schematic cross-sectional view of a heat dissipation structure according to an embodiment of the present invention. [Figure 7] FIG. 7 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 8] FIG. 8 is a schematic cross-sectional view of the heat dissipation structure shown in FIG. 7. [Figure 9] FIG. 9 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 10] FIG. 10 is a schematic diagram of the wiring configuration of the AFG device shown in FIG. 5. [Figure 11] FIG. 11 is a schematic diagram of the waveforms of the modulation signal and the demodulation signal of the AFG device shown in FIG. 5. [Figure 12] FIG. 12 is a schematic diagram of the slow motion of the differential mode operation and the common mode operation of the AFG device shown in FIG. 5. [Figure 13] Figure 13 is a schematic diagram of an air pulse according to an embodiment of the present invention. [Figure 14] Figure 14 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 15] Figure 15 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 16] Figure 16 is a schematic diagram of a heat dissipation structure according to an embodiment of the present invention. [Figure 17] Figure 17 is a schematic diagram of the top surface of a semiconductor device according to an embodiment of the present invention. [Modes for carrying out the invention]
[0008] The contents of U.S. Patent No. 1,2356,141, U.S. Application No. 19 / 007580, and U.S. Application No. 19 / 303389 are incorporated into this application by reference.
[0009] For heat dissipation, the present invention provides a heat dissipation structure comprising a duct and an airflow generator (AFG) device. The AFG device is operated to generate air pulses toward or away from the duct opening at an ultrasonic pulse rate. These air pulses induce airflow into a channel formed within the duct by generating a net airflow in a unidirectional direction. The duct is in contact with electronic equipment (e.g., a memory module) and establishes a heat transfer path from the electronic equipment to the surroundings.
[0010] To ensure a large airflow, an AFG device may be introduced that includes modulation and demodulation means. The modulation means uses an ultrasonic carrier frequency f UC It generates ultrasonic pneumatic waves / fluctuations (UAW) with the input signal S. IN It is modulated according to the following. Then, this amplitude-modulated ultrasonic pneumatic wave / variation (AMUAW) has spectral components embedded in the AMUAW that correspond to the ultrasonic carrier frequency ± n·f UCThe signal is demodulated synchronously by the demodulation means so that it is shifted by an integer multiple of (n is a positive integer). As a result of this synchronous demodulation, the spectral components of the AMUAW are partially shifted to the baseband. In this way, the AFG device can be made compact while generating sufficient airflow or air pressure to function as an air pump or bladeless fan.
[0011] For example, Figures 1(a) and 1(b) are schematic diagrams of the top and side views of the heat dissipation structure 10, respectively. The heat dissipation structure 10 includes AFG devices 100a, 100b and a duct (or conduit) 150. The heat dissipation structure 10 is positioned adjacent to the memory module 190 (e.g., a dual inline memory module (DIMM)) to dissipate heat. The duct 150 may or may not be a heat conduction duct.
[0012] AFG devices 100a and 100b can initiate airflow to facilitate heat transfer. Specifically, AFG device 100a is operated to generate air pulses toward the (first) opening of duct 150 at an ultrasonic pulse rate. These air pulses steadily generate a net (first) airflow in one direction (e.g., the -Z direction). Similarly, AFG device 100b is operated to generate air pulses toward the (second) opening of duct 150 at an ultrasonic pulse rate. These air pulses steadily generate a net (second) airflow in one direction (e.g., the +Z direction). The (first and second) airflows (e.g., 500aF and 500bF in Figure 5) can induce a (third) airflow within the channel of duct 150 (e.g., 555 in Figure 5).
[0013] The duct 150 is hollow and forms a channel so that a (third) airflow guided through the channel can cool the memory module 190. Specifically, the channel is connected to AFG devices 100a and 100b, respectively, through (first and second) openings. The (first) airflow from AFG device 100a flows into the channel through the (first) opening, introducing cool air (e.g., ambient temperature) into the channel. The cool air then flows through the channel, absorbing heat from the memory chips 191 of the memory module 190. Subsequently, the heated air is drawn out of the channel by AFG device 100b through the (second) opening, forming a (second) airflow.
[0014] Figure 5 is a schematic cross-sectional view of a heat dissipation structure 50 according to one embodiment of the present invention. The cross-section of the heat dissipation structure 50 may be taken along the cross-sectional line A-A' shown in Figure 1.
[0015] The heat dissipation structures 10 and 50 can be implemented using similar mechanisms. For example, the AFG devices 500a and 500b are positioned directly on one side of the duct 550, while the opposite side of the duct 550 may be in contact with or close to a heat source (e.g., a printed circuit board (PCB) 192 or a memory chip 191 of a memory module 190). In this way, the cool air flowing through the duct 550 is heated by the heat source, while the duct 550 and the AFG devices 500a and 500b move the heated air away from the heat source.
[0016] To promote heat dissipation, the duct 550 may be made of a thermally conductive material (e.g., copper, aluminum, pyrolytic graphite, or graphene). A thermal interface material may be used to eliminate the gap between the duct 550 and the heat source.
[0017] Duct 550 can be a long tube compared to a relatively small AFG device 500a or 500b (e.g., 10-15 mm in length, 10-15 mm in width, and 2-3 mm in thickness). The size of AFG device 500a or 500b may be less than or equal to the size of a single heat source. Duct 550 can completely overlap the heat source to increase the heat transfer area over which heat exchange can occur.
[0018] The geometric features of the duct 550 may relate to the AFG devices 500a and 500b. For example, the channel 555 formed within the duct 550 includes openings 556a and 556b for the AFG devices 500a and 500b. Apart from the openings 556a and 556b, the duct 550 has a closed hollow structure. The ends 551 and 552 of the duct 550 may be designed to be closed because the AFG devices 500a and 500b are located near these ends 551 and 552. Because the ends 551 and 552 are closed, the air pushed or pulled by the AFG devices 500a or 500b enters and exits the channel 555 mainly through the openings 556a and 556b. This push-pull configuration may promote heat dissipation. However, the present invention is not limited thereto, and the duct 550 may alternatively have its ends 551 or 552 open.
[0019] The AFG device 500a, positioned directly on the duct 550 at a location corresponding to the opening 556a, includes a membrane structure 504a (e.g., a membrane or diaphragm). The membrane structure 504a includes flaps 501a and 503a located opposite each other. The operating principle of the AFG device 500a is similar to that disclosed in U.S. Patent No. 1,1943585, No. 1,2317034 and Japanese Patent Application No. 18 / 624105, which are incorporated herein by reference. The flaps 501a and 503a constituting the flap pair 502a operate at an ultrasonic carrier frequency f which can be considered a modulated operation. UCThe flaps 501a and 503a are operated to perform common-mode operation to form an AMUAW of (e.g., 192 kHz or 96 kHz). The flaps 501a and 503a are operated to perform differential operation of ultrasonic openings (e.g., 192 kHz or 96 kHz) which can be considered demodulated operation to form an opening or virtual valve (VV).
[0020] A slit 512a is formed between flaps 501a and 503a, and the slit 512a forms an opening or VV. In this invention, the terms “slit,” “opening,” and “VV” use the same reference numeral (e.g., 512a) because they share the same physical location and represent similar concepts in different aspects. VV 512a emphasizes its opening and closing control capability, while opening 512a specifically emphasizes the open state. By operating flaps 501a and 503a, the distance between the free ends of flaps 501a and 503a increases, forming an opening 512a or VV.
[0021] In the present invention, "flaps 501a and 503a perform common-mode operation" means that flaps 501a and 503a are operated to move in a common direction or are operated by a common drive signal (for example, the modulated signal SM shown in Figure 10). Furthermore, "flaps 501a and 503a perform differential-mode operation" means that flaps 501a and 503a are operated to move / bend in different / opposite directions with respect to a common reference position or are operated by differential pair drive signals (for example, but not limited to, the demodulated signals +SV and -SV shown in Figure 10).
[0022] Since differential mode operation (demodulation) and common mode operation (modulation) are performed simultaneously by the flap pair 502a, in-situ and simultaneous modulation and demodulation can be achieved by a specific wiring scheme. For example, as shown in Figure 10, the AFG device 500a may include an actuator 503aA located on flap 501a and an actuator 503aA located on flap 503a. Each actuator (e.g., 501aA or 503aA) includes an upper electrode and a lower electrode. For example, Figures 10(a), (b), and (c) show details of the areas enclosed by dashed circles in Figure 5, respectively. As shown in Figures 10(a) and (b), the lower electrode of actuator 501aA or 503aA receives the modulation signal SM, and the upper electrode of actuator 501aA or 503aA receives the demodulation signals +SV and -SV of the opposite polarity. A suitable bias voltage V is used for either the lower electrode shown in Figure 10(a) or the upper electrode shown in Figure 10(b). BIAS A bias may be applied. As shown in Figure 10(c), one electrode of actuator 501aA or 503aA receives both (but is not limited to) the modulated signal SM and the demodulated signal +SV or -SV, and an appropriate bias is applied to the other electrode.
[0023] The waveforms of the modulated signal SM and the demodulated signal ±SV can be seen in Figure 11 (or a similar figure). In the embodiment shown in Figure 11, the demodulation frequency of the demodulated signal ±SV (96 kHz) may be half the modulation frequency of the modulated signal SM (e.g., 192 kHz). Specifically, the polarity of the pulses of the modulated signal SM for a constant voltage is given by the 1 operating cycle time T. CY It switches alternately twice. If, at a specific time, the demodulated signal +SV contains a first pulse with a first polarity relative to a constant / average voltage, and the demodulated signal -SV contains a second pulse with a second polarity relative to a constant / average voltage, then although the first and second polarities are opposite, the amplitudes of the first and second pulses are equal. The polarity of the pulses of the demodulated signal +SV or -SV relative to a constant / average voltage is determined by the 1 operating cycle time T. CYThey switch alternately once. As a result, flaps 501a and 503a form aperture 512a with an ultrasonic aperture of 192 kHz, and AFG device 500a generates an air pulse at an ultrasonic pulse rate f Pulse of the ultrasonic carrier frequency f UC with an operating cycle time T CY which is the reciprocal of the ultrasonic pulse rate f Pulse , that is, T CY = 1 / f Pulse and can be so.
[0024] In practice, differential mode operation (demodulation) and common mode operation (modulation) may not occur in a time - division manner. Instead, at a given point in time, the common mode displacement and the differential mode displacement can be combined to cause the net movement of flap 501a or 503a through the above - mentioned wiring scheme. For example, FIG. 12 shows an embodiment of the flap pair 502a (symmetric operation) at times T11 to T17, and the lower corner of FIG. 11 shows an enlarged view of the upper corner of FIG. 11 at these times t 11 ~T17.
[0025] In FIG. 12, from time t 17 when VV512a is considered to be in an open state (i.e., aperture 512a is formed), until T17, flap 501a moves upward and flap 503a moves downward. Similarly, at time T11 (and before), aperture 512a exists in flap pair 502a. The common mode operation of flaps 501a and flap 503a during the period from t 14 to t 14 ~t 17 (or time T11) is effectively "made to vanish".
[0026] In FIG. 12, from time t 11 to t 14 when VV512a is considered to be in a "closed" state, flap 501a moves downward and flap 503a moves upward. This is because flaps 501a and 503a move during the period from t 11 to t 14This means that during this period, it is treated as a continuous membrane and behaves as one (a complete membrane) with respect to the movement of the membrane. When VV512a is in the "closed" state, the difference in displacement of the free ends of flaps 501a and 503a is less than or equal to the thickness of membrane structure 504a.
[0027] The "closed" state of VV512a occurs during the transition of the differential mode motion of flaps 501a and 503a. Specifically, during the (first) transition time (e.g., t 11 ~t 17 During the transition time (for example, t), the flap 501a, driven by the demodulated signal + SV, transitions from upward to downward. 11 ~t 17 In this case, the flap 503a, driven by the demodulated signal-SV, transitions from downward to upward movement. That is, the transition time of flaps 501a and 503a (for example, t 11 ~t 17 ) or the transition time of the demodulated signal -SV and +SV (e.g., t 11 ~t 17 Within this interval, that is, when flaps 501a and 503a move in opposite directions, the demodulated signals -SV and +SV increase or decrease in opposite directions (for example, t 13 ~t 15 During this time, VV512a remains closed. In other words, when VV512a is closed, flaps 501a and 503a are moving.
[0028] The direction of the net airflow of 500 aF can be controlled by adjusting the phase between the modulated signal SM and the demodulated signal ±SV. For example, in Figure 12, the initial transition time t of the demodulated signal +SV is... 11 ~t 17 This occurs when the modulated signal SM is low. In this case, the AFG device 500a can generate an airflow 500aF in one direction. If the demodulated signal ±SV is shifted so that its transition time matches the time interval when the modulated signal SM is high, the AFG device 500a can generate an airflow 500aF in the opposite direction.
[0029] Alternatively, the direction of the net airflow of 500 aF may depend on the modulated signal SM. Specifically, the modulated signal SM may include an alternating current (AC) component or a non-zero direct current (DC) voltage / offset input signal S. IN It can be generated according to the following. The polarity of the DC offset may be related to the direction of the net airflow. For example, Figure 13 is a schematic diagram of an air pulse AP according to an embodiment of the present invention. During a time interval T1, the air pulse AP1 generated by the AFG device 500a can steadily generate a (first) net airflow in the (first) direction D1 in response to a positive DC offset. On the other hand, during a time interval T2, the air pulse AP2 generated by the AFG device 500a can steadily generate a net airflow in a second direction D2 opposite to the first direction D1 in response to a negative DC offset.
[0030] In other words, the AFG device 500a can generate a unidirectional net airflow (e.g., 500aF). Alternatively, the AFG device 500a can switch the direction of its airflow 500aF. However, the time interval T1 or T2 (e.g., 0.5 seconds) is the operating cycle time T CY Alternatively, because it is longer than the reciprocal of the minimum audible frequency (e.g., 10 Hz), the net airflow (first or second) generated by the air pulse AP1 or AP2 can be considered steady in a single direction D1 or D2.
[0031] The intensity of the net airflow of 500 aF is controllable. Specifically, the intensity of the net airflow of 500 aF may be affected by the magnitude of the modulation signal SM. For example, the intensity of the net airflow of 500 aF may be a function of the DC offset. The intensity of the net airflow of 500 aF may be determined by the amplitude of individual air pulses (e.g., AP1 or AP2) (e.g., peak values p1, p3 or p5 in Figure 13). The amplitude of air pulses AP1 or AP2 may vary from pulse to pulse or may be consistent between pulses.
[0032] Figure 13 shows the operation cycle time T. CYThe internal air pulses (e.g., AP1 or AP2) are asymmetric. The degree of asymmetry is assessed by the ratio of p2 to p1, where p1 > p2. Here, p1 represents the peak value of a first half-cycle pulse with a first polarity relative to a reference level, and p2 represents the peak value of a second half-cycle pulse with a second polarity relative to a reference level. This reference level may correspond to ambient conditions (e.g., ambient pressure or zero airflow).
[0033] The asymmetry of the air pulse (e.g., AP1 or AP2) may indicate the presence of low-frequency components in the air pulse AP1 or AP2 generated by the AFG instrument 500a. The greater the asymmetry, the stronger the baseband spectral component of the air pulse AP1 or AP2.
[0034] The AFG device 500a can generate an asymmetric air pulse AP1 or AP2 by matching the opening timing of VV512a (in response to the demodulated signal ±SM) with the acceleration timing of the common-mode operation of flaps 501a and 503a (in response to the modulation drive signal SM). Specifically, this is the demodulation operation of the AFG device 500a that converts the symmetric UAW generated through the modulation operation into an asymmetric air pulse (e.g., AP1 or AP2). If the "open" period of VV512a overlaps with the time interval of one polarity of the acceleration of the common-mode flap operation, the AFG device 500a generates a single-ended (SE) or SE-like air pulse. Therefore, as shown in Figure 12, the transition time of the demodulated signal ±SV may not coincide with the transition time of the modulation signal SM. In other words, the asymmetry of the pulse depends on the appropriate timing for opening VV512a.
[0035] Opening the VV512a does not determine the air pulse AP or the strength of the AP, but rather affects how strong the "near-zero pressure" effect is. When the VV512a is open, the "net-zero pressure" effect becomes more pronounced, self-neutralization is completed, the asymmetry becomes more pronounced, and a larger baseband signal is produced.
[0036] The AFG apparatus 500a can be configured / constructed using different technologies depending on the application requirements. In Figure 5, a chamber 515a is defined between the cap structure 511a and the film structure 504a. The film structure 504a, supported by the support structure 521a, can be manufactured using a MEMS (microelectromechanical systems) manufacturing process. The support structure 521a can be formed by etching a silicon (Si) substrate with a thickness of 250 to 500 micrometers. On this Si substrate, flaps 501a and 503a can be formed by etching a thin layer, typically 3 to 6 micrometers thick, made of silicon-on-insulator (SOI) or poly-on-insulator (POI). Actuators 501aA and 503aA can be formed by depositing layers of piezoelectric material, such as lead zirconate titanate (PZT), on the flap pair 502a.
[0037] The number of AFG devices can be adjusted for different scenarios. For example, Figure 2 is a schematic diagram of a heat dissipation structure 20 according to one embodiment of the present invention. The heat dissipation structure 20 may include only a single AFG device 200 located substantially near one end of the duct 250 of the dissipation structure 20. The number of AFG devices 200 (i.e., 1) is less than the number of memory chips 291 in the memory module 290 (i.e., 4).
[0038] Even a single AFG device (i.e., 200) can help remove excess heat from the memory chip 291. Specifically, the AFG device 200 is operated to generate air pulses that can produce a steady net airflow (e.g., 600 bF) in the direction -Z or +Z. Thus, the AFG device 200 can draw cool air into the duct 250 or push hot air out of the duct 250. As a result, the AFG device 200, positioned directly on the duct 250, can move heated air within the duct 250.
[0039] Figure 6 is a schematic cross-sectional view of a heat dissipation structure 60 according to one embodiment of the present invention. The cross-section of the heat dissipation structure 60 may be taken along the cross-sectional line B-B' shown in Figure 2. The duct 650 of the AFG device 600 or the heat dissipation structure 60 may be used to implement the AFG device 200 or the duct 250.
[0040] The channel 655 formed in the duct 650 has openings 656a and 656b to form an airflow path. The channel 655 is connected to the AFG device 600 via opening 656b so that a net airflow 600bF driven by the AFG device 600 flows out of (or into) the channel 655 through opening 656b. Because the AFG device 600 is located near end 652 of the duct 650, the end 652 and the opposite end 651 of the duct 650 may be designed to be closed and open, respectively. Corresponding to the airflow 600bF, the airflow 600aF may flow into (or out) the channel 655 via opening 656a near end 651.
[0041] The position of the AFG device can be adjusted according to different scenarios. For example, Figures 3(a) and (b) are schematic diagrams of the heat dissipation structure 30, respectively. The heat dissipation structure 30 may include only a single AFG device 300 located substantially near the center of the duct 350 of the heat dissipation structure 30 in order to establish a center-pull configuration.
[0042] The center-pull configuration allows for the directionation of airflow in different directions within the duct 350. For example, to expel hot air from the duct 350, the AFG device 300 generates an air pulse that can steadily produce a net airflow in the +Z direction. This net airflow forms an airflow 300bF' directed substantially in the +Z direction outward from the AFG device 300, creating a localized low pressure within the duct 350. This low pressure draws in cool ambient air through openings 356a and 356b located at opposite ends 351 and 352 of the duct 350, forming airflows 300aF and 300cF. Thus, the air within the duct 350 can move substantially in the +X and -X directions across the channels of the duct 350 to absorb heat from the memory chip 391 of the memory module 390.
[0043] In Figure 3, the AFG device 300 is top-firing. This means that the cap structure of the AFG device 300 (e.g., 611 in Figure 3) has an opening formed at the top of the cap structure (e.g., 611p in Figure 3). The top-firing AFG device 300 generates a net airflow in the direction of +Z or -Z, where the flaps of the AFG device 300 substantially move. In another embodiment, the AFG device is side-firing. This means that the cap structure of the AFG device has an opening formed in the side wall of the cap structure.
[0044] For example, Figures 7(a) and 7(b) are schematic diagrams of the heat dissipation structure 70, respectively. Figures 8(a) and 8(b) are schematic cross-sectional diagrams of the heat dissipation structure 70 along the cross-sectional lines C-C' and D-D' shown in Figure 7, respectively. The heat dissipation structure 70 may include a side-launching type AFG device 700 and a duct 750.
[0045] Similar to the top-launching AFG device 300 shown in Figure 3, in Figure 7, the direction of airflow from the side-launching AFG device 700 outward is perpendicular to the direction of airflow from the opening 756a or 756b of the duct 750. For example, the AFG device 700 generates an air pulse capable of steadily producing a net airflow of 700bF in the direction +Z. This net airflow 700bF forms an airflow 700bF' directed substantially outward from the AFG device 700 in the direction +Y. The localized low pressure within the AFG device 700 caused by the net airflow draws hot air into the AFG device 700 from the duct 750. As a result, cold ambient air is forced into the duct 750 through the openings 756a and 756b, forming an airflow 700aF or 700cF substantially in the direction ±X, perpendicular to both directions +Z and +Y.
[0046] In Figure 8, the duct 750 has walls W of substantially uniform thickness, although this is not limited to walls W3. For example, wall W3 may be thicker than wall W4. Alternatively, wall W1 or W2 may be thinner than wall W5 or W6.
[0047] In Figure 8, the length LN7 of the duct 750 in direction X is greater than the width WD7 in direction Y or the thickness TH7 in direction Z. Directions ±X are the directions in which the memory chips 791 are aligned to form an array, and directions ±Z are the primary directions of operation for the flaps 701 and 703 of the AFG device 700. The directions ±X in which the airflows 700aF and 700bF flow out through the openings 756a and 756b are perpendicular to the direction +Y in which the airflow 700bF' flows out through the opening 711p of the AFG device 700.
[0048] Optionally, length LN7, width WD7, or thickness TH7 is the ultrasonic carrier frequency f UC The corresponding wavelength λ UC Multiples of λ, wavelength λ UC Half an odd number of times or wavelength λ UC It is substantially different from an odd multiple of 1 / 4 of . Optionally, the slit 712 between flaps 701 and 703 is positioned so as not to align with the antinode or node of the resonance of the duct 750. Optionally, the membrane structure 704 of the AFG device 700 is symmetric with respect to the plane of symmetry XZ or YZ of the duct 750 when not activated (or in the "closed" state).
[0049] A single heat dissipation structure may be positioned adjacent to two or more memory modules. For example, Figures 4(a) and (b) are schematic side cross-sectional views of heat dissipation structures 40a and 40b according to embodiments of the present invention. The duct 450 of the heat dissipation structure 40a or 40b is located between two memory modules 490a, 490b, or 490c that are opposite each other. The AFG device 400 of the heat dissipation structure 40a or 40b is located between two adjacent memory chips 491b and 491c on memory modules 490b and 490c. The surface of the duct 450 may be in contact with PCBs 492a, 492b, or 492c (as shown in Figure 4(a)) or memory chips 491a, 491b, or 491c (as shown in Figure 4(b)).
[0050] A single memory module may be positioned adjacent to two or more heat dissipation structures. For example, Figure 9(a) is a schematic side view of heat dissipation structures 90a and 90c according to one embodiment of the present invention. A memory module 990 may be sandwiched between heat dissipation structures 90a and 90c.
[0051] AFG devices of a specific configuration (e.g., 900a and 900c) can add more airflow to the memory module 990 based on the principles of fluid dynamics. For example, an airflow 900aF' induced by an air pulse from AFG device 900a of the heat dissipation structure 90a and steadily directed in the +Z direction can pull air from the rear and entrain it laterally. Similarly, an airflow 900cF' induced by an air pulse from AFG device 900c of the heat dissipation structure 90c and steadily directed in the +Z direction can push air forward and entrain it laterally. That is, airflows 900aF' and 900cF' induce an airflow 900eF in the +Z direction, which further cools the area around the memory module 990. Similarly, the airflows 900bF' and 900dF' generated by the AFG device 900b of the heat dissipation structure 90a and the AFG device 900d of the heat dissipation structure 90c can induce an airflow 900fF in direction -Z. The induced airflows 900eF and 900fF assist in heat dissipation.
[0052] The configuration of the AFG device and duct can be changed depending on the application scenario. For example, Figure 9(b) is a schematic side view of a heat dissipation structure 90g according to an embodiment of the present invention.
[0053] The AFG devices 900g, 900h, and 900i of the duct 950g and the heat dissipation structure 90g influence each other and are closely connected. For example, whether the end 951g or 952g of the duct 950g is closed may depend on the location of the nearby AFG device or the airflow direction of the AFG device. In one embodiment, the end 952g may be open, and therefore heated air exits the heat dissipation structure 90g through the adjacent AFG device 900i or the opening in the duct 950g (e.g., the opening at end 952g). Alternatively, the direction of the airflow caused by the AFG device (e.g., 900g) may depend on the location of the AFG device (e.g., 900g, 900h, or 900i) of the heat dissipation structure 90g or the location of the opening in the duct 950g (e.g., the opening at end 952g).
[0054] The number, temperature, or power density of memory chips (e.g., 991) in a memory module (e.g., 990) may be a determining factor. For example, the number (e.g., 3) of AFG devices (e.g., 900g, 900h, 900i) in a heat dissipation structure 90g may be a function of the number or power density of memory chips (e.g., 991) in a memory module (e.g., 990) located adjacent to the heat dissipation structure 90g. The distance between two adjacent AFG devices (e.g., 900g and 900h) may be a function of the number or power density of memory chips located between them. The intensity of the airflow generated by an AFG device (e.g., 900g) may be controllable according to the temperature of the memory module. Alternatively, the air pulses generated by an AFG device (e.g., 900g) may flow as a continuous or periodic stream to regulate the temperature of the memory module.
[0055] Although the above description explains the case where the chips shown / mentioned are memory chips, this is for illustrative purposes only and is not limited to memory. Some of the chips shown above may be replaced with other types of (semiconductor) chips, which is also within the scope of the present invention. For example, some of the chips may be CPUs / GPUs (central processing units / graphics processing units), controllers, DRAMs, NAND flash memory, etc. The heat dissipation structure of the present invention can be placed on, by, or on these chips for heat dissipation.
[0056] In Figure 5, the configuration and operation of the AFG device 500b are the same as those of the AFG device 500a, but are not limited thereto. For example, Figure 9(c) is a schematic top view of the membrane structure 904m and membrane structure 904n relative to the duct 950 of the heat dissipation structure 90 according to one embodiment of the present invention. As shown in Figure 9(c), the membrane structures 904m and 904n positioned above the openings 956m and 956n of the duct 950 have different configurations. This may help reduce resonance.
[0057] In Figure 9(c), the orientation of the flap pair of AFG device 900m (e.g., 906m) is different from the orientation of the flap pair of AFG device 900n (e.g., 906n). For example, the plane of symmetry of the flap of AFG device 900m (e.g., 907m) is perpendicular to the plane of symmetry of the flap of AFG device 900n (e.g., 907n). Apart from the orientation, the structure and operation of AFG device 900m and AFG device 900n may be the same or different.
[0058] In one embodiment, the structure and operation of two adjacent flap pairs may be identical. For example, the two opposite flaps 901m and 903m that constitute flap pair 902m of AFG device 900m are operated to move in opposite directions to form a VV between them. Similarly, adjacent flap pair 906m may be operated to form a VV between flaps 907m and 905m with no slit between flap 905m and flap 903m, and flap 905m adjacent to flap 903m. By similarity, all VVs of AFG device 900m may be closed simultaneously, or similarly, they may be opened simultaneously. In the two adjacent flap pairs 902m and 906m, current flows between the two adjacent flap pairs 902m and 906m by electrically connecting their lower electrodes and moving them in opposite directions. This contributes to a reduction in overall power consumption.
[0059] In one embodiment, the structure and operation of two adjacent flap pairs may differ. For example, flap pair 902n of AFG device 900n generates a (first) air pulse toward aperture 956n in response to demodulated and modulated signals, while flap pair 906n of AFG device 900n may generate a (second) air pulse toward the same aperture 956n in response to different demodulated and modulated signals. The demodulated signal for flap pair 902n (e.g., 901n) may be a delayed version of the demodulated signal for flap pair 906n (e.g., operating cycle time T). CY T is half of CY (Delayed by 2). Furthermore, the modulated signal of flap pair 902n can be considered an inverted or polarity-inverted version of the modulated signal of flap pair 906n. Correspondingly, the first air pulse and the second air pulse can be interleaved with each other and in time to increase the pulse rate (e.g., double).
[0060] In one embodiment, the operation of two flap pairs in different AFG devices may differ. For example, the demodulated or modulated signal for the flap of flap pair 902m (e.g., 901m) may be a delayed version of the demodulated or modulated signal for the flap of flap pair 902n (e.g., 901n).
[0061] Figure 14 or Figure 15 shows a schematic diagram of a heat dissipation structure A0 / B0 according to one embodiment of the present invention. The heat dissipation structure A0 / B0 includes ducts A50 / B50 and AFG devices A00 / B00. Ducts A50 / B50 include channels (or air passages) formed inside them. AFG devices A00 / B00 generate airflow through the channels. Specifically, AFG devices A00 / B00 draw in cold air through channels formed in ducts A50 / B50 and discharge hot air.
[0062] The heat dissipation structure A0 / B0 may be placed on or by the semiconductor device A90 / B90. The airflow generated by the AFG device A00 / B00 is configured to dissipate the heat generated from the semiconductor device A90 / B90. In one embodiment, the semiconductor device A90 / B90 may include, but is not limited to, a flip-chip grid array (FCBGA) package.
[0063] Figure 16 shows a schematic diagram of a heat dissipation structure C0 according to one embodiment of the present invention. The heat dissipation structure C0 includes an AFG device C00 disposed on or by the semiconductor device C90, which may also include an FCBGA package. In Figure 16, the ducts of the heat dissipation structure C0 are omitted. In Figure 16, the AFG device C00 is molded on the semiconductor device C90 via a molding material C02.
[0064] In Figures 14 to 16, the front of the AFG device A00 / B00 / C00 is positioned toward the first direction (-Z) and / or the semiconductor device A90 / B90 / C90, while the rear of the AFG device A00 / B00 / C00 is positioned toward the second direction (+Z) opposite to the first direction. In addition, the AFG device can exhaust hot air in a direction parallel to or perpendicular to the +Z direction (the Z direction is perpendicular to the front / rear of the AFG device (parallel to the XY plane)).
[0065] Figure 17 is a schematic top view of a semiconductor device D90 according to one embodiment of the present invention. The semiconductor device D90 may be or may include an SSD (which can also be considered a type of memory module) including a controller D92 and a flash memory D94. The flash memory D94 may be a NAND flash memory. Optionally, the SSD D90 may include a DRAM D96 (DRAM: Dynamic Random Access Memory).
[0066] The heat dissipation structure of the present invention may be placed on or from the semiconductor device or SSD D90 to dissipate heat generated by the controller D92, DRAM D96, or flash memory D94, which may facilitate the operation of the SSD D90.
[0067] The use of order-indicating terms such as "first" and "second" does not imply that one element takes precedence over another, is superior, or implies a sequence of events in which the actions of a method or method are performed, or that all elements must exist simultaneously. These terms are merely used as labels to distinguish one element having a certain name from another element having the same name.
[0068] The term "substantially" generally implies that small deviations may or may not exist. For example, the terms "substantially parallel" or "substantially aligned" indicate that the angle between two components may be less than or equal to a certain threshold (e.g., 5 degrees, 1 degree, or 0.1 degrees). The term "substantially aligned" indicates that the deviation between two components may be less than or equal to a certain threshold (e.g., 1 or 0.1 micrometers or milliseconds). The term "substantially identical" indicates that the deviations are within a certain percentage (e.g., 5%, 1%, or 0.1%).
[0069] The technical features described in the embodiments of the present invention can be mixed or combined in various ways, provided that there is no contradiction between them.
[0070] The heat dissipation structure of the present invention can facilitate direct chip cooling using microducts for cold air intake or hot air exhaust. Furthermore, the heat dissipation structure can improve heat removal from heat sinks, spreaders, or steam chambers. Due to its high heat dissipation capacity, the present invention helps reduce reliance on expensive materials and avoid performance degradation.
[0071] In summary, the AFG device for heat dissipation structures of the present invention is compact yet capable of generating a large airflow. By effectively moving air across a single component or chip at the device level, the present invention has the potential to revolutionize conventional approaches to thermal management.
[0072] Those skilled in the art will readily understand that many modifications and changes can be made to the apparatus and method while maintaining the teachings of the present invention. Accordingly, the above disclosure should be construed as being limited only to the scope of the appended claims.
Claims
1. A duct, wherein a channel is formed inside the duct, Airflow generating device, A heat dissipation structure including, The heat dissipation structure is placed on or by a semiconductor device, and is configured to dissipate heat generated from the semiconductor device. The airflow generating device is a heat dissipation structure configured to generate an airflow that flows through the channel in the duct in order to dissipate the heat emitted from the semiconductor device.
2. The length of the duct in the first direction is greater than the width or thickness of the duct. The heat dissipation structure according to claim 1, wherein the air in the duct moves substantially in the first direction.
3. The heat dissipation structure according to claim 1, wherein the semiconductor device includes a memory module.
4. The duct has a first surface and a second surface opposite to the first surface. The airflow generating device is positioned directly on the first surface, The heat dissipation structure according to claim 3, wherein the second surface is in contact with the substrate or memory chip of the memory module.
5. The heat dissipation structure according to claim 3, wherein the duct is located between two memory modules that are opposite each other.
6. The semiconductor device includes a controller and flash memory. The heat dissipation structure according to claim 1, wherein the duct overlaps with the controller or the flash memory.
7. The semiconductor device further includes dynamic random access memory (DRAM), The heat dissipation structure according to claim 1, wherein the duct overlaps with the DRAM.
8. The semiconductor device includes a plurality of chips, The heat dissipation structure according to claim 1, wherein the duct overlaps with the plurality of chips.
9. The heat dissipation structure according to claim 1, wherein the semiconductor device includes a flip-chip ball grid array (FCBGA) package.
10. The heat dissipation structure according to claim 1, wherein the semiconductor device includes a solid-state drive (SSD).
11. The heat dissipation structure according to claim 1, comprising a plurality of airflow generating devices.
12. A first airflow generating device configured to generate a first airflow toward the channel, A second airflow generating device configured to generate a second airflow away from the channel, The heat dissipation structure according to claim 1, including the following:
13. The airflow generating device includes a membrane structure, The heat dissipation structure according to claim 1, wherein the membrane structure is configured to operate to generate a plurality of air pulses at an ultrasonic pulse rate.
14. The membrane structure includes a pair of flaps, the pair of flaps including a first flap and a second flap that are opposite to each other. The heat dissipation structure according to claim 13, wherein the pair of flaps is configured to perform differential mode operation to form a virtual valve or to form an opening with an ultrasonic opening synchronized with the ultrasonic pulse rate.
15. The heat dissipation structure according to claim 14, wherein the virtual valve is closed for a period of time corresponding to the first transition time of the first flap and the second transition time of the second flap.
16. The aforementioned pair of flaps receives a modulated signal and performs common-mode operation. The heat dissipation structure according to claim 14, wherein the pair of flaps receives a demodulated signal and performs the differential mode operation.
17. The heat dissipation structure according to claim 16, wherein the modulation frequency of the modulated signal is twice the demodulation frequency of the demodulated signal.
18. The heat dissipation structure according to claim 1, wherein the duct is a heat conduction duct.
19. The heat dissipation structure according to claim 1, wherein the duct includes a first opening.
20. The heat dissipation structure according to claim 1, wherein the airflow generating device is formed on the semiconductor device via a molding material.
21. The front side of the airflow generating device is positioned facing the first direction and toward the semiconductor device. The heat dissipation structure according to claim 1, wherein the rear side of the airflow generating device is arranged toward a second direction opposite to the first direction.
22. The heat dissipation structure according to claim 1, wherein the airflow generating device discharges air in a direction perpendicular or parallel to the front side of the airflow generating device.
23. Forming channels on a semiconductor device, The airflow generating device generates airflow through the channel, Includes, A heat dissipation method wherein the airflow dissipates heat emitted from the semiconductor device.
24. The heat dissipation method according to claim 23, comprising forming a duct, wherein the channel is formed within the duct.
25. The heat dissipation method according to claim 24, wherein the duct is a heat conduction duct.