Membrane structures and electronic devices

Abstract

The present invention provides a film structure having a piezoelectric film deposited on a substrate, wherein the piezoelectric film contains c-axis oriented and in-plane oriented LiNbO3 or LiTaO3, and the grain size of the crystal grains is 100 nm or more, thereby suppressing the degradation of electronic devices caused by grain boundaries of the piezoelectric film, and providing a film structure that can be expected to improve the characteristics of electronic devices. [Solution] The film structure 10 includes a Si layer 12a, a ZrO2 layer 12b which is a buffer film containing ZrO2 formed on the Si layer 12a, and a piezoelectric film 11 formed on the ZrO2 layer 12b. The Si layer 12a is an SOI layer in an SOI substrate which includes a Si substrate, or a substrate made of a Si substrate, an insulating layer on the substrate, and an SOI layer made of a Si film on the insulating layer. The piezoelectric film 11 contains LiNbO3 or LiTaO3 which is c-axis oriented and in-plane oriented, and whose crystal grain size is 100 nm or more.

Description

Technical Field

[0001] The present invention relates to a film structure and an electronic device.

Background Art

[0002] A film structure having a substrate and a piezoelectric film formed on the substrate, and an electronic device including the film structure are known. Further, as the piezoelectric film, a piezoelectric film having a ilmenite structure such as lithium niobate (LiNbO3) is known.

[0003] Japanese Patent Application Laid-Open No. 2013-173647 (Patent Document 1) discloses a technique in which at least one layer of an epitaxially grown underlayer film mainly composed of zirconium oxide (ZrO2) is formed on a single crystal Si (111) substrate surface in a dielectric multilayer thin film, and an epitaxially grown ilmenite structure film made of a dielectric material having an ilmenite structure is formed on the underlayer film.

[0004] Japanese Patent Application Laid-Open No. 2016-1098 (Patent Document 2) discloses a technique having a single crystal substrate, a dielectric layer, and a buffer layer provided between the single crystal substrate and the dielectric layer, where the dielectric layer is lithium niobate (LiNbO3) or lithium tantalate (LiTaO3), the c-axis of the crystal constituting the dielectric layer is substantially parallel to the main surface of the single crystal substrate, the buffer layer is hexagonal LiNbO2 or LiTaO2, and the c-axis of the crystal constituting the buffer layer is substantially parallel to the main surface of the single crystal substrate.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] The technology described in Patent Document 1 above involves a LiNbO3 film, which is a piezoelectric film, being c-axis oriented on a Si(111) substrate, with the polarization direction of the piezoelectric film being perpendicular to the substrate. However, it does not disclose anything regarding in-plane orientation or grain size of crystal grains of 100 nm or more.

[0007] On the other hand, the technology described in Patent Document 2 also involves hexagonal LiNbO2 or LiTaO2, and while it is disclosed that the c-axis of the crystals constituting the buffer layer is substantially parallel to the main plane of the single-crystal substrate, nothing is disclosed regarding in-plane orientation or grain size of crystal grains of 100 nm or more.

[0008] Furthermore, conventional methods for developing lead-free ferroelectric materials have attempted to achieve high performance by adding many elements to lead-free ferroelectric ceramics. However, even when high performance is achieved, ceramics suffer from significant losses due to grain boundaries, difficulty in utilizing crystal anisotropy to maximize material performance, and high power consumption. On the other hand, single crystals have large grain sizes of 100 nm or more, and since there are almost no grain boundaries, there are no losses due to grain boundaries, and it is expected that high-performance, low-power ferroelectric devices can be realized.

[0009] Epitaxial growth is a known method for forming single-crystal thin films (also called in-plane oriented thin films). In this context, in-plane orientation refers to the regularity of the crystal orientation in the direction horizontal to the substrate. However, with the epitaxial growth methods attempted so far, it has been extremely difficult to obtain in-plane oriented thin films in film structures having a piezoelectric film deposited on a substrate. Until now, no thin films with in-plane orientation and a grain size of 100 nm or more in film structures having a piezoelectric film containing LiNbO3 or LiTaO3 deposited on a substrate have been known.

[0010] Furthermore, while film structures having a piezoelectric film containing LiNbO3 or LiTaO3 deposited on a substrate that are c-axis oriented are generally known, as mentioned above, it has not been easy to obtain one that is both c-axis oriented and in-plane oriented.

[0011] The present invention has been made to solve the problems of the prior art described above, and aims to provide a film structure having a piezoelectric film deposited on a substrate, which contains c-axis oriented and in-plane oriented LiNbO3 or LiTaO3, and whose crystal grain size is 100 nm or more. [Means for solving the problem]

[0012] The inventors have discovered that by using a buffer film containing ZrO2 and forming a film containing LiNbO3 or LiTaO3 on the buffer film formed on a substrate, a piezoelectric film containing c-axis oriented and in-plane oriented LiNbO3 or LiTaO3, with a grain size of 100 nm or more, can be obtained, thus completing the present invention. Specifically, the present invention provides the following.

[0013] (1) A substrate and A buffer film formed on the substrate, A piezoelectric film formed on the buffer film, It has, The substrate is a Si substrate, or an SOI substrate comprising a substrate made of a Si substrate, an insulating layer on the substrate, and an SOI layer made of a Si film on the insulating layer. The buffer film contains ZrO2, The piezoelectric film comprises c-axis oriented and in-plane oriented LiNbO3 or LiTaO3, A film structure in which the grain size of the crystal grains is 100 nm or larger.

[0014] (2) The film structure according to (1), wherein the piezoelectric film contains LiNbO3 or LiTaO3, and the full width at half maximum of the rocking curve (RC) is 1.5° or less.

[0015] (3) The piezoelectric film contains single-crystalline LiNbO3 or LiTaO3, and the film structure according to claim 1 or 2.

[0016] (4) In the film structure according to any one of (1) to (3) above, The film structure having a metal film formed between the buffer film and the piezoelectric film.

[0017] (5) In the film structure according to any one of (1) to (4) above, The metal film contains Pt oriented in (111), and the film structure.

[0018] (6) In the film structure according to any one of (1) to (5) above, The metal film is a Pt film, a Mo film, a W film, a Ru film or a Cu film, and the film structure.

[0019] (7) In the film structure according to any one of (1) to (6) above, The metal film and the buffer film are each single-crystalline, and the film structure.

[0020] (8) In the film structure according to any one of (1) to (7) above, It has a SrRuO3 film formed between the metal film and the piezoelectric film, The SrRuO3 film has a cubic crystal structure, and the film structure. <00...​​​​​​​​​​​​​The aforementioned film structure is an electronic device having a matching layer formed on the substrate.

[0024] (12) In an electronic device described in any one of paragraphs (9) to (11) above, An electronic device in which a hollow portion is provided at the lower part of the piezoelectric film.

[0025] (13) In an electronic device described in any one of paragraphs (9) to (12) above, The film structure is an electronic device having an upper electrode formed on the upper part of the piezoelectric film and a lower electrode formed on the lower part of the piezoelectric film.

[0026] (14) In an electronic device described in any one of paragraphs (9) to (13) above, An electronic device in which the area of ​​the overlapping portion between the upper electrode and the lower electrode is smaller than the area of ​​the hollow portion.

[0027] (15) In an electronic device described in any one of paragraphs (9) to (14) above, An electronic device in which the area of ​​the overlapping portion between the upper electrode and the lower electrode is 1 / 2 or less of the area of ​​the hollow portion.

[0028] (16) In an electronic device described in any one of paragraphs (11) to (15) above, The matching layer is made of a material whose hardness increases with increasing temperature, in this electronic device.

[0029] (17) In the electronic device described in (16) above, The aforementioned material is a Si compound, and the electronic device is made of this material.

[0030] A brief overview of some of the representative inventions disclosed in this application is as follows:

[0031] A film structure according to one aspect of the present invention comprises a substrate, a buffer film formed on the substrate, and a piezoelectric film formed on the buffer film. The substrate is a Si substrate, or an SOI substrate comprising a substrate made of a Si substrate, an insulating layer on the substrate, and an SOI layer made of a Si film on the insulating layer; the buffer film contains ZrO2; and the piezoelectric film contains c-axis oriented and in-plane oriented LiNbO3 or LiTaO3, with a grain size of 100 nm or more.

[0032] In another embodiment, the film structure may have a metal film formed between the buffer film and the piezoelectric film.

[0033] In another embodiment, the metal film may contain Pt.

[0034] In another embodiment, the metal film may be a Pt film, a Mo film, a W film, a Ru film, or a Cu film.

[0035] In another embodiment, the film structure may have a SrRuO3 film formed between a metal film and a piezoelectric film, and the SrRuO3 film may have a cubic crystal structure.

[0036] An electronic device according to one aspect of the present invention is an electronic device comprising the film structure.

[0037] An electronic device according to one aspect of the present invention is an electronic device comprising the film structure, wherein the film structure has comb-tooth electrodes formed on the upper or lower surface of the piezoelectric film.

[0038] In another embodiment, the film structure may have a matching layer formed on the substrate.

[0039] In another embodiment, a hollow portion may be provided at the bottom of the piezoelectric film.

[0040] In another embodiment, the membrane structure may have an upper electrode formed on the upper part of the piezoelectric film and a lower electrode formed on the lower part of the piezoelectric film.

[0041] In another embodiment, the area of ​​the overlapping portion between the upper electrode and the lower electrode may be smaller than the area of ​​the hollow portion.

[0042] In another embodiment, the area of ​​the overlapping portion between the upper electrode and the lower electrode may be 1 / 2 or less of the area of ​​the hollow portion.

[0043] In another embodiment, the film structure may have a matching layer formed on the substrate.

[0044] In another embodiment, the matching layer may be made of a material whose hardness increases with increasing temperature.

[0045] In another embodiment, the material may be a Si compound. [Effects of the Invention]

[0046] By applying one aspect of the present invention, a film structure having a piezoelectric film formed on a substrate comprises a substrate, a buffer film formed on the substrate, and a piezoelectric film formed on the buffer film. The substrate is a Si substrate, or an SOI substrate comprising a substrate made of a Si substrate, an insulating layer on the substrate, and an SOI layer made of a Si film on the insulating layer. The buffer film contains ZrO2, and the piezoelectric film contains c-axis oriented and in-plane oriented LiNbO3 or LiTaO3, with a grain size of 100 nm or more. This film structure can be obtained, thereby suppressing the degradation of electronic devices caused by grain boundaries of the piezoelectric film. As a result, not only can improvements in electronic device characteristics be expected, but also lower power consumption can be expected. Furthermore, it can contribute to extending the lifespan of electronic devices. [Brief explanation of the drawing]

[0047] [Figure 1] This is a cross-sectional view of the membrane structure according to Embodiment 1. [Figure 2] This is a cross-sectional view of the membrane structure according to Embodiment 1. [Figure 3] This is a cross-sectional view of the membrane structure according to Embodiment 1. [Figure 4] This is a cross-sectional view of the membrane structure according to Embodiment 1. [Figure 5] This is a cross-sectional view of the membrane structure according to Embodiment 1. [Figure 6] This is a cross-sectional view of the membrane structure according to Embodiment 1. [Figure 7] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 8] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 9] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 10] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 11] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 12] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 13] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 14] This is a cross-sectional view of the electronic device according to Embodiment 2. [Figure 15] This is a perspective view of the electronic device according to Embodiment 3. [Figure 16] This is a perspective view of the electronic device according to Embodiment 3. [Figure 17] This is a perspective view of the electronic device according to Embodiment 3. [Figure 18] This figure shows the crystal structure of c-axis oriented LiNbO3. [Figure 19] This graph shows an example of the ω-2θ spectrum of the film structure of Example 2 obtained by XRD. [Figure 20] This graph shows the results of the reciprocal lattice map measurement of the membrane structure in Example 2. [Figure 21] This is a cross-sectional TEM image (200,000x magnification) of the Pt and LiNbO3 layers in Example 2. [Figure 22]This is a cross-sectional TEM image of the LiNbO3 layer in Example 2 (1,000,000x magnification). [Figure 23] This is the FFT image of the cross-sectional TEM image (1,000,000x magnification) of the LiNbO3 layer in Example 2. [Figure 24] These are cross-sectional TEM images of the ZrO2 and Pt layers in Example 2 (1,000,000x magnification). [Figure 25] This is the FFT image of the cross-sectional TEM image (1,000,000x magnification) of the Pt layer in Example 2. [Figure 26] This graph shows the voltage dependence of the polarization of the film structure in Example 2. [Figure 27] This graph shows the rocking curve of the piezoelectric film in Example 2. [Modes for carrying out the invention]

[0048] The embodiments of the present invention will be described below with reference to the drawings.

[0049] Furthermore, the disclosure is merely an example, and any modifications that a person skilled in the art could easily conceive while maintaining the spirit of the invention are naturally included within the scope of the present invention. In addition, the drawings may schematically represent the width, thickness, shape, etc. of each part in order to clarify the explanation, but these are merely examples and do not limit the interpretation of the present invention.

[0050] Furthermore, in this specification and in each figure, elements similar to those described above for previously shown figures are denoted by the same reference numerals, and detailed explanations may be omitted as appropriate.

[0051] Furthermore, in the drawings used in the embodiments, hatching (shading) applied to distinguish structures may be omitted depending on the drawing.

[0052] In the following embodiments, when a range is indicated as A to B, it means A or greater and B or less, unless otherwise specified.

[0053] (Embodiment 1) First, a membrane structure of Embodiment 1, which is one embodiment of the present invention, will be described. Figures 1 to 6 are cross-sectional views of the membrane structure of Embodiment 1.

[0054] As shown in Figure 1, the film structure 10 of this embodiment 1 is a film structure having a piezoelectric film 11 and a substrate 12, characterized in that the polarization direction of the piezoelectric film 11, i.e., the piezoelectric film portion, is preferentially oriented perpendicular to the substrate 12. In Figure 1, the polarization direction is indicated by polarization direction DP1 (the same applies in Figures 2 and 7 to 17). By preferentially oriented the polarization direction of the piezoelectric film 11 perpendicular to the substrate 12, a film structure can be realized in which the polarization direction of the piezoelectric film is aligned perpendicular to the substrate.

[0055] Alternatively, as shown in Figure 2, the film structure 10 of this embodiment 1 is a film structure having a piezoelectric film 11, an electrode 13, and a substrate 12, characterized in that the polarization direction of the piezoelectric film 11, i.e., the piezoelectric film portion, is preferentially oriented perpendicular to the substrate 12. As described above, by preferentially oriented perpendicular to the substrate 12 in the polarization direction of the piezoelectric film 11, a film structure can be realized in which the polarization direction of the piezoelectric film is aligned perpendicular to the substrate.

[0056] In this specification, "the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the substrate 12" means that the portion of the piezoelectric film 11 oriented so that its polarization direction is perpendicular to the substrate 12 exceeds, for example, 50% of the total piezoelectric film 11 by volume fraction. For example, when measuring the θ-2θ spectrum by X-ray diffraction (XRD), the peak intensity of the maximum peak representing the portion oriented so that its polarization direction is perpendicular to the substrate 12 is higher than the peak intensity of the maximum peak representing the portion not oriented so that its polarization direction is perpendicular to the substrate 12. Furthermore, "the polarization direction is perpendicular to the substrate 12" includes not only the case where the polarization direction is perfectly perpendicular to the upper surface of the substrate 12, but also the case where the angle between the direction perpendicular to the upper surface of the substrate 12 and the polarization direction is 20° or less.

[0057] In the film structure 10 of this embodiment 1, the piezoelectric film 11 contains c-axis oriented lithium niobate (LiNbO3, hereinafter also referred to as "LN") or lithium tantalate (LiTaO3), i.e., it contains it as a main component. Alternatively, in the film structure 10 of this embodiment 1, the piezoelectric film 11 may contain a solid solution of c-axis oriented lithium niobate (LiNbO3) and lithium tantalate (LiTaO3), or it may contain it as a main component. LiNbO3 or LiTaO3 has a trigonal ilmenite structure and is polarized in the c-axis direction.

[0058] By orienting the LiNbO3 or LiTaO3 along its c axis, the LiNbO3 or LiTaO3 can be oriented so that the c-axis direction, which is the polarization direction of the LiNbO3 or LiTaO3, is perpendicular to the substrate 12.

[0059] In this specification, the statement that the piezoelectric film 11 contains LiNbO3 or LiTaO3 as its main component means that the content of LiNbO3 or LiTaO3 in the piezoelectric film 11 exceeds 50% by weight, or that the content of LiNbO3 or LiTaO3 in the piezoelectric film 11 exceeds 50 mol%.

[0060] Preferably, as shown in Figure 3, the substrate 12 has a structure in which a Si layer and a ZrO2 layer are stacked in that order. Si represents silicon, and ZrO2 represents zirconium oxide. The ZrO2 acts as a buffer film and contributes to the formation of a piezoelectric material with good crystallinity on it. That is, by including ZrO2 formed on the Si layer as a buffer film, the polarization direction of the piezoelectric film can be aligned perpendicular to the substrate, and the orientation direction of the piezoelectric film can also be aligned in the in-plane direction along the upper surface of the substrate. Furthermore, the grain size of the crystal grains can be made 100 nm or more. Moreover, single crystallization of the piezoelectric film is possible.

[0061] The grain size of the crystal grains referred to here is measured by cross-sectional observation using a commonly used transmission electron microscope (TEM). If no grain boundaries are observed in the observation field of view of 100 nm or larger, as shown in Figures 21 and 22, it can be determined that the material is essentially a single crystal film. In other words, materials with a grain size of 100 nm or larger can be said to be essentially single crystal films.

[0062] The piezoelectric film of the present invention is preferable because the smaller the half-width of the rocking curve (RC), the smaller the crystal variation. Typically, it is preferably 2.0° or less, and more preferably 1.5° or less. The half-width of the rocking curve (RC) in this invention was measured using a Rigaku SmartLab X-ray diffractometer.

[0063] Preferably, the substrate 12 includes a (111)-oriented Si layer 12a and a ZrO2 layer 12b formed on the Si layer 12a. Preferably, the ZrO2 layer 12b contains (111)-oriented ZrO2. A (111)-oriented Si substrate, i.e., a Si(111) substrate, can be used as the Si layer 12a of the substrate 12. In such a case, a piezoelectric film 11 containing c-axis-oriented lithium niobate or lithium tantalate as the main component, etc., can be easily formed on the substrate 12, with the polarization direction of the piezoelectric film 11 oriented perpendicular to the substrate 12 and epitaxially grown. Furthermore, since a (111)-oriented Si substrate can be used as the Si layer 12a of the substrate 12, an electronic device can be formed on an inexpensive semiconductor substrate in which the polarization direction of the piezoelectric film 11 is aligned perpendicular to the substrate and the orientation direction of the piezoelectric film is also aligned in the in-plane direction along the upper surface of the substrate. In other words, even when the substrate is a Si(111) substrate and the piezoelectric film has an ilmenite structure, the polarization direction of the piezoelectric film can be aligned perpendicular to the substrate.

[0064] As shown in Figure 3, the electrode 13 has a structure in which a Pt(111) layer and a SrRuO3(111) layer are stacked in this order. Pt represents platinum, and SrRuO3(SRO) represents strontium ruthenate. In other words, preferably, the electrode 13 includes a Pt layer 13a formed on the substrate 12 and oriented (111), and an SRO layer (SrRuO3 film) 13b formed on the Pt layer 13a, having a cubic crystal structure and being oriented (111). That is, the metal film (Pt layer 13a) contains (111)-oriented Pt, the SrRuO3 film is formed between the metal film (Pt layer 13a) and the piezoelectric film 11, and the SrRuO3 film (SRO layer 13b) has a cubic crystal structure and is oriented (111). In such cases, a piezoelectric film 11 containing c-axis oriented LiNbO3 or LiTaO3 as the main component can be easily formed on the substrate 12 via an electrode 13 serving as a lower electrode.

[0065] As shown in Figure 4, the electrode 13 may not have a SrRuO3(111) layer, but only a Pt(111) layer (Pt layer 13a). Also, as shown in Figure 1, if the film structure 10 of this embodiment 1 does not have an electrode 13 (see Figure 2), the piezoelectric film 11 may be formed directly on the ZrO2 layer 12b, as shown in Figure 5.

[0066] Furthermore, the case is not limited to cases where the Si layer 12a is (111) oriented, where the ZrO2 layer 12b is (111) oriented, where the Pt layer 13a is (111) oriented, or where the electrode 13 is formed on the Pt layer 13a and includes a (111) oriented SRO layer 13b.

[0067] Furthermore, the Si layer 12a of the substrate 12 can be considered as the substrate. In this case, the film structure 10 of this embodiment 1 comprises a Si substrate (Si layer 12a), a buffer film containing ZrO2 (ZrO2 layer 12b) formed on the substrate (Si layer 12a), and a piezoelectric film 11 formed on the buffer film (ZrO2 layer 12b) via a metal film (Pt layer 13a), wherein the piezoelectric film 11 contains c-axis oriented LiNbO3 or LiTaO3, and the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the upper surface of the substrate 12. The piezoelectric film 11 is a piezoelectric film deposited on Pt / ZrO2 / Si. Therefore, the metal film (Pt layer 13a) is formed between the buffer film (ZrO2 layer 12b) and the piezoelectric film 11. Furthermore, if the electrode 13 includes a Pt layer 13a and an SRO layer 13b, that is, if the film structure 10 further comprises a metal film (Pt layer 13a) on a buffer film (ZrO2 layer 12b) and an SRO film (SRO layer 13b) on the metal film (Pt layer 13a), then the piezoelectric film 11 is a piezoelectric film deposited on a Si substrate (Si layer 12a) via a ZrO2 film (ZrO2 layer 12b), a Pt film (Pt layer 13a), and an SRO film (SRO layer 13b) in that order from bottom to top.

[0068] As shown in Figure 6, instead of a Si(111) substrate, a semiconductor substrate, such as an SOI (Silicon On Insulator) substrate, can be used as the Si layer 12a of the substrate 12. When an SOI substrate is used as the substrate 12, the substrate 12 includes a base body 12c made of a Si substrate, a BOX (Buried Oxide) layer 12d as an insulating layer which is an embedded oxide film formed on the base body 12c, and a Si layer 12a which is an SOI (Silicon On Insulator) layer made of a Si(111) film formed on the BOX layer 12d. This makes it possible to form a film structure with excellent dielectric constant characteristics and dielectric strength characteristics of the piezoelectric film on the SOI substrate, and to easily form an electronic device consisting of a micro electro-mechanical system (MEMS) having multiple piezoelectric elements formed with high shape accuracy on the SOI substrate.

[0069] The Si layer 12a of the substrate 12 can be considered as the substrate. In this case, the film structure 10 of this embodiment 1 comprises a substrate (Si layer 12a) which is an SOI substrate, a buffer film (ZrO2 layer 12b) containing ZrO2 formed on the substrate (Si layer 12a), and a piezoelectric film 11 formed on the buffer film (ZrO2 layer 12b) via a metal film (Pt layer 13a), wherein the piezoelectric film 11 contains c-axis oriented LiNbO3 or LiTaO3, and the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the upper surface of the substrate 12. Furthermore, the piezoelectric film 11 is a piezoelectric film deposited on Pt / ZrO2 / Si on SOI. Furthermore, if the electrode 13 includes a Pt layer 13a and an SRO layer 13b, that is, if the film structure 10 further comprises a metal film (Pt layer 13a) on a buffer film (ZrO2 layer 12b) and an SRO film (SRO layer 13b) on the metal film (Pt layer 13a), then the piezoelectric film 11 is a piezoelectric film deposited on a substrate (Si layer 12a) which is an SOI substrate, via a ZrO2 film (ZrO2 layer 12b), a Pt film (Pt layer 13a), and an SRO film (SRO layer 13b) in that order from bottom to top.

[0070] Furthermore, the electrode 13 may also include a Mo layer 13c or a W layer 13d instead of the Pt layer 13a. In this case, the electrode 13 will include an SRO layer 13b formed on the Mo layer 13c or W layer 13d. In this case, the film structure 10 of this embodiment 1 will have a piezoelectric film 11 formed on a substrate (Si layer 12a) which is a Si substrate or an SOI substrate, via a ZrO2 film (ZrO2 layer 12b) and a Mo film (Mo layer 13c) or a W film (W layer 13d) in that order from bottom to top. In this case as well, similar to the case in which the electrode 13 includes a Pt layer 13a, a piezoelectric film 11 can be easily formed on the substrate 12 via the electrode 13 as the lower electrode, using a piezoelectric material mainly composed of c-axis oriented LiNbO3 or LiTaO3, such that the polarization direction of the piezoelectric film 11 is oriented perpendicular to the substrate 12 and the piezoelectric film 11 is epitaxially grown. In addition to the materials described above, Ru layers (Ru films) or Cu layers (Cu films) may also be used as the materials for electrodes 13a, 13c, or 13d. These materials are commonly used as electrode materials.

[0071] (Embodiment 2) Next, an electronic device of Embodiment 2, which is one embodiment of the present invention, will be described. The electronic device of Embodiment 2 is a bulk acoustic wave (BAW) filter or a piezoelectric thin-film acoustic resonator (FBAR) equipped with the film structure of Embodiment 1. Figures 7 to 14 are cross-sectional views of the electronic device of Embodiment 2.

[0072] As shown in Figure 7, the electronic device 20 of this embodiment 2 is an electronic device comprising a film structure 10 having a piezoelectric film 11, two electrodes, and a substrate 12, characterized in that the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the substrate 12.

[0073] The film structure 10 provided in the electronic device 20 of this second embodiment may also have a piezoelectric film 11, an electrode 13, and a substrate 12, similar to the film structure 10 of the first embodiment. That is, the electronic device 20 of this second embodiment has an electrode 13 and a piezoelectric film 11 on the substrate 12. Therefore, the description of the piezoelectric film 11, electrode 13, and substrate 12 of the film structure 10 that are the same as those of the film structure 10 of the first embodiment may be omitted.

[0074] On the other hand, the electronic device 20 of this second embodiment is a BAW filter or FBAR equipped with the film structure 10 of the first embodiment, so the substrate 12 has a hollow portion, i.e., a hollow section 21, below the piezoelectric film 11. In this case, at least the central portion of the piezoelectric film 11 located on the hollow section 21 is not constrained by the substrate 12 and can vibrate freely, so bulk elastic waves can be easily generated in that central portion. In addition, because a hollow section is provided below the piezoelectric film 11, when the substrate 12 is etched from the back surface, the Si layer 12a (see Figures 3 and 4) contained in the substrate 12 is etched and removed, but the ZrO2 layer 12b (see Figures 3 and 4) contained in the substrate 12 remains unetched and can function as an etching stopper film. Also, in Figures 7 to 14, the case in which the ZrO2 layer 12b (see Figures 3 and 4) remains unetched is omitted from the illustration.

[0075] Furthermore, in the film structure 10 provided in the electronic device 20 of this second embodiment, an electrode 22 is provided as an upper electrode or upper electrode formed on the piezoelectric film 11. In this case, electrode 13 is an electrode formed below the piezoelectric film 11 as a lower electrode or lower electrode. That is, electrode 22 and electrode 13 are an upper electrode formed on the upper part of the piezoelectric film 11 and a lower electrode formed on the lower part of the piezoelectric film 11. In the example shown in Figure 7, electrodes are formed above and below the piezoelectric film 11 in contact with it. The film structure 10 is a film structure having a piezoelectric film 11, two electrodes, electrode 13 and electrode 22, and a substrate 12, characterized in that the polarization direction of the piezoelectric film 11, i.e., the piezoelectric film portion, is preferentially oriented perpendicular to the substrate 12. In this case, by applying a voltage such as an AC voltage between electrode 13 and electrode 22, an electric field such as an AC electric field in the thickness direction of the piezoelectric film 11 can be easily applied to the piezoelectric film 11, and bulk elastic waves can be easily generated in the piezoelectric film 11. Furthermore, since bulk elastic waves having a resonant frequency determined according to the elastic properties of the piezoelectric film 11 can be generated or passed through, it can function as a resonator or filter.

[0076] In this second embodiment, as in the first embodiment, a substrate 12 can be used that includes a (111)-oriented Si layer 12a (see Figure 3) and a ZrO2 layer 12b (see Figure 3) formed on the Si layer 12a. Preferably, the ZrO2 layer 12b contains (111)-oriented ZrO2. In such a case, the Si layer 12a of the substrate 12 can be considered as the substrate, and the electronic device 20 of this second embodiment is an electronic device having an electrode 13 and a piezoelectric film 11 on a Si substrate (Si layer 12a), wherein the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the substrate 12, and a hollow portion 21 is provided below the piezoelectric film 11.

[0077] Preferably, the area A of the overlapping portion of the upper and lower electrodes is smaller than the area B of the piezoelectric film 11 and the lower electrode exposed in the hollow portion. That is, the area of ​​the overlapping portion of the upper electrode 22 and the lower electrode 13 is smaller than the area of ​​the hollow portion 21. In such a case, by applying a voltage between the electrodes 22 and 13, the portion of the piezoelectric film 11 to which the electric field in the thickness direction is applied can be reliably separated from the substrate 12. Therefore, the portion of the piezoelectric film 11 to which the electric field in the thickness direction is applied can vibrate freely without being constrained by the substrate 12, and bulk elastic waves can be generated even more easily.

[0078] Preferably, the area ratio A of the overlapping portion of the upper and lower electrodes to the area B of the piezoelectric film 11 and the lower electrode exposed in the hollow portion, i.e., A / B, is less than or equal to 1 / 2. That is, the area of ​​the overlapping portion of the upper electrode 22 and the lower electrode 13 is 1 / 2 or less of the area of ​​the hollow portion 21. In such a case, by applying a voltage between the electrodes 22 and 13, the portion of the piezoelectric film 11 to which the electric field in the thickness direction is applied can be further reliably separated from the substrate 12. Therefore, the portion of the piezoelectric film 11 to which the electric field in the thickness direction is applied is further not constrained by the substrate 12 and can vibrate more freely, making it easier to generate bulk elastic waves.

[0079] As mentioned above, the film structure 10 provided in the electronic device 20 of this second embodiment can also have a piezoelectric film 11, an electrode 13, and a substrate 12, similar to the film structure 10 of the first embodiment. Therefore, the film structure 10 provided in the electronic device 20 of this second embodiment can also use an SOI substrate, which is a semiconductor substrate, as the Si layer 12a (see Figure 6) of the substrate 12, similar to the film structure 10 of the first embodiment, and the electrode 13 can include a Mo layer 13c (see Figure 3) or a W layer 13d (see Figure 3) instead of a Pt layer 13a (see Figure 3). In addition to the materials mentioned above, Ru layers or Cu layers may also be used as the materials for the electrodes 13a, 13c, or 13d. These materials are common as electrode materials.

[0080] Furthermore, the film structure 10 provided in the electronic device 20 of this second embodiment also contains, similar to the film structure 10 of the first embodiment, a piezoelectric film 11 that includes c-axis oriented lithium niobate (LiNbO3) or lithium tantalate (LiTaO3), i.e., is contained as a main component.

[0081] As shown in Figure 8, it is preferable to provide a dielectric layer 23 as a dielectric layer or matching layer between the substrate 12 and the piezoelectric film 11. That is, the electronic device 20 shown in Figure 8 has a dielectric layer 23 as a matching layer on the substrate 12 and below the lower electrode, i.e., below the electrode 13, in addition to the portion of the electronic device 20 shown in Figure 7. For example, if the portion of the electronic device 20 other than the dielectric layer 23 is made of a material that softens with increasing temperature, and the dielectric layer 23 is made of a material that hardens with increasing temperature, the temperature dependence of the dielectric constant characteristics or piezoelectric characteristics of the electronic device 20, i.e., the temperature characteristics, can be stabilized or adjusted.

[0082] Preferably, the dielectric layer 23 is a Si compound, such as silicon dioxide (SiO2). In such a case, since the dielectric layer 23 is made of a material that has high affinity with the semiconductor device manufacturing process, the dielectric layer 23 can be easily formed.

[0083] As shown in Figure 9, it is preferable to provide a dielectric layer 24 as an upper dielectric layer on the piezoelectric film 11. That is, the electronic device 20 shown in Figure 9 has a dielectric layer 24 as an upper dielectric layer on the piezoelectric film 11, in addition to the portion of the electronic device 20 shown in Figure 7. For example, if the portion of the electronic device 20 other than the dielectric layer 24 is made of a material that softens with increasing temperature, and the dielectric layer 24 is made of a material that hardens with increasing temperature, then the temperature dependence of the dielectric constant characteristics or piezoelectric characteristics of the electronic device 20, i.e., the temperature characteristics, can be stabilized or adjusted.

[0084] Preferably, the dielectric layer 24 is a Si compound, such as SiO2. In such a case, since the dielectric layer 24 is made of a material that has high affinity with the semiconductor device manufacturing process, the dielectric layer 24 can be easily formed.

[0085] In the examples shown in Figures 7 to 9, for example in the example shown in Figure 7, either the upper or lower side of the piezoelectric film 11 can be left unfixed (the same applies to Embodiment 3, which will be described later using Figures 15 to 17).

[0086] Furthermore, in the examples shown in Figures 7 to 9, for example in the examples shown in Figures 8 and 9, one side of the piezoelectric film 11 can be fixed, while the other side can be fixed more weakly by a material whose hardness changes with temperature. That is, one side of the piezoelectric film 11, either the top or bottom, can be fixed, while the other side of the piezoelectric film 11 can be weakly fixed by a material whose hardness changes with temperature (the same applies to Embodiment 3, which will be described later using Figures 15 to 17). This makes it possible to realize an electronic device that utilizes displacement in the sliding direction and can compensate for temperature characteristics.

[0087] As shown in Figure 10, it is preferable to provide a dielectric layer 23 as a lower dielectric layer between the substrate 12 and the piezoelectric film 11, and a dielectric layer 24 as an upper dielectric layer on the piezoelectric film 11. That is, the electronic device 20 shown in Figure 10 has, in addition to the parts of the electronic device 20 shown in Figure 7, a dielectric layer 23 as a matching layer on the substrate 12 and below the lower electrode, i.e., below the electrode 13, and a dielectric layer 24 as an upper dielectric layer on the piezoelectric film 11. Also, in the example shown in Figure 10, the dielectric layer 24 is provided on the upper electrode, i.e., electrode 22. That is, even in the example shown in Figure 10, electrodes are formed above and below the piezoelectric film 11 in contact with it. For example, if the parts of the electronic device 20 other than the dielectric layer 23 and dielectric layer 24 are made of a material that softens with increasing temperature, and the dielectric layer 23 and dielectric layer 24 are made of a material that hardens with increasing temperature (a material whose hardness increases with increasing temperature), then the temperature dependence of the dielectric constant characteristics or piezoelectric characteristics of the electronic device 20, i.e., the temperature characteristics, can be stabilized or adjusted. As mentioned above, dielectric layers 23 and 24 are Si compounds, such as SiO2.

[0088] As shown in Figure 11, it is preferable to provide a dielectric layer 23 as a lower dielectric layer between the substrate 12 and the piezoelectric film 11, a dielectric layer 24 as an upper dielectric layer on the piezoelectric film 11, and an electrode 22 as an upper electrode on the dielectric layer 24. That is, the electronic device 20 shown in Figure 11 is the same as the electronic device 20 shown in Figure 10, but with the stacking order of the electrode 22 and the dielectric layer 24 reversed in the vertical direction. Also, the structure shown in Figure 11 is not a structure in which electrodes are formed above and below in contact with the piezoelectric film 11. Even in such a case, it is possible to have the same effects as the electronic device 20 shown in Figure 10. Furthermore, as mentioned above, the dielectric layer 23 and the dielectric layer 24 are Si compounds, for example, SiO2.

[0089] As shown in Figure 12, it is preferable to have two or more electric field directions in the plane by having multiple upper or lower electrodes 13 or electrodes 22. In the example shown in Figure 12, the electronic device 20 has two electrodes 22 as upper electrodes. In Figure 12, the two electrodes 22 are shown as electrode 22a and electrode 22b. This makes it even easier to realize an electronic device that takes advantage of displacement in the sliding direction.

[0090] As shown in Figure 13, it is preferable that the polarization direction (polarization direction DP1) of the piezoelectric film 11 is perpendicular to the substrate 12 and preferentially oriented in multiple directions, and that electrodes 22 and 13 are located on the upper and lower parts of the piezoelectric film 11. In such a case, it is even easier to realize an electronic device that utilizes displacement in the sliding direction.

[0091] As shown in Figure 14, it is preferable to have multiple electrodes on the upper or lower part of the piezoelectric film 11. In the example shown in Figure 14, there is no lower electrode, and two electrodes 22, namely electrode 22a and electrode 22b, are provided as upper electrodes. Even in such a case, an electronic device that utilizes displacement in the sliding direction can be realized even more easily.

[0092] (Embodiment 3) Next, an electronic device of Embodiment 3, which is one embodiment of the present invention, will be described. The electronic device of Embodiment 3 is a surface acoustic wave (SAW) filter equipped with the film structure of Embodiment 1. Figures 15 to 17 are perspective views of the electronic device of Embodiment 3.

[0093] As shown in Figure 15, the electronic device 30 of this embodiment 3 is an electronic device comprising a film structure 10 having a piezoelectric film 11, a comb-shaped electrode, and a substrate 12, characterized in that the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the substrate 12.

[0094] The film structure 10 provided in the electronic device 30 of this third embodiment may also have a piezoelectric film 11 and a substrate 12, similar to the film structure 10 of the first embodiment. Therefore, the description of the piezoelectric film 11 and substrate 12 of the film structure 10 that are the same as those of the film structure 10 of the first embodiment may be omitted.

[0095] On the other hand, the electronic device 30 of this third embodiment is a SAW filter equipped with the film structure 10 of the first embodiment, and therefore electrodes 31 and 32 as comb-shaped electrodes (comb-tooth electrodes) are formed on the upper or lower surface of the piezoelectric film 11, i.e., the piezoelectric portion. That is, the electronic device 30 of this third embodiment has electrodes 31 and 32 and the piezoelectric film 11 on the substrate 12. In such a case, surface acoustic waves can be easily generated in the piezoelectric film 11 by applying an AC voltage between electrodes 31 and 32. Furthermore, since surface acoustic waves having a resonant frequency determined according to the elastic characteristics of the substrate 12, the piezoelectric film 11, and electrodes 31 and 32 can be generated or passed through, it can function as a resonator or a filter.

[0096] In this third embodiment, as in the first embodiment, a substrate 12 can be used that includes a (111)-oriented Si layer 12a (see Figure 3) and a ZrO2 layer 12b (see Figure 3) formed on the Si layer 12a. Preferably, the ZrO2 layer 12b contains (111)-oriented ZrO2. In such a case, the Si layer 12a of the substrate 12 can be considered as the substrate, and the electronic device 30 of this third embodiment is an electronic device having a piezoelectric film 11 on a Si substrate (Si layer 12a), wherein the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the substrate 12.

[0097] In the example shown in Figure 15, electrodes 31 and 32 are formed as comb-shaped electrodes on the upper surface of the piezoelectric film 11. That is, in the example shown in Figure 15, electrodes 31 and 32 are comb-tooth electrodes formed on the upper surface of the piezoelectric film 11. On the other hand, although not shown in the figure, electrodes 31 and 32 may also be formed as comb-shaped electrodes on the lower surface of the piezoelectric film 11. That is, electrodes 31 and 32 can also be comb-tooth electrodes formed on the lower surface of the piezoelectric film 11.

[0098] Since the polarization direction of the piezoelectric film 11 is preferentially oriented perpendicular to the substrate 12, the polarization direction of the piezoelectric film 11 and the direction of the comb-shaped electrodes are preferably orthogonal to each other.

[0099] Here, the electrode 31, which is a comb-shaped electrode, includes a main body 31a extending in direction DR1 in a plan view, and a plurality of comb teeth 31b that project from the main body 31a in direction DR2, which is preferably perpendicular to direction DR1 in a plan view, and that both extend in direction DR2 in a plan view and are arranged in direction DR1. The electrode 32, which is a comb-shaped electrode, includes a main body 32a extending in direction DR1 in a plan view, and a plurality of comb teeth 32b that project from the main body 32a in direction DR2, which is preferably perpendicular to direction DR1 in a plan view, and that both extend in direction DR2 in a plan view and are arranged in direction DR1. The comb teeth 31b and 32b are arranged alternately along direction DR1. In this case, the direction of the comb-shaped electrode is the direction DR2, which is the direction in which the comb teeth 31b and 32b extend, and the polarization direction DP1 of the piezoelectric film 11 is preferably perpendicular to the direction DR2, which is the direction in which the comb teeth 31b and 32b extend.

[0100] As mentioned above, the film structure 10 provided in the electronic device 30 of this third embodiment can also have a piezoelectric film 11 and a substrate 12, similar to the film structure 10 of the first embodiment. Therefore, the film structure 10 provided in the electronic device 30 of this third embodiment can also have a substrate 12 in which a Si layer and a ZrO2 layer are stacked in that order, similar to the film structure 10 of the first embodiment. Instead of a Si substrate, an SOI substrate, which is a semiconductor substrate, can be used as the Si layer 12a (see Figure 6) of the substrate 12. The electrode 13 can also include a Mo layer 13c (see Figure 3) or a W layer 13d (see Figure 3) instead of a Pt layer 13a (see Figure 3). In addition to the materials mentioned above, Ru layers or Cu layers may also be used as the material for the electrodes 13a, 13c, or 13d.

[0101] Furthermore, the film structure 10 provided in the electronic device 30 of this third embodiment is similar to the film structure 10 of the first embodiment in that the piezoelectric film 11 contains c-axis oriented lithium niobate (LiNbO3) or lithium tantalate (LiTaO3), i.e., it contains it as a main component.

[0102] As shown in Figure 16, it is preferable to provide a dielectric layer 33 as a dielectric layer or matching layer between the substrate 12 and the piezoelectric film 11. That is, the electronic device 30 shown in Figure 16 has a dielectric layer 33 as a matching layer formed on the substrate 12 and under the piezoelectric film 11, in addition to the portion of the electronic device 30 shown in Figure 15. This allows for acoustic matching between the substrate 12 and the piezoelectric film 11. Furthermore, for example, if the portion of the electronic device 30 other than the dielectric layer 33 is made of a material that softens with increasing temperature, and the dielectric layer 33 is made of a material that hardens with increasing temperature, the temperature dependence of the dielectric constant characteristics or piezoelectric characteristics of the electronic device 30, i.e., the temperature characteristics, can be stabilized or adjusted.

[0103] Preferably, the dielectric layer 33 is a Si compound, such as SiO2. In such a case, since the dielectric layer 33 is made of a material that has high affinity with the semiconductor device manufacturing process, the dielectric layer 33 can be easily formed.

[0104] As shown in Figure 17, it is preferable to provide a dielectric layer 34 on the piezoelectric film 11. That is, the electronic device 30 shown in Figure 17 has a dielectric layer 34 as a matching layer on the piezoelectric film 11, in addition to the portion of the electronic device 30 shown in Figure 15. This allows for acoustic matching between the substrate 12 and the piezoelectric film 11. Furthermore, for example, if the portion of the electronic device 30 other than the dielectric layer 34 is made of a material that softens with increasing temperature, and the dielectric layer 34 is made of a material that hardens with increasing temperature, the temperature dependence of the dielectric constant characteristics or piezoelectric characteristics of the electronic device 30, i.e., the temperature characteristics, can be stabilized or adjusted.

[0105] Preferably, the dielectric layer 34 is a Si compound, such as SiO2. In such a case, since the dielectric layer 34 is made of a material that has high affinity with the semiconductor device manufacturing process, the dielectric layer 34 can be easily formed. [Examples]

[0106] The present invention will be described in more detail below based on the following examples. However, the present invention is not limited to the following examples.

[0107] (Examples 1 to 3) In the following, the film structure 10 described in Embodiment 1 using Figures 1 to 6 was formed as the film structure of Examples 1 to 3, and tests were conducted to create a piezoelectric film 11 made of c-axis oriented LiNbO3 on a Si layer 12a made of a Si substrate via a ZrO2 layer 12b. In this case, as shown in Figure 3, Example 1 was formed in which a Pt layer 13a and an SRO layer 13b were formed in order from the Si layer 12a side between the ZrO2 layer 12b and the piezoelectric film 11, as shown in Figure 4, as Example 2 was formed in which only a Pt layer 13a was formed between the ZrO2 layer 12b and the piezoelectric film 11, and as shown in Figure 5, Example 3 was formed in which a piezoelectric film 11 made of c-axis oriented LiNbO3 was directly formed on the ZrO2 layer 12b.

[0108] [Formation of membrane structures] The method for forming the film structure of Example 1 will now be described. First, a wafer made of silicon single crystal was prepared as a Si layer 12a (see Figure 3) made of a Si(111) substrate, having an upper surface consisting of a (111) plane.

[0109] Next, a ZrO2 layer 12b (see Figure 3) was formed on the wafer, which served as the Si layer 12a (see Figure 3), by electron beam deposition. The conditions used for this process are described below. Equipment: Electron beam deposition system Pressure: 7.00 × 10 -5 Pa Vapor deposition source: Zr+O2 Acceleration voltage / emission current: 7.5kV / 1.80mA Thickness: 60nm Substrate temperature: 500℃

[0110] Next, a Pt layer 13a (see Figure 3) was formed on the ZrO2 layer 12b (see Figure 3) by sputtering. The conditions for this process are shown below. Equipment: DC sputtering apparatus Pressure: 1.20 × 10 -1 Pa Vapor deposition source: Pt Power: 100W Thickness: 150nm Substrate temperature: 450~600℃

[0111] Next, an SRO layer 13b (see Figure 3) was formed on the Pt layer 13a (see Figure 3) by sputtering. The conditions for this process are shown below. Equipment: RF magnetron sputtering apparatus Power: 300W Gas: Ar Pressure: 1.8 Pa Substrate temperature: 600℃ Thickness: 40nm

[0112] Next, a piezoelectric film 11 (see Figure 3) made of LiNbO3 was formed on the SRO layer 13b (see Figure 3) by sputtering. The conditions for this process are shown below. Equipment: AC sputtering apparatus Pressure: 2 Pa Evaporation source (target): LiNbO3 Gas: Ar / N2 Power: 1000W Substrate temperature: 450℃ Thickness: 500nm

[0113] On the other hand, in the film structure formation method of Example 2, unlike the film structure formation method of Example 1, the SRO layer 13b (see Figure 3) was not formed, and the piezoelectric film 11 (see Figure 4) was directly formed on the Pt layer 13a (see Figure 4). Furthermore, in the film structure formation method of Example 3, unlike the film structure formation method of Example 1, the Pt layer 13a and SRO layer 13b were not formed, and the piezoelectric film 11 was directly formed on the ZrO2 layer 12b.

[0114] [Out-of-plane measurement] The ω-2θ spectrum (out-of-plane X-ray diffraction pattern) of the film structure of Example 2 was measured using the XRD method. Specifically, X-ray diffraction measurement (out-of-plane measurement) was performed on the film structure of Example 2, up to the piezoelectric film 11, using an ω-2θ scan. Out-of-plane measurement corresponds to the case where the angle between the measurement surface and the substrate surface is less than 90°. The XRD data for Example 2 was obtained using a Rigaku SmartLab X-ray diffractometer.

[0115] Figure 19 is a graph showing an example of the ω-2θ spectrum obtained by XRD of the membrane structure of Example 2. The horizontal axis of the graph in Figure 19 represents the angle 2θ in the ω-2θ scan, and the vertical axis of the graph in Figure 19 represents the intensity of the detected X-rays. Figure 19 shows the range 20° ≤ 2θ ≤ 90°.

[0116] In the ω-2θ spectrum of Example 2 shown in Figure 19, in addition to the peak corresponding to the Si(111) plane around 28°, peaks corresponding to the (006) plane ((0,0,6) plane) and (0012) plane ((0,0,12) plane) of LN were observed in 3-exponential notation. Furthermore, in the ω-2θ spectrum of Example 2 shown in Figure 19, a peak corresponding to the (111) plane of Pt around 39° was observed. Although not shown in the figure, a similar trend was confirmed in Example 1. Therefore, in the film structures of Example 1 and Example 2, it was confirmed that the Pt layer 13a is (111) oriented on the Si layer 12a made of a Si(111) substrate, and a piezoelectric film 11 made of c-axis oriented LiNbO3 is formed on the Pt layer 13a. Furthermore, in the film structure of Example 3, it was confirmed that a piezoelectric film 11 made of c-axis oriented LiNbO3 was formed on a Si layer 12a made of a Si(111) substrate.

[0117] [Reciprocal lattice map measurement] Next, reciprocal lattice map measurements were performed on the film structure of Example 2. Reciprocal lattice map measurements involve observing the film in three dimensions to confirm fluctuations in lattice constants and the inclination of lattice planes.

[0118] Figure 20 is a graph showing the results of reciprocal lattice map measurements of the film structure of Example 2. In each of the graphs in Figure 20, the results of the reciprocal lattice map measurements are shown on the left half, and the simulation results superimposed on the reciprocal lattice map measurements are shown on the right half. Figure 20 also shows multiple reciprocal lattice points representing the Si(111) plane, ZrO2(111) plane, Pt(111) plane and Pt(111) plane, as well as the LN(006) plane and LN(0012) plane in 3-index notation.

[0119] In the example shown in Figure 20 (Example 2), six reciprocal lattice points representing the ZrO2(111) plane, the LN(006) plane in 3-index notation, the Pt(111) plane, the Si(111) plane, the LN(0012) plane in 3-index notation, and the Pt(222) plane were observed in a vertical line, indicating that the planes were aligned. That is, in the X-ray reciprocal lattice space mapping of both the film structures of Example 1 and Example 2, the six reciprocal lattice points representing the ZrO2(111) plane, the LN(006) plane in 3-index notation, the Pt(111) plane, the Si(111) plane, the LN(0012) plane in 3-index notation, and the Pt(222) plane were aligned in the Qz direction. Although not shown in the figures, similar results were obtained for the film structures of Examples 1 and 3.

[0120] From the above results, it was found that in all of the film structures of Examples 1 to 3, LiNbO3 was grown epitaxially and c-axis oriented on the Si layer 12a made of a Si substrate. It was also found that there was no crystal fluctuation in the LiNbO3 and the lattice planes were aligned. In other words, it was found that LiNbO3 deposited on SRO(111) / Pt(111) / ZrO2(111) / Si(111), Pt(111) / ZrO2(111) / Si(111), and ZrO2(111) / Si(111) was c-axis oriented and became a single crystal.

[0121] [Transmission electron microscopy measurement] A portion of the film structure from Example 2 was removed, mechanically polished, and ion-milled to prepare thin sections of arbitrary thickness. Next, these thin sections were subjected to transmission electron microscopy (TEM). A JEOL JEM-ARM200F was used as the measuring instrument, and the acceleration voltage during observation was 200kV.

[0122] Figure 21 is a cross-sectional image of the Pt / LiNbO3 layer interface of Example 2, obtained using a transmission electron microscope. The magnification of Figure 21 is 200,000x. The LiNbO3 layer is uniform throughout the field of view, and no grain boundaries are observed. It can be seen that grains larger than 100 nm are growing. To observe the LiNbO3 layer of Figure 21 at the atomic level, TEM cross-sectional observation was performed at high magnification (1,000,000x), and the result is shown in Figure 22. Very clear lattice fringes are observed in Figure 22. The lattice fringes represent the atomic planes of the LiNbO3 film. From the image in Figure 22, the spacing of the lattice fringes was estimated to be approximately 0.63 nm, which closely matches the interplanar spacing of LiNbO3(002) (0.625 nm). The lattice fringes were extremely uniform throughout the entire field of view, and no regions with different phases or lattice spacings were observed. The field of view in Figure 22 is approximately 25 nm vertically and 25 nm horizontally, but clear lattice fringes were observed throughout the entire LiNbO3 layer in other regions as well, and no grain boundaries were observed, clearly indicating a grain size of 100 nm or more.

[0123] Figure 23 shows the result of FFT analysis of the TEM image in Figure 22 using the Fast Fourier Transform (FFT) software attached to the measurement device. FFT is an image analysis technique, and applying FFT to a lattice image like Figure 22 yields a pattern that is essentially equivalent to electron diffraction. In other words, it allows for the analysis of the film's crystallinity. Figure 23 shows a single pattern of periodic spots, which clearly indicates that the LiNbO3 layer is a single crystal. Considering the TEM cross-sectional images in Figures 21 and 22, the FFT pattern in Figure 23, and the results of the aforementioned ω-2θ spectrum and X-ray reciprocal lattice space mapping, it is clear that the LiNbO3 film is a single crystal.

[0124] Figure 24 is a cross-sectional image of the Pt / ZrO2 interface observed using TEM. Clear lattice fringes are observed in both the Pt and ZrO2 layers, and the spacing of the fringes indicates that ZrO2(111) and Pt(111) grew parallel to the substrate surface. Figure 25 is the result of FFT analysis of the Pt layer portion of the TEM image in Figure 24. A single-pattern FFT image is obtained, clearly indicating that the Pt layer is grown as a single crystal. Similarly, a single pattern is obtained in the ZrO2 layer by FFT, leading to the conclusion that all layers, in the order of ZrO2(111), Pt(111), and LiNbO3(001), are grown as single crystals on the Si(111) substrate. In other words, according to the present invention, it is possible to obtain film structures in which the metal film and buffer film are both single crystals.

[0125] [Voltage dependence of polarization] For the film structure of Example 2, an upper electrode made of Pt was formed on the piezoelectric film 11 (see Figure 4), and a voltage was applied between electrode 13 (see Figure 4) and the upper electrode to measure the voltage dependence of polarization (polarization voltage hysteresis curve). Figure 26 is a graph showing the voltage dependence of polarization of the film structure of Example 2. The value of polarization when the voltage applied to the piezoelectric film 11 is increased from 0 to the positive side and then returned to 0 is the residual polarization value of the piezoelectric film 11. Figure 27 shows the value of the rocking curve of the piezoelectric film 11. As is clear from Figure 27, the rocking curve of the piezoelectric film 11 of Example 2 was 1.27°.

[0126] As shown in Figure 26, the graph showing the voltage dependence of the polarization of the film structure of Example 2 shows the polarization voltage hysteresis curve indicating the ferroelectricity of the piezoelectric film 11, and the piezoelectric film 11 exhibits a polarization voltage hysteresis curve of 70 μC / cm². 2 It had a significant degree of residual polarization. Furthermore, even in its initial state, the piezoelectric film 11 had a temperature of -70 μC / cm². 2It exhibited a significant degree of spontaneous polarization. Therefore, when using the film structure of Example 2 as a piezoelectric element, it is not necessary to perform polarization treatment on the piezoelectric film 11 before use. Although not shown in the figures, substantially similar results were obtained for the film structures of Examples 1 and 3. Thus, it was demonstrated that the piezoelectric film 11 in the film structures of Examples 1 to 3 possesses good ferroelectricity. Furthermore, since the piezoelectric film 11 has ferroelectricity and polarization properties, it can also be effectively used in memory.

[0127] Although the present invention has been specifically described above based on its embodiments, it goes without saying that the present invention is not limited to the above embodiments and can be modified in various ways without departing from its essence.

[0128] Within the scope of the concept of this invention, a person skilled in the art would be able to conceive of various modifications and alterations, and it is understood that such modifications and alterations also fall within the scope of this invention.

[0129] For example, any modifications made by a person skilled in the art to the above-described embodiments, such as adding, deleting, or changing the design of components, or adding, omitting, or changing the conditions of processes, are also included within the scope of the present invention, as long as they retain the essence of the present invention. [Explanation of Symbols]

[0130] 10 Membrane structure 11 Piezoelectric film 12 circuit boards 12a Si layer 12b ZrO2 layer 12c base 12d BOX layer 13, 22, 22a, 22b, 31, 32 electrode 13a Pt layer 13b SRO layer 13c Mo layer 13d W layer 20, 30 Electronic Devices 21 Hollow part 23, 24, 33, 34 Dielectric layers 31a, 32a Main Unit 31b, 32b comb teeth DM1~DM4 part DP1 Polarization Direction DR1, DR2 direction

Claims

1. circuit board and A buffer film formed on the substrate, A piezoelectric film formed on the buffer film, It has, The substrate is an SOI substrate comprising a Si substrate, or a substrate made of a Si substrate, an insulating layer on the substrate, and an SOI layer made of a Si film on the insulating layer. The buffer film is ZrO ２ Includes, The piezoelectric film is c-axis oriented and in-plane oriented LiNbO ３ Or LiTaO ３ Includes, A film structure in which the grain size of the crystal grains is 100 nm or larger.

2. The piezoelectric film has a half-width of the rocking curve (RC) of 2.0° or less, and is made of LiNbO ３ Or LiTaO ３ The membrane structure according to claim 1, comprising:

3. The piezoelectric film is made of single-crystal LiNbO ３ Or LiTaO ３ A membrane structure according to claim 1 or 2, comprising:

4. In the membrane structure according to either claim 1 or 2, A membrane structure having a metal film formed between the buffer film and the piezoelectric film.

5. In the membrane structure according to claim 4, The aforementioned metal film is a film structure containing (111)-oriented Pt.

6. In the membrane structure according to claim 4, The aforementioned metal film is a Pt film, Mo film, W film, Ru film, or Cu film, in a film structure.

7. In the membrane structure according to claim 4, The aforementioned metal film and buffer film are single crystals, forming a film structure.

8. In the membrane structure according to claim 5, SrRuO formed between the metal film and the piezoelectric film ３ Having a membrane, The SrRuO ３ film is a film structure having a cubic crystal structure.

9. An electronic device comprising the film structure according to claim 1 or 2.

10. The membrane structure comprises the membrane structure described in claim 1. In electronic devices, The aforementioned film structure is an electronic device having comb-tooth electrodes formed on the upper or lower surface of the piezoelectric film.

11. In the electronic device according to claim 9, The aforementioned film structure is an electronic device having a matching layer formed on the substrate.

12. In the electronic device according to claim 9, An electronic device in which a hollow portion is provided at the lower part of the piezoelectric film.

13. In the electronic device according to claim 9, The film structure is an electronic device having an upper electrode formed on the upper part of the piezoelectric film and a lower electrode formed on the lower part of the piezoelectric film.

14. In the electronic device according to claim 13, An electronic device in which the area of ​​the overlapping portion between the upper electrode and the lower electrode is smaller than the area of ​​the hollow portion.

15. In the electronic device according to claim 13, An electronic device in which the area of ​​the overlapping portion between the upper electrode and the lower electrode is 1 / 2 or less of the area of ​​the hollow portion.

16. In the electronic device according to claim 11, The matching layer is made of a material whose hardness increases with increasing temperature, in this electronic device.

17. In the electronic device according to claim 16, The aforementioned material is a Si compound, and the electronic device is made of this material.

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