Printed circuit board

Abstract

One of several objectives of the present invention is to provide a printed circuit board that includes a glass layer and can effectively prevent cracking or fracture of the glass. [Solution] The present invention relates to a printed circuit board comprising: a glass layer having an upper and lower surface facing each other in a first direction, a first and second side surface facing each other in a second direction perpendicular to the first direction, and a third and fourth side surface facing each other in a third direction perpendicular to the first and second directions, respectively, wherein at least a portion of the edge regions adjacent to the first to fourth side surfaces is reinforced, and at least a portion of the internal region surrounded by the edge regions is not reinforced; a first insulating material covering at least a portion of the first to fourth side surfaces of the glass layer; and a second insulating material and a third insulating material covering at least a portion of the upper and lower surfaces of the glass layer and extending above and below the first insulating material, respectively.

Description

Technical Field

[0001] The present invention relates to a printed circuit board.

Background Art

[0002] Efforts for the high performance of electronic products lead to packaging beyond semiconductors, and accordingly, products utilizing glass substrates, such as large area substrates for servers, are attracting attention as next-generation technologies. On the other hand, glass substrates can have advantages from the viewpoints of heat dissipation, warpage control, large area formation, realization of fine circuits, etc. compared to organic substrates made of epoxy materials. However, problems that are determined to be the generation and propagation of cracks may occur in glass substrates during processes or transportation. In this case, glass particles may flow into products through various routes such as process equipment and chemicals, leading to product defects. Therefore, it is necessary to solve the problem of cracks or fractures in glass.

Summary of the Invention

Problems to be Solved by the Invention

[0003] One of several objects of the present invention is to provide a printed circuit board including a glass layer, which can effectively prevent cracks or fractures in the glass.

Means for Solving the Problems

[0004] One of several solutions proposed through the present invention is to perform a strengthening process on at least a part of the edge region of the glass layer and form an insulating material surrounding the glass layer.

Effects of the Invention

[0005] One of the various effects of the present invention is to provide a printed circuit board including a glass layer, which can effectively prevent cracks or fractures in the glass.

[0006] From this viewpoint, for example, a printed circuit board according to one exemplary embodiment may include a glass layer having an upper and lower surface facing each other in a first direction, a first and second side surface facing each other in a second direction perpendicular to the first direction, and a third and fourth side surface facing each other in a third direction perpendicular to the first and second directions, respectively, wherein at least a portion of the edge regions adjacent to the first to fourth side surfaces is reinforced, and at least a portion of the internal region surrounded by the edge regions is not reinforced; a first insulating material covering at least a portion of the first to fourth side surfaces of the glass layer; and a second insulating material and a third insulating material covering at least a portion of the upper and lower surfaces of the glass layer and extending above and below the first insulating material, respectively.

[0007] Furthermore, for example, a printed circuit board according to one exemplary embodiment may include a frame having a through-hole, a glass layer disposed in the through-hole and in which at least a portion of the edge regions adjacent to a plurality of sides connecting the upper and lower surfaces is reinforced, and an insulating material filling at least a portion of the through-hole and covering at least a portion of the frame and the glass layer. [Brief explanation of the drawing]

[0008] [Figure 1] This is a block diagram illustrating an example of an electronic equipment system. [Figure 2] This is a schematic cross-sectional view showing an example of a printed circuit board. [Figure 3] Figure 2 is a schematic cross-sectional plan view of the printed circuit board along the line A-A'. [Figure 4a] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 4b] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 4c] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 4d] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 4e] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 4f] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 4g] Figure 2 is a schematic process diagram showing an example of the manufacturing process of a printed circuit board. [Figure 5a] This is a schematic process diagram illustrating an example of arranging multiple glass layers in a frame with multiple penetrations. [Figure 5b] This is a schematic process diagram illustrating an example of arranging multiple glass layers in a frame with multiple penetrations. [Figure 6] This is a schematic cross-sectional view showing another example of a printed circuit board. [Figure 7] This is a schematic cross-sectional view showing yet another example of a printed circuit board. [Figure 8] This is a schematic cross-sectional view showing yet another example of a printed circuit board. [Figure 9] This is a schematic cross-sectional view showing yet another example of a printed circuit board. [Modes for carrying out the invention]

[0009] The present invention will be described below with reference to the attached drawings. The shapes and sizes of the elements in the drawings may be exaggerated or reduced for clearer explanation.

[0010] Figure 1 is a block diagram illustrating an example of an electronic equipment system.

[0011] Referring to the drawing, the electronic device 1000 houses the main board 1010. The main board 1010 is physically and / or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040, etc. These are also coupled with other electronic components, which will be described later, to form various signal lines 1090.

[0012] Examples of chip-related components 1020 include, but are not limited to, memory chips such as volatile memories (e.g., DRAM), non-volatile memories (e.g., ROM), and flash memories; application processor chips such as central processors (e.g., CPU), graphics processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Needless to say, other different forms of chip-related electronic components may also be included. Also, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in a package form including the above-mentioned chips and electronic components.

[0013] Examples of network-related components 1030 include, but are not limited to, Wi-Fi (registered trademark) (such as the IEEE 802.11 family), WiMAX (registered trademark) (such as the IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth (registered trademark), 3G, 4G, 5G, and any other wireless and wired protocols designated for those and later generations. Needless to say, network-related components 1030 may be combined with chip-related components 1020 and with each other.

[0014] Other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (Low Temperature Co-Firing Ceramics), EMI (Electro Magnetic Interference) filters, MLCC (Multi-Layer Ceramic Condensers), etc. However, it is not limited to these, and in addition to these, passive elements in the form of chip components used for other different applications may also be included. Also, other components 1040 can be combined with chip-related components 1020 and / or network-related components 1030 with each other.

[0015] Depending on the type of the electronic device 1000, the electronic device 1000 can include other electronic components that are physically and / or electrically connected or not connected to the main board 1010. Examples of other electronic components include a camera module 1050, an antenna module 1060, a display 1070, a battery 1080, etc. However, it is not limited to these, and it may be an audio codec, a video codec, a power amplifier, an azimuth magnet, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a CD (compact disk), a DVD (digital versatile disk), etc. Needless to say, in addition to these, other electronic components used for various applications depending on the type of the electronic device 1000 may also be included.

[0016] The electronic device 1000 may be a smartphone, personal digital assistant, digital video camera, digital still camera, network system, computer, monitor, tablet, laptop, netbook, television, video game, smartwatch, or automobile. However, it is not limited to these, and it goes without saying that it may be any other electronic device that processes data.

[0017] Figure 2 is a schematic cross-sectional view showing an example of a printed circuit board, and Figure 3 is a schematic plan view of the printed circuit board of Figure 2 along the line A-A'.

[0018] Referring to the drawings, the printed circuit board 100A may include: a glass layer 111 having an upper and lower surface facing each other in a first direction, a first side surface S1 and a second side surface S2 facing each other in a second direction perpendicular to the first direction, and a third side surface S3 and a fourth side surface S4 facing each other in a third direction perpendicular to the first and second directions, respectively; a first insulating material 112 covering at least a portion of the first to fourth side surfaces S1, S2, S3, and S4 of the glass layer 111; a second insulating material 113 covering at least a portion of the upper surface of the glass layer 111 and extending above the first insulating material 112; and a third insulating material 114 covering at least a portion of the lower surface of the glass layer 111 and extending below the first insulating material 112. The glass layer 111 may have at least a portion of the edge regions 111a adjacent to the first to fourth sides S1, S2, S3, and S4, respectively, strengthened, while at least a portion of the internal region 111b surrounded by the edge regions 111a may not be strengthened. For example, only the edge regions 111a may be selectively strengthened.

[0019] On the other hand, the strengthening treatment may be a chemical strengthening treatment, which can increase the strength of at least a portion of the edge region 111a of the glass layer 111. For example, in the chemical strengthening treatment, a glass layer 111 with masking tape attached to the top and bottom surfaces respectively is deposited in a potassium nitrate (KNO3) solution heated to a temperature of about 400°C to 500°C in order to selectively strengthen only the edge region 111a, and Na + Ions are subjected to K, which has a larger volume (or larger ionic radius). + The strength may be increased by the compaction effect through ion exchange. Therefore, both first and second metal ions with different ionic radii can exist in the strengthened region, for example, Na + Ions and K + Ions can coexist. Compressive stress may occur on such a strengthened surface, and the penetration depth of ion exchange can be controlled by the process time. For example, the edge region 111a of the glass layer 111 can be strengthened to a depth of approximately 50 μm to 100 μm from the first to fourth sides S1, S2, S3, S4 with respect to the second or third direction by controlling the deposition time, but is not limited to this. The compressive stress and strengthening depth of the strengthened structure can be measured by the change in refraction of light rays passing through the glass.

[0020] Thus, in the printed circuit board 100A, at least a portion of the edge region 111a of the glass layer 111 is reinforced, but at least a portion of the internal region 111b of the glass layer 111 does not need to be reinforced. For example, the strength of the edge region 111a can be selectively increased compared to the internal region 111b of the glass layer 111. In this case, since compressive stress is mainly applied to the edge region 111a, chipping and microcracks can be eliminated, thereby improving bending properties. On the other hand, at least another portion of the internal region 111b of the glass layer 111 may also be reinforced, but in a structure like the printed circuit board 100A, where the glass layer 111 is covered with first to third insulating materials 112, 113, and 114, a better crack prevention effect can be achieved if only the edge region 111a is selectively reinforced and the internal region 111b is hardly reinforced.

[0021] On the other hand, the first to third insulating materials 112, 113, and 114 may be separate insulating layers with boundaries separating them from each other. For example, the second and third insulating materials 113 and 114 can be formed after the first insulating material 112 has been formed, and the first insulating material 112 may contain a different material from the second and third insulating materials 113 and 114. In this case, the upper and lower surfaces of the first insulating material 112 can be substantially coplane with the upper and lower surfaces of the glass layer 111, respectively, and in this case, a flatter surface can be provided, which may be advantageous for forming finer wiring on the second and third insulating materials 113 and 114. However, it is not limited to this, and one or more of the second and third insulating materials 113 and 114 may be integrated with the first insulating material 112 without boundaries to form a single insulating layer. For example, the first and second insulating materials 112 and 113 can be formed together by laminating any one of the insulating layers, and the third insulating material 114 can contain substantially the same insulating material as the first and second insulating materials 112 and 113 and be integrated with them seamlessly after curing. In this case, the process can be made simpler.

[0022] The printed circuit board 100A may further include a frame 115 having a through-hole H in which the glass layer 111 is placed. The first insulating material 112 can fill at least a portion of the space between each of the first to fourth side surfaces S1, S2, S3, S4 of the glass layer 111 and the wall surface of the frame 115. The second and third insulating materials 113 and 114 may extend to the upper and lower sides of the frame 115, respectively. The frame 115 may include a material with excellent rigidity, such as CCL (Copper Clad Laminate) or Unclad CCL. As will be described later, the process can be carried out at the panel level via the frame 115, and leaving the frame 115 in the final unit may be more advantageous in warp control.

[0023] On the other hand, the printed circuit board 100A may further include a through via 131 penetrating between the upper and lower surfaces of the glass layer 111, a first connecting via 132 penetrating the second insulating material 113 and connected to the upper side of the through via 131, a second connecting via 133 penetrating the third insulating material 114 and connected to the lower side of the through via 131, a first wiring layer 121 positioned on the upper surface of the second insulating material 113 and at least a portion of which is connected to the first connecting via 132, and a second wiring layer 122 positioned on the lower surface of the third insulating material 114 and at least a portion of which is connected to the second connecting via 133. The through via 131 may be a TGV (Through Glass Via) and may include a multilayer seed layer formed by a sputtering process. For example, sputtered titanium and sputtered copper can be included. The first and second connecting vias 132 and 133 may each be a BV (Blind Via) and may include a seed layer formed by electroless plating. For example, chemical copper can be included. The first and second connecting vias 132 and 133 can directly contact the upper and lower surfaces of the through via 131, respectively. The upper and lower surfaces of the through via 131 can, but are not limited to, be substantially coplane with the upper and lower surfaces of the glass layer 111, respectively.

[0024] The printed circuit board 100A may further include a plurality of first build-up insulating layers 141 laminated on the upper surface of the second insulating material 113, a plurality of first build-up wiring layers 142 each positioned on or within the upper surface of the plurality of first build-up insulating layers 141, and a plurality of first build-up via layers 143 each positioned within the plurality of first build-up insulating layers 141. Furthermore, it may further include a plurality of second build-up insulating layers 151 laminated on the lower surface of the third insulating material 114, a plurality of second build-up wiring layers 152 each positioned on or within the lower surface of the plurality of second build-up insulating layers 151, and a plurality of second build-up via layers 153 each positioned within the plurality of second build-up insulating layers 151. An electrical connection path from the top to the bottom of the board can be provided via the plurality of first and second build-up wiring layers 142, 152 and the plurality of first and second build-up via layers 143, 153. For example, the printed circuit board 100A may include a glass layer 111, first to third insulating materials 112, 113, and 114 and a frame 115 as a core layer, and may have a structure built up on both sides of the core layer.

[0025] On the other hand, the printed circuit board 100A may further include a first passivation layer 161 disposed on the upper surface of the uppermost first build-up insulating layer 141 and having a first opening 161h that exposes at least a portion of the uppermost first build-up wiring layer 142; a second passivation layer 162 disposed on the lower surface of the lower second build-up insulating layer 151 and having a second opening 162h that exposes at least a portion of the lowest second build-up wiring layer 152; a first electrical connecting metal 181 disposed on the first opening 161h and connected to at least a portion of the exposed first build-up wiring layer 142 disposed on the uppermost side; a second electrical connecting metal 183 disposed on the second opening 162h and connected to at least a portion of the exposed second build-up wiring layer 152 disposed on the lowest side; and first and second electronic components 171, 172, respectively mounted on the upper surface of the first passivation layer 161 and connected to the first electrical connecting metal 181, respectively. For example, the printed circuit board 100A may have a package structure in which components are mounted on a package substrate.

[0026] The components of the printed circuit board 100A will be described in more detail below with reference to the drawings.

[0027] The glass layer 111 may include glass, which is an amorphous solid. The glass may include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, aluminosilicate glass, etc. However, it is not limited to these, and alternative glass materials such as fluorine glass, phosphoric acid glass, and chalcogen glass can also be used. Furthermore, other additives may be included to form glass with specific physical properties. Such additives may include not only calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), but also magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates and / or oxides of these elements and other elements. The glass layer 111 may be a layer distinct from organic insulating materials containing glass fibers (Glass Fiber, Glass Cloth, Glass Fabric), such as CCL (Copper Clad Laminate) and PPG (Prepreg). For example, the glass layer 111 can include a glass panel that can be made to cover a large area, such as a glass plate.

[0028] The first to third insulating materials 112, 113, and 114 may each include an organic insulating material. The organic insulating material may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or a material containing an inorganic filler, an organic filler, and / or glass fiber (glass fiber, glass cloth, glass fabric) together with the resin. For example, the organic insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited to these, and other polymer materials may also be used. The organic insulating material may also include a photosensitive insulating material such as PID (Photo Imageable Dielectric), or an adhesive sheet such as BS (Bonding Sheet). On the other hand, the first to third insulating materials 112, 113, and 114 may each contain substantially the same organic insulating material, or they may contain different organic insulating materials.

[0029] The first and second wiring layers 121 and 122 may each contain metals. These metals may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. The first and second wiring layers 121 and 122 can each perform various functions depending on the design. For example, they may include signal patterns, power patterns, ground patterns, etc. These patterns may each have various forms such as lines, planes, and pads. The first and second wiring layers 121 and 122 may also include electroless plating layers (or chemical copper) and electroplating layers (or electrolytic copper).

[0030] The through via 131 may contain metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. The through via 131 can penetrate between the upper and lower surfaces of the glass layer 111. The upper and lower surfaces of the through via 131 may be substantially coplane with the upper and lower surfaces of the glass layer 111. The through via 131 can perform various functions depending on the design. For example, it may include ground vias, power vias, signal vias, etc. The through via 131 may have a substantially circular or elliptical shape in plan, but is not limited thereto. For example, from the viewpoint of ensuring tight contact by increasing the specific surface area, it may also have a generally flower shape in plan. The through via 131 may have a substantially rectangular shape in cross-section, but is not limited thereto. It may also have a generally hourglass shape. The through via 131 may include multiple sputtered layers and electroplated layers (or electroplated copper). There may be multiple through vias 131.

[0031] The first and second connecting vias 132 and 133 can each contain metal. The metals may include copper (Cu), aluminum (Al), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. The first and second connecting vias 132 and 133 can each contain filled vias that fill via holes, or conformal vias that are positioned along the walls of via holes. The first and second connecting vias 132 and 133 can perform various functions depending on the design. For example, they may include ground vias, power vias, signal vias, etc. The first and second connecting vias 132 and 133 may have tapered shapes in opposite directions in cross-section. The first and second connecting vias 132 and 133 may contain electroless plating layers (or chemical copper) and electroplating layers (or electrolytic copper). There may be multiple first and second connecting vias 132 and 133.

[0032] The multiple first and second build-up insulating layers 141, 151 may each contain an organic insulating material. The organic insulating material may include a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or a material containing inorganic fillers, organic fillers, and / or glass fibers (glass fiber, glass cloth, glass fabric) together with these resins. For example, the organic insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may also be used. Alternatively, the organic insulating material may be a photosensitive insulating material such as PID (Photo Imageable Dielectric). The multiple first and second build-up insulating layers 141, 151 may contain substantially the same organic insulating material, but is not limited thereto. The multiple first and second build-up insulating layers 141, 151 may have the same number of layers, but is not limited thereto.

[0033] Multiple first and second build-up wiring layers 142, 152 may each contain a metal. The metal may include copper (Cu), aluminum (Al), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Multiple first and second build-up wiring layers 142, 152 may each perform various functions depending on the design. For example, they may include signal patterns, power patterns, ground patterns, etc. These patterns may each have various forms such as lines, planes, and pads. Multiple first and second build-up wiring layers 142, 152 may include electroless plating layers (or chemical copper) and electroplating layers (or electrolytic copper). Multiple first and second build-up wiring layers 142, 152 may, but are not limited to, have the same number of layers.

[0034] Multiple first and second build-up via layers 143, 153 can each contain a metal. The metals can include copper (Cu), aluminum (Al), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. One or more first and second build-up via layers 143, 153 can each contain filled vias that fill via holes, or conformal vias positioned along the walls of via holes. Multiple first and second build-up via layers 143, 153 can each perform various functions depending on the design. For example, they can include ground vias, power vias, signal vias, etc. Multiple first and second build-up via layers 143, 153 can have tapered shapes in opposite directions in cross-section. Multiple first and second build-up via layers 143, 153 can include electroless plating layers (or chemical copper) and electroplating layers (or electrolytic copper). The multiple first and second build-up via layers 143, 153 may, but are not limited to, have the same number of layers.

[0035] The first and second passivation layers 161 and 162 may include, but are not limited to, liquid or film-type solder resist, and other types of insulating materials such as ABF may be used. Surface treatment layers and / or metal bumps may be formed on the patterns exposed to the first and second openings 161h and 162h, as needed. The patterns exposed to the first and second openings 161h and 162h may be in the form of SMD (Solder Mask Defined) and / or NSMD (Non-Solder Mask Defined), but are not limited to these. There may be multiple first and second openings 161h and 162h.

[0036] The first and second electrical connecting metals 181 and 183 can each be formed from a low-melting-point metal, such as tin (Sn)-aluminum (Al)-copper (Cu) solder, but this is merely an example and the material is not particularly limited thereto. The first and second electrical connecting metals 181 and 183 may each be balls, pins, etc. The first and second electrical connecting metals 181 and 183 may each be formed in multilayer or single layer. When formed in multilayer, they may include copper columns and solder, and when formed in single layer, they may include tin-silver solder, but are not limited thereto. The first electrical connecting metal 181 can be used for mounting electronic components 171 and 172, and the second electrical connecting metal 183 can be used for mounting the printed circuit board 100A onto other boards such as a main board. There may be multiple first and second electrical connecting metals 181 and 183 each.

[0037] The first and second electronic components 171 and 172 may each include active and / or passive components. Active components may include various types of semiconductor chips, and passive components may include various types of chip-type components such as chip capacitors and chip inductors. Each semiconductor chip may include an integrated circuit (IC) die in which hundreds to millions or more elements are integrated within a single chip. In this case, the integrated circuit may be, but is not limited to, logic chips such as a central processor (e.g., CPU), graphics processor (e.g., GPU), field-programmable gate array (FPGA), digital signal processor, cryptographic processor, microprocessor, microcontroller, application processor (e.g., AP), analog-to-digital converter, or ASIC (application-specific IC), and it goes without saying that it may also be other types such as memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, HBM (High Bandwidth Memory), or PMIC (Power Management IC).

[0038] Figures 4a to 4g are schematic process diagrams illustrating an example of the manufacturing process for the printed circuit board shown in Figure 2.

[0039] Referring to Figure 4a, the glass layer 111 can be prepared. The glass layer 111 may be in the form of a glass plate. Next, the edge region 111a of the glass layer 111 can be strengthened. For example, the glass layer 111 can be immersed in a potassium nitrate (KNO3) solution heated to a high temperature with the surface of the internal region 111b of the glass layer 111 covered with masking tape, and then chemically strengthened by ion exchange or the like.

[0040] Referring to Figure 4b, through-holes 131 can be formed in the glass layer 111. For example, through-holes can be formed in the glass layer 111 by various methods such as laser processing, mechanical processing, or chemical processing, a seed layer can be formed on the wall surface of the through-hole by sputtering or the like, and then the through-hole can be filled with electroplating or the like to form the through-holes 131. The plating layers on the upper and lower surfaces of the glass layer 111 can be removed by etching.

[0041] Referring to Figure 4c, the glass layer 111 can be placed in the through-hole H of the frame 115. For example, after attaching tape 220 to the underside of the frame 115 to seal the underside of the through-hole H, the glass layer 111 can be attached to the tape 220 that is exposed from the through-hole H. The frame 115 can include various materials such as metal and organic insulating material. The frame 115 can take the form of a jig. The tape 220 can include polyimide (PI) or the like, but the material is not particularly limited thereto.

[0042] Referring to Figure 4d, the remaining space of the through-hole H can be filled with the first insulating material 112. Alternatively, the second insulating material 113 can be laminated on top of the glass layer 111 and the first insulating material 112. Planarization can be performed as needed. The first and second insulating materials 112 and 113 can also be formed simultaneously by laminating insulating layers on the frame 115 and the glass layer 111.

[0043] Referring to Figure 4e, the tape 220 can be removed, and the third insulating material 114 can be laminated beneath the glass layer 111 and the first insulating material 112 from which the tape 220 was removed. Planarization can be performed as needed.

[0044] Referring to Figure 4f, after processing via holes in the second and third insulating materials 113 and 114, a plating process can be performed to form the first and second wiring layers 121 and 122 and the first and second connecting vias 132 and 133. Laser processing can be used for processing the via holes. Electroless plating and electrolytic plating can be used for the plating process.

[0045] Referring to Figure 4g, a build-up process and a plating process can be performed on the second and third insulating materials 113 and 114, respectively, to form multiple first and second build-up insulating layers 141 and 151, multiple first and second build-up wiring layers 142 and 152, and multiple first and second build-up via layers 143 and 153. Furthermore, first and second passivation layers 161 and 162 can be formed in a lamination or coating process. Subsequently, first and second electrical coupling metals can be formed as needed, and first and second electronic components can be mounted. The above-described printed circuit board 100A can be manufactured through this series of processes, and other details may be substantially the same as those described above.

[0046] Figures 5a and 5b are schematic process diagrams illustrating an example of arranging multiple glass layers in a frame having multiple penetrations.

[0047] Referring to the drawings, the frame 115 may have multiple through-holes H, and each of the multiple glass layers 111 may be placed in each of the multiple through-holes H. Each of the multiple glass layers 111 may have undergone strengthening treatment and had through-vias 131 formed through the manufacturing process described in Figures 4a to 4c above, or it may be placed in each of the multiple through-holes H using tape. Subsequently, multiple printed circuit board 100A units can be manufactured by performing the manufacturing process described in Figures 4d to 4g above, and multiple printed circuit boards 100A can be obtained through a singulation process. For example, multiple printed circuit boards 100A can be manufactured in a panel-level process. Other details may be substantially the same as those described in the printed circuit board 100A and its manufacturing method above.

[0048] Figure 6 is a schematic cross-sectional view showing another example of a printed circuit board.

[0049] Referring to the drawings, the printed circuit board 100B may further include a third electronic component 173 mounted on the first passivation layer 161 via a first electrical coupling metal 181, as in the printed circuit board 100A described above. It may also further include first to third electronic elements 191, 192, and 193, each embedded within a plurality of first build-up insulating layers 141 and connected to at least one of a plurality of first build-up wiring layers 142 via at least one of a plurality of first build-up via layers 143. The third electronic component 173 may include active and / or passive components. The first to third electronic elements 191, 192, and 193 may each include an interconnect bridge, an active and / or passive component. The interconnect bridge can transmit electrical signals between at least two of the first to third electronic components 171, 172, and 173 via an internal high-density circuit. The interconnect bridge may be a silicon bridge, an organic bridge, or the like. Active components may include various types of semiconductor chips, and passive components may include various types of chip-type components such as chip capacitors and chip inductors. Other details may be substantially the same as those described in the printed circuit board 100A and its manufacturing method described above.

[0050] Figure 7 is a schematic cross-sectional view showing yet another example of a printed circuit board.

[0051] Referring to the drawings, the printed circuit board 100C may further include, in the printed circuit board 100A described above, fourth and fifth electronic elements 194, 195 embedded in the core layer, more specifically, in the glass layer 111. For example, the fourth and fifth electronic elements 194, 195 may each be placed in a cavity formed in the glass layer 111 and each be connected to at least a portion of the first wiring layer 121 via a third connecting via 134 that penetrates the second insulating material 113. The cavity may be a blind cavity that penetrates a portion from the top surface of the glass layer 111, or a through cavity that penetrates between the top and bottom surfaces of the glass layer 111. The fourth and fifth electronic elements 194, 195 may each include active and / or passive components. Active components may include various types of semiconductor chips, and passive components may include various types of chip-type components such as chip capacitors and chip inductors. Other details may be substantially the same as those described in the printed circuit board 100A and its manufacturing method described above.

[0052] Figure 8 is a schematic cross-sectional view showing yet another example of a printed circuit board.

[0053] Referring to the drawings, the printed circuit board 100D can omit the multiple second build-up insulating layers 151, the multiple second build-up wiring layers 152, and the multiple second build-up via layers 153 in the printed circuit board 100C described above. For example, it may have an asymmetric structure built up only on the upper side with respect to the core layer. On the other hand, the technical features of the printed circuit board 100D can be applied not only to the printed circuit board 100C described above, but also to the printed circuit boards 100A and 100B described above. Other details may be substantially the same as those described in the printed circuit boards 100A, 100B, 100C and their manufacturing methods described above.

[0054] Figure 9 is a schematic cross-sectional view showing yet another example of a printed circuit board.

[0055] Referring to the drawings, the printed circuit board 100E may include first and second glass layers 111-1 and 111-2 separated in a first direction from the glass layer 111 in the printed circuit board 100A described above. The through via 131 may include a first through via 131-1 that penetrates the first glass layer 111-1 and a second through via 131-2 that penetrates the second glass layer 111-2. A conductive film 118 containing conductive particles 118a that electrically connects the first and second through vias 131-1 and 131-2 may be placed between the first and second glass layers 111-1 and 111-2. For example, such a structure can be introduced if a thicker glass layer 111 is required in the core layer. The first glass layer 111-1 may include a reinforced first edge region 111a-1 and a first internal region 111b-1. The second glass layer 111-2 may include a reinforced second edge region 111a-2 and a second internal region 111b-2. The conductive film 118 may include conductive particles 118a and an insulating resin 118b. The conductive particles 118a may be metal particles. The conductive film 118 may include, but is not limited to, an ACF (Anisotropic Conductive Film). On the other hand, the technical features of the printed circuit board 100E can be applied not only to the printed circuit board 100A described above, but also to the printed circuit boards 100B, 100C, and 100D described above. Other details may be substantially the same as those described in the printed circuit boards 100A, 100B, 100C, 100D and their manufacturing methods described above.

[0056] In this invention, "thickness, width, length, pitch, depth," etc., can be measured using a scanning microscope or optical microscope based on a cross-section obtained by polishing or cutting the printed circuit board. The cut cross-section may be a vertical or horizontal cross-section, and each value can be measured based on the required cut cross-section. If the values ​​are not constant, the values ​​can be determined by the average value of the values ​​measured at any five points. The width of the upper and / or lower ends of the via can be measured on a cross-section cut through the substrate in the thickness direction along the central axis of the via. The depth of the via can be measured as the distance from the upper end to the lower end of the via on a cross-section cut through the substrate in the thickness direction along the central axis of the via.

[0057] In this invention, the expression "cover" can include not only cases of covering the entire surface but also cases of covering at least a part of it, and can also include cases of covering indirectly as well as directly. Furthermore, the expression "fill" can include not only cases of completely filling but also cases of nearly filling, and can include cases where, for example, some voids or air pockets exist.

[0058] In this invention, the determination can be made including process errors, positional deviations, and measurement errors that substantially occur during the manufacturing process. For example, "the line width, spacing, thickness, height, etc. are substantially the same" can include not only cases where the numerical values ​​are exactly the same, but also cases where they are approximately similar. Furthermore, "having substantially a certain shape" can include not only cases where it has exactly that shape, but also cases where it has approximately that shape. Moreover, "substantially coplane" can include not only cases where they are exactly on the same plane, but also cases where they are approximately on the same plane.

[0059] In this invention, "substantially identical insulating material" can mean not only completely identical insulating materials, but also insulating materials of the same type. Therefore, although the composition of the insulating material is substantially the same, the specific composition ratios may differ slightly.

[0060] In this invention, the term "on a cross-section" can mean the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed from the side. The term "on a plane" can mean the planar shape when the object is cut horizontally, or the planar shape when the object is viewed from the top or bottom.

[0061] In this invention, terms such as "lower side," "lower part," and "bottom surface" are used for convenience to mean the downward direction relative to the cross-section in the drawing, while terms such as "upper side," "upper part," and "top surface" are used to mean the opposite direction. Furthermore, terms such as "side" and "side" are used to mean the direction perpendicular to the top and bottom surfaces. However, these definitions of direction are for illustrative purposes only, and it goes without saying that the scope of rights in the patent claims is not particularly limited by such descriptions of direction, and the concepts of "up" and "down" can be changed at any time.

[0062] In this invention, "connected" is a concept that includes not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept that includes both cases where they are physically connected and cases where they are not connected. In addition, expressions such as "first," "second," etc., are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, within the scope of the rights, the first component may be named the second component, and similarly, the second component may be named the first component.

[0063] The expression "exemplary embodiment" as used in this invention does not mean that each embodiment is the same as another, but is provided to highlight and describe distinct and unique features of each embodiment. However, the exemplary embodiments presented above do not preclude their realization in combination with features of other exemplary embodiments. For example, even if a matter described in a particular exemplary embodiment is not described in another exemplary embodiment, it can be understood as a description related to the other exemplary embodiment, unless there is a contradictory or inconsistent description of that matter in the other exemplary embodiment.

[0064] The terms used in this invention are used merely to describe an exemplary embodiment and are not intended to limit the invention. In this context, singular expressions include plural expressions unless the context clearly indicates a different meaning. [Explanation of Symbols]

[0065] 1000:Electronic equipment 1010: Mainboard 1020: Chip-related components 1030: Network-related components 1040: Other parts 1050: Camera 1060: Antenna 1070: Display 1080: Battery 1090: Signal line 100A, 100B, 100C, 100D, 100E: Printed circuit board 110: Core Layer 111, 111-1, 111-2: Glass layer 111a, 111a-1, 111a-2: Edge region 111b, 111b-1, 111b-2: Internal area 112, 113, 114: Insulating material 115: Frame 118: Conductive film 118a: Conductive particles 118b: Insulating resin 121, 122: Wiring layer 131: Through-beam 132, 133, 134: Connection vias 141, 151: Build-up insulating layer 142, 152: Build-up wiring layer 143, 153: Build-up beer layer 161, 162: Passivation layer 171, 172, 173: Electronic components 181, 183: Electrically connected metals 191, 192, 193, 194, 195: Electronic elements

Claims

1. A glass layer having an upper and lower surface facing each other in a first direction, a first and second side surface facing each other in a second direction perpendicular to the first direction, and a third and fourth side surface facing each other in a third direction perpendicular to the first and second directions, respectively, wherein at least a portion of the edge regions adjacent to the first to fourth side surfaces is strengthened, and at least a portion of the internal region surrounded by the edge regions is not strengthened; A first insulating material covering at least a portion of the first to fourth sides of the glass layer, A printed circuit board comprising: a second insulating material and a third insulating material that cover at least a portion of the upper and lower surfaces of the glass layer and extend above and below the first insulating material, respectively.

2. The strengthened region of the glass layer contains a first metal ion and a second metal ion. The printed circuit board according to claim 1, wherein the second metal ion has an even larger ionic radius than the first metal ion.

3. The first metal ion is Na ＋ Contains ions, The aforementioned second metal ion is K ＋ A printed circuit board according to claim 2, comprising ions.

4. The printed circuit board according to claim 1, wherein the strengthened region of the glass layer is strengthened to a depth of 50 μm to 100 μm from each of the first to fourth side surfaces with reference to the second or third direction.

5. The first to third insulating materials are insulating layers separated by a boundary between them, The printed circuit board according to claim 1, wherein the upper and lower surfaces of the first insulating material are substantially coplane with the upper and lower surfaces of the glass layer, respectively.

6. The printed circuit board according to claim 1, wherein one or more of the second insulating material and the third insulating material are integrated with the first insulating material without boundaries to form a single insulating layer.

7. The frame further includes a through portion where the glass layer is arranged, The first insulating material fills at least a portion of the space between each of the first to fourth sides of the glass layer and the wall surface of the frame. The printed circuit board according to claim 1, wherein the second insulating material and the third insulating material extend to the upper and lower sides of the frame, respectively.

8. A through via that penetrates between the upper and lower surfaces of the glass layer, A first connecting via that penetrates the second insulating material and is connected to the upper side of the penetrating via, A second connecting via penetrates the third insulating material and is connected to the lower side of the penetrating via, A first wiring layer is disposed on the upper surface of the second insulating material, and at least a portion of it is connected to the first connecting via, The printed circuit board according to claim 1, further comprising: a second wiring layer disposed on the lower surface of the third insulating material and at least a portion of which is connected to the second connecting via.

9. The through via contains sputtered titanium and sputtered copper as seed layers. The printed circuit board according to claim 8, wherein the first connection via and the second connection via each contain chemical copper as a seed layer.

10. A first electronic element embedded within the glass layer, The present invention further includes a third connecting via that penetrates the second insulating material and connects the first electronic element to at least another portion of the first wiring layer, The printed circuit board according to claim 8, wherein the first electronic element includes one or more active and passive components.

11. The glass layer includes a first glass layer and a second glass layer separated in the first direction, The through via includes a first through via that penetrates the first glass layer and a second through via that penetrates the second glass layer. The printed circuit board according to claim 8, wherein a conductive film containing conductive particles that electrically connect the first through via and the second through via is disposed between the first glass layer and the second glass layer.

12. A plurality of first build-up insulating layers laminated on the upper surface of the second insulating material, A plurality of first build-up wiring layers, each disposed on the upper surface of or within the plurality of first build-up insulating layers, The printed circuit board according to claim 8, further comprising a plurality of first build-up via layers, each disposed within the plurality of first build-up insulating layers.

13. The system further includes a second electronic element embedded within the plurality of first build-up insulating layers and connected to at least a portion of at least one of the plurality of first build-up wiring layers via at least a portion of at least one of the plurality of first build-up via layers, The printed circuit board according to claim 12, wherein the second electronic element includes one or more interconnect bridges, active components, and passive components.

14. A first passivation layer is disposed on the upper surface of the uppermost of the plurality of first build-up insulating layers, and has a first opening that exposes at least a portion of the uppermost of the plurality of first build-up wiring layers, A second passivation layer is disposed on the lower surface of the third insulating material and has a second opening that exposes at least a portion of the second wiring layer, A first electrical connecting metal is positioned on the first opening and connected to at least a portion of the exposed first build-up wiring layer positioned on the uppermost side, An electronic component mounted on the upper surface of the first passivation layer and connected to the first electrically connected metal, The present invention further includes a second electrical connecting metal positioned on the second opening and connected to at least a portion of the exposed second wiring layer, The printed circuit board according to claim 12, wherein the electronic components include one or more active components and passive components.

15. A plurality of second build-up insulating layers laminated on the lower surface of the third insulating material, A plurality of second build-up wiring layers, each disposed on the lower surface of the plurality of second build-up insulating layers or within the plurality of second build-up insulating layers, The printed circuit board according to claim 12, further comprising a plurality of second build-up via layers, each disposed within the plurality of second build-up insulating layers.

16. A first passivation layer is disposed on the upper surface of the uppermost of the plurality of first build-up insulating layers, and has a first opening that exposes at least a portion of the uppermost of the plurality of first build-up wiring layers, A second passivation layer is disposed on the lower surface of the second build-up insulating layer, which is located at the bottom of the plurality of second build-up insulating layers, and has a second opening that exposes at least a portion of the second build-up wiring layer, which is located at the bottom of the plurality of second build-up wiring layers. A first electrical connecting metal is positioned on the first opening and connected to at least a portion of the exposed first build-up wiring layer positioned on the uppermost side, An electronic component mounted on the upper surface of the first passivation layer and connected to the first electrically connected metal, The present invention further includes a second electrical connecting metal positioned on the second opening and connected to at least a portion of the exposed second build-up wiring layer positioned at the lowest side, The printed circuit board according to claim 15, wherein the electronic components include one or more active components and passive components.

17. A frame having a through-hole, A glass layer is provided in the aforementioned through-section, and at least a portion of the side surfaces and adjacent edge regions that connect the upper and lower surfaces are reinforced. A printed circuit board comprising an insulating material that fills at least a portion of the through-hole and covers at least a portion of the frame and the glass layer, respectively.

18. The printed circuit board according to claim 17, wherein the frame includes CCL (Copper Clad Laminate) or Unclad CCL.

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