Manufacturing method, pulse detector, and X-ray photoelectron spectrometer

Abstract

To reduce the manufacturing cost of a CFD circuit that outputs a detection signal at a timing when the amplitude of the input pulse becomes a constant ratio. [Solution] The method for manufacturing a CFD circuit according to the present disclosure includes the step S14 of providing a hysteresis comparator that includes two input terminals for receiving a delayed signal and an attenuation signal, and has a first threshold and a second threshold, which outputs a first output when the difference in the voltage values ​​input to the two input terminals is greater than or equal to the first threshold, and outputs a second output when the difference in the voltage values ​​input to the two input terminals is less than or equal to the second threshold; the step S16 of providing a voltage supply unit that applies an offset voltage to the hysteresis comparator; and the step S30 of setting the offset voltage.

Description

Technical Field

[0001] The present disclosure relates to a manufacturing method, a pulse detector, and an X-ray photoelectron spectrometer, and more particularly to reducing the manufacturing cost of a CFD (Constant Fraction Discriminator) circuit for detecting pulses of electrons and radiation.

Background Art

[0002] Surface analysis is an analysis for clarifying the structure and composition of the surface and interface of a sample by applying a stimulus to the sample and analyzing the detected response. As a surface analysis technique, for example, there is X-ray photoelectron spectroscopy (XPS) as disclosed in Japanese Patent Application Laid-Open No. 2001-201470 (Patent Document 1).

[0003] In surface analysis including XPS, a CFD circuit may be used to detect pulsed radiation or electrons emitted from a sample. The CFD circuit compares the value of a signal obtained by delaying the input pulse with the value of a signal obtained by attenuating the pulse, and detects the timing at which the magnitude relationship between the two values is reversed. Thereby, it is possible to detect the timing at which the pulse amplitude becomes a constant ratio regardless of the pulse amplitude. A comparator is used to compare the values of the two signals.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] By using a CFD circuit, it is possible to detect the timing at which the amplitude of a pulse becomes a constant ratio, regardless of the amplitude of the pulse of the radiation or electron. Specifically, a pulse is detected according to the output from a comparator that indicates when the voltage values ​​of two input signals become equal. Therefore, even when no pulse is input, the voltage values ​​of the two terminals of the comparator may become equal, and the system may process this as if a pulse has been detected despite no pulse being input.

[0006] By applying an offset voltage to one of the input terminals, it is possible to prevent the voltages across the two input terminals of the comparator from being equal when no pulse is input. However, when a pulse is input, the timing at which the pulse is detected will be shifted by the value of the offset voltage from the timing at which the value of the delayed signal of the input pulse equals the value of the attenuated signal of the pulse.

[0007] Furthermore, by preparing a circuit to determine whether or not a pulse has been input, it is possible to prevent the system from mistakenly processing a pulse as detected even when the voltages across the two input terminals are equal when no pulse has been input. By using a circuit to determine whether or not a pulse has been input, a pulse can only be detected when a pulse has been input and the voltage values ​​across the two terminals of the comparator are equal. Therefore, it prevents the system from mistakenly processing a pulse as detected when no pulse has been input, and prevents any discrepancy between the timing when the voltage values ​​across the two terminals become equal and the timing when the pulse amplitude becomes a constant ratio. However, it is necessary to prepare a separate circuit to determine whether or not a pulse has been input, which may increase the manufacturing cost of the CFD circuit.

[0008] This disclosure is made in light of these circumstances, and its purpose is to reduce the manufacturing cost of a CFD circuit in which a detection signal is output at a timing when the input pulse amplitude is at a constant rate. [Means for solving the problem]

[0009] A manufacturing method according to an aspect of the present disclosure is a method for manufacturing a CFD circuit for detecting pulses of electrons or radiation, comprising the steps of: providing a delay signal generation unit that generates a delay signal obtained by delaying the pulse for a predetermined time; providing an attenuation signal generation unit that generates an attenuation signal obtained by attenuating the pulse by a predetermined percentage; providing a hysteresis comparator that includes two input terminals for receiving the delay signal and the attenuation signal, and has a first threshold and a second threshold smaller than the first threshold, and outputs a first output when the difference in the values ​​of the voltages input to the two input terminals is greater than or equal to the first threshold, and outputs a second output when the difference in the values ​​of the voltages input to the two input terminals is less than or equal to the second threshold; providing a voltage supply unit that applies an offset voltage corresponding to the first threshold or the second threshold to the hysteresis comparator; and setting the offset voltage, wherein the step of setting the offset voltage includes setting the voltage corresponding to the first threshold as the offset voltage when the delay signal is input to the non-inverting input terminal of the two input terminals in the CFD circuit, and setting the voltage corresponding to the second threshold as the offset voltage when the delay signal is input to the inverting input terminal of the two input terminals in the CFD circuit. [Effects of the Invention]

[0010] According to this disclosure, the manufacturing cost of a CFD circuit in which a detection signal is output at a timing when the input pulse amplitude is at a constant rate can be reduced. [Brief explanation of the drawing]

[0011] [Figure 1] This is a schematic diagram showing the configuration of the XPS according to this embodiment. [Figure 2] This is a schematic diagram showing the configuration of the detector according to this embodiment. [Figure 3] This is a schematic diagram showing the configuration of the CFD according to this embodiment. [Figure 4] This is a diagram illustrating the signal output from a hysteresis comparator. [Figure 5]This is a schematic diagram showing the configuration of the processing apparatus according to this embodiment. [Figure 6] This diagram illustrates a method for detecting pulses by setting a threshold related to a comparative example. [Figure 7] This diagram illustrates a method for detecting pulses using a CFD circuit. [Figure 8] This is a schematic diagram showing the configuration of the CFD relating to the comparative example. [Figure 9] This is a flowchart of the manufacturing process for CFD circuits. [Figure 10] This diagram illustrates the difference between the two thresholds of a hysteresis comparator. [Modes for carrying out the invention]

[0012] The embodiments of this disclosure will be described in detail below with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and their descriptions will not be repeated.

[0013] A CFD circuit is used to detect pulsed radiation or electrons emitted from a sample. In this embodiment, an XPS apparatus equipped with a CFD circuit is used as an example, but the apparatus to which the CFD circuit according to this disclosure is applied is not limited to an XPS apparatus, but any device that detects pulses of radiation or electrons.

[0014] [Configuration of the X-ray photoelectron spectrometer] Figure 1 shows the configuration of an XPS apparatus 100 according to an embodiment. The XPS apparatus 100 measures the kinetic energy distribution of photoelectrons emitted by irradiating a sample S with X-rays, and obtains information on the types, amounts, and chemical bonding states of elements present on the surface of the sample S. Referring to Figure 1, the XPS apparatus 100 comprises an X-ray source 10, a lens 20, a slit 30, an energy spectrometer 40, a detector 50, and a processing unit 60.

[0015] The X-ray source 10 is configured to generate X-rays and irradiate the generated X-rays onto the sample S. The X-ray source 10 includes, for example, a filament and an anode plate. The anode plate is formed of a metal material such as, for example, aluminum, magnesium, chromium, or copper. When a voltage is applied to the filament, thermoelectrons are emitted from the filament. The thermoelectrons are accelerated by the voltage applied between the filament and the anode plate. When the accelerated thermoelectrons collide with the anode plate, X-rays are generated from the anode plate. When the generated X-rays are irradiated onto the sample S, the inner-shell electrons of the elements present near the surface of the sample S are excited and photoelectrons are emitted. Note that the electrons emitted from the sample S are not limited to photoelectrons and may be Auger electrons. In FIG. 1, the line L1 indicates the movement of the electrons emitted from the sample S.

[0016] The lens 20 receives the electrons emitted from the sample S, decelerates the electrons, and converges them. The lens 20 includes, for example, an electrostatic lens and a deceleration lens. The electrostatic lens converges the electrons to the entrance 31 of the slit 30. The deceleration lens decelerates the electrons incident on the energy spectrometer 40.

[0017] The energy spectrometer 40 spatially separates the electrons according to the kinetic energy of the electrons emitted from the sample S. The energy spectrometer 40 includes an outer hemispherical electrode 41 and an inner hemispherical electrode 42. The energy spectrometer 40 applies a voltage to the outer hemispherical electrode 41 and the inner hemispherical electrode 42 to generate an electric field between the outer hemispherical electrode 41 and the inner hemispherical electrode 42. The electric field bends the flight path of the electrons that have passed through the slit 30. The electrons that have passed through the energy spectrometer 40 are incident on the detector 50. The potential difference between the outer hemispherical electrode 41 and the inner hemispherical electrode 42 corresponds to the kinetic energy of the electrons that can pass through the energy spectrometer 40. In FIG. 1, the energy spectrometer 40 is an electrostatic hemispherical electron energy spectrometer, but the energy spectrometer 40 is not limited to an electrostatic hemispherical electron energy spectrometer as long as it spatially separates the electrons according to the kinetic energy of the incident electrons.

[0018] Detector 50 detects electrons that have passed through the energy spectrometer 40. By adjusting the potential difference between the outer hemisphere electrode 41 and the inner hemisphere electrode 42, the kinetic energy of the electrons that can pass through the energy spectrometer 40 changes. FIG. 2 is a diagram for explaining the configuration of the detector 50. Referring to FIG. 2, the detector 50 includes a micro-channel plate (MCP) 51, a delay line detector (DLD) 52, and CFD (Constant Fraction Discriminator) circuits 53 and 54.

[0019] The MCP 51 has a structure in which a bundle of minute photomultiplier tubes is formed and amplifies incident charged particles. Specifically, electrons incident from the incident surface 51A are amplified by the MCP 51. Then, a plurality of electrons are emitted from the output surface 51B.

[0020] The DLD 52 detects the position of the electrons emitted from the MCP 51. The DLD 52 has a structure in which conducting wires are wound. When electrons emitted from the MCP 51 collide with the conducting wires, charges flow from the collision position toward both ends of the conducting wires. Depending on the position where the electrons collide, the time for the charges to reach both ends of the conducting wires is different. Specifically, the end of the conducting wire closer to the position where the electrons collide has charges reach it earlier than the end of the conducting wire farther from the position where the electrons collide. For example, when electrons emitted from the output surface 51B hit a position P on the DLD 52, charge V1 travels toward terminal 52A of the DLD 52, and charge V2 travels toward terminal 52B on the side opposite to terminal 52A. The difference in the time for the charges to reach is information indicating the position where the electrons collided.

[0021] By including the DLD52 in the detector 50, it is possible to measure the position at which electrons that have passed through the energy spectrometer 40 enter the detector 50. This improves the resolution in measuring the kinetic energy of electrons that have passed through the energy spectrometer 40. Specifically, rather than simply counting electrons that have passed through the energy spectrometer 40 while a predetermined potential difference exists, measuring the collision position of the electrons in the DLD52 after they have passed through the energy spectrometer 40 improves the resolution in measuring the kinetic energy of those electrons.

[0022] The CFD circuits 53 and 54 are circuits used to detect pulses of electrons or radiation. Specifically, the CFD circuits 53 and 54 can output a detection signal at a timing when the pulse amplitude becomes a constant ratio, regardless of the amplitude of the input pulse. In this specification, the detection signal refers to the signal output from the comparator to indicate that a pulse has been detected, and the processing unit 60 determines that a pulse has been detected when it receives this signal. In one embodiment of the CFD circuits 53 and 54, as described later, the switching of a Low signal to a High signal corresponds to the output of a detection signal.

[0023] The detector 50 according to this embodiment can improve the resolution in measuring the kinetic energy of electrons by accurately detecting the incident position of electrons using the DLD 52. The incident position of electrons is detected by the difference in the arrival time of charges toward both ends of the DLD 52 when electrons collide with the DLD 52. Therefore, it is necessary to output a detection signal at a predetermined timing regardless of the amplitude of the voltage pulse applied to terminals 52A and 52B. CFD circuits 53 and 54 are used to output a detection signal regardless of the amplitude of the voltage pulse applied to terminals 52A and 52B.

[0024] Furthermore, the amplitudes of the pulses generated when electrons collide with the DLD52 at position P, specifically the pulses heading towards terminal 52A and the pulses heading towards terminal 52B, are not necessarily the same. Therefore, in order to accurately measure the arrival timing of these pulses, a CFD circuit capable of detecting pulses independently of their amplitude is required.

[0025] Figure 3 is a schematic diagram showing the configuration of the CFD circuit 53 according to this embodiment. Note that the CFD circuit 54 has the same configuration as the CFD circuit 53, so a detailed explanation is omitted. Referring to Figure 3, the CFD circuit 53 includes a delay signal generation unit 531, an attenuation signal generation unit 532, a voltage supply unit 533, and a hysteresis comparator 534.

[0026] The delayed signal generation unit 531 generates a pulse that is delayed by a predetermined time from the input pulse. The predetermined time may be set in advance or determined for each sample.

[0027] The attenuation signal generation unit 532 generates a pulse obtained by attenuating the input pulse by a predetermined percentage. The predetermined percentage may be set in advance or determined for each sample.

[0028] The voltage supply unit 533 supplies an offset voltage. The supplied offset voltage is applied to the pulse generated by the attenuation signal generation unit 532. The offset voltage is set to be equal to the voltage value of the first threshold of the hysteresis comparator 534. The voltage supply unit 533 is, for example, a DAC (Digital to Analog Converter). The offset voltage supplied from the voltage supply unit 533 will be described later.

[0029] The hysteresis comparator 534 is an element that compares two input voltage values ​​and switches its output depending on the relative magnitudes of the input values. It has a first threshold and a second threshold that is smaller than the first threshold. The hysteresis comparator 534 has a non-inverting input terminal 5341, an inverting input terminal 5342, a positive power supply terminal 5343, a negative power supply terminal 5344, and an output terminal 5345. The non-inverting input terminal 5341 receives a pulse generated by the delay signal generation unit 531. The inverting input terminal 5342 receives a voltage value that is a combination of a pulse generated by the attenuation signal generation unit 532 and a voltage supplied by the voltage supply unit 533. The positive power supply terminal 5343 and the negative power supply terminal 5344 are supplied with power to operate the hysteresis comparator 534.

[0030] Figure 4 is a diagram illustrating the signal output from the hysteresis comparator 534. The hysteresis comparator 534 outputs a High signal from output terminal 5345 when the difference between the voltage value input from the non-inverting input terminal 5341 and the voltage value input from the inverting input terminal 5342 is greater than or equal to a first threshold. When the difference is greater than or equal to the first threshold and a High signal is output from output terminal 5345, the High signal is output until the difference falls below or equal to a second threshold. The hysteresis comparator 534 also outputs a Low signal when the difference falls below or equal to a second threshold. When the difference is below or equal to a second threshold and a Low signal is output from output terminal 5345, the hysteresis comparator 534 outputs a Low signal until the difference falls below or equal to the first threshold. In one embodiment, the High signal corresponds to the first output, and the Low signal corresponds to the second output. In CFD circuits 53 and 54, switching from a Low signal to a High signal corresponds to outputting a pulse detection signal.

[0031] The processing unit 60 processes the energy spectrum detected by the detector 50. Figure 5 is a schematic diagram showing the configuration of the processing unit 60.

[0032] The processing unit 60 mainly includes a processor 61, memory 62, input / output interface (I / F) 63, input unit 64, and display unit 65. Each of these units is connected to each other via a bus so that they can communicate with one another. The processing unit 60 is, for example, a computer. Note that the processing unit 60 does not have to be composed of a single computer, but may be composed of multiple computers.

[0033] The processor 61 is an example of an electrical circuit and controls the operation of the processing unit 60 by executing a given program. The program executed by the processor 61 may be stored in memory 62 or in a storage device outside the processing unit 60. The processor is, for example, a CPU (Central Processing Unit).

[0034] Memory 62 non-temporarily stores programs executed by the processor 61 and energy spectrum data output from the detector 50. Memory 62 includes volatile memory (e.g., RAM (Random Access Memory)) and non-volatile memory (e.g., ROM (Read Only Memory), hard disk drives, and solid-state drives). The database and / or programs may be stored in an external storage device accessible by the processor 61.

[0035] The input / output interface 63 is an interface for exchanging various types of data between the processor 61 and the input unit 64 and display unit 65 connected to the input / output interface 63.

[0036] The input unit 64 includes, for example, at least one of a mouse, a keyboard, and a touch panel, and accepts operations for the processing unit 60.

[0037] The display unit 65 includes, for example, a liquid crystal display or an organic EL (Electro-Luminescence) display, and displays information according to the instructions of the processing unit 60. This information is, for example, the energy spectrum data of the sample S output from the detector 50.

[0038] The processing unit 60 may control the XPS device 100, or another control device (for example, a computer) may be connected to the XPS device 100 and the XPS device 100 may be controlled by that control device. Control of the XPS device 100 may include, for example, voltage adjustment.

[0039] The XPS apparatus 100 generates energy spectrum data of electrons emitted from the sample S by measuring the incident position of electrons that have passed through the energy spectrometer 40 onto the DLD 52 and the number of such electrons, while changing the potential difference between the outer hemispherical electrode 41 and the inner hemispherical electrode 42.

[0040] [Comparative Example] Surface analysis is a method of analysis that reveals the structure and composition of a sample's surface and interface by stimulating the sample and analyzing the detected response. One example of a surface analysis technique is XPS (X-ray Propagation).

[0041] In surface analysis, including XPS, it is sometimes necessary to detect pulsed radiation or electrons emitted from a sample. One method for detecting pulsed radiation or electrons emitted from a sample is to set a predetermined threshold and detect a pulse when that threshold is exceeded. Figure 6 is a diagram illustrating the method of detecting pulses by setting a threshold.

[0042] Figure 6 shows pulse Q1 and pulse Q2, which has a smaller amplitude than pulse Q1. For example, if Vth is set as the threshold for detecting pulses, pulse Q1 is detected at time T1 and pulse Q2 is detected at time T2. Although pulses Q1 and Q2 have different amplitudes, their peak positions are the same. Therefore, it is preferable that both pulses be detected at the same time. However, when pulses are detected by setting the threshold Vth, there are cases where time T1 and time T2 do not coincide.

[0043] Therefore, CFD circuits are sometimes used to detect pulsed radiation or electrons emitted from a sample. Figure 7 is a schematic diagram illustrating the configuration of a CFD circuit in a comparative example. Figure 8 is a diagram illustrating a method for detecting pulses using a CFD circuit.

[0044] Referring to Figure 7, the CFD circuit 53A in the comparative example includes a comparator 535 in addition to the delay signal generation unit 531 and the attenuation signal generation unit 532.

[0045] The comparator 535 has a non-inverting input terminal 5351, an inverting input terminal 5352, a positive power supply terminal 5353, a negative power supply terminal 5354, and an output terminal 5355. A pulse generated by the delay signal generation unit 531 is input to the non-inverting input terminal 5351. A pulse generated by the attenuation signal generation unit 532 is input to the inverting input terminal 5352. Power to operate the comparator 535 is supplied to the positive power supply terminal 5353 and the negative power supply terminal 5354.

[0046] When the voltage value input from the non-inverting input terminal 5351 and the voltage value input from the inverting input terminal 5352 become equal, the comparator 535 outputs a signal from its output terminal 5355 indicating that the voltages input to the non-inverting input terminal 5351 and the inverting input terminal 5352 are equal. The processing unit 60, upon receiving this signal, detects the pulse. Therefore, in the CFD circuit 53A, outputting a signal indicating that the voltages input to the non-inverting input terminal 5351 and the inverting input terminal 5352 are equal corresponds to outputting a detection signal.

[0047] Figure 8 illustrates the timing at which the CFD circuit 53A outputs a detection signal. Figure 8 shows the timing at which a detection signal is output when pulse R1 and pulse R2, which has a smaller amplitude than pulse R1, are input. First, the delay signal generation unit 531 generates delay signals R11 and R21, which are signals that are delayed by a predetermined time from the original signals, pulses R1 and R2. The generated delay signals R11 and R21 are input to the non-inverting input terminal 5351. The attenuation signal generation unit 532 generates attenuation signals R12 and R22, which are signals that are attenuated by a predetermined ratio from the original signals, pulses R1 and R2. The generated attenuation signals R12 and R22 are input to the inverting input terminal 5352.

[0048] Comparator 535 outputs a detection signal at the timing when the positive and negative signs of the combined signal, which is a composite signal formed by combining a delayed signal and an attenuated signal, switch. In the combined signal, the timing at which the positive and negative signs switch is the timing when the difference between the delayed signal and the attenuated signal becomes zero. Here, the timing at which the positive and negative signs of the combined signal R13, which is a composite signal formed by combining the delayed signal R11 and the attenuated signal R12, switch is the same as the timing at which the positive and negative signs of the combined signal R23, which is a composite signal formed by combining the delayed signal R21 and the attenuated signal R22, switch. This timing is called the zero crossing time and is known to be constant, independent of the amplitude. This timing corresponds to the timing at which the pulse amplitude becomes constant.

[0049] In this way, by using the CFD circuit 53A, a detection signal can be output at a timing when the pulse amplitude becomes a constant ratio, regardless of the amplitude of the radiation or electron pulse.

[0050] However, in the CFD circuit 53A, even when no pulse is input, the voltage values ​​of the non-inverting input terminal 5351 and the inverting input terminal 5352 may become equal, and a detection signal may be output.

[0051] In a CFD circuit, one method to prevent the output of a detection signal when no pulse is input is to apply an offset voltage to one of the input terminals. By applying an offset voltage to one of the input terminals, even when no pulse is input, the difference in voltage across the two input terminals will differ by the amount of the offset voltage. Therefore, even when no pulse is input, the voltage values ​​across the two input terminals will not be equal, and no detection signal will be output. However, when a pulse is input, the timing at which the detection signal is output will be shifted by the amount of the offset voltage from the timing at which the value of the delayed input pulse equals the value of the attenuated pulse.

[0052] Another method to prevent the detection signal from being output when no pulse is input in a CFD circuit is to prepare a circuit to determine whether or not a pulse has been input. According to this method, the comparator outputs a detection signal when a pulse is input and the voltage values ​​of the two terminals of the comparator become equal. Therefore, it is possible to prevent the detection signal from being output when no pulse is input, and there is no delay between the timing of the two terminal voltage values ​​becoming equal and the timing of the detection signal output. However, this requires preparing a separate circuit to determine whether or not a pulse has been input, in addition to the CFD circuit. In particular, detecting waveforms with short pulse widths in XPS devices may require expensive circuits capable of processing electrical signals in the high-frequency range. Therefore, the manufacturing cost of the CFD circuit may be high.

[0053] [Method for manufacturing a CFD circuit according to this embodiment] Therefore, the method for manufacturing the CFD circuit according to this embodiment includes the step of providing a hysteresis comparator having two thresholds. It also includes the step of setting an offset voltage that is equal to the voltage value of the threshold used when detecting a pulse. This prevents the detection signal from being output when no pulse is input, and allows the detection signal to be output at a timing when the delay signal and the attenuation signal are equal.

[0054] Furthermore, the CFD circuit manufacturing method according to this embodiment does not require a circuit to determine whether or not a pulse has been input. Therefore, the manufacturing cost of the CFD circuit can be reduced.

[0055] The manufacturing method for the CFD circuits 53 and 54 according to this embodiment will be described below. Figure 9 is a flowchart showing the method for manufacturing the CFD circuits 53 and 54. In one implementation example, the manufacturing process for the CFD circuits 53 and 54 shown in Figure 9 is performed by the manufacturer (worker) during the manufacturing of the XPS100. According to the method shown in this flowchart, the offset voltage can be set to a voltage equal to the first threshold. This allows the CFD circuits 53 and 54 to output a detection signal at the timing when the delay signal and the attenuation signal are equal. Note that the manufacturing method for the CFD circuit 54 is the same as that for the CFD circuit 53, so the explanation will be omitted.

[0056] The first and second threshold values ​​are unique to each hysteresis comparator. Individual differences exist in the first and second threshold values. Therefore, in order to accurately supply the voltage value corresponding to the first threshold to the hysteresis comparator 534 by the voltage supply unit 533, it is necessary to set the voltage value supplied by the voltage supply unit 533 according to the following flowchart.

[0057] In step S10, the operator installs a delay signal generation unit 531 in the CFD circuit 53. The delay signal generation unit 531 generates a delay signal by delaying the input pulse by a predetermined amount of time.

[0058] In step S12, the operator installs the attenuation signal generation unit 532 in the CFD circuit 53. The attenuation signal generation unit 532 generates an attenuation signal by attenuating the input pulse by a predetermined percentage.

[0059] In step S14, the operator installs the hysteresis comparator 534 into the CFD circuit 53.

[0060] In step S16, the operator provides a voltage supply unit 533 that supplies voltage to the inverting input terminal 5342 of the hysteresis comparator 534.

[0061] In step S18, the operator applies a predetermined voltage to the inverting input terminal 5342 of the hysteresis comparator 534 using the voltage supply unit 533.

[0062] In step S20, the operator determines whether the output of the hysteresis comparator 534 is Low or not. If the output of the hysteresis comparator 534 is Low (YES in step S20), the process proceeds to step S22; otherwise (NO in step S20), the process proceeds to step S24.

[0063] In step S22, the operator reduces the voltage value supplied from the voltage supply unit 533. In step S24, the operator increases the voltage value supplied from the voltage supply unit 533.

[0064] In step S26, the operator determines whether the output of the hysteresis comparator 534 is High or High. If the output of the hysteresis comparator 534 is High (YES in step S26), the process proceeds to step S28; otherwise (NO in step S26), the process returns to step S22.

[0065] In step S28, the operator sets the switching voltage, which is the voltage supplied from the voltage supply unit 533 at the timing when the output of the hysteresis comparator 534 switched from Low to High in step S26, as the first threshold value of the hysteresis comparator 534.

[0066] In step S30, the value of the first threshold set in step S28 is set as the offset voltage that the voltage supply unit 533 supplies to the hysteresis comparator 534. After that, the operator completes the process shown in Figure 9.

[0067] As shown in the flowchart above, the operator can supply a voltage corresponding to the first threshold of the hysteresis comparator 534 from the voltage supply unit 533 to the hysteresis comparator 534. In this state, when a pulse is input to the CFD circuit 53, a detection signal can be output regardless of the amplitude of the pulse. In the flowchart above, the value of the first threshold was determined based on the output of the hysteresis comparator 534, but if the operator is aware of the value of the first threshold, the operator may set that value as the offset voltage in step S30 without executing steps S18 to S28.

[0068] Furthermore, in the flowchart described above, voltages were applied in steps S18, S20, and S24 so that the output of the hysteresis comparator 534 would go low. If the output of the hysteresis comparator 534 is low at the start of the flowchart described above, the operator does not need to perform the processes in steps S18, S20, and S24.

[0069] In the embodiment described above, the voltage supply unit 533 was connected to the inverting input terminal 5342 of the hysteresis comparator 534, but it is not limited to this, and the voltage supply unit 533 may be connected to the non-inverting input terminal 5341. In this case, in step S16 above, the operator increases the value of the voltage supplied from the voltage supply unit 533, and in step S18, the operator decreases the value of the voltage supplied from the voltage supply unit 533.

[0070] In this embodiment, the first and second thresholds are preferably set according to the environment in which the CFD circuit 53 is used. Therefore, it is preferable to select a hysteresis comparator having first and second thresholds suitable for the environment in which the CFD circuit 53 is used. The environment in which the CFD circuit 53 is used includes, for example, the magnitude of noise generated in the CFD circuit 53 and the amplitude of pulses detected by the CFD circuit 53.

[0071] Specifically, in this embodiment, it is preferable that the difference between the first threshold and the second threshold is greater than the noise input to the hysteresis comparator 534. By making the difference between the first threshold and the second threshold greater than the noise, it is possible to prevent the signal output from the hysteresis comparator 534 from being switched by the noise and thus preventing the output of a detection signal.

[0072] Furthermore, it is preferable that the first and second thresholds in this embodiment are such that the combined pulse signal falls below the second threshold before the zero crossing time. Figure 10 is a diagram illustrating the difference between the first and second thresholds.

[0073] Referring to Figure 10, the offset voltage is set to the same value as the first threshold voltage by the manufacturing method of the CFD circuit 53 described above. Therefore, when no signal is input to the two input terminals of the hysteresis comparator 534, an offset voltage equal to the first threshold voltage is input to the hysteresis comparator 534. Thus, the signal output from the hysteresis comparator 534 before a pulse is input is High.

[0074] As shown in Figure 10, when a pulse is input to the hysteresis comparator 534, the composite signal input to the hysteresis comparator 534 decreases and increases over time. In Figure 10, the zero crossing time, which is the timing at which the detection signal is output, is shown as time T3.

[0075] In Figure 10, the composite signal R3 falls below the second threshold at time T4, before time T3. Therefore, the signal output from the hysteresis comparator 534 is Low from time T4 onward, and switches to High at time T3. As a result, the output of the hysteresis comparator 534 switches from Low to High for the composite signal R3, allowing the processing unit 60 to detect a pulse.

[0076] In Figure 10, the composite signal R4 originates from a pulse with a smaller amplitude than the pulse of the composite signal R3. Unlike the composite signal R3, the composite signal R4 does not fall below the second threshold before time T3. Therefore, the output of the hysteresis comparator 534 remains high from the time the pulse is input until time T3, and no detection signal is output from the hysteresis comparator 534. For this reason, it is preferable to select a hysteresis comparator having first and second thresholds such that the difference in the voltage values ​​applied to the two input terminals from the time the pulse is input until the pulse is detected is less than or equal to the difference in magnitude between the first threshold and the second threshold.

[0077] In this embodiment, an example was described in which the signal output from the delay signal generation unit 531 is input to the non-inverting input terminal 5341 and the signal output from the attenuation signal generation unit 532 is input to the inverting input terminal 5342. However, the embodiment is not limited to this, and the signal output from the delay signal generation unit 531 may be input to the inverting input terminal 5342, and the signal output from the attenuation signal generation unit 532 may be input to the non-inverting input terminal 5341. The absolute value of the voltage output from the attenuation signal generation unit 532 becomes larger than the absolute value of the signal output from the delay signal generation unit 531, so in this case, the detection signal is output when the combined signal falls below the second threshold. In other words, the processing unit 60 detects a pulse at the timing when the signal output from the hysteresis comparator switches from a High signal to a Low signal.

[0078] In this embodiment, the DLD52 is configured to detect the position where electrons collide on a predetermined line, but it is not limited to this configuration, and the DLD may be configured to detect the position where electrons collide on a predetermined plane. In this case, four CFD circuits are connected to detect the arrival timing of pulses at both ends of a predetermined axis on that plane and at both ends of an axis perpendicular to that predetermined axis.

[0079] According to the manufacturing method of the CFD circuit of this embodiment, the manufacturing cost of a CFD circuit that outputs a detection signal at a timing when the amplitude of the input pulse becomes a constant ratio can be reduced.

[0080] In this embodiment, the CFD circuit provided by XPS was used as an example, but the manufacturing method described in this embodiment is not limited to the manufacturing of the CFD circuit provided by XPS. The manufacturing method in this embodiment can be applied to any CFD circuit for detecting the timing at which the pulse amplitude becomes a constant ratio, regardless of the magnitude of the pulse amplitude, and the device in which the CFD circuit is provided is not limited.

[0081] [Aspect] Those skilled in the art will understand that the above-described exemplary embodiments are specific examples of the following embodiments.

[0082] (Section 1) A method for manufacturing a CFD circuit in one embodiment is a method for manufacturing a CFD circuit that detects pulses of electrons or radiation, comprising: a step of providing a delay signal generation unit that generates a delay signal obtained by delaying the pulse for a predetermined time; a step of providing an attenuation signal generation unit that generates an attenuation signal obtained by attenuating the pulse by a predetermined percentage; and a hysteresis controller that includes two input terminals that receive the delay signal and the attenuation signal, and has a first threshold and a second threshold smaller than the first threshold, outputs a first output when the difference in the voltage values ​​input to the two input terminals is greater than or equal to the first threshold, and outputs a second output when the difference in the voltage values ​​input to the two input terminals is less than or equal to the second threshold. The CFD circuit includes the steps of providing a comparator, providing a voltage supply unit that applies an offset voltage corresponding to the first threshold or the second threshold to the hysteresis comparator, and setting the offset voltage, wherein the step of setting the offset voltage may include setting the voltage corresponding to the first threshold as the offset voltage when the delay signal is input to the non-inverting input terminal of the two input terminals in the CFD circuit, and setting the voltage corresponding to the second threshold as the offset voltage when the delay signal is input to the inverting input terminal of the two input terminals in the CFD circuit.

[0083] According to the manufacturing method described in paragraph 1, the manufacturing cost of a CFD circuit that outputs a detection signal at a timing when the input pulse amplitude is at a constant rate can be reduced.

[0084] (Section 2) The manufacturing method described in Section 1 may further include the steps of: supplying a voltage from the voltage supply unit so that the second output is output when the delay signal is input to the non-inverting input terminal of the two input terminals in the CFD circuit; changing the value of the voltage from the voltage supply unit and searching for the value of the switching voltage supplied from the voltage supply unit at the timing of switching from the second output to the first output; and setting the value of the switching voltage as the first threshold.

[0085] According to the manufacturing method described in paragraph 2, a voltage value corresponding to a threshold used for pulse detection can be determined, and a voltage corresponding to that value can be applied to the hysteresis comparator as an offset voltage.

[0086] (Clause 3) The manufacturing method described in Clause 1 may further include the steps of supplying a voltage from the voltage supply unit so that the first output is output when the delay signal is input to the inverting input terminal of the two input terminals in the CFD circuit; changing the value of the voltage from the voltage supply unit and searching for the value of the switching voltage supplied from the voltage supply unit at the timing of switching from the first output to the second output; and setting the value of the switching voltage as the second threshold.

[0087] According to the manufacturing method described in paragraph 3, a voltage value corresponding to a threshold used for pulse detection can be determined, and a voltage corresponding to that value can be applied to the hysteresis comparator as an offset voltage.

[0088] (Clause 4) In the manufacturing method described in any one of paragraphs 1 to 3, the voltage supply unit may be a DAC (Digital to Analog Converter).

[0089] According to the manufacturing method described in paragraph 4, the CFD circuit includes a DAC, and the voltage corresponding to the first threshold or the voltage corresponding to the second threshold is applied by the DAC.

[0090] (Clause 5) The manufacturing method described in any one of paragraphs 1 to 4 may further include the step of selecting the hysteresis comparator depending on the environment in which the CFD circuit is used.

[0091] According to the manufacturing method described in Section 5, a hysteresis comparator having suitable first and second thresholds is selected depending on the environment in which the CFD circuit is used.

[0092] (Clause 6) In the manufacturing method described in paragraph 5, the environment in which the CFD circuit is used may include the amplitude of the pulse.

[0093] According to the manufacturing method described in Section 6, a hysteresis comparator having suitable first and second thresholds is selected according to the magnitude of the pulse amplitude to be detected by the CFD circuit.

[0094] (Clause 7) A pulse detector in one embodiment may include a CFD circuit manufactured by the method for manufacturing a CFD circuit described in any one of Clauses 1 to 6.

[0095] The pulse detector described in paragraph 7 can detect pulses at a timing when the input pulse amplitude is at a constant rate. Furthermore, the manufacturing cost of the pulse detector can be reduced by providing the pulse detector with a CFD circuit manufactured by the CFD circuit manufacturing method described in any one of paragraphs 1 to 6.

[0096] (Clause 8) The pulse detector described in paragraph 7 may further include a delay line detector.

[0097] According to the pulse detector described in Section 8, the DLD and CFD circuits can determine the position of electrons that collide within the pulse detector.

[0098] (Clause 9) An X-ray photoelectron spectrometer in one embodiment may be equipped with a pulse detector as described in either Clause 7 or Clause 8.

[0099] The X-ray photoelectron spectrometer described in paragraph 9 can detect pulses at a timing when the input pulse amplitude is at a constant rate. Furthermore, by providing the pulse detector of the X-ray photoelectron spectrometer with a CFD circuit manufactured by the CFD circuit manufacturing method described in any one of paragraphs 1 to 6, the manufacturing cost of the X-ray photoelectron spectrometer can be reduced.

[0100] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. The scope of this disclosure is indicated by the claims rather than by the description of the embodiments above, and all modifications within the meaning and scope equivalent to the claims are intended to be included. Furthermore, each technology in the embodiments is intended to be practiced individually or, as far as possible, in combination with other technologies in the embodiments. [Explanation of Symbols]

[0101] 10 X-ray source, 20 lens, 30 slit, 31 entrance port, 40 energy spectrometer, 41 outer hemisphere electrode, 42 inner hemisphere electrode, 50 detector, 51 microchannel plate, 52 delay line detector, 53, 53A, 54 CFD circuit, 60 processing unit, 61 processor, 62 memory, 63 input / output interface (I / F), 64 input unit, 65 display unit, 100 XPS device, 531 delay signal generation unit, 532 attenuation signal generation unit, 533 voltage supply unit, 534 hysteresis comparator, 535 comparator, 5341, 5351 non-inverting input terminal, 5342, 5352 inverting input terminal, 5343, 5353 positive power supply terminal, 5344, 5354 negative power supply terminal, 5345, 5355 output terminal.

Claims

1. A method for manufacturing a CFD (Constant Fraction Discriminator) circuit that detects pulses of electrons or radiation, The step of providing a delayed signal generation unit that generates a delayed signal obtained by delaying the pulse by a predetermined time, The step of providing an attenuation signal generation unit that generates an attenuation signal obtained by attenuating the pulse by a predetermined percentage, The step of providing a hysteresis comparator that includes two input terminals for receiving the delay signal and the attenuation signal, has a first threshold and a second threshold smaller than the first threshold, outputs a first output when the difference in the voltage values ​​input to the two input terminals is greater than or equal to the first threshold, and outputs a second output when the difference in the voltage values ​​input to the two input terminals is less than or equal to the second threshold, The steps include providing a voltage supply unit that applies an offset voltage corresponding to the first threshold or the second threshold to the hysteresis comparator, The step of setting the offset voltage includes, The step of setting the offset voltage is: In the CFD circuit, when the delay signal is input to the non-inverting input terminal of the two input terminals, the voltage corresponding to the first threshold is set as the offset voltage. A method for manufacturing a CFD circuit, comprising setting a voltage corresponding to the second threshold as the offset voltage when the delay signal is input to the inverting input terminal of the two input terminals in the CFD circuit.

2. In the CFD circuit described above, when the delay signal is input to the non-inverting input terminal of the two input terminals, The steps include supplying voltage from the voltage supply unit so that the second output is output, The steps include: changing the voltage value from the voltage supply unit and searching for the value of the switching voltage supplied from the voltage supply unit at the timing when switching from the second output to the first output; The manufacturing method according to claim 1, further comprising the step of setting the value of the switching voltage as the first threshold.

3. In the CFD circuit described above, when the delay signal is input to the inverting input terminal of the two input terminals, The steps include supplying voltage from the voltage supply unit so that the first output is output, The steps include: changing the voltage value from the voltage supply unit and searching for the value of the switching voltage supplied from the voltage supply unit at the timing of switching from the first output to the second output; The manufacturing method according to claim 1, further comprising the step of setting the value of the switching voltage as the second threshold.

4. The manufacturing method according to any one of claims 1 to 3, wherein the voltage supply unit is a DAC (Digital to Analog Converter).

5. The manufacturing method according to any one of claims 1 to 3, further comprising the step of selecting the hysteresis comparator depending on the environment in which the CFD circuit is used.

6. The manufacturing method according to claim 5, wherein the environment in which the CFD circuit is used includes the magnitude of the noise and the amplitude of the pulse.

7. A pulse detector comprising a CFD circuit manufactured by the manufacturing method described in claim 1.

8. The pulse detector according to claim 7, further comprising a delay line detector.

9. An X-ray photoelectron spectrometer comprising a pulse detector according to claim 7 or claim 8.

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