Light-emitting element

Abstract

The present invention provides a light-emitting element. [Solution] The light-emitting element is a substrate including a side edge, a first upper surface and a second upper surface, wherein the second upper surface is closer to the side edge of the substrate than the first upper surface; a semiconductor stack layer located on the substrate; dicing lines surrounding the semiconductor stack layer and exposing the first upper surface and the second upper surface; and an insulating reflective structure covering the semiconductor stack layer, wherein the insulating reflective structure includes a dense layer covering the first upper surface, the reflective layer and the cladding layer, the dense layer including a first outer edge and the cladding layer covering the first outer edge.

Description

[Technical Field]

[0001] The present invention relates to a light-emitting element, and more particularly to a flip-chip type light-emitting element that includes a reflecting mirror structure. [Background technology]

[0002] Light-emitting diodes (LEDs) are solid-state semiconductor light-emitting devices. Their advantages include low energy consumption, low heat generation, long service life, vibration resistance, small size, fast reaction speed, and good photoelectric properties, such as a stable emission wavelength. Therefore, light-emitting diodes are widely used in home appliances, indicator lights in equipment, and photoelectric products. [Overview of the Initiative] [Problems that the invention aims to solve]

[0003] The object of the present invention is to provide a light-emitting element that improves light extraction efficiency.

[0004] Another object of the present invention is to provide a light-emitting element that improves structural reliability.

[0005] Another object of the present invention is to provide a light-emitting element that reduces the probability of the element becoming inoperable due to damage to the insulating layer and improves the reliability of electrical insulation. [Means for solving the problem]

[0006] To achieve at least one of the above-mentioned objectives, an embodiment of the present invention provides a light-emitting element, which includes a substrate having a side edge, a first upper surface and a second upper surface, the second upper surface being closer to the side edge of the substrate than the first upper surface; a semiconductor stack layer located on the substrate; dicing lines surrounding the semiconductor stack layer and exposing the first upper surface and the second upper surface; and an insulating reflective structure covering the semiconductor stack layer, the insulating reflective structure including a dense layer covering the first upper surface, a reflective layer and a cladding layer, the dense layer including a first outer edge and the cladding layer covering the first outer edge. Furthermore, to achieve at least one of the above-mentioned objectives, an embodiment of the present invention provides a light-emitting element, which includes a substrate having an upper surface; a semiconductor stack layer located on the upper surface of the substrate and including a first semiconductor layer, an active layer and a second semiconductor layer; dicing lines surrounding the semiconductor stack layer and exposing the upper surface of the substrate; a dense layer directly covering the upper surface of the substrate and the semiconductor stack layer; a protective layer covering the semiconductor stack layer; a distributed Bragg mirror structure including a reflective layer located on the protective layer; and a cladding layer covering the reflective layer, where the dense layer includes a metal oxide.

[0007] To achieve at least one of the above-mentioned objectives, an embodiment of the present invention provides a method for manufacturing a light-emitting element, which includes providing a substrate including an upper surface; forming a semiconductor stack layer including a first semiconductor layer, an active layer and a second semiconductor layer on the upper surface of the substrate; forming dicing lines surrounding the semiconductor stack layer and exposing the upper surface of the substrate; forming a dense layer on the upper surface of the substrate and the semiconductor stack layer; forming a protective layer covering the semiconductor stack layer; forming a reflective layer including a distributed Bragg mirror structure on the protective layer; and forming a cladding layer covering the reflective layer, wherein one or more of the dense layer, protective layer and cladding layer are formed by atomic vapor deposition.

[0008] To achieve at least one of the above-mentioned objectives, an embodiment of the present invention provides a light-emitting element, which includes a substrate having a side edge, a first upper surface and a second upper surface, wherein the second upper surface is closer to the side edge of the substrate than the first upper surface; a semiconductor stack layer located on the substrate and including a first semiconductor layer, an active layer and a second semiconductor layer; dicing lines surrounding the semiconductor stack layer and exposing the first upper surface and the second upper surface of the substrate; a protective layer covering the semiconductor stack layer; a reflective layer including a distributed Bragg mirror structure and covering the protective layer; and a cladding layer covering the reflective layer, wherein the first upper surface of the substrate is covered by the cladding layer, and the second upper surface of the substrate is not covered by the protective layer, the reflective layer and the cladding layer.

[0009] To achieve at least one of the above-mentioned objectives, an embodiment of the present invention provides a light-emitting element, which includes a substrate having a side edge, a first upper surface and a second upper surface, wherein the second upper surface is closer to the side edge of the substrate than the first upper surface; a semiconductor stack layer located on the substrate and including a first semiconductor layer, an active layer and a second semiconductor layer; a dicing line surrounding the semiconductor stack layer and exposing the first upper surface and the second upper surface of the substrate; a protective layer covering the semiconductor stack layer, the first upper surface and the second upper surface of the substrate; and a cladding layer covering the protective layer and the first upper surface of the substrate, wherein the second upper surface of the substrate is not covered by the cladding layer.

[0010] To achieve at least one of the above-mentioned objectives, an embodiment of the present invention provides a method for manufacturing a light-emitting element, which includes providing a substrate including an upper surface, the upper surface of the substrate including a first upper surface and a second upper surface; forming a semiconductor stack layer on the substrate including a first semiconductor layer, an active layer and a second semiconductor layer; forming dicing lines around the semiconductor stack layer surrounding the semiconductor stack layer and exposing the first upper surface and the second upper surface of the substrate, with the second upper surface further from the side of the semiconductor stack layer than the first upper surface; forming a protective layer covering the semiconductor stack layer; forming a reflective layer including a distributed Bragg mirror structure on the protective layer; forming a cladding layer covering the reflective layer, wherein the protective layer, reflective layer and cladding layer do not cover the second upper surface of the substrate; and cutting the substrate at a position on the second upper surface of the substrate to form a plurality of light-emitting elements.

[0011] To achieve at least one of the above-mentioned objectives, an embodiment of the present invention provides a method for manufacturing a light-emitting element, which includes providing a substrate including an upper surface, the upper surface of the substrate including a first upper surface and a second upper surface; forming a semiconductor stack layer on the substrate including a first semiconductor layer, an active layer and a second semiconductor layer; forming dicing lines around the semiconductor stack layer that surround the semiconductor stack layer and expose the first upper surface and the second upper surface of the substrate, with the second upper surface being further from the side edge of the semiconductor stack layer than the first upper surface; forming a protective layer that covers the semiconductor stack layer, the first upper surface and the second upper surface of the substrate for a plurality of light-emitting elements; forming a cladding layer that covers the protective layer and the first upper surface of the substrate, the cladding layer not covering the second upper surface of the substrate; and cutting the substrate at a position on the second upper surface of the substrate to form a plurality of light-emitting elements. [Brief explanation of the drawing]

[0012] [Figure 1] This is a top view of a light-emitting element 1a, 1b, 1c, 1d, 1e, or 1f disclosed in one embodiment of the present invention. [Figure 2A] This figure shows a light-emitting element 1a disclosed in one embodiment of the present invention. [Figure 2B] This figure shows a method for manufacturing a light-emitting element 1a disclosed in one embodiment of the present invention. [Figure 3A] This figure shows a light-emitting element 1b disclosed in another embodiment of the present invention. [Figure 3B] This figure shows a method for manufacturing the light-emitting element 1b disclosed in another embodiment of the present invention. [Figure 4A] This figure shows a light-emitting element 1c disclosed in another embodiment of the present invention. [Figure 4B] This figure shows a method for manufacturing a light-emitting element 1c as disclosed in another embodiment of the present invention. [Figure 5A] This figure shows a light-emitting element 1d disclosed in another embodiment of the present invention. [Figure 5B] This figure shows a method for manufacturing a light-emitting element 1d as disclosed in another embodiment of the present invention. [Figure 6A] This figure shows a light-emitting element 1e disclosed in another embodiment of the present invention. [Figure 6B] It is a diagram showing a method for manufacturing a light-emitting element 1e disclosed in another embodiment of the present invention. [Figure 7A] It is a diagram showing a light-emitting element 1f disclosed in another embodiment of the present invention. [Figure 7B] It is a diagram showing a method for manufacturing a light-emitting element 1f disclosed in another embodiment of the present invention. [Figure 8] It is a diagram showing a light-emitting device 2 in one embodiment of the present invention. [Figure 9] It is a diagram showing a light-emitting device 3 in one embodiment of the present invention.

Embodiments for Carrying Out the Invention

[0013] For a more detailed and complete description of the present invention, please refer to the following description of embodiments and related diagrams. However, the embodiments shown below are used to explain the light-emitting elements of the present invention, and the present invention is not limited to the following embodiments. The scope of the present invention is not limited to the dimensions, materials, shapes, relative arrangements, etc. of the components described in the embodiments of this specification. Also, the size or positional relationship of the components shown in each figure may be exaggerated for clarity. Furthermore, in the following description, components of the same or similar nature are denoted by the same name and symbol in order to appropriately omit detailed descriptions.

[0014] FIG. 1 is a top view of a wafer including a plurality of light-emitting elements 1a, 1b, 1c, 1d, 1e or 1f disclosed in one embodiment of the present invention. FIGS. 2A to 2B are diagrams showing a light-emitting element 1a and a method for manufacturing the same disclosed in one embodiment of the present invention. FIGS. 3A to 3B are diagrams showing a light-emitting element 1b and a method for manufacturing the same disclosed in another embodiment of the present invention. Hereinafter, for convenience of explanation, FIGS. 2A and 3A are described with the structure along the cutting line A-A' of FIG. 1, and FIGS. 2B and 3B are described with the position D on the cutting line B-B' of FIG. 1, and some illustrations are omitted.

[0015] The light-emitting element 1a or 1b includes a substrate 10 having an upper surface 100 and a side edge 10S, wherein the upper surface 100 includes a first upper surface D1 and a second upper surface D2, and the second upper surface D2 is closer to the side edge 10S of the substrate 10 than the first upper surface D1; a semiconductor stack layer 20 located on the upper surface 100 of the substrate 10 and including a first semiconductor layer 211, an active layer 212 and a second semiconductor layer 213; a dicing line 10d surrounding the semiconductor stack layer 20 and exposing the first upper surface D1 and the second upper surface D2 of the substrate 10; a protective layer 50 covering the semiconductor stack layer 20; a reflective layer 51 including a distributed Bragg mirror structure and located on the protective layer 50; and a cladding layer 52 covering the reflective layer 51, wherein the second upper surface D2 of the substrate 10 is not covered by the protective layer 50, the reflective layer 51 and the cladding layer 52.

[0016] As shown in Figures 2A and 3A, the protective layer 50, the reflective layer 51, and the cladding layer 52 cover the first upper surface D1 of the substrate 10, but do not cover the second upper surface D2 of the substrate 10. In this embodiment, as shown in Figure 2A, the outer edge 52S of the cladding layer 52 and the outer edge 51S of the reflective layer 51 are aligned. In one variation of this embodiment, as shown in Figure 3A, the cladding layer 52 covers the outer edge 51S of the reflective layer 51 and also directly contacts the upper surface 100 of the substrate 10.

[0017] The substrate 10 may also be a growth substrate for epitaxially growing the semiconductor stack layer 20. The substrate 10 includes a GaAs wafer for epitaxially growing AlGaInP, or a sapphire (Al2O3) wafer, GaN wafer, SiC wafer, or AlN wafer for growing GaN, InGaN, or AlGaN.

[0018] The surface of the substrate 10 in contact with the semiconductor stack layer 20 may be a roughened surface. The roughened surface may have an irregular shape or a regular shape. For example, with respect to the upper surface 100, the substrate 10 includes one or more protrusions 11 projecting from the upper surface 100, or one or more recesses (not shown) recessing from the upper surface 100. In one cross-sectional view, the protrusions 11 or recesses (not shown) may be hemispherical or polygonal pyramidal. To increase the light emission efficiency of the light-emitting element, the protrusions 11 of the substrate 10 include a first layer and a second layer (not shown). The first layer includes the same material as the material constituting the substrate 10, for example, GaAs, Al2O3, GaN, SiC, or AlN. The second layer includes a material different from the first layer and the material constituting the substrate 10. The material of the second layer includes an insulating material, for example, silicon oxide, silicon nitride, or silicon oxide nitride. In one embodiment, the refractive index of the material selected for the second layer is between the refractive index of the substrate 10 and the refractive index of the semiconductor stack layer 20. In one embodiment, a portion of the dicing line 10d does not include a protrusion 11 or a recess. In one embodiment, when forming the dicing line 10d, removing the protrusion 11 or recess on the surface of the substrate 10 by etching allows the subsequent protective layer 50, reflective layer 51, and cladding layer 52 formed on the dicing line 10d to better cover the reflective layer 51. The etching method can be dry etching or wet etching when the material of the protrusion 11 is the same as the substrate 10 and is the material of the epitaxial growth substrate. When the material of the protrusion 11 is an insulating material, the protrusion 11 can be removed by dry etching or wet etching. Dry etching includes, for example, plasma etching such as plasma etching, excited-state ion etching, and inductive coupling, or ion etching such as enhanced capacitive coupling.

[0019] In one embodiment of the present invention, a semiconductor stack layer 20 having photoelectric properties, such as a light-emitting stack layer, can be formed on a substrate 10 by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE), physical vapor deposition (PVD), or ion plating, where physical vapor deposition includes sputtering or evaporation.

[0020] The semiconductor stack layer 20 includes a first semiconductor layer 211, a second semiconductor layer 213, and an active layer 212 formed between the first semiconductor layer 211 and the second semiconductor layer 213. By changing the physical and chemical composition of one or more layers of the semiconductor stack layer 20, the wavelength of light emitted by the light-emitting element 1a or 1b can be adjusted. The material of the semiconductor stack layer 20 is a III-V semiconductor material, for example, Al x In y Ga (1-x-y) N or Al x In y Ga (1-x-y) The matrix contains P, where 0 ≤ x, y ≤ 1, and (x + y) ≤ 1. When the semiconductor stack layer 20 is made of an AlInGaP-based material, it can emit red light with a wavelength between 610 nm and 650 nm, or green light with a wavelength between 530 nm and 570 nm. When the semiconductor stack layer 20 is made of an InGaN-based material, it can emit blue light with a wavelength between 400 nm and 490 nm, or green light with a wavelength between 530 nm and 570 nm. When the semiconductor stack layer 20 is made of an AlGaN-based or AlInGaN-based material, it can emit ultraviolet light with a wavelength between 250 nm and 400 nm.

[0021] The first semiconductor layer 211 and the second semiconductor layer 213 may be cladding layers, and they may have different conductive forms, properties, and polarities, or they may provide electrons or holes depending on the doped elements. For example, the first semiconductor layer 211 may be an n-type semiconductor and the second semiconductor layer 213 may be a p-type semiconductor. The active layer 212 is formed between the first semiconductor layer 211 and the second semiconductor layer 213, and electrons and holes can combine in the active layer 212 under current drive to convert electrical energy into light energy and emit light rays. The active layer 212 may be a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well (MQW). The material of the active layer 212 may be a neutral, p-type, or n-type semiconductor. The first semiconductor layer 211, the second semiconductor layer 213, or the active layer 212 may have a single layer or a structure including multiple sublayers.

[0022] In one embodiment of the present invention, the semiconductor stack layer 20 may further include a buffer layer (not shown) located between the first semiconductor layer 211 and the substrate 10, which can be used to release stress caused by material lattice mismatch between the substrate 10 and the semiconductor stack layer 20, reduce misalignment and lattice defects, and improve epitaxy quality. The buffer layer may be a single layer or a structure including multiple sublayers. In one embodiment, PVD aluminum nitride (AlN) may be selected and formed as a buffer layer between the semiconductor stack layer 20 and the substrate 10, which can be used to improve the epitaxy quality of the semiconductor stack layer 20. In one embodiment, the target for forming PVD aluminum nitride (AlN) is made of aluminum nitride. In other embodiments, aluminum nitride may be formed reactively with an aluminum target in a nitrogen source environment using an aluminum target.

[0023] In one embodiment of the present invention, the light-emitting element 1 includes a first contact electrode 41 and a second contact electrode 42 formed on the same side of the semiconductor stack layer 20. The light-emitting element 1 may have a flip chip structure or a lateral chip structure (in this structure, for example, there is a substrate at the bottom of the stack of material layers constituting the LED).

[0024] In this embodiment, by removing a part of the second semiconductor layer 213 and the active layer 212 to expose the first semiconductor layer 211, a mesa 211a and one or more first electrical contact regions 211b are formed. The side surfaces of the second semiconductor layer 213 and the active layer 212 exposed by etching are inclined surfaces inclined with respect to the exposed first semiconductor layer 211. The first contact electrode 41 is formed on the first electrical contact region 211b, contacts the first semiconductor layer 211, and forms an electrical connection with the first semiconductor layer 211. The second contact electrode 42 is formed on the second semiconductor layer 213 and forms an electrical connection with the second semiconductor layer 213.

[0025] In one embodiment of the present invention, in order to reduce the contact resistance and improve the efficiency of current diffusion, the light-emitting element 1 includes a conductive layer 30 located between the second semiconductor layer 213 and the second contact electrode 42. The material of the conductive layer 30 includes a material that is transparent to the light rays emitted by the active layer 212, for example, a metal material or a transparent conductive oxide having a thickness smaller than 500 angstroms (Å). The transparent conductive oxide includes ITO or IZO.

[0026] In one embodiment of the present invention, the light-emitting element 1 includes one or more current confinement layers (not shown) located between the second semiconductor layer 213 and the conductive layer 30 and below the second contact electrode 42. The current confinement layer is formed of a non-conductive material, such as Al2O3, SiN x , SiO x , TiO x , or MgF xThis includes, in one variation, the current confinement layer may include a distributed Bragg reflector (DBR), which is formed by stacking insulating materials of different refractive indices. To increase the light extraction efficiency of the light-emitting element, the current confinement layer has a light reflectance of 80% or more for the light rays emitted by the active layer 212.

[0027] The insulating reflective structure 500 covers the semiconductor stack layer 20, the first contact electrode 41, and the second contact electrode 42, thereby reflecting light from the active layer 212 to the side of the substrate 10, for example, the lower surface 105 of the substrate 10. In this embodiment, the insulating reflective structure 500 includes an insulating material to reduce the absorption of light rays by the metal reflective film. The insulating reflective structure 500 may be formed as a single layer or multiple layers, but is preferably a multi-layer structure. Specifically, the structure of the insulating reflective structure 500 is formed by sequential lamination of a protective layer 50, a reflective layer 51, and / or a cladding layer 52, where the reflective layer 51 includes a distributed Bragg reflector (DBR) structure.

[0028] In one variation of the present invention, one or more of the protective layer 50, reflective layer 51, and cladding layer 52 may be omitted. In other words, the structure of the insulating reflective structure 500 may include any one or any two of the protective layer 50, reflective layer 51, and cladding layer 52.

[0029] In one variation of the present invention, one or more of the protective layer 50 and the cladding layer 52 may include multiple layers. Preferably, the cladding layer 52 includes a silicon oxide film in contact with the reflective layer 51 and a silicon nitride film located on top of the silicon oxide film.

[0030] The insulating reflective structure 500 includes a first insulating reflective structure opening 501 that exposes the first contact electrode 41, and a second insulating reflective structure opening 502 that exposes the second contact electrode 42. The first electrode pad 61 covers the first insulating reflective structure opening 501 and contacts the first contact electrode 41, forming an electrical connection with the first semiconductor layer 211. The second electrode pad 62 covers the second insulating reflective structure opening 502 and contacts the second contact electrode 42, forming an electrical connection with the second semiconductor layer 213.

[0031] In one variation of the present invention, one or more of the first contact electrode 41 and the second contact electrode 42 may be omitted. The first insulating reflective structure opening 501 exposes the first semiconductor layer 211, and / or the second insulating reflective structure opening 502 exposes the conductive layer 30. The first electrode pad 61 covers the first insulating reflective structure opening 501 and contacts the first semiconductor layer 211, and / or the second electrode pad 62 covers the second insulating reflective structure opening 502 and contacts the conductive layer 30.

[0032] The first contact electrode 41, the second contact electrode 42, the first electrode pad 61, and the second electrode pad 62 include a metallic material, such as a metal or alloy of these materials, such as Cr, Ti, W, Au, Al, In, Sn, Ni, Pt, Ag. The first electrode pad 61 and the second electrode pad 62 may consist of a single layer or multiple layers. For example, the first electrode pad 61 or the second electrode pad 62 may include an Al / Pt layer, a Ti / Au layer, a Ti / Pt / Au layer, a Cr / Au layer, a Cr / Pt / Au layer, a Ni / Au layer, a Ni / Pt / Au layer, a Cr / Al / Ti / Pt layer, a Ti / Al / Ti / Pt / Ni / Pt layer, a Cr / Al / Ti / Al / Ni / Pt / Au layer, a Cr / Al / Cr / Ni / Au layer, or an Ag / NiTi / TiW / Pt layer. The first electrode pad 61 and the second electrode pad 62 may serve as current paths for an external power supply to power the first semiconductor layer 211 and the second semiconductor layer 213. In embodiments in which the first electrode pad 61 and the second electrode pad 62 include multiple layers, the metal structure to which the first electrode pad 61 and the second electrode pad 62 are connected to the external power supply may be formed by alternating lamination of multiple layers of Au and Sn or Sn and Ag, or Au may be the outermost metal layer of the first electrode pad 61 and the second electrode pad 62, where the thickness or composition ratio of Au or Ag is 0.25% to 2.25% of Sn. The first contact electrode 41, the second contact electrode 42, the first electrode pad 61 and / or the second electrode pad 62 have a thickness between 1 and 100 μm, preferably between 1.2 and 60 μm, and more preferably between 1.5 and 6 μm. In one embodiment, the first electrode pad 61 and / or the second electrode pad 62 include a metal layer of Sn having a thickness between 3.5 and 8.5 μm. In another embodiment, the first electrode pad 61 and / or the second electrode pad 62 include a metal layer of SnAg having a thickness between 8 and 10 μm.

[0033] As described above, since the insulating reflective structure 500 covers the uneven structure of the semiconductor stack layer 20, the first contact electrode 41, and the second contact electrode 42, the difference in height between the semiconductor stack layer 20, the first contact electrode 41, and the second contact electrode 42 may affect the coating (film formation) quality of the insulating reflective structure 500. For example, when the insulating reflective structure 500 covers the semiconductor stack layer 20, a fracture surface (not shown) is likely to form in the insulating reflective structure 500 at the connection point between the side surface of the semiconductor stack layer 20 and the upper surface 100 of the substrate 10, and external moisture can enter the semiconductor stack layer 20 along the fracture surface, reducing the reliability of the device.

[0034] To solve the problem of the fractured surface described above, in this embodiment, considering that chemical vapor deposition (CVD) has better coverage, i.e., coating properties, the protective layer 50 and the cladding layer 52 are preferably formed by chemical vapor deposition (CVD), and more preferably by plasma-enhanced chemical vapor deposition (PECVD).

[0035] In one variation of the present invention, one or more of the protective layer 50 and the cladding layer 52 can be formed by atomic vapor deposition.

[0036] The protective layer 50 is made of silicon oxide and preferably has a thickness of 0.2 μm to 2 μm. If the thickness of the protective layer 50 is less than 0.2 μm, the protective layer 50 cannot completely cover the first contact electrode 41 and the second contact electrode 42. If the thickness of the protective layer 50 is greater than 2 μm, it may increase the time and cost of the manufacturing process when forming the first insulating reflective structure opening 501 and the second insulating reflective structure opening 502.

[0037] The material of the cladding layer 52 is a metal oxide such as Al2O3, or a nitride, oxide, or nitrogen oxide such as SiN or SiO2. x or SiO x N yThis includes. In one variation of the present invention, the cladding layer 52 can form a single-layer structure using the above-mentioned materials, or a multi-layer structure using a combination of the above-mentioned materials. The cladding layer 52 preferably has a thickness of 0.5 μm to 2.5 μm.

[0038] The reflective layer 51 is formed between the protective layer 50 and the cladding layer 52. The reflective layer 51 includes a distributed Bragg mirror (DBR) structure formed by alternating stacking of two or more materials with different refractive indices, which can selectively reflect light of a specific wavelength. For example, a highly reflective insulating reflective structure can be formed by stacking layers such as SiO2 / TiO2 or SiO2 / Nb2O5. When forming a distributed Bragg mirror (DBR) structure with SiO2 / TiO2 or SiO2 / Nb2O5, each layer of the distributed Bragg mirror (DBR) structure may be designed to have an optical thickness of one-quarter of the wavelength of light emitted by the active layer 212, or an integer multiple thereof. The thickness of each layer of the distributed Bragg mirror (DBR) structure may have a deviation of ±30% based on one or an integer multiple of λ / 4. Since the thickness of each layer in the distributed Bragg mirror (DBR) structure affects the reflectivity, it is preferable to form the reflective layer 51 using electron beam evaporation, which allows for stable control of the thickness of each layer in the distributed Bragg mirror (DBR) structure.

[0039] Figure 1 shows a wafer on which multiple light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f are formed. In this embodiment, as shown in Figure 1 in the top view, the semiconductor stack layer 20 is divided into multiple light-emitting regions by the cutting region 1001. The base surface 211a continuously surrounds the periphery of each of the multiple light-emitting regions of the semiconductor stack layer 20 and is approximately quadrilateral. In order to separate the multiple light-emitting regions and form individual light-emitting elements, the cutting region 1001 has a predetermined width, thereby ensuring that the light-emitting elements are not damaged and have a sufficient light-emitting area, preferably between 1 μm and 150 μm, and more preferably between 5 μm and 50 μm. When a wafer on which multiple light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f are formed is separated to form individual light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f by cutting a cutting region 1001 with a laser and / or cutter, the physical impact force of the laser and / or cutter cutting makes it easy for cracks to occur in the insulating reflective structure 500, particularly the reflective layer 51, at the edges of the light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f. Furthermore, once the cracks diffuse into the semiconductor stack layer 20, external moisture enters the semiconductor stack layer 20 along the cracks, reducing the reliability of the element.

[0040] To solve the above-mentioned problems, the light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f include a dicing line 10d, which is part of the cutting region 1001 during wafer cutting. The dicing line 10d is the region that is retained (left behind) on the light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f after the wafer cutting process of the cutting region 1001. The dicing line 10d is located between the side edge 10S of the substrate 10 and the side edge 20S of the semiconductor stack layer 20, and the width of the dicing line 10d is between 0.1 μm and 50 μm, preferably less than 30 μm, and more preferably less than 15 μm. The dicing line 10d exposes the upper surface 100 of the substrate 10 and is located around the light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f, surrounding the semiconductor stack layer 20. In the top view of the light-emitting elements 1a, 1b, 1c, 1d, 1e, or 1f, the dicing line 10d includes the first surface area, the semiconductor stack layer 20 includes the second surface area, and the ratio of the first surface area to the second surface area is between 10% and 50%.

[0041] In one variation example, in order to place the first electrode pad 61 and the second electrode pad 62 while leaving a large area on the base surface 211a, the angle between the side edge 20S of the semiconductor stack layer 20 and the upper surface 100 of the substrate 10 is between 70 and 110 degrees, preferably between 80 and 100 degrees, and more preferably between 85 and 95 degrees.

[0042] In one variation, to improve the quality of the film covering the side edge 20S of the semiconductor stack layer 20 and to avoid the formation of defects such as cracks in the reflective layer 51, the angle between the side edge 20S of the semiconductor stack layer 20 and the upper surface 100 of the substrate 10 is between 10 and 50 degrees, preferably between 20 and 40 degrees, and more preferably between 25 and 35 degrees. In another variation, the side edge 20S may be composed of slopes having different slopes. The slopes closer to the upper surface 100 of the substrate 10 are steeper than the slopes further away from the upper surface 100 of the substrate 10. For example, the angle between the slope in direct contact with the upper surface 100 of the substrate 10 and the upper surface 100 of the substrate 10 is between 50 and 70 degrees. The angle between the slope further away from the upper surface 100 of the substrate 10 and a horizontal plane parallel to the upper surface 100 is between 30 and 50 degrees.

[0043] In one embodiment of the present invention, before forming the protective layer 50, a dense layer 54 is formed by atomic vapor deposition on the upper surface 100 of the substrate 10 and the surface 20ts of the semiconductor stack layer 20, directly covering the upper surface 100 of the substrate 10 and the sides 211s and 20S of the semiconductor stack layer 20. The material of the dense layer 54 includes silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, yttrium oxide, lanthanum oxide, tantalum oxide, silicon nitride, aluminum nitride, or silicon oxynitride. In this embodiment, the interface where the dense layer 54 contacts the semiconductor stack layer 20 includes a metal element and oxygen, where the metal element includes aluminum, hafnium, zirconium, yttrium, lanthanum, or tantalum. The dense layer 54 has a thickness between 400 Å and 2000 Å, preferably between 800 Å and 1600 Å, and more preferably between 1000 Å and 1400 Å.

[0044] The film formed by atomic layer deposition has good step-like coverage and uniform thickness, as well as high density, which allows for the conformal formation of a dense layer 54 without pinholes on the substrate 10 and the semiconductor stack layer 20. The dense layer 54 formed using atomic layer deposition can prevent moisture from penetrating the semiconductor stack layer 20 through gaps between the substrate 10 and the semiconductor stack layer 20, or through pores on the surface 20ts of the semiconductor stack layer 20.

[0045] In one variation of the present invention, one or more of the dense layer 54, protective layer 50, reflective layer 51, and cladding layer 52 may be omitted.

[0046] Figure 2B is a diagram showing the method for manufacturing the light-emitting element 1a disclosed in Figure 2A. Figure 3B is a diagram showing the method for manufacturing the light-emitting element 1b disclosed in Figure 3A. In this embodiment, when a wafer on which multiple light-emitting elements are formed is separated along the separation line L-L' using a laser and / or cutter to form individual light-emitting elements, the physical impact force of the cutting by the laser and / or cutter makes it easy for cracks to occur in the insulating reflective structure 500, particularly the reflective layer 51, at the edge of the light-emitting element 1a or 1b. To solve this problem, the present invention provides a method for manufacturing a light-emitting element 1a or 1b, which comprises the following steps: providing a substrate 10, where the substrate 10 includes an upper surface 100, the upper surface 100 includes a first upper surface D1 and a second upper surface D2; forming a semiconductor stack layer 20 on the substrate 10, which includes a first semiconductor layer 211, an active layer 212 and a second semiconductor layer 213; removing a portion of the semiconductor stack layer 20 to form a cut region 1001 and a plurality of light-emitting elements 1a or 1b on the semiconductor stack layer 20, where the cut region 1001 exposes the first upper surface D1 and the second upper surface D2 of the substrate 10 before cutting, and the second upper surface Surface D2 is further from the side edge 20S of the semiconductor stack layer 20 than the first upper surface D1; a protective layer 50 is formed to cover each semiconductor stack layer 20 of the plurality of light-emitting elements 1a or 1b; a reflective layer 51 including a distributed Bragg mirror structure is formed to cover the protective layer 50; and a cladding layer 52 is formed to cover the reflective layer 51, where the protective layer 50, the reflective layer 51 and the cladding layer 52 do not cover the second upper surface D2 of the substrate 10; and the substrate 10 is separated at a position on the second upper surface D2 of the substrate 10 to form the plurality of light-emitting elements 1a or 1b, and the first upper surface D1 and the second upper surface D2 of the substrate 10 after separation are located within the cut region 1001 (dicing line 10d).

[0047] As shown in Figures 2B and 3B, the protective layer 50, the reflective layer 51, and the cladding layer 51 cover the first upper surface D1 of the substrate 10, but do not cover the second upper surface D2 of the substrate 10. In this embodiment, as shown in Figure 2B, the outer edge 52S of the cladding layer 52 is aligned with the outer edge 51S of the reflective layer 51, but the cladding layer 52 does not directly contact the substrate 10. In one variation of this embodiment, as shown in Figure 3B, the cladding layer 52 covers the outer edge 51S of the reflective layer 51 and directly contacts the upper surface 100 of the substrate 10.

[0048] In one variation of the present invention, one or more of the dense layer 54, protective layer 50, reflective layer 51, and cladding layer 52 may be omitted.

[0049] In one embodiment of the present invention, when cutting a semiconductor wafer having a light-emitting element, if the substrate 10 is a sapphire substrate, first, the substrate 10 is melted on the cutting region 1001 by a laser in the UV wavelength range (for example, 266 nanometers, 343 nanometers, or 355 nanometers) to form a recess (not shown). Subsequently, using an invisible laser, the laser focus is focused between the upper surface 100 and the lower surface 105 of the substrate 10 in a direction in which it is incident on the lower surface 105 of the substrate 10, thereby forming multiple damage regions along the separation line L-L' within the substrate 10. Then, by applying an external force, the wafer on which multiple light-emitting elements 1 are formed can be separated by cleavage (splitting) planes that occur along the multiple damage regions toward the stretching direction of the upper surface 100 and the lower surface 105 of the substrate 10, thereby forming individual light-emitting elements 1. Compared to single-laser cutting, UV laser plus invisible laser cutting can reduce damage to light-emitting elements due to oblique cracks. In one variation of the present invention, the cutting yield can be improved by repeatedly focusing the invisible laser to different depths inside the substrate 10.

[0050] Figures 4A, 5A, and 6A are local side views of light-emitting elements 1c, 1d, and 1e disclosed in other embodiments of the present invention. Figure 4B is a diagram showing the method for manufacturing the light-emitting element 1c disclosed in Figure 4A. Figure 5B is a diagram showing the method for manufacturing the light-emitting element 1d disclosed in Figure 5A. Hereinafter, for the sake of convenience of explanation, Figures 4A, 5A, and 6A will be described with respect to the structure along the cutting line A-A' of Figure 1, and Figures 4B, 5B, and 6B will be described with respect to position D on the cutting line B-B' of Figure 1, with some illustrations appropriately omitted. Figure 6B is a diagram showing the method for manufacturing the light-emitting element 1e disclosed in Figure 6A. Light-emitting elements 1c, 1d, 1e and light-emitting elements 1a or 1b have substantially the same structure. Therefore, for the light-emitting elements 1c in Figures 4A to 4B, 1d in Figures 5A to 5B, 1e in Figures 6A to 6B, and 1a in Figures 2A to 2B, and 1b in Figures 3A to 3B, structures with the same name or reference numeral indicate the same structure, the same material, or the same function. A detailed explanation is omitted here.

[0051] The light-emitting element 1c, 1d, or 1e is a substrate 10 including an upper surface 100 and a side edge 10S, wherein the upper surface 100 includes a first upper surface D1 and a second upper surface D2, the second upper surface D2 being closer to the side edge 10S of the substrate 10 than the first upper surface D1; a semiconductor stack layer 20 located on the substrate 10 and including a first semiconductor layer 211, an active layer 212, and a second semiconductor layer 213; a dicing line 10d surrounding the semiconductor stack layer 20 and exposing the first upper surface D1 and the second upper surface D2 of the substrate 10; a protective layer 50 covering the semiconductor stack layer 20; a reflective layer 51 including a distributed Bragg mirror structure and located on the protective layer 50; and a cladding layer 52 covering the reflective layer 51, wherein the second upper surface D2 of the substrate 10 is not covered by the protective layer 50, the reflective layer 51, and the cladding layer 52.

[0052] As shown in Figures 4A and 5A, the protective layer 50 and the reflective layer 51 do not cover the first upper surface D1 of the substrate 10, but the cladding layer 52 covers the first upper surface D1 of the substrate 10. In this embodiment, as shown in Figure 4A, there is a distance between the outer edge 51S of the reflective layer 51 and the side edge 20S of the first semiconductor layer 211. In one variation of this embodiment, as shown in Figure 5A, the outer edge 51S of the reflective layer 51 and the side edge 20S of the first semiconductor layer 211 are aligned.

[0053] In one embodiment of the present invention, before forming the cladding layer 52, a dense layer 54 is formed on the upper surface 100 of the substrate 10 and the semiconductor stack layer 20 by atomic vapor deposition, directly covering the upper surface 100 of the substrate 10, the side edges 20S of the semiconductor stack layer 20, and the outer edge 51S of the reflective layer 51. The material of the dense layer 54 includes silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, yttrium oxide, lanthanum oxide, tantalum oxide, silicon nitride, aluminum nitride, or silicon oxynitride. In this embodiment, the interface where the dense layer 54 contacts the reflective layer 51, the cladding layer 52, and the interface where it contacts the side edges 20S of the semiconductor stack layer 20 contains a metallic element and oxygen, where the metallic element includes aluminum, hafnium, zirconium, yttrium, lanthanum, or tantalum. The dense layer 54 has a thickness between 400 Å and 2000 Å, preferably between 800 Å and 1600 Å, and more preferably between 1000 Å and 1400 Å.

[0054] The film formed by atomic layer deposition has good stepped coverage and uniform thickness, as well as high density, which allows for the conformal formation of a dense layer 54 without pinholes on the substrate 10 and the semiconductor stack layer 20. The dense layer 54 formed using atomic layer deposition can prevent moisture from entering the semiconductor stack layer 20 through gaps between the substrate 10 and the semiconductor stack layer 20, or through pores on the surface of the semiconductor stack layer 20.

[0055] In one variation of the present invention, one or more of the dense layer 54, protective layer 50, reflective layer 51, and cladding layer 52 may be omitted.

[0056] In another variation of this embodiment, as shown in Figure 6A, the first semiconductor layer 211 includes a first base surface 2111 and a second base surface 2112, where the second base surface 2112 is closer to the side edge 10S of the substrate 10 than the first base surface 2111. The outer edge 51S of the reflective layer 51 and the outer edge 2112S of the second base surface 2112 are aligned, or there is a distance (not shown) between them.

[0057] In this embodiment, before forming the cladding layer 52, a dense layer 54 is formed on the upper surface 100 of the substrate 10 and the semiconductor stack layer 20 by atomic vapor deposition, directly covering the upper surface 100 of the substrate 10, the outer edge 2112S of the second base surface 2112, and the outer edge 51S of the reflective layer 51. The material of the dense layer 54 includes silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, yttrium oxide, lanthanum oxide, tantalum oxide, silicon nitride, aluminum nitride, or silicon oxynitride. In this embodiment, the interface of the dense layer 54 in contact with the reflective layer 51, the cladding layer 52, and the interface in contact with the outer edge 2112S of the second base surface 2112 contains a metallic element and oxygen, where the metallic element includes aluminum, hafnium, zirconium, yttrium, lanthanum, or tantalum. The dense layer 54 has a thickness between 400 Å and 2000 Å, preferably between 800 Å and 1600 Å, and more preferably between 1000 Å and 1400 Å.

[0058] In one variation of the present invention, one or more of the dense layer 54, protective layer 50, reflective layer 51, and cladding layer 52 may be omitted.

[0059] Figure 4B is a diagram showing the method for manufacturing the light-emitting element 1c disclosed in Figure 4A. Figure 5B shows the method for manufacturing the light-emitting element 1d disclosed in Figure 5A. Figure 6B shows the method for manufacturing the light-emitting element 1e disclosed in Figure 6A. In this embodiment, when separating a wafer on which multiple light-emitting elements are formed using a laser and / or cutter along the separation line L-L' to form individual light-emitting elements, the insulating reflective structure 500, particularly the reflective layer 51, at the edges of the light-emitting elements 1c, 1d, or 1e is prone to cracking due to the physical impact force of the cutting by the laser and / or cutter. To solve such problems, the present invention provides a method for manufacturing a seed light-emitting element 1c, 1d, or 1e, which comprises the following steps: providing a substrate 10, where the substrate 10 includes an upper surface 100, the upper surface 100 includes a first upper surface D1 and a second upper surface D2; forming a semiconductor stack layer 20 on the substrate 10, which includes a first semiconductor layer 211, an active layer 212, and a second semiconductor layer 213; and surrounding the semiconductor stack layer 20, exposing the first upper surface D1 and the second upper surface D2 of the substrate 10. A dicing line 10d is formed, where the second upper surface D2 is further away from the side edge 20S of the semiconductor stack layer 20 than the first upper surface D1; a protective layer 50 is formed covering the semiconductor stack layer 20; a reflective layer 51 including a distributed Bragg mirror structure is formed covering the protective layer 50; and a cladding layer 52 is formed covering the reflective layer 51, where the protective layer 50, the reflective layer 51 and the cladding layer 52 do not cover the second upper surface D2 of the substrate 10; and the substrate 10 is separated at a position on the second upper surface D2 of the substrate 10 to form a plurality of light-emitting elements 1c, 1d or 1e.

[0060] In one embodiment of the present invention, before forming the cladding layer 52, a dense layer 54 is formed on the upper surface 100 of the substrate 10 and the semiconductor stack layer 20 by atomic vapor deposition, directly covering the upper surface 100 of the substrate 10, the outer edge 2112S of the second base surface 2112, and the outer edge 51S of the reflective layer 51. The material of the dense layer 54 includes silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, yttrium oxide, lanthanum oxide, tantalum oxide, silicon nitride, aluminum nitride, or silicon oxynitride. In this embodiment, the interface of the dense layer 54 in contact with the reflective layer 51, the cladding layer 52, and the intervening surface in contact with the outer edge 2112S of the second base surface 2112 contains a metallic element and oxygen, where the metallic element includes aluminum, hafnium, zirconium, yttrium, lanthanum, or tantalum. The dense layer 54 has a thickness between 400 Å and 2000 Å, preferably between 800 Å and 1600 Å, and more preferably between 1000 Å and 1400 Å.

[0061] In one variation of the present invention, one or more of the dense layer 54, protective layer 50, reflective layer 51, and cladding layer 52 may be omitted.

[0062] The protective layer 50 and the reflective layer 51 do not cover the first upper surface D1 of the substrate 10, but the cladding layer 52 covers the first upper surface D1 of the substrate 10. In one embodiment in which the dense layer 54 is omitted, the cladding layer 52 is in direct contact with the first upper surface D1 of the substrate 10. In an embodiment in which the dense layer 54 is installed, the cladding layer 52 is not in contact with the first upper surface D1 of the substrate 10.

[0063] In this embodiment, as shown in Figure 4B, there is a distance between the outer edge 51S of the reflective layer 51 and the side edge 20S of the first semiconductor layer 211. In other embodiments, as shown in Figure 5B, the outer edge 51S of the reflective layer 51 and the side edge 20S of the first semiconductor layer 211 are aligned.

[0064] In another variation of this embodiment, as shown in Figure 6B, the first semiconductor layer 211 includes a first basal surface 2111 and a second basal surface 2112, where the second basal surface 2112 is closer to the side edge 20S of the semiconductor stack layer 20 than the first basal surface 2111. The outer edge 51S of the reflective layer 51 and the outer edge 2112S of the second basal surface 2112 are aligned, or there is a distance (not shown) between them.

[0065] Figure 7A is a local side view of the light-emitting element 1f disclosed in another embodiment of the present invention. Figure 7B is a diagram showing the method for manufacturing the light-emitting element 1f disclosed in Figure 7A. Hereinafter, for the sake of convenience of explanation, Figure 7A will be described with respect to the structure along the cutting line A-A' in Figure 1, and Figure 7B will be described with respect to position D on the cutting line B-B' in Figure 1, with some illustrations appropriately omitted. The light-emitting element 1f has substantially the same structure as the light-emitting element 1a or 1b. Therefore, for the light-emitting element 1f in Figures 7A to 7B, the light-emitting element 1a in Figures 2A to 2B, and the light-emitting element 1b in Figures 3A to 3B, structures with the same name or reference numeral indicate that they have the same structure, the same material, or the same function. A detailed explanation is omitted here.

[0066] In this embodiment, the light-emitting element 1f is a substrate 10 including an upper surface 100 and a side edge 10S, wherein the upper surface 100 includes a first upper surface D1 and a second upper surface D2, where the second upper surface D2 is closer to the side edge 10S of the substrate 10 than the first upper surface D1; a semiconductor stack layer 20 located on the substrate 10 and including a first semiconductor layer 211, an active layer 212 and a second semiconductor layer 213; a dicing line 10d surrounding the semiconductor stack layer 20 and exposing the first upper surface D1 and the second upper surface D2 of the substrate 10; a protective layer 50 and a reflective layer 51 covering the semiconductor stack layer 20, the first upper surface D1 and the second upper surface D2 of the substrate 10; and a cladding layer 52 covering the protective layer 50, the reflective layer 51 and the first upper surface D1 of the substrate 10, wherein the second upper surface D2 of the substrate 10 is not covered by the cladding layer 52. Multiple light-emitting elements 1f are formed by separating the substrate 10 at a position on the second upper surface D2 of the substrate 10.

[0067] In this embodiment, the reflective layer 51 includes a distributed Bragg mirror structure.

[0068] The reflective layer 51 located on the first upper surface D1 has a first thickness, and the reflective layer 51 located on the second surface D2 has a second thickness, with the first thickness being greater than the second thickness.

[0069] In this embodiment, the reflective layer 51 may be omitted, and / or the protective layer 50 and the cladding layer 52 may contain different materials, for example, the protective layer 50 may contain SiO x The cladding layer 52 is SiN x Includes.

[0070] In one embodiment of the present invention, before forming the protective layer 50, a dense layer 54 is formed on the upper surface 100 of the substrate 10 and the surface of the semiconductor stack layer 20 by atomic vapor deposition, directly covering the upper surface 100 of the substrate 10 and the surface of the semiconductor stack layer 20. The material of the dense layer 54 includes silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, yttrium oxide, lanthanum oxide, tantalum oxide, silicon nitride, aluminum nitride, or silicon oxynitride. In this embodiment, the interface in which the dense layer 54 contacts the semiconductor stack layer 20 includes a metallic element and oxygen, where the metallic element includes aluminum, hafnium, zirconium, yttrium, lanthanum, or tantalum. The dense layer 54 has a thickness between 400 Å and 2000 Å, preferably between 800 Å and 1600 Å, and more preferably between 1000 Å and 1400 Å.

[0071] The film formed using atomic layer deposition exhibits good stepped coverage and uniform thickness, as well as high density, enabling the conformal formation of a dense layer 54 without pinholes on the substrate 10 and the semiconductor stack layer 20. The dense layer 54 formed by atomic layer deposition prevents moisture from entering the semiconductor stack layer 20 through gaps between the substrate 10 and the semiconductor stack layer 20, or through pores on the surface of the semiconductor stack layer 20.

[0072] In one variation of the present invention, one or more of the dense layer 54, protective layer 50, reflective layer 51, and cladding layer 52 may be omitted. When the reflective layer 51 is omitted from the light-emitting element 1f, the protective layer 50 covers the first upper surface D1 and the second upper surface D2 of the substrate 10, and the cladding layer 52 covers the first upper surface D1 of the substrate 10 but not the second upper surface D2 of the substrate 10. In the step of removing the cladding layer 52 by etching, a portion of the reflective layer 51 is also removed by etching, so that the protective layer 50 located on the first upper surface D1 has a first thickness, and the protective layer 50 located on the second surface D2 has a second thickness, with the first thickness being greater than the second thickness.

[0073] Figure 7B is a diagram showing the method for manufacturing the light-emitting element 1f disclosed in Figure 7A. In this embodiment, when separating a wafer on which multiple light-emitting elements are formed using a laser and / or cutter along the separation line L-L' to form individual light-emitting elements, cracks are likely to occur in the insulating reflective structure 500 at the edge of the light-emitting element due to the physical impact force of cutting by the laser and / or cutter. To solve such problems, the present invention provides a method for manufacturing a light-emitting element 1f, which comprises the following steps: providing a substrate 10, where the substrate 10 includes an upper surface 100, the upper surface 100 includes a first upper surface D1 and a second upper surface D2; forming a semiconductor stack layer 20 on the substrate 10, which includes a first semiconductor layer 211, an active layer 212 and a second semiconductor layer 213; forming dicing lines 10d around the semiconductor stack layer 20, which are used to form a plurality of light-emitting elements 1f and expose the first upper surface D1 and the second upper surface D2 of the substrate 10, where the second upper surface D2 is further away from the side edge 20S of the semiconductor stack layer 20 than the first upper surface D1; and forming a protective layer 50, a reflective layer 51 and a cladding layer 52 covering the semiconductor stack layer 20 of the plurality of light-emitting elements 1f, the first upper surface D1 of the substrate 10, where the protective layer 50 and the reflective layer 51 further cover the second upper surface D2 of the substrate 10.

[0074] In one embodiment of the present invention, the method for manufacturing a light-emitting element 1f includes the step of forming a protective layer 50, a reflective layer 51, and a cladding layer 52 on the second upper surface D2 of a substrate 10, and then removing the cladding layer 52 on the second upper surface D2 of the substrate 10 by etching, leaving the protective layer 50 and the reflective layer 51.

[0075] In the step of removing the cladding layer 52 by etching, a portion of the reflective layer 51 is also removed by etching. As a result, the reflective layer 51 located on the first upper surface D1 has a first thickness, and the reflective layer 51 located on the second surface D2 has a second thickness, with the first thickness being greater than the second thickness.

[0076] In one variation of the present invention, one or more of the dense layer 54, protective layer 50, reflective layer 51, and cladding layer 52 may be omitted. When the reflective layer 51 is omitted from the light-emitting element 1f, the first upper surface D1 and the second upper surface D2 of the substrate 10 are all covered with the protective layer 50, the protective layer 50 located on the first upper surface D1 has a first thickness, and the protective layer 50 located on the second surface D2 has a second thickness, with the first thickness being greater than the second thickness.

[0077] In this embodiment, the reflective layer 51 may be omitted, and / or the protective layer 50 and the cladding layer 52 may contain different materials, for example, the protective layer 50 may contain SiO x The cladding layer 52 is SiN x Includes.

[0078] In another embodiment of the present invention, the method for manufacturing the light-emitting element 1f includes the step of directly cutting the reflective layer 51, the protective layer 50, and the substrate 10 with a laser in the UV wavelength range (e.g., 266 nanometers, 343 nanometers, or 355 nanometers) at a position on the second upper surface D2 of the substrate 10. The by-products of UV laser cutting include material elements composed of the reflective layer 51, the protective layer 50, and the substrate 10 (derived from the three). The by-products of laser cutting are then removed by wet etching. The etching solution used for wet etching includes hydrochloric acid (HCl), nitric acid (HNO3), potassium hydroxide (KOH), sulfuric acid (H2SO4), phosphoric acid (H3PO4), or a combination of the above solutions. In one embodiment, when the size of the light-emitting element 1f is too small, for example at the μm level, the subsequent etching process is operationally difficult, and therefore, selective removal of the by-products of laser cutting is not required. In other embodiments, after cutting the reflective layer 51, protective layer 50, and substrate 10 using a laser in the UV wavelength range, an invisible laser is then used to focus the invisible laser between the upper and lower surfaces of the substrate 10 in a direction incident on the lower surface of the substrate 10, thereby forming multiple damaged regions along the separation line L-L' within the substrate 10. By applying an external force, cleavage planes are generated along the multiple damaged regions in the stretching direction of the upper and lower surfaces of the substrate 10, and each individual light-emitting element 1f is formed by separation. The by-products of UV laser cutting include material elements composed of the reflective layer 51, protective layer 50, and substrate 10. The by-products do not necessarily have to be selectively removed, or they may be removed by wet etching.

[0079] Figure 8 shows a light-emitting device 2 according to one embodiment of the present invention. The light-emitting elements 1a to 1f in the above embodiment are attached to the first gasket 511 and the second gasket 512 of the package substrate 513 in the form of flip chips. The space between the first gasket 511 and the second gasket 512 is electrically insulated by an insulating part 53 containing an insulating material. Flip-chip mounting means that the growth substrate side facing the electrode pad formation surface is made the main light extraction surface. To increase the light extraction efficiency of the light-emitting device 2, a reflective structure 58 can be installed around the light-emitting elements 1a to 1f.

[0080] Figure 9 shows a light-emitting device 3 in one embodiment of the present invention. The light-emitting device 3 is a light bulb lamp, and it includes a lampshade 602, a reflector 604, a light-emitting module 610, a lamp holder 612, a heat dissipation piece 614, a connection part 616, and an electrical connection element 618. The light-emitting module 610 includes a mounting part 606 and a plurality of light-emitting units 608 located on the mounting part 606, where the plurality of light-emitting units 608 may be light-emitting elements 1a to 1f or light-emitting device 2 in the above embodiment.

[0081] Although preferred embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and any modification to the present invention that does not deviate from the spirit of the invention falls within the technical scope of the present invention. [Explanation of symbols]

[0082] 1a, 1b, 1c, 1d, 1e, 1f Light-emitting element 10 circuit boards 10d dicing line 10S side 100 Top surface 105 Lower surface 1001 Cutting area 11 Convex part 20 Semiconductor stack layers 20S side 20ts surface 211 First Semiconductor Layer 211a pedestal 211b First electrical contact area 211s side 2111 First surface 2112 Second platform 2112S outer edge 212 Active layer 213 Second Semiconductor Layer 30 Conductive layer 41 First contact electrode 42 Second contact electrode 50 protective layer 500 Insulating Reflective Structure 501 First insulating reflective structure aperture 502 Second insulating reflective structure aperture 51 Reflective layer 51S outer edge 511 First Gasket 512 Second gasket 513 Package substrate 52 Clad layer 52S outer edge 53 Insulation part 54 Layer compacta 58 Reflective structure 61 First electrode pad 62 Second electrode pad 602 Lampshade 604 Reflector 606 Mounting section 608 Luminous body 610 Light-Emitting Module 612 Lamp Holder 614 Heat sink 616 Connection part 618 Electrical connection element D1 First top surface D2 Second top surface

Claims

1. A light-emitting element, A substrate including an upper surface and a plurality of protrusions located on the upper surface; Semiconductor stack layer located on the upper surface; Dicing lines surrounding the semiconductor stack layer and exposing the upper surface of the substrate; and An insulating reflective structure covering the semiconductor stack layer and including a protective layer, a reflective layer and a cladding layer, wherein the cladding layer includes an insulating reflective structure covering the protective layer and the reflective layer, A light-emitting element in which the reflective layer does not cover the dicing line, the cladding layer covers the dicing line, and a portion of the dicing line does not include the plurality of protrusions.

2. A light-emitting element according to claim 1, The protective layer does not cover the dicing line, and the light-emitting element is a light-emitting element.

3. A light-emitting element according to claim 1, A light-emitting element, wherein the insulating reflective structure further includes a dense layer, the dense layer being located between the reflective layer and the cladding layer.

4. A light-emitting element according to claim 3, The dense layer is in contact with the reflective layer in a light-emitting element.

5. A light-emitting element according to claim 3, A light-emitting element having a thickness less than the thickness of the cladding layer.

6. A light-emitting element according to claim 3, The substrate includes the side edges, and the upper surface includes a first region and a second region. The second region is closer to the side edge of the substrate than the first region. The dense layer does not cover the second region in the light-emitting element.

7. A light-emitting element according to claim 1, The semiconductor stack layer includes a first semiconductor layer, an active layer, and a second semiconductor layer. The first semiconductor layer includes a base surface, which is not covered by the active layer and the second semiconductor layer, and surrounds the periphery of the semiconductor stack layer. The protective layer and the reflective layer cover the base surface of the light-emitting element.

8. A light-emitting element according to claim 7, A light-emitting element in which there is a predetermined distance between the outer edge of the reflective layer and the outer edge of the first semiconductor layer.

9. A light-emitting element according to claim 1, The dicing line has a width of 0.1 μm to 15 μm, and is an light-emitting element.

10. A light-emitting element according to claim 1, The plurality of protrusions include a first layer and a second layer, and the second layer includes an insulating material, wherein the light-emitting element is a light-emitting element.

Images