Manufacturing method of wiring boards

Abstract

To provide a method for manufacturing high-quality wiring boards. [Solution] The method for manufacturing a wiring board according to the embodiment includes: preparing a support plate; forming a member on the support plate for closing one end of a first opening for embedding a component; forming a first resin insulating layer having a first surface and a second surface opposite to the first surface on the member such that the second surface and the member face each other; forming the first opening that penetrates the first resin insulating layer and reaches the member; and fixing the component to the member exposed through the first opening via an adhesive film.

Description

Technical Field

[0001] The technology disclosed by this specification relates to a method for manufacturing a wiring board.

Background Art

[0002] Patent Document 1 discloses a method for manufacturing an electronic module, including laminating a conductive layer on a support base, fixing a component on the conductive layer via an adhesive layer, and disposing an insulating material layer having a cavity for the component on the conductive layer.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

[0004] [Problems of Patent Document 1] In Patent Document 1, by disposing an insulating material layer on the conductive layer, the periphery of the component is surrounded by the insulating material layer. When the insulating material layer is not disposed on the conductive layer, there is no member for protecting the component fixed to the conductive layer around the component. Therefore, it is considered that a component not surrounded by the insulating material layer is likely to collide with something. For example, it is considered that a collision may occur during transportation. When an external force such as a collision is applied to the component, it is considered that the component may peel off from the adhesive layer. Alternatively, it is considered that the position of the component may shift. Alternatively, it is considered that the performance of the component may deteriorate.

Means for Solving the Problems

[0005] The present invention provides a method for manufacturing a wiring board, comprising: preparing a support plate; forming a member on the support plate to close one end of a first opening for embedding components; forming a first resin insulating layer having a first surface and a second surface opposite to the first surface on the member such that the second surface and the member face each other; forming the first opening that penetrates the first resin insulating layer and reaches the member; and fixing the components to the member exposed through the first opening via an adhesive film.

[0006] In the manufacturing method of the embodiment of the present invention, a component is placed in the first opening of the first resin insulating layer. Simultaneously with the fixing of the component, the component is surrounded by the first resin insulating layer. Therefore, the component fixed on the member is less likely to be subjected to unnecessary external forces. The embodiment can prevent the component from peeling off the adhesive film. The embodiment can prevent displacement and performance degradation of the component. The embodiment can provide a wiring board with stable performance. [Brief explanation of the drawing]

[0007] [Figure 1] A schematic cross-sectional view showing the wiring board of the embodiment. [Figure 2A] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2B] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2C] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2D] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2E] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2F] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2G] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2H] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 2I] A schematic cross-sectional view illustrating the manufacturing method of the wiring board according to the embodiment. [Figure 3A] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3B] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3C] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3D] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3E] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3F] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3G] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3H] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3I] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Figure 3J] A schematic cross-sectional view illustrating an example of a modification in the manufacturing method of a wiring board. [Modes for carrying out the invention]

[0008] [Embodiment] Figure 1 is a cross-sectional view showing a wiring board 2 of an embodiment. As shown in Figure 1, the wiring board 2 has a first surface 2a and a second surface 2b opposite to the first surface 2a. The first surface 2a is also the mounting surface. A first electronic component E1 and a second electronic component E2 are mounted on the first surface 2a. The first electronic component E1 is, for example, a logic IC, and the second electronic component E2 is, for example, a memory. The wiring board 2 includes a first resin insulating layer 20, a build-up layer 300, a first solder resist layer 200, and a second solder resist layer 220. The second solder resist layer 220 has a first surface 220a and a second surface 220b opposite to the first surface 220a. The first surface 2a of the wiring board 2 and the second surface 220b of the second solder resist layer 220 are the same surface.

[0009] The first resin insulating layer 20 has a first surface 20a and a second surface 20b opposite to the first surface 20a. The second surface 20b of the first resin insulating layer 20 faces the first surface 220a of the second solder resist layer 220. The first resin insulating layer 20 includes a plurality of resin insulating layers 22, 24. The first resin insulating layer 20 in FIG. 1 is formed of two resin insulating layers 22, 24. Each of the resin insulating layers 22, 24 is formed of a resin and inorganic particles dispersed in the resin. Each of the resin insulating layers 22, 24 does not include a reinforcing material made of fibers. An example of the reinforcing material is a glass cloth. An example of the resin is a thermosetting resin. The inorganic particles are, for example, silica or alumina. The resin insulating layer 22 is the lowermost resin insulating layer, and the resin insulating layer 24 is the uppermost resin insulating layer. Among the first resin insulating layer 20, the lowermost resin insulating layer 22 is the layer closest to the second solder resist layer 220, and the uppermost resin insulating layer 24 is the layer farthest from the second solder resist layer 220. The lowermost resin insulating layer 22 has a first surface and a second surface opposite to the first surface, and the second surface of the lowermost resin insulating layer 22 and the second surface 20b of the first resin insulating layer 20 are the same surface. The uppermost resin insulating layer 24 has a first surface and a second surface opposite to the first surface, and the first surface of the uppermost resin insulating layer 24 and the first surface 20a of the first resin insulating layer 20 are the same surface. The first resin insulating layer 20 can have resin insulating layers other than the lowermost resin insulating layer 22 and the uppermost resin insulating layer 24. For example, the first resin insulating layer 20 has an intermediate resin insulating layer sandwiched between the lowermost resin insulating layer 22 and the uppermost resin insulating layer 24.

[0010] The wiring board 2 further has conductor layers 10, 30 and via conductors 40. The conductor layer 10 is formed between the lowermost resin insulating layer 22 and the second solder resist layer 220. The conductor layer 30 is formed between the lowermost resin insulating layer 22 and the uppermost resin insulating layer 24. The via conductor 40 connects the conductor layer10 and the conductor layer 30. The via conductor 40 is formed in an opening 42 penetrating the lowermost resin insulating layer 22. The via conductor 40 penetrates only the lowermost resin insulating layer 22.

[0011] The first resin insulating layer 20 has a first opening 50 that penetrates the first resin insulating layer 20. The first opening 50 preferably penetrates all the resin insulating layers 22, 24 belonging to the first resin insulating layer 20. The first opening 50 extends from the first surface 20a of the uppermost resin insulating layer 24 to the second surface 20b of the lowermost resin insulating layer 22. The first opening 50 exposes the first surface 220a of the second solder resist layer 220. A component 60 is disposed within the first opening 50. An adhesive film 70 is provided between the component 60 and the first surface 220a of the second solder resist layer 220. A gap 52 is formed between the inner wall surface of the first opening 50 and the component 60. The component 60 has a power supply via 62 for supplying power to the electronic components E1, E2 and a transmission wiring 66 for data transmission between the first electronic component E1 and the second electronic component E2.

[0012] The build-up layer 300 is formed on the first surface 20a of the first resin insulating layer 20. The build-up layer 300 includes resin insulating layers 80, 110, 140, 170, conductor layers 90, 120, 150, 180, and via conductors 100, 104, 130, 160, 190. The resin insulating layers 80, 110, 140, 170 are formed of a resin and inorganic particles dispersed within the resin. An example of the resin is a thermosetting resin. The inorganic particles are, for example, silica or alumina. Further, the resin insulating layers 140, 170 include reinforcing materials 142, 172 made of fibers. Examples of the reinforcing materials 142, 172 made of fibers are glass cloths. The resin insulating layers 140, 170 may be prepregs or the like. The number of resin insulating layers and conductor layers forming the build-up layer 3 may be 5 or more. Among the resin insulating layers forming the build-up layer 300, the resin insulating layer 170 that is farthest from the first surface 20a of the first resin insulating layer 20 preferably includes a reinforcing material. The resin insulating layer 170 is located at the bottom within the build-up layer 300.

[0013] Of the resin insulating layers forming the build-up layer 300, the resin insulating layer 80 in contact with the first surface 20a of the first resin insulating layer 20 is the second resin insulating layer. The second resin insulating layer 80 is formed on the first surface 20a of the first resin insulating layer 20. The second resin insulating layer 80 has a first surface and a second surface opposite to the first surface. The second surface of the second resin insulating layer 80 and the first surface 20a of the uppermost resin insulating layer 24 are opposite each other. The second resin insulating layer 80 closes the end of the first opening 50 on the side of the first surface 20a. The second resin insulating layer 80 fills the gap 52 between the inner wall surface of the first opening 50 and the component 60. The conductor layer 90 is formed on the first surface of the second resin insulating layer 80. The via conductor 100 connects the conductor layer 30 and the conductor layer 90. The via conductor 100 is formed in the second opening 102 that penetrates the second resin insulating layer 80 and the uppermost resin insulating layer 24. The second opening 102 penetrates both the second resin insulating layer 80 and the top resin insulating layer 24 simultaneously. The via conductor 104 connects the conductor layer 90 to the power via 62 of the component 60. The via conductor 104 is formed within an opening 106 that penetrates the second resin insulating layer 80. The opening 106 penetrates only the second resin insulating layer 80. The second resin insulating layer 80 has openings 102 and 106 for two types of via conductors, and their lengths are different.

[0014] The resin insulating layer 110 is formed on the conductor layer 90 and the second resin insulating layer 80. The conductor layer 120 is formed on the resin insulating layer 110. The via conductor 130 connects the conductor layer 90 and the conductor layer 120. The resin insulating layer 140 is formed on the conductor layer 120 and the resin insulating layer 110. The conductor layer 150 is formed on the resin insulating layer 140. The via conductor 160 connects the conductor layer 120 and the conductor layer 150. The resin insulating layer 170 is formed on the conductor layer 150 and the resin insulating layer 140. The conductor layer 180 is formed on the resin insulating layer 170. The via conductor 190 connects the conductor layer 150 and the conductor layer 180.

[0015] The first solder resist layer 200 is formed on the resin insulating layer 170 and the conductor layer 180. The first solder resist layer 200 has a first surface 200a and a second surface 200b opposite to the first surface 200a. The second surface 200b faces the resin insulating layer 170. The first surface 200a of the first solder resist layer 200 forms the second surface 2b of the wiring board 2. The first solder resist layer 200 has an opening 210 that exposes the conductor layer 180. A plating layer 212 is formed on the conductor layer 180 exposed through the opening 210. The plating layer 212 is made of nickel, gold, or the like.

[0016] The second solder resist layer 220 is formed on the second surface 20b of the bottommost resin insulating layer 22. The second solder resist layer 220 has a first surface 220a and a second surface 220b opposite to the first surface 220a. The first surface 220a faces the second surface 20b of the first resin insulating layer 20. The second surface 220b of the second solder resist layer 220 forms the first surface 2a of the wiring board 2. The second solder resist layer 220 has a first bump opening 222 that exposes the conductor layer 10 and a second bump opening 224 that exposes the electrodes 61 of the component 60. The second solder resist layer 220 has two types of bump openings 222 and 224, which are of different lengths. The electrodes 61 of the component 60 include an electrode electrically connected to a power via 62 and an electrode electrically connected to a transmission wiring 66.

[0017] The first bump opening 222 penetrates the second solder resist layer 220. The first bump opening 222 penetrates only the second solder resist layer 220. The first bump 230 is formed on the conductor layer 10 exposed from the first bump opening 222. The second bump opening 224 penetrates the second solder resist layer 220 and the adhesive film 70. The second bump opening 224 penetrates both the second solder resist layer 220 and the adhesive film 70 simultaneously. The second bump 240 is formed on the electrode 61 of component 60 exposed from the second bump opening 224. The bumps 230 and 240 are formed by a seed layer, an electrolytic copper plating layer on the seed layer, and a tin plating layer on the electrolytic copper plating layer. The bumps 230 and 240 may also be formed with solder. The electronic components E1 and E2 are mounted on the wiring board 2 by the bumps 230 and 240. When data is sent from the first electronic component E1 to the second electronic component E2, the data is transmitted via a path that includes the second bump 240 and the transmission wiring 66.

[0018] [Manufacturing method for the wiring board 2 of the embodiment] Figures 2A to 2I show the manufacturing method of the wiring board 2 according to the embodiment. Figures 2A to 2I are cross-sectional views. In Figures 2A to 2G, the top and bottom of the figures are reversed compared to Figures 1, 2H, and 2I. Figure 2A shows a support plate 4, a metal layer 6 formed on the support plate 4, and a conductor layer 10 formed on the metal layer 6. An example of the support plate 4 is a glass substrate. The metal layer 6 is, for example, copper foil. The metal layer 6 is formed on the support plate 4 in advance. A plating resist is formed on the metal layer 6. The conductor layer 10 is formed on the metal layer 6 exposed from the plating resist by electrolytic copper plating. The metal layer 6 acts as a seed layer for forming the conductor layer 10. After that, the plating resist is removed. The support plate 4, metal layer 6, and conductor layer 10 shown in Figure 2A are obtained.

[0019] A resin insulating layer 22 is formed on the metal layer 6 and the conductor layer 10. Laser light is shone onto the resin insulating layer 22. The laser light penetrates the resin insulating layer 22. An opening 42 for a via conductor 40 is formed in the resin insulating layer 22, penetrating the resin insulating layer 22 and exposing the conductor layer 10. A seed layer is formed on the resin insulating layer 22 and within the opening 42. A plating resist is formed on the seed layer. An electrolytic copper plating layer is formed on the seed layer exposed from the plating resist. The plating resist is removed. The seed layer exposed from the electrolytic copper plating layer is removed. The conductor layer 30 and the via conductor 40 are formed simultaneously. The via conductor 40 fills the opening 42. The via conductor 40 connects the conductor layer 10 and the conductor layer 30. A resin insulating layer 24 is formed on the resin insulating layer 22 and the conductor layer 30. As shown in Figure 2B, a first resin insulating layer 20 is formed on the metal layer 6 and the conductor layer 10. The first resin insulating layer 20 has a first surface 20a and a second surface 20b opposite to the first surface 20a. The first resin insulating layer 20 is formed on the metal layer 6 such that the second surface 20b of the first resin insulating layer 20 faces the metal layer 6. The first resin insulating layer 20 is formed of two resin insulating layers 22 and 24. Resin insulating layer 22 is the bottommost resin insulating layer, and resin insulating layer 24 is the topmost resin insulating layer. The bottommost resin insulating layer 22 is the layer closest to the support plate 4 in the first resin insulating layer 20, and the topmost resin insulating layer 24 is the layer furthest from the support plate 4 in the first resin insulating layer 20. It is preferable that the thickness of the bottommost resin insulating layer 22 is greater than the thickness of the topmost resin insulating layer 24. It is preferable that the ratio of the thickness of the bottommost resin insulating layer 22 to the thickness of the topmost resin insulating layer 24 (thickness of bottommost resin insulating layer 22 / thickness of topmost resin insulating layer 24) is 1.2 or more and 1.5 or less. The thickness of the bottom resin insulating layer 22 is the distance between the conductor layer 10 and the conductor layer 30. The bottom resin insulating layer 22 is sandwiched between the conductor layer 10 and the conductor layer 30. The thickness of the top resin insulating layer 24 is the distance between the conductor layer 30 and the first surface 20a of the top resin insulating layer 24. The conductor layer 30 is sandwiched between the bottom resin insulating layer 22 and the top resin insulating layer 24.

[0020] A laser beam is shone onto the first surface 20a of the first resin insulating layer 20. The laser beam penetrates the first resin insulating layer 20. The laser beam penetrates all the resin insulating layers 22 and 24 belonging to the first resin insulating layer 20 and reaches the metal layer 6. As shown in Figure 2C, a first opening 50 is formed that penetrates the first resin insulating layer 20 and reaches the metal layer 6. The metal layer 6 is exposed through the first opening 50. The metal layer 6 closes the end of the first opening 50 on the second surface 20b side. The metal layer 6 is an example of a member for closing one end of the first opening 50.

[0021] As shown in Figure 2D, the component 60 is fixed to the metal layer 6 exposed through the first opening 50 via an adhesive film 70. The adhesive film 70 is pre-formed on the component 60. The component 60 with the adhesive film 70 attached is fixed to the metal layer 6 exposed through the first opening 50. The component 60 is fixed within the first opening 50. As the component 60 is fixed, it is simultaneously surrounded by the first resin insulating layer 20. As the component 60 is fixed to the metal layer 6, it is simultaneously protected by the first resin insulating layer 20. It is preferable that the height of the component 60 is lower than the height of the first resin insulating layer 20. The upper surface 601 of the component 60 does not protrude from the first surface 20a of the first resin insulating layer 20. It is preferable that the upper surface 601 of the component 60 is located between the first and second surfaces of the uppermost resin insulating layer 24. The embodiment can protect the component 60 from forces that would adversely affect it. For example, the position of the component 60 is maintained. For example, the performance of the component 60 is maintained. A gap 52 is formed between the part 60 and the inner wall surface of the first opening 50.

[0022] As shown in Figure 2E, a second resin insulating layer 80 is formed on the first surface 20a of the first resin insulating layer 20. Preferably, the second resin insulating layer 80 does not have reinforcing material. The second resin insulating layer 80 has a first surface and a second surface opposite to the first surface. The second surface of the second resin insulating layer 80 and the first surface 20a of the first resin insulating layer 20 face each other. The second resin insulating layer 80 closes the end of the first opening 50 on the side of the first surface 20a. The second resin insulating layer 80 fills the gap 52.

[0023] A laser beam is shone onto the first surface of the second resin insulating layer 80. First, a second opening 102 is formed that penetrates both the second resin insulating layer 80 and the top resin insulating layer 24 simultaneously, leading to the conductor layer 30. The second opening 102 exposes the conductor layer 30, which is sandwiched between the bottom resin insulating layer 22 and the top resin insulating layer 24. Subsequently, an opening 106 is formed that penetrates the second resin insulating layer 80 and leads to the component 60. The opening 106 exposes the power via 62. The opening 106 penetrates only the second resin insulating layer 80. The second resin insulating layer 80 has an opening 106 that penetrates only the second resin insulating layer 80 and a second opening 102 that penetrates both the second resin insulating layer 80 and the top resin insulating layer 24 simultaneously. As shown in Figure 2F, the conductor layer 90 and via conductors 100 and 104 are formed simultaneously. The via conductor 100 connects the conductor layer 30 and the conductor layer 90. Via conductor 104 connects power via 62 and conductor layer 90.

[0024] As shown in Figure 2G, a resin insulating layer 110 is formed on the second resin insulating layer 80 and the conductor layer 90.

[0025] A conductor layer 120 is formed on the resin insulating layer 110. A via conductor 130 is formed simultaneously with the conductor layer 120. The via conductor 130 connects the conductor layer 90 and the conductor layer 120. A resin insulating layer 140 is formed on the resin insulating layer 110 and the conductor layer 120. The resin insulating layer 140 includes a reinforcing material 142. A conductor layer 150 is formed on the resin insulating layer 140. A via conductor 160 is formed simultaneously with the conductor layer 150. The via conductor 160 connects the conductor layer 120 and the conductor layer 150. A resin insulating layer 170 is formed on the resin insulating layer 140 and the conductor layer 150. The resin insulating layer 170 includes a reinforcing material 172. A conductor layer 180 is formed on the resin insulating layer 170. A via conductor 190 is formed simultaneously with the conductor layer 180. The via conductor 190 connects the conductor layer 150 and the conductor layer 180. A build-up layer 300 is formed on the first surface 20a of the first resin insulating layer 20. Of the resin insulating layers forming the build-up layer 300, two resin insulating layers contain reinforcing material and inorganic particles. Within the build-up layer 300, the resin insulating layers containing reinforcing material and inorganic particles are the resin insulating layer 170 furthest from the first resin insulating layer 20 and the resin insulating layer 140 in contact with that resin insulating layer 170. The resin insulating layer 140 in contact with the furthest resin insulating layer 170 is closer to the first resin insulating layer 20 than the furthest resin insulating layer 170.

[0026] As shown in Figure 2H, the support plate 4 and the metal layer 6 are removed. The second surface 20b of the first resin insulating layer 20 is exposed. The adhesive film 70 is exposed.

[0027] A first solder resist layer 200 is formed on the resin insulating layer 170 and the conductor layer 180. A second solder resist layer 220 is formed on the second surface 20b of the first resin insulating layer 20, the conductor layer 10, and the adhesive film 70. An opening 210 is formed in the first solder resist layer 200 to expose the conductor layer 180. As shown in Figure 2I, a plating layer 212 is formed on the conductor layer 180 exposed through the opening 210.

[0028] A laser beam is shone from the second surface 220b of the second solder resist layer 220. A first bump opening 222 and a second bump opening 224 are formed. The first bump opening 222 penetrates the second solder resist layer 220 and exposes the conductor layer 10. The first bump opening 222 penetrates only the second solder resist layer 220. The second bump opening 224 penetrates both the second solder resist layer 220 and the adhesive film 70 simultaneously and exposes the electrode 61 of the component 60. A first bump 230 is formed on the conductor layer 10 exposed from the first bump opening 222. At the same time, a second bump 240 is formed on the electrode 61 exposed from the second bump opening 224. The bumps 230 and 240 are formed by a seed layer, an electrolytic copper plating layer on the seed layer, and a tin plating layer on the electrolytic copper plating layer. The wiring board 2 of the embodiment is obtained.

[0029] When bumps 230 and 240 are formed, a conductor layer 1 is formed on the second surface 220b of the second solder resist layer 220. The first bump 230 is formed by a via conductor that fills the opening 222 for the first bump and a land on that via conductor. The second bump 240 is formed by a via conductor that fills the opening 224 for the second bump and a land on that via conductor. The lands that form bumps 230 and 240 are included in the conductor layer 1. The via conductors of bumps 230 and 240 and the lands of bumps 230 and 240 are formed in a single process. The tin plating layer is formed on the lands of bumps 230 and 240.

[0030] The manufacturing method of the wiring board 2 of this embodiment involves placing a component 60 within a first opening 50 of a first resin insulating layer 20. At that time, the component 60 is fixed to a member that closes the first opening 50 via an adhesive film 70. An example of the member is a metal layer 6. Simultaneously with the fixing of the component 60, the component 60 is surrounded by the first resin insulating layer 20. Therefore, the component fixed on the member is less likely to be subjected to unnecessary external forces. The embodiment can prevent the component from peeling off the adhesive film. The embodiment can prevent displacement and performance degradation of the component. The embodiment can provide a wiring board with stable performance.

[0031] [Examples of modifications to the manufacturing method of the wiring board 2 in the embodiment] Modified examples of the manufacturing method of the wiring board 2 of the embodiment are described below. The same wiring board 2 as in the embodiment can be obtained by the modified manufacturing method. Figures 3A to 3J show modified examples of the manufacturing method of the wiring board 2. Figures 3A to 3J are cross-sectional views. In Figures 3A to 3I, the top and bottom of the figures are reversed compared to Figures 1 and 3J. Figure 3A shows a support plate 4, a metal layer 6 formed on the support plate 4, and an alignment mark (first alignment mark) 8 formed on the metal layer 6. The metal layer 6 is, for example, copper foil. The metal layer 6 is formed on the support plate 4 in advance. A plating resist is formed on the metal layer 6. An alignment mark 8 is formed on the metal layer 6 exposed from the plating resist by electrolytic copper plating. In the modified example, it is preferable not to form any conductive circuits other than the alignment mark 8 on the metal layer 6. The metal layer 6 acts as a seed layer for forming the alignment mark 8. After that, the plating resist is removed.

[0032] A second solder resist layer 220 is formed on the metal layer 6 and the alignment mark 8. The second solder resist layer 220 has a first surface 220a and a second surface 220b opposite to the first surface 220a. The second surface 220b of the second solder resist layer 220 faces the metal layer 6. An opening 9a is formed in the second solder resist layer 220, penetrating it and exposing the alignment mark 8. The opening 9a penetrates only the second solder resist layer 220. The opening 9a is formed with respect to the alignment mark 8. The opening 9a is formed by laser light or photographic technology. A seed layer is formed on the first surface 220a of the second solder resist layer 220 and within the opening 9a. A plating resist is formed on the seed layer with respect to the alignment mark 8. A plating resist may also be formed on the seed layer with respect to the opening 9a. An electrolytic copper plating layer is formed on the seed layer exposed from the plating resist. The plating resist is removed. The seed layer exposed from the electrolytic copper plating layer is removed. As shown in Figure 3B, a conductor layer 10 is formed on the first surface 220a of the second solder resist layer 220. The conductor layer 10 includes a first opening conductor circuit 14. The conductor layer 10 may have alignment marks (second alignment marks). The position of each conductor circuit in the conductor layer 10 is related to the position of the first alignment mark 8. The first opening conductor circuit 14 and the second alignment mark are included in the conductor circuit in the conductor layer 10. The position of the first alignment mark 8 and the position of the second alignment mark are related. The position of the first alignment mark 8 and the position of the first opening conductor circuit 14 are related. The first opening conductor circuit 14 acts as a stopper for forming the first opening 50. The size of the first opening conductor circuit 14 is preferably larger than the size of the first opening 50. A conductor 9 that fills the opening 9a is formed simultaneously with the conductor layer 15. Conductor 9 connects alignment mark 8 and conductor layer 10.

[0033] A resin insulating layer 22 is formed on the conductor layer 10 and the first surface 220a of the second solder resist layer 220. A laser beam is shone onto the resin insulating layer 22. The laser beam is shone based on the position of the conductor circuit in the conductor layer 10. For example, the laser beam is shone based on the second alignment mark. The laser beam penetrates the resin insulating layer 22. An opening 42 for via conductors 40 is formed in the resin insulating layer 22, penetrating the resin insulating layer 22 and exposing the conductor layer 10. The position of the opening 42 for via conductors 40 is related to the position of the first alignment mark 8. A seed layer is formed on the resin insulating layer 22 and within the opening 42. A plating resist is formed on the seed layer based on the position of the conductor circuit in the conductor layer 10. For example, the plating resist is formed based on the second alignment mark. An electrolytic copper plating layer is formed on the seed layer exposed from the plating resist. The plating resist is removed. The seed layer exposed from the electrolytic copper plating layer is removed. The conductor layer 30 and the via conductors 40 are formed simultaneously. The conductor layer 30 may have a third alignment mark. The position of each conductor circuit within the conductor layer 30 is related to the position of the first alignment mark 8. The position of the third alignment mark is related to the position of the first alignment mark 8. The position of the via conductor 40 is related to the position of the first alignment mark 8. The via conductor 40 fills the opening 42. The via conductor 40 connects the conductor layer 10 and the conductor layer 30. A resin insulating layer 22 and a resin insulating layer 24 are formed on the conductor layer 30. As shown in Figure 3C, the first resin insulating layer 20 is formed on the first surface 220a of the second solder resist layer 220 and on the conductor layer 10. The first resin insulating layer 20 has a first surface 20a and a second surface 20b opposite to the first surface 20a. The second surface 20b of the first resin insulating layer 20 faces the first surface 220a of the second solder resist layer 220. The first resin insulating layer 20 is formed by resin insulating layers 22 and 24. Resin insulating layer 22 is the bottommost resin insulating layer, and resin insulating layer 24 is the topmost resin insulating layer. The resin insulating layers forming the first resin insulating layer 20 are the same in the manufacturing method of the embodiment and the manufacturing method of the modified example. The relationship of the thicknesses of each resin insulating layer forming the first resin insulating layer 20 is the same in the manufacturing method of the embodiment and the manufacturing method of the modified example. The conductor layer 30 is sandwiched between the bottommost resin insulating layer 22 and the topmost resin insulating layer 24.

[0034] A laser beam is shone from the first surface 20a of the first resin insulating layer 20. The laser beam is shone based on the position of the conductor circuit in the conductor layer 30. For example, the laser beam is shone based on the third alignment mark. The laser beam penetrates the first resin insulating layer 20. As shown in Figure 3D, a first opening 51 is formed that penetrates the first resin insulating layer 20 and leads to the first aperture conductor circuit 14. The laser beam penetrates all the resin insulating layers 22 and 24 belonging to the first resin insulating layer 20 and reaches the first aperture conductor circuit 14. The first aperture conductor circuit 14 is exposed from the first opening 51. The position of the first opening 51 is related to the position of the first alignment mark 8. The first aperture conductor circuit 14 prevents the laser beam from reaching the second solder resist layer 220.

[0035] The first opening conductor circuit 14 exposed from the first opening 51 is removed by etching. The planar shape of the first opening conductor circuit 14a after etching is frame-shaped. The frame-shaped first opening conductor circuit 14a is covered by the bottom resin insulating layer 22. As shown in Figure 3E, a first opening 50 is formed that simultaneously penetrates the first resin insulating layer 20 and the first opening conductor circuit 14a. The first surface 220a of the second solder resist layer 220 is exposed from the first opening 50. The second solder resist layer 220 closes the end of the first opening 50 on the second surface 20b side. The end face of the first opening 50 on the second surface 20b side is closed by the first surface 220a of the second solder resist layer 220. The second solder resist layer 220 is an example of a member for closing one end of the first opening 50.

[0036] As shown in Figure 3F, the component 60 is fixed via the adhesive film 70 onto the first surface 220a of the second solder resist layer 220, which is exposed through the first opening 50. For example, the component 60 is fixed onto the first surface 220a of the second solder resist layer 220 based on a third alignment mark. Alternatively, the component 60 is fixed onto the first surface 220a of the second solder resist layer 220 based on the position of the first opening 50. The position of the component 60 is related to the position of the first alignment mark 8. The adhesive film 70 is pre-attached to the component 60. The component 60 with the adhesive film 70 attached is fixed onto the first surface 220a exposed through the first opening 50. The component 60 is fixed within the first opening 50. As the component 60 is fixed, it is simultaneously surrounded by the first resin insulating layer 20. Similar to the manufacturing method of the embodiment, the component 60 is protected by the first resin insulating layer 20. Similar to the manufacturing method of the embodiment, the upper surface 601 of the part 60 is located below the first surface 20a of the first resin insulating layer 20. The upper surface 601 of the part 60 is not located above the first surface 20a of the first resin insulating layer 20. Preferably, the upper surface 601 of the part 60 is located above the second surface of the uppermost resin insulating layer 24. A gap 52 is formed between the part 60 and the inner wall surface of the first opening 50.

[0037] As shown in Figure 3G, a second resin insulating layer 80 is formed on the first surface 20a of the first resin insulating layer 20. The second resin insulating layer 80 has a first surface and a second surface opposite to the first surface. The second surface of the second resin insulating layer 80 and the first surface 20a of the first resin insulating layer 20 face each other. The second resin insulating layer 80 closes the end of the first opening 50 on the side of the first surface 20a. The end face of the first opening 50 on the side of the first surface 20a is closed by the second surface of the second resin insulating layer 80. The second resin insulating layer 80 fills the gap 52.

[0038] A laser beam (first laser beam) is irradiated from the first surface of the second resin insulating layer 80 based on the position of the conductor circuit within the conductor layer 30. For example, the first laser beam is irradiated based on a third alignment mark. The first laser beam penetrates both the second resin insulating layer 80 and the top resin insulating layer 24 simultaneously. A second opening 102 is formed that penetrates both the second resin insulating layer 80 and the top resin insulating layer 24 and reaches the conductor layer 30. The second opening 102 exposes the conductor layer 30 sandwiched between the bottom resin insulating layer 22 and the top resin insulating layer 24. Furthermore, a laser beam (second laser beam) is irradiated from the first surface of the second resin insulating layer 80 based on the position of the conductor circuit within the conductor layer 30. For example, the second laser beam is irradiated based on a third alignment mark. The second laser beam penetrates the second resin insulating layer 80. The second laser beam penetrates only the second resin insulating layer 80. The second laser beam does not penetrate the top resin insulating layer 24. An opening 106 is formed in the second resin insulating layer 80, penetrating the second resin insulating layer 80 and leading to the component 60. The opening 106 leads to the power via 62 of the component 60. The opening 106 exposes the power via 62. Similar to the manufacturing method of the embodiment, the second resin insulating layer 80 formed in the modified example has openings 102 and 106 for two types of via conductors. As shown in Figure 3H, the conductor layer 90 and via conductors 100 and 104 are formed simultaneously. For example, the conductor layer 90 and via conductors 100 and 104 are formed by a semi-additive method. Via conductor 100 fills the second opening 102. Via conductor 100 connects the conductor layer 30 and the conductor layer 90. Via conductor 104 fills the opening 106. Via conductor 104 connects the power via 62 and the conductor layer 90. The position of the opening 106 and the position of the component 60 are related to the position of the first alignment mark 8. Therefore, the embodiment can improve the reliability of the connection between the component 60 and the conductor layer 90 via the via conductor 104.

[0039] As shown in Figure 3I, a resin insulating layer 110 is formed on the second resin insulating layer 80 and the conductor layer 90.

[0040] A conductor layer 120 is formed on the resin insulating layer 110. A via conductor 130 is formed simultaneously with the conductor layer 120. The via conductor 130 connects the conductor layer 90 and the conductor layer 120. A resin insulating layer 140 is formed on the resin insulating layer 110 and the conductor layer 120. The resin insulating layer 140 includes a reinforcing material 142. A conductor layer 150 is formed on the resin insulating layer 140. A via conductor 160 is formed simultaneously with the conductor layer 150. The via conductor 160 connects the conductor layer 120 and the conductor layer 150. A resin insulating layer 170 is formed on the resin insulating layer 140 and the conductor layer 150. The resin insulating layer 170 includes a reinforcing material 172. A conductor layer 180 is formed on the resin insulating layer 170. A via conductor 190 is formed simultaneously with the conductor layer 180. The via conductor 190 connects the conductor layer 150 and the conductor layer 180. A build-up layer 300 is formed on the first surface 20a of the first resin insulating layer 20. Regarding the resin insulating layers 80, 110, 140, and 170 within the build-up layer 300, the manufacturing method of the embodiment and the manufacturing method of the modified example use similar methods and materials. For example, the conductor layers 120, 150, and 180 and the via conductors 130, 160, and 190 are formed by a semi-additive method. Regarding the manufacturing method from the formation of the resin insulating layer 22 to the formation of the build-up layer 300, the manufacturing method of the embodiment and the manufacturing method of the modified example are similar. For example, the manufacturing method of the embodiment can form alignment marks within the conductor layer 10. Then, the manufacturing method of the embodiment can form each conductor layer and each opening based on these alignment marks.

[0041] The support plate 4 and the metal layer 6 are removed. The second surface 220b of the second solder resist layer 220 is exposed. The alignment marks 8 are exposed. The first solder resist layer 200 is formed on the resin insulating layer 170 and the conductor layer 180. An opening 210 is formed in the first solder resist layer 200 to expose the conductor layer 180. For example, the opening 210 is formed by phototechnology. As shown in Figure 3J, a plating layer 212 is formed on the conductor layer 180 exposed through the opening 210. Examples of the plating layer 212 are nickel and gold.

[0042] A laser beam (third laser) is shone from the second surface 220b of the second solder resist layer 220. The third laser beam is shone based on the alignment mark 8. The third laser beam penetrates both the second solder resist layer 220 and the adhesive film 70 simultaneously. A second bump opening 224 is formed. The position of the second bump opening 224 is related to the position of the alignment mark 8. The second bump opening 224 penetrates both the second solder resist layer 220 and the adhesive film 70 to expose the electrodes 61 of the component 60. The position of the second bump opening 224 is related to the position of the component 60. Therefore, the position of the electrodes 61 of the component 60 and the position of the second bump opening 224 are aligned with high precision. Furthermore, a laser beam (fourth laser) is shone from the second surface 220b of the second solder resist layer 220. The fourth laser beam is shone based on the alignment mark 8. The fourth laser beam penetrates the second solder resist layer 220. The fourth laser beam penetrates only the second solder resist layer 220. A first bump opening 222 is formed. The position of the first bump opening 222 is related to the position of the alignment mark 8. The first bump opening 222 penetrates the second solder resist layer 220 and exposes the conductor layer 10. A first bump 230 is formed on the conductor layer 10 exposed from the first bump opening 222. At the same time, a second bump 240 is formed on the electrode 61 exposed from the second bump opening 224. The bumps 230 and 240 in the modified example are the same as the bumps 230 and 240 in the embodiment. At this time, the alignment mark 8 has already been formed. The conductor layer 1 and the alignment mark 8 are not formed at the same time. The conductor layer 1 and the alignment mark 8 are formed separately. The position of the second bump opening 224 and the position of the component 60 are related to the position of the first alignment mark 8. Therefore, the wiring board 2 manufactured in the modified embodiment can achieve high connection reliability between the second bump 240 and the electrode 61 of component 60. The wiring board 2 manufactured in the modified embodiment can achieve high connection reliability between the first electronic component E1 and component 60 via the second bump 240. The wiring board 2 manufactured in the modified embodiment can achieve high connection reliability between the second electronic component E2 and component 60 via the second bump 240.The first and second bumps 230 and 240 are formed by a seed layer, an electrolytic copper plating layer on the seed layer, and a tin plating layer on the electrolytic copper plating layer. A wiring board 2 manufactured according to a modified embodiment is obtained. However, the alignment marks 8 and conductors 9 are not shown in Figure 1.

[0043] Conductor layer 1 and alignment mark 8 are not formed simultaneously. They are formed separately. Alignment mark 8 is embedded within the second solder resist layer 220. Conductor layer 1, including the bumps 230 and 240, is not embedded within the second solder resist layer 220. Conductor layer 1 protrudes from the second solder resist layer 220.

[0044] The second solder resist layer 220 has openings 222, 224, and 9a that penetrate the second solder resist layer 220. Opening 222 is an opening for the first bump, and opening 224 is an opening for the second bump. The lengths of each opening 222, 224, and 9a are different. The length of opening 224 is longer than the length of opening 222. The length of opening 222 is longer than the length of opening 9a. The length of opening 222 is the distance between the first surface 220a and the second surface 220b. The length of opening 224 is the distance between the second surface 220b and the electrode 61 of component 60. The length of opening 9a is the distance between the alignment mark 8 and the first surface 220a. Thus, the second solder resist layer 220 has three types of openings 222, 224, and 9a, and the lengths of the three types of openings 222, 224, and 9a are different from each other.

[0045] In the modified manufacturing method, the component 60 is placed within the first opening 50 of the first resin insulating layer 20. Simultaneously with the fixing of the component 60, the component 60 is surrounded by the first resin insulating layer 20. Therefore, the component 60 fixed on the second solder resist layer 220 is less susceptible to unnecessary external forces. The modified method can prevent the component 60 from peeling off the adhesive film 70. The modified method can prevent misalignment and performance degradation of the component 60. The modified method can provide a wiring board 2 with stable performance.

[0046] The thickness of the resin insulating layer containing the reinforcing material is greater than the distance between the first surface 20a and the second surface 20b of the first resin insulating layer 20 (the thickness of the first resin insulating layer 20) (Relationship 1). An example of a resin insulating layer containing reinforcing material is a resin insulating layer in contact with the first solder resist layer 200. For example, resin insulating layer 170 and resin insulating layer 140 contain reinforcing material. The thickness of the first resin insulating layer 20 may also be the distance between the conductor layer 10 in contact with the second surface 20b and the first surface 20a. The thickness of the resin insulating layer containing reinforcing material is represented by the distance between the conductor layers sandwiching the resin insulating layer containing reinforcing material. If there are multiple resin insulating layers containing reinforcing material, one layer satisfies Relationship 1. Alternatively, two layers satisfy Relationship 1. Alternatively, all layers satisfy Relationship 1. [Explanation of symbols]

[0047] 2: Wiring board 4: Support plate 6: Metal layer 8: Alignment Marks 9: Conductor 10: Conductor layer 14: Conductor circuit for the first opening 20: First resin insulating layer 20a: Page 1 20b: 2nd side 22: Bottommost resin insulating layer 24: The finest resin insulating layer 30: Conductor layer 40: Via conductor 42:Aperture 50: First opening 51: First opening 52: Gap 60: Parts 61: Electrode 62: Power Via 66: Transmission wiring 70: Adhesive film 80: Second resin insulating layer 90: Conductor layer 100: Via conductor 102: Second opening 104: Via conductor 106:Aperture 110: Resin insulating layer 120: Conductor layer 130: Via conductor 140: Resin insulating layer 142: Reinforcement material 150: Conductor layer 160: Via conductor 170: Resin insulating layer 172: Reinforcement material 180: Conductor layer 190: Via conductor 200: First solder resist layer 210:Aperture 212: Plating layer 220: Second solder resist layer 222: Opening for the first bump 224: Opening for the second bump 230: First Bump 240: Second Bump 300: Build-up layer 601: Top surface of the component E1: First Electronic Component E2: 2nd electronic component

Claims

1. Prepare a support plate, A member for closing one end of the first opening for housing components is formed on the support plate, A first resin insulating layer having a first surface and a second surface opposite to the first surface is formed on the member such that the second surface and the member face each other. To form the first opening that penetrates the first resin insulating layer and reaches the member, A method for manufacturing a wiring board, comprising fixing the component to the member exposed from the first opening via an adhesive film.

2. A method for manufacturing a wiring board according to claim 1, wherein the member is a second solder resist layer having a first surface and a second surface opposite to the first surface, the second surface of the second solder resist layer facing the support plate, and the second solder resist layer being located between the support plate and the first resin insulating layer.

3. A method for manufacturing a wiring board according to claim 1, wherein the first resin insulating layer comprises a plurality of resin insulating layers, one of the plurality of resin insulating layers is the uppermost resin insulating layer, and the uppermost resin insulating layer is the furthest from the support plate among the plurality of resin insulating layers.

4. A method for manufacturing a wiring board according to claim 3, further comprising forming a second opening for via conductors in the uppermost resin insulating layer, wherein the formation of the second opening is performed after the fixing.

5. A method for manufacturing a wiring board according to claim 4, further comprising forming a second resin insulating layer on the uppermost resin insulating layer to close the other end of the first opening, wherein forming the second opening includes simultaneously penetrating the uppermost resin insulating layer and the second resin insulating layer.

6. A method for manufacturing a wiring board according to claim 1, further comprising: removing the support plate; removing the member; forming a second solder resist layer on the second surface of the first resin insulating layer after removing the member; and forming bumps that penetrate the second solder resist layer and the adhesive film.

7. A method for manufacturing a wiring board according to claim 2, further comprising removing the support plate and, after removing the support plate, forming bumps that penetrate the second solder resist layer and the adhesive film.

8. A method for manufacturing a wiring board according to claim 2, further comprising forming alignment marks on the support plate before forming the second solder resist layer.

9. A method for manufacturing a wiring board according to claim 2, further comprising forming a conductor layer on the first surface of the second solder resist layer, wherein the conductor layer includes a first opening conductor circuit, and forming the first opening includes forming a first opening leading to the first opening conductor circuit and removing the first opening conductor circuit exposed by the first opening.

10. A method for manufacturing a wiring board according to claim 8, further comprising forming a conductor layer on the first surface of the second solder resist layer and forming a conductor that penetrates the second solder resist layer and connects the conductor layer and the alignment marks.

11. A method for manufacturing a wiring board according to claim 1, further comprising forming a metal layer on the support plate, wherein the metal layer also serves as the component.

12. A method for manufacturing a wiring board according to claim 4, wherein one of the plurality of resin insulating layers is the bottommost resin insulating layer, the bottommost resin insulating layer is the closest of the plurality of resin insulating layers to the support plate, and via conductors penetrating the bottommost resin insulating layer are already formed before the first opening is formed.

13. A method for manufacturing a wiring board according to claim 3, wherein the first resin insulating layer further includes a bottom resin insulating layer, the thickness of which the bottom resin insulating layer is greater than the thickness of which the top resin insulating layer is greater.

14. A method for manufacturing a wiring board according to claim 1, wherein the upper surface of the component is located below the first surface of the first resin insulating layer.

15. A method for manufacturing a wiring board according to claim 3, wherein the uppermost resin insulating layer has a first surface and a second surface opposite to the first surface, and the upper surface of the component is located between the first surface and the second surface of the uppermost resin insulating layer.

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