Wiring board and method for manufacturing a wiring board

Abstract

Improved quality of wiring boards. [Solution] The method for manufacturing the wiring board 100 of the embodiment includes forming a first conductor layer 11 having a conductor pad 1a and a wiring pattern 1b on a first insulating layer 21; providing a coating film 5 to cover the first conductor layer 11; removing the coating film 5 covering the conductor pad 1a to expose the surface of the conductor pad 1a; roughening the exposed conductor pad 1a; forming a second insulating layer 22 on the first insulating layer 21 to cover the coating film 5 and the conductor pad 1a; forming a second conductor layer 21 on the second insulating layer 22; and forming a connecting conductor 4 that penetrates the second insulating layer 22 and connects the conductor pad 1a and the second conductor layer 21.

Description

【Technical Field】 【0001】 The present invention relates to a wiring board and a method for manufacturing the wiring board. 【Background Art】 【0002】 Patent Document 1 discloses that with respect to a printed wiring board, a chemical conversion film is formed on the surface of a metal wiring layer having low roughening or no roughening, and an insulating resin layer is formed on the metal wiring layer through this chemical conversion film. 【Prior Art Documents】 【Patent Documents】 【0003】 【Patent Document 1】 Japanese Patent Application Laid-Open No. 2022-119418 【Summary of the Invention】 【Problems to be Solved by the Invention】 【0004】 In the method disclosed in Patent Document 1, a resist is applied to a metal wiring portion that is not desired to be roughened, and then a roughening treatment is performed. Therefore, in a subsequent process, the resist may adhere too strongly to the interlayer material and be difficult to peel off. 【Means for Solving the Problems】 【0005】 The method for manufacturing a wiring board according to the present invention includes forming a first conductor layer having conductor pads and wiring patterns on a first insulating layer, providing a coating film covering the first conductor layer, removing the coating film covering the conductor pads to expose surfaces of the conductor pads other than the surfaces facing the first insulating layer, performing a roughening treatment on the exposed conductor pads, forming a second insulating layer covering the coating film and the conductor pads on the first insulating layer, forming a second conductor layer on the second insulating layer, and forming a connection conductor that penetrates the second insulating layer and connects the conductor pads and the second conductor layer. 【0006】 The wiring board of the present invention comprises a first insulating layer, a first conductor layer formed on the surface of the first insulating layer, a second insulating layer formed on the first insulating layer and the first conductor layer, a second conductor layer formed on the second insulating layer, a connecting conductor that penetrates the second insulating layer and connects the first conductor layer and the second conductor layer, and a coating film formed on the surface of the first conductor layer to improve the adhesion between the first conductor layer and the second insulating layer. The first conductor layer includes a conductor pad in contact with the connecting conductor and a wiring pattern, the first insulating layer has a recess around the conductor pad, the surface of the conductor pad facing the second insulating layer has a surface roughness higher than the surface roughness of the wiring pattern, and the coating film does not cover the conductor pad but covers the wiring pattern. 【0007】 According to embodiments of the present invention, a wiring board having good adhesion between the conductor layer and the insulating layer can be easily manufactured. [Brief explanation of the drawing] 【0008】 [Figure 1] A cross-sectional view showing an example of a wiring board according to one embodiment of the present invention. [Figure 2] A plan view showing an example of a conductor pattern of the first conductor layer in one embodiment of the present invention. [Figure 3] Enlarged view of part III in Figure 1. [Figure 4] Enlarged view of section IV in Figure 3. [Figure 5] A cross-sectional view showing another example of a wiring board according to one embodiment of the present invention. [Figure 6A] A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Figure 6B] A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Figure 6C] A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Figure 6D] A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Figure 6E]A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Figure 6F] A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Figure 6G] A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Figure 6H] A cross-sectional view showing an example of the manufacturing process for a wiring board according to one embodiment of the present invention. [Modes for carrying out the invention] 【0009】 A wiring board according to one embodiment of the present invention will be described with reference to the drawings. Figure 1 is a cross-sectional view showing a wiring board 100, which is an example of a wiring board according to one embodiment, and Figure 2 is a plan view showing an example of a conductor pattern of a part of the first conductor layer 11 of the wiring board 100. Figure 1 shows a cross-sectional view along the cutting line that overlaps with line II in Figure 2. Note that the wiring board 100 is merely an example of a wiring board according to this embodiment. The laminated structure of the wiring board of the embodiment, and the number of conductor layers and insulating layers, respectively, are not limited to the laminated structure of the wiring board 100 in Figure 1, and the number of conductor layers and insulating layers, respectively, included in the wiring board 100. 【0010】 As shown in Figure 1, the wiring board 100 includes a core substrate 3 and insulating layers and conductive layers alternately laminated on each of the two main surfaces (first surface 3a and second surface 3b) of the core substrate 3 that are opposite each other in the thickness direction. The core substrate 3 includes an insulating layer 32 and conductive layers 31 formed on each of the two surfaces of the insulating layer 32. The insulating layer 32 has through-hole conductors 33 that penetrate the insulating layer 32 and connect the conductive layers 31 on both sides thereof. The inside of the through-hole conductors 33 is filled with a filler 34 made of an insulating resin such as epoxy resin or a conductive resin. 【0011】 In the description of the embodiments, the side farther from the insulating layer 32 in the thickness direction of the wiring substrate 100 is also referred to as the "upper side" or "above", or simply "up", and the side closer to the insulating layer 32 is also referred to as the "lower side" or "below", or simply "down". Further, in each conductor layer and each insulating layer, the surface facing away from the insulating layer 32 is also referred to as the "upper surface", and the surface facing the insulating layer 32 side is also referred to as the "lower surface". Also, the surface facing the direction orthogonal to the thickness direction of the wiring substrate 100 is also referred to as the "side surface". 【0012】 The wiring substrate 100 includes a first insulating layer 21, a first conductor layer 11, a second insulating layer 22, and a second conductor layer 12 on the first surface 3a of the core substrate 3. The first conductor layer 11 is formed on the surface 21a of the first insulating layer 21, and the second insulating layer 22 is formed on the first insulating layer 21 and the first conductor layer 11. And the second conductor layer 12 is formed on the second insulating layer 22. The first insulating layer 21 covers the first surface 3a of the core substrate 3, and the second insulating layer 22 covers the first conductor layer 11 and the first insulating layer 21 that is exposed without being covered by the first conductor layer 11. The wiring substrate 100 further includes two insulating layers 23 and two conductor layers 13 that are alternately stacked on the second surface 3b of the core substrate 3. 【0013】 The wiring substrate 100 further includes connection conductors 4 that penetrate each insulating layer and connect adjacent conductor layers to each other through each insulating layer. The connection conductors 4 are included in the first insulating layer 21, the second insulating layer 22, and the two insulating layers 23 respectively. 【0014】 The connection conductors 4 are so-called via conductors formed in each insulating layer that is sequentially built up. The connection conductor 4 included in the first insulating layer 21 connects the conductor layer 31 and the first conductor layer 11. The connection conductor 4 included in the second insulating layer 22 connects the first conductor layer 11 and the second conductor layer 12. The connection conductors 4 included in each of the two insulating layers 23 connect the conductor layer 31 and the conductor layer 13 or connect the conductor layers 13 to each other. 【0015】 The first and second insulating layers 21, 22, insulating layer 23, and insulating layer 32 are formed of an arbitrary insulating resin. Examples of the insulating resin include epoxy resin, bismaleimide triazine resin (BT resin), or phenolic resin. In the example of FIG. 1, the insulating layer 32 includes a core material (reinforcing material) 32a formed of glass fiber, aramid fiber, or the like. Although not shown in FIG. 1, each insulating layer other than the insulating layer 32 may also include a core material made of glass fiber or the like. Each insulating layer may further include an inorganic filler (not shown) made of fine particles such as silica (SiO2), alumina, or mullite. 【0016】 The first and second conductor layers 11, 12, conductor layer 13, and conductor layer 31, as well as the connection conductor 4 and the through-hole conductor 33, are formed using an arbitrary metal such as copper or nickel. In the example of FIG. 1, the conductor layer 31 includes a metal foil 31a, a metal film 31b, and a plating film 31c. The through-hole conductor 33 is integrally formed with the conductor layer 31 and is composed of the metal film 31b and the plating film 31c. 【0017】 On the other hand, the first and second conductor layers 11, 12, and conductor layer 13, as well as the connection conductor 4, are each composed of a metal film 10b and a plating film 10c. Each connection conductor 4 is integrally formed with the first conductor layer 11, the second conductor layer 12, or the conductor layer 13. The plating films 31c, 10c are, for example, electrolytic plating films. The metal films 31b and 10b are, for example, electroless plating films or sputtering films, and each functions as a power supply layer when the plating films 31c and 10c are formed by electrolytic plating. 【0018】 A solder resist 6 is formed on the second insulating layer 22 and the second conductor layer 12. A solder resist 6 is also formed on the insulating layer 23 and the conductor layer 13 on the surface layer on the second surface 3b side of the core substrate 3. The solder resist 6 is provided with an opening 6a for exposing a part of the second conductor layer 12 or the conductor layer 13. The solder resist 6 is formed of, for example, a photosensitive epoxy resin or a polyimide resin. 【0019】 The first conductor layer 11, the second conductor layer 12, the two conductor layers 13, and the two conductor layers 31 each contain a predetermined conductor pattern. The first conductor layer 11 includes a conductor pad 1a and a wiring pattern 1b. 【0020】 The conductor pad 1a is in contact with the connecting conductor 4 that penetrates the second insulating layer 22. In other words, the conductor pad 1a is a conductor pad on which the connecting conductor 4 is formed, and is a so-called receiving pad for the connecting conductor 4 that penetrates the second insulating layer 22. Therefore, a portion of the surface of the conductor pad 1a on the second insulating layer 22 side is covered by the connecting conductor 4 that penetrates the second insulating layer 22. In other words, a portion of the surface of the conductor pad 1a on the second insulating layer 22 side faces the bottom surface of the connecting conductor 4 that penetrates the second insulating layer 22. In the example in Figure 1, the connecting conductor 4 that penetrates the first insulating layer 21 and the connecting conductor 4 that penetrates the second insulating layer 22 are formed to be stacked on top of each other, forming a so-called stacked via conductor. The conductor pad 1a is provided as a so-called via pad for the connecting conductor 4 (via conductor) that penetrates the first insulating layer 21. 【0021】 The wiring pattern 1b is a conductor pattern that functions as a conductive path used for transmitting arbitrary electrical signals or supplying power. The wiring pattern 1b is covered by the second insulating layer 22 on all surfaces except the surface facing the first insulating layer 21. The wiring pattern 1b may connect, for example, a predetermined source and destination of an electrical signal, either alone or in conjunction with other conductor patterns, or it may connect a predetermined power source and destination of power. The wiring pattern 1b may also be a transmission path for high-frequency signals, such as those exceeding several GHz. 【0022】 As shown in Figure 2, the two wiring patterns 1b in the example in Figure 1 connect two conductor pads 1d within the first conductor layer 11. In the example in Figure 2, the regions 1aa and 1da enclosed by dashed lines on the conductor pads 1a and 1d represent the areas on the surface of each conductor pad 1a and 1d that are covered by the connecting conductor 4 that penetrates the second insulating layer 22. 【0023】 In the examples shown in Figures 1 and 2, the first conductor layer 11 further includes a conductor pattern 1c. The conductor pattern 1c is a conductor pattern having a flat shape that extends into areas where conductor pads 1a and wiring patterns 1b are not formed. The conductor pattern 1c may also be a so-called solid pattern that substantially fills the areas in the first conductor layer 11 where conductors other than the conductor pattern 1c, such as wiring and connection pads, are not formed. The conductor pattern 1c is used, for example, as a ground plane or power plane to which the ground potential or the potential of a specific power supply is applied. 【0024】 Although omitted in Figure 1, as shown in Figure 2, the wiring board 100 further includes a coating film 5 that covers the first conductor layer 11. In the example in Figure 2, the coating film 5 covers all of the conductor patterns of the first conductor layer 11 except for the conductor pads 1a and 1d, which have regions 1aa and 1da, respectively, that are covered by the connecting conductor 4. 【0025】 Figure 3 shows an enlarged view of part III of Figure 1, and Figure 4 shows a further enlarged view of part IV of Figure 3. The coating film 5 will be described in detail with reference to Figures 3 and 4. As shown in Figures 3 and 4, the coating film 5 is formed on the surface of the first conductor layer 11. The surface of the first conductor layer 11 facing the second insulating layer 22 is covered with the coating film 5. Note that "the surface of the first conductor layer 11 facing the second insulating layer 22" means the region of the surface of the first conductor layer 11 that faces the second insulating layer 22. Similarly, "the surface facing the second insulating layer 22" as described later for the conductor pad 1a, wiring pattern 1b, and conductor pattern 1c means the region of the surface of the conductor pad 1a, wiring pattern 1b, and conductor pattern 1c that faces the second insulating layer 22. 【0026】 In the example shown in Figure 3, the coating film 5 covers almost the entire surface of the first conductor layer 11 that faces the second insulating layer 22, excluding the conductor pad 1a. 【0027】 The coating film 5 improves the adhesion between the first conductor layer 11 and the second insulating layer 22. The coating film 5 is formed from a material that can bond with both organic materials such as resins that constitute the second insulating layer 22 and inorganic materials such as metals that constitute the first conductor layer 11. The coating film 5 is formed from a material that includes both reactive groups that can chemically bond with organic materials and reactive groups that can chemically bond with inorganic materials. As a result, each conductor pattern of the first conductor layer 11 covered by the coating film 5 adheres to the second insulating layer 22 with sufficient strength. Examples of materials for the coating film 5 include silane coupling agents containing azole silane compounds such as triazole compounds. The material for the coating film 5 is not limited to silane coupling agents, as long as it can increase the adhesion strength between the first conductor layer 11 and the second insulating layer 22 compared to the case where the second insulating layer 22 is directly formed on the first conductor layer 11. 【0028】 As shown in Figure 3, in this embodiment, the surface 1b1 of the first conductor layer 11 facing the second insulating layer 22 in the wiring pattern 1b is covered with a coating film 5. That is, the adhesion between the wiring pattern 1b and the second insulating layer 22 is improved compared to when there is no coating film 5. Therefore, it is considered that lifting or peeling of the second insulating layer 22 from the wiring pattern 1b is less likely to occur. 【0029】 In the example shown in Figure 3, the surface 1c1 of the flat conductor pattern 1c facing the second insulating layer 22 is also covered with the coating film 5. That is, the adhesion between the conductor pattern 1c and the second insulating layer 22 is improved compared to when the coating film 5 is not present. Therefore, it is considered that lifting or peeling of the second insulating layer 22 from the conductor pattern 1c is less likely to occur. 【0030】 On the other hand, the conductor pad 1a having a region (connection region) 1aa covered by the connecting conductor 4 on its surface 1a1 (a surface other than the surface facing the first insulating layer 21) is not covered by the coating film 5. That is, the coating film 5 does not cover the conductor pad 1a and is spaced apart from the conductor pad 1a. Therefore, without the use of an organic material such as a silane coupling agent, the metal constituting the conductor pad 1a and the metal constituting the connecting conductor 4 are in direct contact at the interface between the conductor pad 1a and the connecting conductor 4. Consequently, it is considered that a mechanically strong and electrically low-resistance joint is obtained at the interface between the conductor pad 1a and the connecting conductor 4. 【0031】 The surface 21a of the first insulating layer 21 is in direct contact with the second insulating layer 22. That is, a portion of the second insulating layer 22 is interposed between the coating film 5 and the conductor pad 1a. The length of the portion of the second insulating layer 22 interposed between the coating film 5 and the conductor pad 1a, i.e., the distance G between the conductor pad 1a and the coating film 5 in a plan view, is exemplified by being between 5 μm and 20 μm. If a distance of this length is ensured, the intrusion of various liquids during the manufacturing process, which can reach from the through hole 4a to the coating film 5 as described later, is prevented with a high probability, and moreover, this distance is not considered to significantly hinder the miniaturization of the wiring board 100. Note that "plan view" means viewing the wiring board 100 along a line of sight along its thickness direction. 【0032】 As shown in Figure 3, the first insulating layer 21 has a recessed region 21b on the surface surrounding the conductor pad 1a. It is believed that the resin and other materials constituting the second insulating layer 22 fill into the recessed region 21b, thereby increasing the adhesion between the first insulating layer 21 and the second insulating layer 22, and making it less likely for the second insulating layer 22 to lift or peel off. 【0033】 The connecting conductor 4 is formed on the connection region 1aa of the surface 1a1 of the conductor pad 1a and is spaced apart from the coating film 5. On the other hand, the surface 1ab of the conductor pad 1a facing the second insulating layer 22 is in direct contact with the second insulating layer 22. Therefore, the second insulating layer 22 is also interposed between the coating film 5 and the connecting conductor 4. Note that "the surface 1ab of the conductor pad 1a facing the second insulating layer 22" is the region of the surface 1a1 of the conductor pad 1a other than the connection region 1aa covered by the connecting conductor 4 (non-connected region). 【0034】 Although omitted in Figure 1, which was referenced earlier, as shown in Figure 3, each conductor pattern of the first conductor layer 11 (conductor pad 1a, wiring pattern 1b, and conductor pattern 1c, etc.) has irregularities of varying degrees on the surface that is not in contact with the first insulating layer 21. In other words, the first conductor layer 11 has multiple regions with different surface roughness on the surface that is not in contact with the first insulating layer 21. In the example in Figure 3, the recesses of the irregularities on surface 1b1 and surface 1c1 are filled with the coating film 5. On the other hand, the recesses of the irregularities on surface 1ab of the conductor pad 1a that face the second insulating layer 22 are filled with the second insulating layer 22. 【0035】 In the first conductor layer 11 shown in Figure 3, the difference in height of the irregularities in the area of ​​the surface 1a1 of the conductor pad 1a that is not covered by the connecting conductor 4 is greater than the difference in height of the irregularities on the surface 1b1 of the wiring pattern 1b. That is, the surface 1ab of the conductor pad 1a facing the second insulating layer 22 has a higher surface roughness (first surface roughness) than the surface roughness (second surface roughness) of the surface 1b1 of the wiring pattern 1b that is covered by the coating film 5. The surface 1ab of the conductor pad 1a facing the second insulating layer 22 is roughened to have a first surface roughness higher than the second surface roughness. As will be described later, the surface 1ab of the conductor pad 1a is roughened by, for example, a surface oxidation treatment called blackening or browning treatment, or a micro-etching treatment using an acidic solvent. 【0036】 On the other hand, the surface 1b1 of the wiring pattern 1b does not have to be roughened by a process actively provided for the purpose of roughening the surface 1a1. The irregularities on the surface 1b1 may be caused by grain boundaries of the plating film 10c or by irregularities on the surface of the plating resist during the formation of the plating film 10c. 【0037】 In the wiring board 100 of this embodiment, the surface 1ab of the conductor pad 1a facing the second insulating layer 22 is roughened to have a relatively high surface roughness (first surface roughness). Therefore, delamination between the conductor pad 1a and the second insulating layer 22 may be suppressed. Specifically, unintended intrusion of liquid into the interface between the conductor pad 1a and the second insulating layer 22 is prevented by the irregularities of the surface 1ab of the conductor pad 1a, which has a relatively high first surface roughness. As a result, delamination between the conductor pad 1a and the second insulating layer 22 that could be caused by such liquid intrusion may be suppressed. 【0038】 More specifically, during the manufacturing process of the wiring board 100, the inner walls of the through-holes 4a provided in the second insulating layer 22 for forming the connecting conductors 4 may be exposed to various processing solutions and plating solutions. These liquids may then penetrate from the inner walls of the through-holes 4a to the interface between the conductor pad 1a and the second insulating layer 22, potentially causing delamination between the conductor pad 1a and the second insulating layer 22. However, in this embodiment, such unintended liquid intrusion that could cause delamination is prevented by the uneven surface 1ab of the conductor pad 1a, which has a relatively high first surface roughness. 【0039】 On the other hand, the surface 1b1 of the wiring pattern 1b has a lower surface roughness (second surface roughness) than the first surface roughness of the surface of the conductor pad 1a. For example, in wiring patterns with highly roughened surfaces, the effective impedance may increase due to the skin effect during high-frequency signal transmission, leading to a decrease in transmission characteristics. Also, in fine wiring patterns of approximately 10 μm / 10 μm (wiring width / wiring spacing) or less, if the surface is highly roughened, the desired shape may not be obtained after roughening relative to the design wiring width and thickness. However, in this embodiment, the surface 1b1 of the wiring pattern 1b has a relatively low surface roughness, at least a second surface roughness lower than the first surface roughness, so it is considered that problems such as a decrease in high-frequency transmission characteristics caused by high surface roughness are less likely to occur. 【0040】 The surface 1b1 of the wiring pattern 1b is covered with a coating film 5 that improves the adhesion between the wiring pattern 1b and the second insulating layer 22. Generally, a so-called anchoring effect cannot be sufficiently obtained between a conductor layer having a relatively low surface roughness and an insulating layer formed on that surface, and as a result, delamination between the conductor layer and the insulating layer may occur. However, since the surface 1b1 of the wiring pattern 1b in this embodiment is covered with a coating film 5, it is considered that delamination between the wiring pattern 1b and the second insulating layer 22 is unlikely to occur. 【0041】 Furthermore, in this embodiment, it is considered that quality deterioration due to the dissolution of the coating film 5 covering the first conductor layer 11 is less likely to occur. As mentioned above, in the manufacturing process of the wiring board 100, the inner walls of the through holes 4a provided in the second insulating layer 22 may be exposed to various liquids. When such liquids penetrate the interface between the first conductor layer 11 and the second insulating layer 22, the penetrated liquid may dissolve the coating film 5 formed on the surface of the first conductor layer 11. In that case, the coating film 5 may dissolve into the through holes 4a, causing poor connection between the connecting conductor 4 and the conductor pad 1a, or delamination of the first conductor layer 11 and the second insulating layer 22 may occur at the location where the coating film 5 has dissolved. 【0042】 However, in this embodiment, the conductor pad 1a is not covered by the coating film 5, and furthermore, the coating film 5 and the conductor pad 1a are spaced apart. That is, the through hole 4a formed inside the connecting conductor 4 and the coating film 5 are spaced apart. Therefore, in the manufacturing process of the wiring board 100, even if various liquids penetrate the interface between the conductor pad 1a and the second insulating layer 22 from the inner wall of the through hole 4a, the liquid is unlikely to reach the coating film 5. Consequently, the coating film 5 is unlikely to dissolve. That is, the first conductor layer 11 and the second insulating layer 22 are unlikely to peel off. Also, even if the coating film 5 were to dissolve, the dissolving liquid is unlikely to dissolve into the through hole 4a. Consequently, connection failures between the connecting conductor 4 and the conductor pad 1a are unlikely to occur. Thus, in this embodiment, dissolution of the coating film 5 is unlikely to occur, and it is considered that problems such as interface peeling and connection failures caused by such dissolution are prevented. 【0043】 As described above, the wiring board 100 provides good transmission characteristics and sufficient adhesion with the second insulating layer 22 in the wiring pattern 1b. Moreover, it is possible to suppress quality deterioration due to peeling between the first conductor layer 11, which includes the conductor pad 1a that contacts the connecting conductor 4, and the second insulating layer 22. Thus, according to this embodiment, it is possible to ensure the desired characteristics of the wiring pattern and adhesion between the wiring pattern and the insulating layer, and to suppress quality deterioration of the wiring board due to peeling between the conductor layer in contact with the connecting conductor that connects the conductor layers and the insulating layer. 【0044】 To achieve both good high-frequency transmission characteristics in the wiring pattern 1b and reliable prevention of liquid ingress into the interface between the conductor pad 1a and the second insulating layer 22, it is preferable that the difference between the first surface roughness of the conductor pad 1a and the second surface roughness of the wiring pattern 1b be large. For example, the first surface roughness of the surface 1ab of the conductor pad 1a is 100% or more higher than the second surface roughness of the surface 1b1 of the wiring pattern 1b. In this case, it is considered that good transmission characteristics for high-frequency signals on the order of several GHz can be obtained in the wiring pattern 1b while reliably preventing liquid ingress into the interface between the conductor pad 1a and the second insulating layer 22. 【0045】 The first surface roughness may be 200% or more and 1200% or less of the second surface roughness. In this case, the roughening process of the conductor pad 1a does not require excessive time, and damage to the first insulating layer 21 and other components during the roughening process is considered to be minimal. The first surface roughness of the surface 1ab of the conductor pad 1a is, for example, an arithmetic mean roughness (Ra) of 0.3 μm or more and 0.6 μm or less. The second surface roughness of the surface 1b1 of the wiring pattern 1b is, for example, an arithmetic mean roughness (Ra) of 0.05 μm or more and 0.15 μm or less. That is, the arithmetic mean roughness (Ra) of the surface 1ab of the conductor pad 1a is at least twice the arithmetic mean roughness (Ra) of the surface 1b1 of the wiring pattern 1b. 【0046】 In the example shown in Figure 3, the surface 1c1 of the flat conductor pattern 1c has a lower surface roughness than the first surface roughness of the surface 1ab of the conductor pad 1a. Surface 1c1 does not necessarily have to be roughened by a process actively provided for the roughening of surface 1a1. In the example shown in Figure 3, the surface 1c1 of the conductor pattern 1c has approximately the same surface roughness (second surface roughness) as the surface 1b1 of the wiring pattern 1b. Surface 1c1 of the conductor pattern 1c may have a second surface roughness. It is thought that good high-frequency transmission characteristics can be obtained even with the conductor pattern 1c. On the other hand, it is presumed that the anchoring effect obtained on the surface 1c1 of the conductor pattern 1c is small, but as mentioned above, the surface 1c1 of the conductor pattern 1c is covered with a coating film 5. It is thought that interfacial delamination between the conductor pattern 1c and the second insulating layer 22, whose adhesion is enhanced by the coating film 5, is unlikely to occur. 【0047】 In the wiring board 100, as shown in Figure 4, the region 1aa of the surface 1a1 of the conductor pad 1a that is covered by the connecting conductor 4 (connection region) has a lower surface roughness (third surface roughness) than the first surface roughness of the surface 1ab facing the second insulating layer. The third surface roughness is higher than the second surface roughness of the surface 1b1 of the wiring pattern 1b shown in Figure 3. The connection region 1aa is not in contact with a resin such as the second insulating layer 22, nor is it the "surface of the transmission line" where current concentration occurs due to the skin effect. Therefore, neither large irregularities nor flatness are particularly required in the connection region 1aa. Accordingly, as shown in Figures 3 and 4, the connection region 1aa of the surface 1a1 of the conductor pad 1a can have any surface roughness (third surface roughness) between the first surface roughness and the second surface roughness. 【0048】 Figure 5 shows another example of the wiring board of this embodiment. Figure 5 is an enlarged view of the portion corresponding to part III of Figure 1 in another example of the wiring board of this embodiment. Components in Figure 5 that are the same as those shown in the example in Figure 1 are either denoted by the same reference numerals as those used in Figure 3, which is an enlarged view of part III of Figure 1, or are omitted as appropriate, and their further explanation is omitted. 【0049】 In the example shown in Figure 5, the surface 1c1 of the conductor pattern 1c is not covered by the coating film 5. That is, the surface 1c1 of the conductor pattern 1c and the second insulating layer 22 are in direct contact without the coating film 5 in between. However, the surface 1c1 of the conductor pattern 1c has a higher surface roughness (second surface roughness) than the surface 1b1 of the wiring pattern 1b. The surface 1c1 of the conductor pattern 1c has approximately the same surface roughness (first surface roughness) as the surface 1ab of the conductor pad 1a that faces the second insulating layer 22. Thus, the surface 1c1 of the conductor pattern 1c may also have a first surface roughness. For example, if a high-frequency signal is not transmitted in the conductor pattern 1c, the high surface roughness of the surface 1c1 is not considered to be a particular problem. Since a sufficient anchoring effect is obtained between the conductor pattern 1c and the second insulating layer 22, interfacial delamination is considered unlikely to occur. 【0050】 In the examples shown in Figures 4 and 5, similar to Figure 3, the first insulating layer 21 has a recessed region 21b on the surface surrounding the conductor pad 1a. It is believed that the resin or other material constituting the second insulating layer 22 fills into the recessed region 21b, thereby increasing the adhesion between the first insulating layer 21 and the second insulating layer 22, making it less likely for the second insulating layer 22 to lift or peel off. 【0051】 Next, a method for manufacturing a wiring board according to one embodiment will be described using the wiring board 100 in Figure 1 as an example, with reference to Figures 6A to 6H. 【0052】 As shown in Figure 6A, a starting substrate (e.g., a double-sided copper-clad laminate) is prepared, which includes an insulating layer that will become the insulating layer 32 of the core substrate 3, and metal foils 31a laminated on both surfaces of the insulating layer. The conductor layer 31 and through-hole conductors 33 of the core substrate 3 are then formed. For example, through holes are formed at the formation locations of the through-hole conductors 33 by drilling or irradiation with carbon dioxide laser light. A metal film 31b is formed inside the through holes and on the metal foils 31a by electroless plating or sputtering. A plating film 31c is formed on the metal film 31b by electrolytic plating, and the through-hole conductors 33 are formed inside the through holes. The inside of the through-hole conductors 33 is filled with a filler 34 by filling with an insulating resin such as epoxy resin or a conductive resin. Then, a cover plating (not shown) is formed on the filler 34 and the plating film 31b by electroless plating and electrolytic plating. As a result, a 5-layer conductor layer 31 and a 2-layer through-hole conductor 33 are formed. Subsequently, a core substrate 3 having a predetermined conductor pattern is obtained by patterning the conductor layer 31 using a subtractive method. 【0053】 Then, the first insulating layer 21 and the insulating layer 23 are formed on the first surface 3a and the second surface 3b of the core substrate 3, respectively. In the formation of the first insulating layer 21 and the insulating layer 23, for example, a film-like epoxy resin is laminated on the core substrate 3 and heated and pressurized. As a result, the first insulating layer 21 and the insulating layer 23 are formed. The first insulating layer 21 and the insulating layer 23 are not limited to a film-like epoxy resin, but can be formed from any resin such as BT resin or phenolic resin. Through holes 4a for forming connecting conductors 4 are formed in the first insulating layer 21 and the insulating layer 23, for example by irradiation with carbon dioxide laser light. 【0054】 The manufacturing method of the wiring board of this embodiment includes forming a first conductor layer 11 having a conductor pad 1a and a wiring pattern 1b on a first insulating layer 21, as shown in Figure 6A. In the example of Figure 6A, the first conductor layer 11 is formed including a conductor pattern 1c in addition to the conductor pad 1a and wiring pattern 1b. A conductor layer 13 is formed on the second surface 3b side of the core substrate 3. Connecting conductors 4 are formed on the first insulating layer 21 and the insulating layer 23, respectively. 【0055】 The first conductor layer 11, the conductor layer 13, and the connecting conductor 4 are formed, for example, using a semi-additive method. That is, a metal film 10b is formed inside the through hole 4a and on the surfaces of the first insulating layer 21 and the insulating layer 23, for example, by electroless plating or sputtering. A plating resist (not shown) is provided on the metal film 10b, having openings corresponding to the conductor pad 1a, the wiring pattern 1b, and the conductor pattern 1c, or openings corresponding to the conductor pattern to be included in the conductor layer 13. Then, a plating film 10c is formed in the openings of the plating resist by electroplating using the metal film 10b as a power supply layer. As a result, the first conductor layer 11 and the conductor layer 13, each consisting of the metal film 10b and the plating film 10c, are formed. A connecting conductor 4, consisting of the metal film 10b and the plating film 10c, is formed inside the through hole 4a. Subsequently, the plating resist is removed using an alkaline stripping agent such as sodium hydroxide, and further, any exposed portions of the metal film 10b that are not covered by the plating film 10c are removed by etching or the like. 【0056】 The manufacturing method of the wiring board of this embodiment, as shown in Figures 6B, 6C, and 6D, includes providing a coating film 5 to cover the first conductor layer 11, removing the coating film 5 that covers the area of ​​the surface of the conductor pad 1a that is not in contact with the first insulating layer 21 to expose that area, and roughening the surface of the exposed conductor pad 1a. 【0057】 Figures 6B, 6C, and 6D are enlarged views of the conductor pad 1a in section VIB of Figure 6A. Figure 6B shows the formation of a coating film 5 on the first conductor layer 11 having the conductor pad 1a, wiring pattern 1b, and conductor pattern 1c. The coating film 5 improves the adhesion between the first conductor layer 11 and the second insulating layer 22 (see Figure 6E) formed in a later process. The coating film 5 is formed from a material that includes both reactive groups that can chemically bond with organic materials and reactive groups that can chemically bond with inorganic materials. Examples of materials for the coating film 5 include silane coupling agents containing azole silane compounds such as triazole compounds. The material for the coating film 5 should be such that it can increase the adhesion strength between the first conductor layer 11 and the second insulating layer 22 compared to the case where the second insulating layer 22 is directly formed on the first conductor layer 11. Furthermore, it is preferable that the coating film 5 has resistance to roughening treatment and is not limited to silane coupling agents. The coating film 5 is formed by immersing the first conductive layer 11 in a liquid containing the above-mentioned material, or by spraying such a liquid. However, the method of forming the coating film 5 is arbitrary and is not limited to immersion in the material constituting the coating film 5 or spraying the material. 【0058】 Figure 6C shows the removal of the coating film 5 covering the area of ​​the conductor pad 1a that is not in contact with the first insulating layer 21, exposing the surface 1a1. For example, laser ablation can be used to remove the coating film 5. Along with the removal of the coating film 5, a recessed area 21b is formed in the first insulating layer 21 around the conductor pad 1a. Since the resin that constitutes the second insulating layer 22 (see Figure 6F) enters into the recessed area 21b, the adhesion between the first insulating layer 21 and the second insulating layer 22 can be easily improved. On the other hand, the coating film 5 on the wiring pattern 1b and conductor pattern 1c is not removed. Therefore, the adhesion between the wiring pattern 1b and conductor pattern 1c and the second insulating layer 22 can be improved. 【0059】 Figure 6D shows that the surface 1a1 of the conductor pad 1a is subjected to a roughening treatment. In the manufacturing method of the wiring board of this embodiment, the wiring pattern 1b and the conductor pattern 1c are covered with a coating film 5, which prevents roughening of the wiring pattern 1b and the conductor pattern 1c. Therefore, the wiring pattern 1b and the conductor pattern 1c are not roughened. That is, preferably, in the step of Figure 6B, a coating film 5 that is resistant to roughening treatment is formed. 【0060】 The roughening of the exposed surface of the conductor pad 1a can be performed by any method. For example, the surface 1a1 of the conductor pad 1a can be roughened by a surface oxidation treatment called blackening or browning, or by a micro-etching treatment using an acidic solvent. On the other hand, the wiring pattern 1b and the conductor pattern 1c are covered with the coating film 5 and are therefore not affected by the roughening treatment. 【0061】 The surface 1a1 of the conductor pad 1a is roughened to have a surface roughness (first surface roughness) that is at least higher than the surface roughness (second surface roughness) of the unroughened surface 1b1 of the wiring pattern 1b. For example, the surface 1a1 of the conductor pad 1a is roughened to have an arithmetic mean roughness (Ra) of 0.3 μm or more and 0.6 μm or less. 【0062】 As shown in Figures 6E and 6F, the manufacturing method of the wiring board of this embodiment further includes forming a second insulating layer 22 that covers the coating film 5 and the conductor pad 1a. Figure 6F shows an enlarged view of the VIF portion in Figure 6E. By forming the second insulating layer 22, the entire surface 1a1 of the conductor pad 1a (the surface other than the surface facing the first insulating layer 21) is covered by the second insulating layer 22. The second insulating layer 22 is formed so as to cover the area of ​​the surface 21a of the first insulating layer 21 that is not covered by the first conductor layer 11. An insulating layer 23 is further formed on the second surface 3b side of the core substrate 3. The second insulating layer 22 and the insulating layer 23 are formed in the same way as the first insulating layer 21, for example, by lamination of film-like epoxy resin, and by heating and pressurizing. As shown in Figure 6C, during the laser ablation treatment to remove the coating film 5 from the conductor pad 1a, a recessed area 21b is formed in the first insulating layer 21 around the conductor pad 1a. It is believed that the resin and other materials constituting the second insulating layer 22 fill the recessed area 21b, thereby increasing the adhesion between the first insulating layer 21 and the second insulating layer 22, and making it less likely for the second insulating layer 22 to lift or peel off. 【0063】 Through-holes 4a for forming the connecting conductor 4 (see Figure 6G) in a later process are formed in the second insulating layer 22 and the insulating layer 23, for example by irradiation with carbon dioxide laser light. The through-holes 4a are formed on a portion of the conductor pad 1a (connecting region 1aa) in the second insulating layer 22. Since the conductor pad 1a is not covered by the coating film 5, the through-holes 4a that partially expose the conductor pad 1a are formed spaced apart from the coating film 5. The formation of the through-holes 4a exposes the connecting region 1aa, which is a portion of the surface 1a1 of the conductor pad 1a. The connecting region 1aa is the portion of the surface 1a1 that will be connected to the connecting conductor 4 in a later process. The area of ​​the surface 1a1 other than the connecting region 1aa (the surface facing the second insulating layer 22) 1ab remains covered by the second insulating layer 22. 【0064】 If, for example, the surface of the conductor pad 1a that is irradiated with laser light during the formation of the through hole 4a is covered with a coating film 5, the coating film 5 may dissolve due to the irradiation of the laser light and penetrate into the interface between the conductor pad 1a and the second insulating layer 22. This dissolving liquid may then cause delamination of the interface. However, in the manufacturing method of the wiring board of this embodiment, as described above, the coating film 5 is removed in advance so that the entire conductor pad 1a is exposed, so the surface 1a1 of the conductor pad 1a is not covered with the coating film 5. Therefore, the dissolution of the coating film 5 is prevented, and penetration of the dissolving liquid of the coating film 5 into the interface between the conductor pad 1a and the second insulating layer 22 is also not possible. 【0065】 After the formation of the through-hole 4a, a desmear treatment is preferably performed to remove the resin residue (smear) generated by the formation of the through-hole 4a. For example, the smear inside the through-hole 4a is removed by exposing the inner wall of the through-hole 4a to a treatment solution such as an alkaline permanganate solution. The penetration of the treatment solution for this desmear treatment into the interface between the conductor pad 1a and the second insulating layer 22 is prevented by the roughened surface 1a1 of the conductor pad 1a, particularly the surface 1ab facing the second insulating layer 22. This is thought to prevent defects such as delamination at the interface between the conductor pad 1a and the second insulating layer 22. 【0066】 Preferably, a soft etching process is performed before the formation of the second conductor layer 12 and the connecting conductor 4 (see Figure 6G) in a subsequent process. The soft etching process removes oxide films and other material from the surfaces on which the second conductor layer 12 and the connecting conductor 4 are formed (the exposed portion of the surface 1a1 of the conductor pad 1a and the surface of the second insulating layer 22). Furthermore, as shown in Figure 6F, the soft etching process reduces the surface roughness of the connecting region 1aa exposed within the through-hole 4a on the surface 1a1 of the conductor pad 1a to a lower surface roughness (third surface roughness) than the first surface roughness of the surface 1ab facing the second insulating layer 22. 【0067】 As shown in Figures 6G and 6H, the manufacturing method of the wiring board of this embodiment further includes forming a second conductor layer 12 on the second insulating layer 22 and forming a connecting conductor 4 that penetrates the second insulating layer 22 and connects the conductor pad 1a and the second conductor layer 12. Figure 6H shows an enlarged view of the VIH portion of Figure 6G. The connecting conductor 4 is formed in the through hole 4a. Therefore, the connecting conductor 4 is formed to be spaced apart from the coating film 5. Furthermore, a conductor layer 13 and a connecting conductor 4 are formed on the second surface 3b side of the core substrate 3. 【0068】 The connecting conductor 4 penetrating the second conductor layer 12 and the second insulating layer 22 is formed, for example, by the same method as the method for forming the connecting conductor 4 penetrating the first conductor layer 11 and the first insulating layer 21 described above. For example, the connecting conductor 4 penetrating the second conductor layer 12 and the second insulating layer 22, as well as the conductor layer 13 and connecting conductor 4 further formed on the second surface 3b side of the core substrate 3, are formed by a semi-additive method. 【0069】 In the example shown in Figure 6G, where the wiring board 100 is manufactured, a solder resist 6 is formed. The solder resist 6 is provided with an opening 6a that exposes a portion of the second conductor layer 12 or the conductor layer 13. The solder resist 6 and the opening 6a are formed by forming a resin layer containing, for example, a photosensitive epoxy resin or polyimide resin, and then exposure and development using a mask having an appropriate opening pattern. 【0070】 In the formation of the connecting conductor 4 to the second insulating layer 22 by the semi-additive method, as shown in Figure 6H, a metal film 10b is formed in the through hole 4a, for example by electroless plating, and then a plating film 10c is formed by electrolytic plating. In the manufacturing method of the wiring board of this embodiment, the penetration of the plating solution into the interface between the conductor pad 1a and the second insulating layer 22 during the formation of the metal film 10b is prevented by the roughened surface irregularities of the conductor pad 1a. It is believed that defects such as delamination at the interface between the conductor pad 1a and the second insulating layer 22 due to the penetration of the plating solution are prevented. 【0071】 By going through the above steps, the wiring board 100 shown in the example in Figure 1 is completed. A surface protective film (not shown) may be formed on the surface of a portion of the second conductor layer 12 or conductor layer 13 that is exposed within the opening 6a of the solder resist 6 by electroless plating, solder leveling, or spray coating. 【0072】 Furthermore, when the wiring board shown in the example of Figure 5 is manufactured, in the process illustrated in Figure 6C, the coating film 5 covering the conductor pattern 1c is removed together with the coating film 5 covering the conductor pad 1a, and in the process illustrated in Figure 6D, the exposed surface of the first conductor layer 11 is roughened. As a result, the surface 1c1 of the conductor pattern 1c is roughened to have approximately the same surface roughness as the surface 1a1 of the conductor pad 1a. 【0073】 As described above, in this embodiment, when roughening the metal wiring portion, it is not necessary to apply resist treatment to the parts that do not want to be roughened. Therefore, it is possible to prevent an increase in process costs due to resist treatment, as well as problems such as the resist adhering too closely to the interlayer material and being difficult to peel off, and problems such as the peeling or collapse of extremely fine resist patterns. 【0074】 The wiring boards of the embodiments are not limited to those having the structures illustrated in each drawing, or the structures, shapes, and materials illustrated herein. As stated above, the wiring boards of the embodiments may have any laminated structure. For example, the wiring boards of the embodiments may be coreless boards that do not include a core board. The wiring boards of the embodiments may include any number of conductor layers and insulating layers. The first conductor layer 11 may be located at any level on the laminated structure of the wiring board. The first conductor layer 11 does not have to include a plating film 10c made of an electroplating film, and may include only a metal film 10b made of an electroless plating film, for example. Also, some or all of the multiple conductor layers included in the wiring board may include conductor pads 1a, wiring patterns 1b, and conductor patterns 1c, such as those included in the first conductor layer 11. Also, the conductor pads 1a do not have to be via pads for connecting conductors that penetrate the insulating layer below the first conductor layer 11 (the first insulating layer 21 in the wiring board 100). 【0075】 The method for manufacturing the wiring board of the embodiment is not limited to the method described with reference to the drawings. For example, the first and second conductor layers 11 and 12 may be formed by a fully additive method. Also, the first and second insulating layers 21 and 22 may be formed using any form of resin, not limited to a film-like resin. Furthermore, connecting conductors may not be formed in insulating layers other than the second insulating layer 22. In addition to the steps described above, any additional steps may be added to the method for manufacturing the wiring board of the embodiment, and some of the steps described above may be omitted. [Explanation of Symbols] 【0076】 100 Wiring boards 11. First Conductor Layer 1a Conductor pad 1a1 surface 1aa connection area 1ab Surface facing the second insulating layer 1b Wiring Pattern 1b1 surface 1c Flat conductor pattern 1c1 surface 12. Second Conductor Layer 21 First insulating layer 21a surface 21b Recessed area 22 Second insulating layer 4. Connecting conductors (via conductors) 4a through hole 5 Coating film G: Spacing between the conductor pad and the coating film

Claims

[Claim 1] A first conductor layer having conductor pads and wiring patterns is formed on the first insulating layer, A coating film is provided to cover the first conductor layer, The coating film covering the conductor pad is removed, exposing the surface of the conductor pad other than the surface facing the first insulating layer, The exposed conductor pad is subjected to a roughening treatment, A second insulating layer is formed on the first insulating layer to cover the coating film and the conductor pad, Forming a second conductor layer on the second insulating layer, To form a connecting conductor that penetrates the second insulating layer and connects the conductor pad and the second conductor layer, A method for manufacturing a wiring board, which includes the following: [Claim 2] A method for manufacturing a wiring board according to claim 1, wherein exposing the conductor pad includes removing the coating film by ablation treatment with laser light. [Claim 3] The first insulating layer and A first conductor layer formed on the surface of the first insulating layer, A second insulating layer formed on the first insulating layer and the first conductor layer, A second conductor layer formed on the second insulating layer, A connecting conductor that penetrates the second insulating layer and connects the first conductor layer and the second conductor layer, A coating film formed on the surface of the first conductor layer to improve the adhesion between the first conductor layer and the second insulating layer, A wiring board comprising, The first conductor layer includes a conductor pad in contact with the connecting conductor and a wiring pattern, The first insulating layer has a recess around the conductor pad, The surface of the conductor pad facing the second insulating layer has a surface roughness higher than that of the surface of the wiring pattern. The coating film does not cover the conductor pad, but it covers the wiring pattern. [Claim 4] The wiring board according to claim 3, wherein a portion of the second insulating layer is embedded in the recess. [Claim 5] A wiring board according to claim 3, The first conductor layer further includes a flat conductor pattern that extends into areas where the conductor pads and wiring patterns are not formed. The surface of the flat conductor pattern facing the second insulating layer is covered with the coating film. [Claim 6] A wiring board according to claim 3, The first conductor layer further includes a flat conductor pattern that extends into areas where the conductor pads and wiring patterns are not formed. The surface of the flat conductor pattern facing the second insulating layer is not covered by the coating film.

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