Wafer processing method
By measuring resistivity and setting tailored processing conditions, the method stabilizes the division of semiconductor wafers into individual chips, addressing uneven impurity distribution issues and ensuring consistent quality.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- DISCO CORP
- Filing Date
- 2024-12-27
- Publication Date
- 2026-07-09
AI Technical Summary
The uneven distribution of impurities during ingot manufacturing leads to varying physical properties in semiconductor wafers, resulting in unstable processing quality when dividing them into individual device chips.
A semiconductor wafer processing method that involves measuring resistivity in multiple regions, creating mapping data, and setting processing conditions tailored to these resistivity variations, followed by laser or cutting processes based on these conditions to stabilize the processing quality.
The method ensures consistent processing quality by applying laser or cutting conditions suitable for each region's resistivity, stabilizing the division of semiconductor wafers into individual chips despite variations in physical properties.
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Figure 2026115370000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a method for processing a semiconductor wafer that divides the semiconductor wafer into individual chips.
Background Art
[0002] A semiconductor wafer on which a plurality of devices such as ICs, LSIs, power devices, and LEDs are formed on the surface is divided into individual device chips by a dicing device or a laser processing device and used in electrical equipment such as mobile phones, personal computers, and automotive electrical components.
[0003] Semiconductor wafers use raw materials such as Si, SiC, GaAs, GaP, and InP depending on the type of device.
[0004] In addition, in order to impart semiconductor functions, impurities (dopants) such as B, P, As, In, N, and Al are doped into the above raw materials to produce an ingot, and the ingot is sliced to produce a wafer (see, for example, Patent Document 1).
Prior Art Documents
Patent Documents
[0005]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0006] However, when manufacturing an ingot, if impurities are doped unevenly, the wafers produced by slicing the ingot will have different physical properties due to the influence of the unevenly distributed impurities. Therefore, there is a problem that the processing quality is not stable when dividing the wafers into individual device chips.
[0007] Such problems can occur not only within the plane of a single wafer, but also with each wafer sliced from the ingot.
[0008] The present invention has been made in view of the above facts, and its main technical problem is to provide a semiconductor wafer processing method that can stabilize processing quality by performing laser processing under laser processing conditions that are suitable for variations in resistivity, even when the physical properties of the semiconductor wafer differ due to variations in resistivity. [Means for solving the problem]
[0009] To solve the main technical problems mentioned above, the present invention provides a semiconductor wafer processing method for dividing a semiconductor wafer into individual chips, comprising: a mapping data creation step of measuring the resistivity of multiple regions and creating mapping data; a processing condition setting step of setting processing conditions corresponding to the resistivity; and a processing step of processing the wafer based on the processing conditions.
[0010] Preferably, a device region is formed on the surface of a semiconductor wafer, demarcated by division lines, and the mapping data is created corresponding to these division lines. In the processing step, division is preferably performed along these division lines. Furthermore, the semiconductor wafer is a SiC wafer, and differences in resistivity occur due to differences in impurity doping concentration. In the mapping data creation step, it is preferable to measure the resistivity of multiple regions to create the mapping data. Moreover, in the processing step, the semiconductor wafer is held on a chuck table having a holding surface defined by X and Y coordinates, and in the mapping data creation step, it is preferable that these multiple regions are identified by X and Y coordinates. [Effects of the Invention]
[0011] The semiconductor wafer processing method of the present invention is a semiconductor wafer processing method for dividing a semiconductor wafer into individual chips, and comprises a mapping data creation step of measuring the resistivity of multiple regions and creating mapping data, a processing condition setting step of setting processing conditions corresponding to the resistivity, and a processing step of processing the wafer based on the processing conditions. As a result, it becomes possible to process the semiconductor wafer with laser processing conditions that are suitable for the physical characteristics based on resistivity, and the processing quality can be stabilized by performing laser processing with laser processing conditions suitable for each region. [Brief explanation of the drawing]
[0012] [Figure 1] (a) Perspective view of a semiconductor wafer, (b) Perspective view showing the semiconductor wafer shown in (a) inverted. [Figure 2] A side view showing the measurement of the resistivity of a semiconductor wafer during the mapping data creation process. [Figure 3] A plan view showing the coordinate locations where resistivity was measured on a semiconductor wafer. [Figure 4] A conceptual diagram of the mapping data created through the mapping data creation process. [Figure 5] A perspective view showing how the processing steps are carried out by laser processing. [Figure 6] A perspective view showing how the machining process is carried out by cutting. [Modes for carrying out the invention]
[0013] Hereinafter, embodiments relating to a semiconductor wafer processing method constructed according to the present invention will be described in detail with reference to the attached drawings.
[0014] Figure 1(a) shows an example of a semiconductor wafer 10 processed by the semiconductor wafer processing method of this embodiment. The illustrated semiconductor wafer 10 is, for example, a silicon carbide (SiC) wafer with a diameter of 300 mm and a thickness of 700 μm, and multiple devices 12 are formed on the surface 10a, demarcated by division lines 14. The illustrated semiconductor wafer 10 has a surface 10a and a back surface 10b, and has a device region 16 near the center where the devices 12 to be used as a product are demarcated by division lines. In addition, notches 18 indicating the crystal orientation are formed on the outer edge of the semiconductor wafer.
[0015] As shown in Figure 1(a), the positions of the device 12 and the division lines 14 formed on the semiconductor wafer 10 are defined by the X and Y coordinates, which are defined by the X axis and the Y axis perpendicular to the X axis. The device 12 is formed in a region partitioned in a grid pattern by the division lines 14 formed along the X and Y axes. As shown in Figure 1(b), even when the semiconductor wafer 10 is inverted with the Y axis as the axis of rotation, the X and Y coordinates are maintained, and the X and Y coordinates that define the positions of the device 12 and the division lines 14 do not change.
[0016] The semiconductor wafer 10 processed by the wafer processing method of this embodiment has the configuration described above and is processed by the semiconductor wafer processing method described below.
[0017] (Mapping data creation process) When implementing the processing method of the semiconductor wafer of the present embodiment, first, a mapping data creation step of measuring the resistivity (mΩ·cm) of a plurality of regions of the semiconductor wafer 10 and creating mapping data is performed. The mapping data defines the regions of the semiconductor wafer 10 by the above-described X coordinates and Y coordinates, measures the resistivity corresponding to each region, and records the resistivity for each coordinate of each region. The resistivity in each region can be measured by a well-known method. For example, a resistivity measurement device 20 (only a part is shown) by the eddy current method as shown in FIG. 2 can be used. In the illustrated resistivity measurement device 20, a probe 24 made of a magnetic material is positioned on the measurement location of the semiconductor wafer 10 held by the chuck table 22, a high frequency is applied to the probe 24 to generate a magnetic flux 26, and an eddy current is generated in the measurement location of the semiconductor wafer 10 by the magnetic flux 26. Due to this eddy current, power consumption (loss) occurs at the measurement location of the semiconductor wafer 10, the current in the circuit that generates the high frequency in the probe 24 decreases, and based on the value of this decreased current, the resistivity (mΩ·cm) of the measurement location is measured.
[0018] In the present embodiment, as shown in FIG. 3, the resistivity of the measurement locations (x1, y0) to (x4, y5) set at 32 locations at equal intervals in the semiconductor wafer 10 is measured, and as shown in FIG. 4, based on the coordinates and resistivity of each measurement location, mapping data M is created. The measurement locations set in the present embodiment are set corresponding to the division planned lines 14 in the device region 16 where the devices 12 of the semiconductor wafer 10 described above are formed, but the present invention is not limited to this. The above resistivity may be measured in more regions or fewer regions than 32, or the resistivity may be measured at points other than the division planned lines 14. However, since the object of processing in the processing step described later is the division planned line 14 of the semiconductor wafer 10, in order to appropriately perform the processing based on the measured resistivity, it is preferable to set the measurement locations corresponding to the division planned line 14 and measure the resistivity in the regions corresponding to the division planned line 14.
[0019] As described above, the ingot for producing the semiconductor wafer 10 is composed of SiC as a raw material doped with impurities such as B, P, As, In, N, Al, etc., and the ingot is sliced to form the semiconductor wafer 10. At this time, in the ingot, if the impurities are not uniformly dispersed and there is a concentration distribution, the resistivity described above changes depending on the region. According to the mapping data M shown in FIG. 4, in the semiconductor wafer 10 of the present embodiment, in the region S1 where the impurities are distributed at the assumed concentration, the resistivity is measured to be 22 to 24 mΩ·cm. On the other hand, in the region S2 surrounded by the broken line, the impurities are not distributed at the assumed concentration, and the resistivity is measured to be 18 to 19 mΩ·cm. Due to such a difference in resistivity, the physical properties in the processing steps are different between the region S1 and the region S2. In the following description, Example 1 in which laser processing is performed along the planned division line 14 of the semiconductor wafer 10 in the processing step to perform ablation processing, and Example 2 in which cutting processing is performed with a cutting blade along the planned division line 14 of the semiconductor wafer 10 in the processing step will be described.
[0020] (Example 1) Example 1 is to convey the above-described semiconductor wafer 10 to the laser processing apparatus 30 (only a part is shown) shown in FIG. 5, irradiate a laser beam along the planned division line 14 of the semiconductor wafer 10 to form a division groove, and divide the semiconductor wafer 10 into individual device chips. A processing condition setting step is performed to set the following processing conditions based on the mapping data M created by the above-described mapping data creation step.
[0021] (Processing condition setting step) The processing condition setting step sets laser processing conditions corresponding to the resistivity of the mapping data M created in the mapping data creation step described above. The control means (not shown) that operates the laser processing apparatus 30 has set and stored laser processing conditions 1 corresponding to the resistivity of region S1 set in accordance with the mapping data M described above, and laser processing conditions 2 corresponding to the resistivity of region S2. These laser processing conditions 1 and 2 can be set in advance by performing laser processing on experimental semiconductor wafers with different resistivity.
[0022] <Laser processing conditions 1> Laser processing condition 1 corresponding to region S1 (resistivity 22-24 mΩ·cm) is, for example, as follows: Wavelength 1064nm Repetition frequency: 10MHz Machining feed rate: 100 mm / second Average output 1.0W
[0023] <Laser processing conditions 2> The laser processing conditions 2 corresponding to region S2 (resistivity 18-19 mΩ·cm) are, for example, as follows: Wavelength 1064nm Repetition frequency: 10MHz Machining feed rate: 85 mm / second Average output 1.0W
[0024] (Processing process) As described above, once the processing conditions are set in the processing condition setting step to correspond to regions S1 and S2 with different resistivity, a processing step is performed in which laser processing is applied to the semiconductor wafer 10 based on the processing conditions.
[0025] When transporting the semiconductor wafer 10 to the laser processing apparatus 30 as described above, as shown in Figure 5, an annular frame F with an opening Fa capable of accommodating the semiconductor wafer 10 is prepared, the surface 10a of the semiconductor wafer 10 is positioned facing upwards in the center of the opening Fa, and the semiconductor wafer 10 and the frame F are attached together with adhesive tape T to form a single unit. The semiconductor wafer 10, thus integrated with the frame F, is then transported to the laser processing apparatus 30.
[0026] The laser processing apparatus 30 includes a holding means (not shown) and a laser beam irradiation means 32 for irradiating a semiconductor wafer 10 held by the holding means with a laser beam LB. The holding means includes an X-axis feeding means for feeding the holding means and the laser beam irradiation means 32 relatively in the X-axis direction, a Y-axis feeding means for feeding the holding means and the laser beam irradiation means 32 relatively in the Y-axis direction perpendicular to the X-axis direction, and a rotational drive means for rotating the holding means (all of which are not shown). The holding means is configured to include a chuck table having a holding surface defined by X and Y coordinates.
[0027] The semiconductor wafer 10, transported to the laser processing apparatus 30 to perform the processing step, is placed on the chuck table of the holding means and held by suction. The semiconductor wafer 10 held on the chuck table is imaged by an imaging means (not shown) provided in the laser processing apparatus 30, and alignment is performed to detect the position (X coordinate, Y coordinate) of the division line 14 formed on the surface 10a, and the semiconductor wafer 10 is rotated by the rotation drive means to align the division line 14 in a predetermined direction with the X axis direction. The detected information on the position of the division line 14 is stored in a control means (not shown). Here, the X and Y coordinates of the semiconductor wafer 10, whose resistivity has been measured for each region as described above, are converted into X and Y coordinates that define the holding surface of the chuck table, and it becomes possible to identify the above regions S1 and S2 by the X and Y coordinates that define the holding surface of the chuck table.
[0028] Based on the position information detected by the alignment described above, the focuser 34 of the laser beam irradiation means 32 is positioned at the processing start position of the division line 14 in a predetermined direction, the focal point of the laser beam LB is positioned on the surface 10a of the semiconductor wafer 10 and irradiated, and the semiconductor wafer 10 is processed and fed in the X-axis direction together with the chuck table to perform ablation processing along the predetermined division line 14 of the semiconductor wafer 10 to form a division groove 100. Once the division groove 100 is formed along the predetermined division line 14, the semiconductor wafer 10 is indexed and fed in the Y-axis direction by the interval of the division line 14 to position the adjacent unprocessed division line 14 directly below the focuser 34 in the Y-axis direction. Then, in the same manner as described above, the focal point of the laser beam LB is positioned on the division line 14 of the semiconductor wafer 10 and irradiated, and the semiconductor wafer 10 is processed and fed in the X-axis direction to form a division groove 100. Similarly, the semiconductor wafer 10 is processed and fed in the X-axis and Y-axis directions to form division grooves 100 along all division lines 14 along the X-axis direction. Next, the semiconductor wafer 10 is rotated 90 degrees to align the unprocessed division lines 14 perpendicular to the division lines 14 on which division grooves 100 have already been formed, with the X-axis direction. Then, the focal point of the laser beam LB is positioned and irradiated onto each of the remaining division lines 14 in the same manner as described above to form division grooves 100 along all division lines 14 formed on the surface 10a of the semiconductor wafer 10.
[0029] Here, as described above, a region S1 with high resistivity and a region S2 with relatively low resistivity are identified by X and Y coordinates based on the mapping data M, and since region S1 and region S2 are distinguished by the X and Y coordinates that define the holding surface of the chuck table, when laser processing region S1, laser processing is performed according to laser processing condition 1 set in the control means by the processing condition setting step described above. Similarly, when laser processing region S2, laser processing is performed according to laser processing condition 2 described above. In this embodiment, as described above, in the region S2 with low resistivity, the processing feed rate is set to be slower than the processing feed rate when processing region S1, so that the processing quality of the ablation process remains constant despite the fact that the physical properties differ in regions S1 and S2, which have different resistivity.
[0030] In addition, while the processing quality was kept constant between laser processing condition 1 and laser processing condition 2 as described above by changing the processing feed rate, the present invention is not limited to this, and other parameters may be set differently so that the processing quality is constant in region S1 and region S2. For example, the processing feed rate may be kept constant when processing region S1 and region S2, and the average output of the laser beam LB irradiated in region S1 and region S2 may be different. More specifically, the average output when laser processing region S1 may be set to be lower than the average output when laser processing region S2.
[0031] According to the processing condition setting step and processing step of the above-described embodiment 1, it becomes possible to process semiconductor wafers with laser processing conditions that are suitable for the physical characteristics based on resistivity. Even if there are regions with different physical characteristics within the plane of the semiconductor wafer 10, laser processing can be performed with laser processing conditions suitable for each region, thereby stabilizing the processing quality.
[0032] (Example 2) In Example 2, the semiconductor wafer 10 described above is transported to the cutting apparatus 40 (only a portion is shown) shown in Figure 6, and a cutting blade is used to form division grooves along the planned division line 14 of the semiconductor wafer 10, thereby dividing the semiconductor wafer 10 into individual device chips. Based on the mapping data M created in the mapping data creation process described above, the following processing condition setting process is performed.
[0033] (Processing condition setting process) The processing condition setting step sets cutting conditions corresponding to the resistivity of the mapping data M created in the mapping data creation step described above. The control means (not shown) that operates the cutting device 40 has cutting conditions 1 corresponding to region S1 and cutting conditions 2 corresponding to region S2 set and stored in it, corresponding to the mapping data M described above. Such cutting conditions 1 and 2 can be set by performing cutting on experimental semiconductor wafers with different resistivity in advance.
[0034] <Cutting conditions 1> For example, machining conditions 1 corresponding to region S1 (resistivity 22-24 mΩ·cm) are as follows: Spindle rotation speed: 20,000 rpm Machining feed rate: 50 mm / second
[0035] <Cutting conditions 2> For example, the cutting conditions 2 corresponding to region S2 (resistivity 18-19 mΩ·cm) are as follows: Spindle rotation speed: 20,000 rpm Machining feed rate: 45 mm / second
[0036] (Processing process) As described above, once the cutting conditions are set in the processing condition setting step corresponding to regions S1 and S2, a processing step is performed in which cutting is performed on the semiconductor wafer 10 based on the cutting conditions.
[0037] When transporting the semiconductor wafer 10 to the cutting apparatus 40 described above, a ring-shaped frame F with an opening Fa capable of accommodating the semiconductor wafer 10 is prepared, similar to when performing the laser processing described above. The surface 10a of the semiconductor wafer 10 is positioned in the center of the opening Fa with the surface facing upwards, and the back surface 10b of the semiconductor wafer 10 and the frame F are attached together with adhesive tape T to form a single unit. The semiconductor wafer 10, thus integrated with the frame F, is then transported to the cutting apparatus 40.
[0038] The cutting apparatus 40 comprises a holding means (not shown) for suction-holding a semiconductor wafer 10, and a cutting means 42 for cutting the wafer 10 held by the holding means. The holding means comprises an X-axis feed means for feeding the holding means and the cutting means 42 relative to each other in the X-axis direction, and a rotational drive means for rotating the holding means (neither of which are shown). The holding means includes a chuck table having a holding surface defined by X and Y coordinates. Furthermore, the cutting means 42 includes a spindle 44 arranged in the Y-axis direction indicated by arrow Y in the figure and held in a spindle housing 43, an annular cutting blade 45 held at the tip of the spindle 44, a blade cover 46, a pair of cutting fluid supply nozzles 47 (the opposite side is not visible) arranged on the blade cover 46 and supply cutting fluid L to the cutting area from both sides of the cutting blade 45, an inlet 48 for introducing cutting fluid L into the cutting fluid supply nozzles 47, and a supply passage 48a for supplying cutting fluid L to the inlet 48, to which a cutting fluid supply means (not shown) is connected. The cutting means 42 also includes a Y-axis moving means (not shown) for indexing and feeding the cutting blade 45 in the Y-axis direction. The spindle 44 is rotationally driven by a spindle motor (not shown).
[0039] In the process of performing cutting on a semiconductor wafer 10, first, the semiconductor wafer 10 is placed on the chuck table of the cutting device 40 with its surface 10a facing upwards and held in place by suction. The semiconductor wafer 10 held on the chuck table is imaged by an imaging means (not shown) provided on the cutting device 40, and alignment is performed to detect the position (X coordinate, Y coordinate) of the division line 14 formed on the surface 10a. The semiconductor wafer 10 is then rotated by the rotation drive means to align the division line 14 in a predetermined direction with the X axis. The detected information on the position of the division line 14 is stored in a control means (not shown). Here, the X and Y coordinates of the semiconductor wafer 10, whose resistivity has been measured for each region as described above, are converted into X and Y coordinates that define the holding surface of the chuck table, and it becomes possible to identify the above regions S1 and S2 using the X and Y coordinates that define the holding surface of the chuck table.
[0040] The predetermined division lines 14 of the semiconductor wafer 10 are aligned in the X-axis direction, and the cutting blade 45 is aligned with them. Next, the cutting blade 45 is rotated at high speed in the direction indicated by arrow R1 and positioned on the division lines 14 aligned in the X-axis direction, and then moved in the vertical direction indicated by arrow Z to cut from the surface 10a side. Then, the chuck table is machine-feeded in the X-axis direction to form division grooves 110 along the division lines 14. Furthermore, the cutting blade 45 of the cutting means 42 is index-feeded onto division lines 14 adjacent in the Y-axis direction to the division lines 14 where division grooves 110 have been formed, and cutting is performed to form division grooves 110 in the same manner as above. By repeating these steps, division grooves 110 are formed along all division lines 14 along the X-axis direction. Next, the chuck table is rotated 90 degrees to align the direction perpendicular to the direction in which the division groove 110 was previously formed with the X-axis direction, and the above-described cutting process is performed on all the division lines 14 that have been newly aligned with the X-axis direction, thereby forming division grooves 110 along all the division lines 14 formed on the semiconductor wafer 10. In this way, a processing step is performed in which cutting is carried out along the division lines 14 to divide the wafer 10 into device chips for each device 12 along the division lines 14.
[0041] Here, as described above, a region S1 with high resistivity and a region S2 with relatively low resistivity are identified based on the mapping data M. Since regions S1 and S2 are identified by the X and Y coordinates that define the holding surface of the chuck table, when machining region S1, machining is performed according to machining condition 1 set in the machining condition setting step described above. When machining region S2, machining is performed according to machining condition 2 described above. In this embodiment, as described above, in the region S2 with low resistivity, the machining feed rate is set to be slower than the machining feed rate when machining region S1, so that the machining quality of the divided groove 110 formed by machining is constant despite the physical characteristics being different in regions S1 and S2.
[0042] In addition, while the machining feed rate was changed between the above-described cutting conditions 1 and cutting conditions 2 to ensure consistent machining quality, the present invention is not limited to this, and other parameters may be set differently to ensure consistent machining quality in region S1 and region S2. For example, the spindle rotation speed may be changed in region S1 and region S2, or the amount of cutting fluid L supplied to the cutting area may be changed in region S1 and region S2 to ensure consistent machining quality.
[0043] According to the processing condition setting step and processing step of the above-described embodiment 2, it becomes possible to process the semiconductor wafer 10 with cutting processing conditions that are suitable for the physical characteristics corresponding to the resistivity. Even if there are regions with different physical characteristics within the plane of the semiconductor wafer 10, cutting processing can be performed with cutting processing conditions suitable for each region, thereby stabilizing the processing quality.
[0044] In the embodiments described above, an example was described in which there are regions S1 and S2 with different resistivity within the plane of a single semiconductor wafer 10, and different processing conditions are set for each region. However, the present invention is not limited thereto. For example, even if there is no variation in resistivity within a single semiconductor wafer, if the resistivity differs from one semiconductor wafer to another, the processing condition setting step can be used to set processing conditions corresponding to the resistivity for each semiconductor wafer to be processed, and a processing step corresponding to the resistivity can be performed on the semiconductor wafer based on these processing conditions.
[0045] Furthermore, although the above-described embodiment described the case in which a semiconductor wafer 10 made from SiC was processed as the workpiece, the present invention is not limited thereto, and the present invention can also be implemented for semiconductor wafers made from Si, GaAs, GaP, InP, etc. [Explanation of Symbols]
[0046] 10: Semiconductor wafers 10a: surface 10b: Back side 12: Devices 14: Planned division line 16: Device Area 18: Notch 20:Resistivity measuring device 22: Probe core 24: Magnetic flux 30: Laser processing equipment 32: Laser beam irradiation means 34: Light concentrator 40: Cutting equipment 42:Cutting means 44: Spindle 45: Cutting blade 47: Cutting fluid supply nozzle 48: Inlet 48a: Supply route 100: Dividing groove 110: Dividing groove S1: Area S2: Area
Claims
1. A method for processing a semiconductor wafer, which divides a semiconductor wafer into individual chips, The process involves creating mapping data by measuring the resistivity of multiple regions, and A process for setting processing conditions corresponding to resistivity, A processing step in which a wafer is processed based on the said processing conditions, A method for processing a semiconductor wafer comprising the above.
2. Multiple devices are formed on the surface of a semiconductor wafer, with device regions demarcated by planned division lines. The mapping data is created corresponding to the planned division line, The semiconductor wafer processing method according to claim 1, wherein in the processing step, a division process is performed on the line to be divided.
3. The semiconductor wafer is a SiC wafer, and differences in resistivity arise depending on the concentration of impurity doping. The semiconductor wafer processing method according to claim 1, wherein in the mapping data creation step, the resistivity of multiple regions is measured to create the mapping data.
4. In this processing step, the semiconductor wafer is held on a chuck table having a holding surface defined by the X and Y coordinates. The semiconductor wafer processing method according to claim 1, wherein in the mapping data creation step, the plurality of regions are identified by X coordinates and Y coordinates.