Liquid crystal display device

Abstract

The challenge is to reduce the drive voltage of the drive circuit and thereby reduce the power consumption of the drive circuit. ru. [Solution] A level shifter circuit increases the amplitude voltage of signal IN1 and outputs it. This is possible. Specifically, the amplitude voltage of signal IN1 can be increased and output. This causes the vibration of the circuit that outputs the signal IN (shift register circuit, decoder circuit, etc.) The voltage range can be reduced. Therefore, the power consumption of the circuit can be reduced. Alternatively, the voltage applied to the transistors constituting the circuit can be reduced. Therefore, degradation or destruction of the transistor can be suppressed.

Description

Technical Field

[0001] The present invention relates to semiconductor devices and their driving methods. In particular, it relates to a semiconductor device having a driving circuit formed on the same substrate as a pixel portion, a display device, a liquid crystal display device, a light-emitting device, or their driving methods. Or, it relates to an electronic device having the semiconductor device, the display device, the liquid crystal display device, or the light-emitting device.

[0002]

Background Art

[0002] In recent years, the development of large display devices such as liquid crystal TVs has been actively promoted. In particular, a technique of forming a driving circuit such as a gate driver circuit on the same substrate as a pixel portion using a transistor having a non-single crystal semiconductor greatly contributes to cost reduction of manufacturing and improvement of reliability, and thus the development has been actively advanced (for example, Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, as also described in Patent Document 1, the amplitude voltage of the clock signal input to the shift register circuit operates at the same amplitude as the gate signal (also referred to as a scan signal or a selection signal) output to the scan line in the case of a scan line driving circuit. In order to achieve low power consumption of the driving circuit, it is required to keep the amplitude voltage of the clock signal low.

[0005] ​​​In view of the above issues, one aspect of the present invention reduces the drive voltage of the drive circuit and reduces the power consumption of the drive circuit. The challenge is to electrify the system. [Means for solving the problem]

[0006] One aspect of the present invention is a first transistor, a second transistor, and a third transistor And a semiconductor having a fourth transistor, a fifth transistor, and a sixth transistor. It is a conductive device. The first terminal of the first transistor is electrically connected to the first wiring. The second terminal of the first transistor is electrically connected to the second wiring, and the second transistor The first terminal of the second transistor is electrically connected to the third wiring. It is electrically connected to the second wiring. The first terminal of the third transistor is connected to the first wiring. The second terminal of the third transistor is electrically connected to the gate of the first transistor. The gate of the third transistor is electrically connected to the fourth wiring. The first terminal of the fourth transistor is electrically connected to the third wiring, and the fourth transistor The second terminal of the transistor is electrically connected to the gate of the first transistor, and the fourth transistor The gate of the first transistor is electrically connected to the gate of the second transistor. The fifth transistor The first terminal of the transistor is electrically connected to the fifth wiring, and the second terminal of the fifth transistor is The gate of the second transistor is electrically connected to the gate of the fifth transistor. It is electrically connected to the wiring of the 6th transistor. The first terminal of the 6th transistor is electrically connected to the wiring of the 3rd transistor. They are connected, and the second terminal of the sixth transistor is electrically connected to the gate of the second transistor. The gate of the sixth transistor is electrically connected to the fourth wiring.

[0007] In one aspect of the present invention, a first signal is input to a fourth wiring, and from a second wiring, a second signal is output, and the amplitude voltage of the second signal is greater than half of the amplitude voltage of the first signal and it may be a conductor device.

[0008] In one aspect of the present invention, the first signal is a digital signal, and the second signal is a digital signal and when the first signal is at the H level, the second signal becomes the H level, and when the first signal is at the L level, the second signal may be a semiconductor device that becomes the L level.

[0009] [[ID=十七]] In one aspect of the present invention, the fourth wiring may be a semiconductor device electrically connected to a shift register circuit. device.

[0010] Note that in the figures, sizes, layer thicknesses, or regions may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0011] Note that the figures schematically show ideal examples and are not limited to the shapes or values shown in the figures etc. For example, variations in shape due to manufacturing technology, variations in shape due to errors, signals, voltages, or currents variations due to noise, or variations in signals, voltages, or currents due to timing deviations etc. can be included.

[0012] Note that technical terms are often used for the purpose of describing specific embodiments etc. However one aspect of the present invention is not limitedly interpreted by technical terms.

[0013] Note that terms not defined (including scientific and technical terms such as technical terms or academic terms) are It can be used as a meaning equivalent to the general meaning understood by a person of ordinary skill in the art. Dictionaries, etc. The terms defined by are preferably interpreted in a meaning that does not conflict with the background of the related art.

Advantages of the Invention

[0014] One aspect of the present invention can reduce the driving voltage of the driving circuit and achieve low power consumption. and can be achieved.

Brief Description of the Drawings

[0015] [Figure 1] An example of a circuit diagram of a semiconductor device in Embodiment 1. [Figure 2] An example of a diagram for explaining the operation of the semiconductor device in Embodiment 1. [Figure 3] An example of a schematic diagram for explaining the operation of the semiconductor device in Embodiment 1. <0000-111>An example of a schematic diagram for explaining the operation of the semiconductor device in Embodiment 1. [Figure 5] An example of a circuit diagram of a semiconductor device in Embodiment 1. [Figure 6] An example of a circuit diagram of a semiconductor device in Embodiment `1. [Figure 7] An example of a circuit diagram of a semiconductor device in Embodiment 1. [Figure 8] An example of a circuit diagram of a semiconductor device in Embodiment 1. [Figure 9] An example of a circuit diagram of a semiconductor device in Embodiment 1. [Figure 10] An example of a circuit diagram of a semiconductor device in Embodiment 1. [Figure 11] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 12] An example of a timing chart for explaining the operation of the semiconductor device in Embodiment 2. [Figure 13] An example of a timing chart for explaining the operation of the semiconductor device in Embodiment `2. [Figure 14] An example of a timing chart for illustrating the operation of the semiconductor device in Embodiment 2. [Figure 15] An example of a circuit diagram of a semiconductor device in Embodiment 2. [Figure 16] An example of a timing chart for illustrating the operation of the semiconductor device in Embodiment 2. [Figure 17] An example of a block diagram of the display device in Embodiment 3 and an example of a pixel circuit diagram. [Figure 18] An example of a circuit diagram of a semiconductor device in Embodiment 4, an example of a timing chart for explaining the operation of the semiconductor device, and an example of a block diagram of a display device. [Figure 19] An example of a cross-sectional view of a semiconductor device in Embodiment 5. [Figure 20] An example of a top view and an example of a cross-sectional view of the display device in Embodiment 6. [Figure 21] An example of a diagram showing the manufacturing process of the semiconductor device in Embodiment 7. [Figure 22] An example of a diagram illustrating the electronic device in Embodiment 8. [Figure 23] An example of a diagram illustrating the electronic device in Embodiment 8. [Modes for carrying out the invention]

[0016] The embodiments will be described below with reference to the drawings. However, the embodiments may differ in many ways. It is possible to implement it in any manner, and without deviating from its purpose and scope, its form and Those skilled in the art will readily understand that the details can be modified in various ways. It is not to be interpreted as being limited to the description of the form. Therefore, parts that are the same or have similar functions are indicated by common reference numerals across different drawings. Detailed descriptions of parts or parts with similar functions are omitted.

[0017] Furthermore, the content described in one embodiment (even a part of it) may vary depending on the form of its implementation. Other content (even partial content) described in the tone, and / or one or more other implementations To apply, combine, or replace the content described in the form (even if only a part of it is acceptable), It is possible to do things like this.

[0018] Note that terms such as "1st," "2nd," and "3rd" refer to various elements, components, areas, layers, and regions that are separate from each other. It is used to distinguish and describe things. Therefore, terms such as "first," "second," and "third" refer to elements and parts. It does not limit the number of materials, areas, layers, zones, etc. Furthermore, for example, "the first" It can be replaced with "second" or "third," etc.

[0019] (Embodiment 1) This embodiment describes an example of a semiconductor device and an example of a method for driving that semiconductor device. This will clarify, in particular, an example of a level shifter circuit and an example of a method for driving that level shifter circuit. I will explain about that.

[0020] First, an example of a semiconductor device according to this embodiment will be described.

[0021] Figure 1 shows an example of a semiconductor device. Circuit 100 has circuits 110 and 120. Circuit 110 is connected to wiring 11, wiring 13, wiring 14, wiring 16 and circuit 120. The circuit 120 is connected to wiring 11, wiring 12, wiring 15, wiring 16 and circuit 110. It continues. However, this embodiment is not limited to this example. For example, circuit 100, Circuits 110 and 120 can be connected to various wiring configurations depending on their configuration. be.

[0022] Circuit 110 shall have transistors 111 and 112. 20 is transistor 121, transistor 122, transistor 123 and transistor It shall have a transistor 124. The first terminal of transistor 121 is connected to wiring 15. The second terminal of transistor 121 is connected to wiring 12. The second terminal of transistor 122 Terminal 1 is connected to wire 16, and the second terminal of transistor 122 is connected to wire 12. The first terminal of transistor 123 is connected to wiring 15, and transistor 123 The second terminal is connected to the gate of transistor 121 and the gate of transistor 123. It is connected to wiring 11. The first terminal of transistor 124 is connected to wiring 16. The second terminal of transistor 124 is connected to the gate of transistor 121, and the transistor The gate of transistor 124 is connected to the gate of transistor 122. Transistor 111 The first terminal of is connected to wiring 14, and the second terminal of transistor 111 is connected to transistor The gate of transistor 111 is connected to wire 13, and the gate of transistor 122 is connected to wire 13. The first terminal of transistor 112 is connected to the wiring 16, and the second terminal of transistor 112 The terminal is connected to the gate of transistor 122, and the gate of transistor 112 is wired It connects to 11.

[0023] Furthermore, the second terminal of transistor 111 and the second terminal of transistor 112, The connection point between the gate of transistor 122 and the gate of transistor 124 is indicated as node A. Let's assume that the gate of transistor 121 and the second terminal of transistor 123 are connected to the transistor. The connection point with the second terminal of the ZISTA 124 will be referred to as node B.

[0024] Note that transistors 111, 112, and 121-124 are each Furthermore, it will be an N-channel type. In an N-channel transistor, the potential between the gate and the source is It turns on when the difference becomes greater than the threshold voltage. Therefore, the semiconductor device of this embodiment The device uses amorphous semiconductors, microcrystalline semiconductors, oxide semiconductors, or organic semiconductors. It can be constructed using transistors. In particular, using an oxide semiconductor transistor, It is preferable to configure the semiconductor device according to this embodiment. This is because, as a semiconductor layer, This is because using semiconductor materials allows for higher transistor mobility. Therefore, the semiconductor device of this embodiment can be used in a high-resolution display device or a large-screen display device. This becomes easier. However, this embodiment is not limited to this example. For example, Transistor 111, transistor 112, and transistors 121-124 are all P-channels. It can be a Nell type. A P-channel transistor has a gate and source between them. It is assumed that the device turns on when the potential difference falls below the threshold voltage.

[0025] A transistor is defined as having at least three terminals, including a gate, a drain, and a source. It is an element having a drain (drain region or drain electrode) and a source ( It has a channel region between the source region (or source electrode), and the drain and channel region It is a device that can conduct current through a source and a drain. Here, the source and the drain are This varies depending on the transistor's structure or operating conditions, so which is the source or the drive? It is difficult to determine whether it is an input. Therefore, the part that functions as a source, and the do The part that functions as rain is sometimes not called source or drain. In that case, For example, one of the source and drain may be referred to as the first terminal, first electrode, or first region. The other side of the source and drain is referred to as the second terminal, second electrode, or second region. There are cases where this occurs.

[0026] Note that if it is explicitly stated that X and Y are connected, it means that X and Y are electrically connected. When X and Y are functionally connected, and when X and Y are directly connected This includes cases where X and Y are objects (e.g., devices, elements, circuits). (Wiring, electrodes, terminals, conductive film, layer, etc.) Therefore, a predetermined connection relationship, For example, not limited to the connection relationships shown in the diagram or text, This includes those who are not in charge of the department.

[0027] The voltage VDD1 is assumed to be input to wiring 14. The voltage VDD1 is assumed to be a constant voltage. The voltage shall be greater than the ground voltage. Therefore, wiring 14 shall be a power line or a positive power line. It shall have the function of [this]. The voltage VDD2 shall be input to wiring 15. Voltage VDD2 is set to a constant voltage and to a value greater than voltage VDD1. Therefore, wiring 1 5 shall function as a power line or positive power line. The voltage VSS shall be applied to wiring 16. It shall be assumed that a voltage VSS is supplied. The voltage VSS shall be a constant voltage and less than the voltage VDD1. Therefore, the wiring 16 shall function as a power line or a negative power line. However, this embodiment is not limited to this example. For example, wiring 14, wiring 15 and / Alternatively, a signal can be input to wiring 16. In such cases, wiring 14, Wiring 15 and / or wiring 16 can function as signal lines. Another example Therefore, the voltage VSS can be approximately equal to the ground voltage. The wire 16 can function as a ground wire or earth, etc.

[0028] The signal IN1 is assumed to be input to wiring 11. The signal IN1 is a digital signal. The potential of the high level of signal IN1 is approximately VDD1, and the low level of signal IN1 is approximately VDD1. The potential of the wire is approximately VSS. Therefore, wiring 11 has the function of a signal line. It shall be assumed that signal IN2 is input to wiring 13. Signal IN2 is digital The signal will be a Tal signal. The potential of the H level of signal IN2 will be approximately VDD1, and the signal The potential of IN2's L level should be approximately VSS. Therefore, wiring 13 will be a signal line. It shall have the following functions. However, this embodiment is not limited to this example. For example, a voltage (e.g., voltage VDD1 or voltage VDD2) is input to wiring 13. It is possible. This allows the IN2 signal to be omitted, thus reducing the number of signals and wiring. The number can be reduced. Furthermore, power consumption can be reduced.

[0029] The signal OUT will be output from wiring 12. The signal OUT will be a digital signal. This is the output signal of circuit 100. The potential of the H level of signal OUT is approximately VD. Let D2 be the signal, and the potential of the low level of signal OUT be approximately VSS. That is, signal OU Assume that the amplitude voltage of T is greater than the amplitude voltage of signal IN1. Therefore, wiring 12 is... It shall function as a railway line.

[0030] Next, an example of the operation of the semiconductor device of this embodiment will be described.

[0031] Figure 2 is an example of a diagram illustrating the operation of the semiconductor device of this embodiment. The semiconductor device in this state combines the high and low levels of signals IN1 and IN2, The first to fourth operations can be achieved. The first to fourth operations will be explained below. However, the examples of this embodiment are not limited thereto. For example, wiring 14, wiring 15 and / or By changing the potential of the wiring 16, the semiconductor device of this embodiment can perform even more dynamic operations. It is possible to perform the work.

[0032] First, let's explain the first operation (see Figure 3(A)). In the first operation, signal IN1 The signal becomes high, and signal IN2 becomes low. Therefore, transistor 111 turns off. As a result, transistor 112 turns on, and node A becomes conductive with wiring 16. Then, the potential (voltage VSS) of wiring 16 is supplied to node A, so the power of node A The potential (indicated as Va) is approximately VSS. Therefore, transistor 124 turns off. This occurs. At this time, transistor 123 turns on, so node B is in contact with wire 15. This state is reached. Then, the potential of wiring 15 (for example, voltage VDD2) is supplied to node B. Therefore, the potential at node B (indicated as potential Vb) begins to rise. Subsequently, the potential at node B When it becomes VSS + Vth121 (Vth121: threshold voltage of transistor 121), Transistor 121 turns on. At this time, transistor 122 turns off, so wiring Wire 12 becomes electrically connected to wire 15. Then, wire 12 is at the same potential as wire 15 (for example, electric current). As voltage VDD2) is supplied, the potential of wiring 12 (signal OUT) begins to rise. Subsequently, the potential of node B and the potential of wiring 12 continue to rise. Eventually, the potential of node B The position is determined from the gate potential (voltage VDD1) of transistor 123. This value is obtained by subtracting the threshold voltage (Vth123). As a result, transistor 123 turns off. Therefore, wiring 15 and node B are not conductive. As a result, node B is in a floating state. At this time, the potential of wiring 12 continues to rise. Therefore, the potential of node B is, Due to the parasitic capacitance between the gate and the second terminal of the converter 121, VDD1-Vth123 It rises further from there. Eventually, the potential of node B becomes VDD2 + Vth121 + V1(V1 : (positive number). This is what is known as bootstrap operation. Therefore, the potential of wiring 12 It can rise up to VDD2. In this way, the signal OUT becomes high level. ru.

[0033] Next, the second operation will be explained (see Figure 3(B)). In the second operation, signal IN1 The signal becomes low (L), and signal IN2 becomes high (H). Therefore, transistor 111 turns on. As a result, transistor 112 turns off, and node A becomes conductive with wiring 14. Then, the potential (voltage VDD1) of wiring 14 is supplied to node A, so node A The potential rises. Then, the potential at node A becomes the potential at the gate of transistor 111 (H level). The value obtained by subtracting the threshold voltage (Vth111) of transistor 111 from the signal IN2 (VD D1-Vth111) is then turned off, and the wiring 14 and the Node A becomes non-conductive. Therefore, node A becomes floating, and the potential of node A is , is generally maintained at VDD1-Vth111. As a result, transistor 124 is This occurs. At this time, transistors 123 are turned off, so node B is connected to wiring 16. It enters a continuous state. Then, the potential (voltage VSS) of wiring 16 is supplied to node B. Therefore, the potential at node B is approximately VSS. As a result, transistor 121 turns off. At this time, transistor 122 turns on, so wire 12 becomes conductive with wire 16. Yes. Then, the potential (voltage VSS) of wire 16 is supplied to wire 12, so wire 1 The potential of point 2 (signal OUT) is approximately VSS. In this way, signal OUT is L It becomes a level.

[0034] Next, we will explain the third operation (see Figure 4(A)). In the third operation, signal IN1 The signal IN2 becomes high level. Therefore, transistor 111 turns on. As a result, transistor 112 turns on, and node A becomes conductive with wires 14 and 16. This is the state that occurs. Then, at node A, the potential of wire 14 (voltage VDD1) and the potential of wire 16 are... Since (voltage VSS) is supplied, the potential of node A is the value between VSS and VDD1. Yes. The potential of node A is determined by the current supply capability of transistor 111 and transistor 112 It is determined by the current supply capability of transistor 111. Furthermore, assume that the current supply capacity of transistor 112 is greater. Therefore, it is preferable The potential of node A shall be a value closer to VSS than to VDD1. More preferably, node A The potential is VSS + Vth124 (Vth124: threshold voltage of transistor 124) or A value lower than VSS + Vth122 (Vth122: threshold voltage of transistor 122) Therefore, transistor 124 turns off. At this time, transistor 123 is Therefore, node B becomes electrically connected to wiring 15. Then, node B is connected to wiring 15. Since a potential of 5 (for example, voltage VDD2) is supplied, the potential at node B (denoted as potential Vb) It begins to rise. Subsequently, the potential of node B is VSS+Vth121(Vth121: When the threshold voltage of transistor 121 is reached, transistor 121 turns on. At this time, Since transistor 122 is turned off, wire 12 becomes conductive with wire 15. Since the potential of wiring 15 (for example, voltage VDD2) is supplied to wiring 12, wiring 12 The potential (signal OUT) begins to rise. Subsequently, the potential of node B and the potential of wiring 12 are It continues to rise further. Eventually, the potential of node B becomes the potential of the gate of transistor 123 ( This value is obtained by subtracting the threshold voltage (Vth123) of transistor 123 from the voltage VDD1). As a result, transistor 123 turns off, and wiring 15 and node B become non-conductive. Therefore, node B becomes floating. At this time, the potential of wiring 12 continues to rise. Therefore, the potential of node B is between the gate and the second terminal of transistor 121. Due to the parasitic capacitance, it rises further from VDD1-Vth123. Eventually, the power of node B The order is VDD2 + Vth121 + V1 (V1: a positive number). This is what is known as bootstra. This is a top-up operation. Therefore, the potential of wiring 12 can rise to VDD2. In this way, the signal OUT becomes high level.

[0035] Next, we will explain the fourth operation (see Figure 4(B)). In the fourth operation, signal IN1 The signal IN2 becomes low, and therefore transistor 111 turns off. As a result, transistor 112 turns off, and node A becomes floating. The potential of A remains the same as it was before the fourth operation. For example, before the fourth operation, the first Let's assume that the operation or the third operation is performed. In this case, the potential of node A will be approximately VSS. On the other hand, suppose the second action is performed before the fourth action. In this case, the potential of node A is This will generally be VDD1-Vth111. Here, before the fourth operation, the second operation is performed. This shall be done. Therefore, the potential of node A shall be maintained at approximately VDD1-Vth111. Assume that this is the case. This turns on transistor 124. At this time, Since inverter 123 is turned off, node B becomes conductive with wiring 16. Then, Since the potential (voltage VSS) of wiring 16 is supplied to node B, the potential of node B is approximately This results in VSS. Therefore, transistor 121 turns off. At this time, the transistor Since 122 is turned on, wire 12 becomes conductive with wire 16. Then, wire 12 Since the potential (voltage VSS) of wiring 16 is supplied, the potential (signal OUT) of wiring 12 is This generally results in VSS. In this way, the signal OUT becomes L level.

[0036] As described above, the semiconductor device of this embodiment increases the amplitude voltage of signal IN1 and outputs It is possible to increase the amplitude voltage of signal IN1 and output it. This allows the semiconductor device of this embodiment to output a signal IN1 (shift resistance circuit). The amplitude voltage of the circuit (such as a photocopier or decoder) can be reduced. The power consumption can be reduced. Alternatively, the power applied to the transistors constituting the circuit can be reduced. The voltage applied can be reduced. Therefore, degradation or destruction of the transistor can be suppressed. It is possible.

[0037] Alternatively, the timing of the signal OUT inversion is roughly the same as the timing of the signal IN1 inversion. This makes it possible to make them equal. This eliminates the need to install an inverter circuit or the like in wiring 12. This eliminates the need for power consumption reduction, circuit size reduction, or layout area reduction. It can be measured.

[0038] Alternatively, in the first operation, when signal IN1 is at a high level, signal IN2 is at a low level. This prevents through-current between wiring 14 and wiring 16. This allows for reduced power consumption.

[0039] Although the first to fourth operations have been described, the semiconductor device of this embodiment is It should be noted that it is not necessary to perform all of these operations. The semiconductor device of this embodiment performs these It is possible to select only the necessary actions from a range of actions and perform those selected actions. ru.

[0040] Next, a configuration of the semiconductor device of this embodiment that differs from that shown in Figure 1 will be described.

[0041] First, as shown in Figures 5(A) and 5(B), in the semiconductor device shown in Figure 1, The first terminal of the zista 111 can be connected to a different wire than the wire 14. (See diagram) 5(A) is a semiconductor device in which the first terminal of transistor 111 is connected to wiring 15. An example is shown. This allows the voltage VDD1 to be omitted. Alternatively, the transistor Since the potential difference (Vds) between the source and drain of TA111 can be increased, The rise time of the potential at node A can be shortened. Figure 5(B) shows transistor 11 An example of a semiconductor device is shown where the first terminal of 1 is connected to wiring 13. Therefore, voltage VDD1 can be omitted. Alternatively, a reverse bias can be applied to transistor 111. This allows us to suppress the degradation of transistor 111. However, this implementation Examples of the form are not limited to this. For example, the first terminal of transistor 111 is It is possible to connect to the wiring to which the inverted signal of input IN1 is input.

[0042] Next, as shown in Figures 6(A) and 6(B), the semiconductor shown in Figures 1 and 5(A)-(B) In the device, the gate of transistor 111 is connected to a different wire from the wire 13. This is possible. Figure 6(A) shows the case where the gate of transistor 111 is connected to wiring 15. An example of a semiconductor device is shown. This allows the signal IN2 to be omitted. Therefore, power consumption can be reduced. Figure 6(B) shows the gate of transistor 111. An example of a semiconductor device when connected to wiring 14 is shown. This allows the signal IN2 to be omitted. This is possible. Therefore, power consumption can be reduced. However, this embodiment Examples are limited to those listed above. For example, the gate of transistor 111 is for signal IN1. It can be connected to wiring that receives an inverted signal.

[0043] Next, as shown in Figure 7(A), as shown in Figures 1, 5(A)-(B), and 6(A)-(B) In the semiconductor device, the first terminal of transistor 111 is connected to a wiring other than wiring 14. Furthermore, the gate of transistor 111 can be connected to a different wire from the wiring 13. It is possible. Figure 7(A) shows that the first terminal of transistor 111 is connected to wiring 13, An example of a semiconductor device is shown where the gate of the inverter 111 is connected to the wiring 14. Therefore, in the second operation, the potential of node A is increased, and in the fourth operation, node A The potential can be reduced. Therefore, in the second operation, transistor 122 And transistor 124 turns on, and in the fourth operation, transistor 122 and Transistor 124 turns off. Thus, transistors 122 and 124 The time during which it is ON can be shortened. Therefore, transistor 122 and This can suppress the deterioration of Zista 124.

[0044] Next, as shown in Figures 7(B) and 8(A), Figures 1, 5(A)-(B), and 6(A) In the semiconductor device shown in (B) and Figure 7(A), the first terminal of transistor 123 is It is possible to connect to a different wire from wiring 15. Figure 7(B) shows transistor 1 An example of a semiconductor device is shown where the first terminal of 23 is connected to wiring 13B. Wiring 13B The signal IN2B is assumed to be input to this. Signal IN2B is the inverse signal of signal IN2. Yes. This allows a reverse bias to be applied to transistor 123, so the transistor This can suppress the degradation of the transistor. Figure 8(A) shows the first terminal of transistor 123. An example of a semiconductor device is shown when the child is connected to wiring 11. This allows for the second operation and In operation 4, the potential difference between the source and drain of transistor 123 is applied. (Vds) can be reduced. Therefore, the degradation of transistor 123 is suppressed. This is possible. Alternatively, the off-current of transistor 123 can be reduced, and power consumption can be reduced. Force can be reduced. However, this embodiment is not limited to this example. For example, the first terminal of transistor 123 can be connected to wiring 14.

[0045] As shown in Figure 8(B), the first terminal of transistor 123 is connected to wiring 11. In this case, the gate of transistor 123 can be connected to a different wire than the wire 11. Figure 8(B) shows the semiconductor when the gate of transistor 123 is connected to wiring 14. An example of a body device is shown. However, this example is not limited to this embodiment. Transis The gate of TA123 is the wiring to which the inverted signal of wiring 15, signal IN2 is input, or signal IN It can be connected to wiring that receives signals with a different phase than 2.

[0046] Next, as shown in Figure 9(A), Figures 1, 5(A)-(B), 6(A)-(B), and 7 In the semiconductor device shown in (A)~(B) and Figure 8(A)~(B), transistor 12 It is possible to provide a capacitive element 125 between the gate 1 and the second terminal. Furthermore, in the first and second operations, the potential of node B can be further increased. Therefore, the potential difference (Vgs) between the gate and source of transistor 121 is increased. This allows for a shorter rise time of the signal OUT.

[0047] Next, as shown in Figure 9(B), Figures 1, 5(A)-(B), 6(A)-(B), and 7 In the semiconductor device shown in (A)~(B), Figures 8(A)~(B) and 9(A), the node It is possible to provide a capacitive element 126 between A and the wiring 16. This allows for a fourth dynamic In this process, fluctuations in the potential of node A, noise in node A, etc. can be suppressed. This makes it easier to maintain the potential of node A. However, this example of the embodiment is not limited to this. No. For example, the capacitive element 126 is connected to node A and to a different wire than wire 16 (for example, wire 1 3. It is possible to connect it between wiring 14 or wiring 15, etc. In particular, capacitive elements By connecting 126 between node A and wiring 13, the potential of node A is controlled by signal I It can be varied in synchronization with N2. Therefore, transistor 122 and transistor The time that ZISTA124 is on can be shortened.

[0048] Next, as shown in Figure 10(A), Figures 1, 5(A)-(B), 6(A)-(B), and Figure In the semiconductor devices shown in 7(A)-(B), Figures 8(A)-(B), and Figures 9(A)-(B) Each transistor, etc., can be connected to separate wiring. Figure 10(A) , the first terminal of transistor 112, the second terminal of transistor 124, and the transistor This shows an example of a semiconductor device where the second terminal of terminal 122 is connected to separate wiring. Line 16 is divided into multiple wires, wires 16A to 16C. Then, transistor 1 The first terminal of transistor 12, the second terminal of transistor 124, and the second terminal of transistor 122 Each child is connected to wiring 16A, wiring 16B, and wiring 16C, respectively. However, in this embodiment... Examples are limited to those listed above. For example, the first terminal of transistor 121 and the transistor The first terminal of sta123 can also be connected to a separate wire. In this case, wire 1 It is possible to split 5 into two wires.

[0049] Next, as shown in Figure 10(B), Figures 1, 5(A)-(B), 6(A)-(B), and Figure The half shown in Figures 7(A)-(B), 8(A)-(B), 9(A)-(B), and 10(A) In conductive devices, transistors replace resistive elements, diodes, capacitive elements, etc. This is possible. Figure 10(B) shows the replacement of transistor 111 with diode 111d. The semiconductor device in this case is shown. One electrode (e.g., anode) of diode 111d is connected to the wiring. Node 13 is connected, and the other electrode (e.g., cathode) is connected to node A. However, in this implementation... Examples of configurations are not limited to these. For example, transistor 111 may be placed with a resistive element. It is possible to replace it. The resistive element is connected to one of the wires 13 to 15 and node A. It is possible to connect them in between. As another example, transistor 123 has one electrode ( For example, one electrode (anode) is connected to the wiring 11, and the other electrode (cathode) is connected to node B. It can be replaced with an ether. Another example is a diode in a diode connection. It is possible for it to be a transistor.

[0050] Next, we will explain an example of the function of each circuit and an example of the function of each transistor.

[0051] First, the circuit 100 is assumed to have the function of increasing the amplitude voltage of the signal IN1. It has the function of raising the H level potential of signal IN1 of circuit 100. Or, circuit 1 00 has the function of inverting signal OUT when signal IN1 is inverted. Or, circuit Unit 100 has the function of raising the signal OUT to a high level when the signal IN1 reaches a high level. Alternatively, circuit 100 is a device that sets signal OUT to a low level when signal IN1 becomes low level. It has the ability to do so. Thus, circuit 100 has the function of a level shifter circuit.

[0052] Furthermore, by making the voltage VDD2 smaller than the voltage VDD1, the signal OUT becomes high level. The potential can be made lower than the high-level potential of signal IN1 or signal IN2. In this case, circuit 100 has the function of reducing the amplitude voltage of signal IN1.

[0053] Next, circuit 110 has the function of inverting signal IN1. Alternatively, circuit 110 has the function of signal When IN1 reaches a high level, it has the function of reducing the potential of node A. Alternatively, circuit 1 Component 10 has the function of raising the potential of node A when signal IN1 becomes low. Alternatively, circuit 110 has the function of putting node A into a floating state. Thus, circuit 110 It functions as an inverter circuit.

[0054] Next, circuit 120 has the function of increasing the amplitude voltage of signal IN1. Or, circuit 1 20 has the function of raising the potential of the H level of signal IN1. Alternatively, circuit 120 has the signal When signal IN1 is inverted, it has the function of inverting signal OUT. Alternatively, circuit 120, It has a function that sets signal OUT to a high level when signal IN1 becomes high level. Alternatively, The path 120 has the function of setting signal OUT to a low level when signal IN1 becomes a low level. Thus, circuit 120 functions as a level shifter circuit.

[0055] Next, transistor 111 has the function of controlling the conductivity state between wiring 14 and node A. Alternatively, transistor 111 controls the timing of supplying the potential of wiring 14 to node A. It has a function to control. Alternatively, transistor 111 raises the potential of node A. It has a function to control the ming. Alternatively, transistor 111 puts node A into a floating state. It has a function to control the timing of the switch. Thus, transistor 111 is a switch It functions as such.

[0056] Next, transistor 112 has the function of controlling the conductivity state between wiring 16 and node A. Alternatively, transistor 112 controls the timing of supplying the potential of wiring 16 to node A. It has a function to control. Alternatively, transistor 112 reduces the potential of node A. It has the function of controlling the ming. Thus, transistor 112 acts as a switch. It has a function.

[0057] Next, transistor 121 has the function of controlling the conductivity state between wiring 15 and wiring 12. Alternatively, transistor 121 controls the timing of supplying the potential of wiring 15 to wiring 12. It has a function to control. Alternatively, transistor 121 raises the potential of wiring 12. It has a function to control the bootstrapping. Alternatively, transistor 121 is used for bootstrap operation. It has a function to control the timing of performing the action. Alternatively, transistor 121 is at node B It has a function to control the timing of raising the potential. Thus, transistor 121 It functions as a switch.

[0058] Next, transistor 122 has the function of controlling the conductivity state between wiring 16 and wiring 12. Alternatively, transistor 122 controls the timing of supplying the potential of wiring 16 to wiring 12. It has a function to control. Alternatively, transistor 122 reduces the potential of wiring 12. It has the function of controlling the ming. Thus, transistor 122 acts as a switch. It has a function.

[0059] Next, transistor 123 has the function of controlling the conductivity state between wiring 15 and node B. Alternatively, transistor 123 controls the timing of supplying the potential of wiring 14 to node B. It has a function to control. Alternatively, transistor 123 raises the potential of node B. It has a function to control the ming. Alternatively, transistor 123 puts node B into a floating state. It has a function to control the timing of the switch. Thus, transistor 123 is a switch It functions as such.

[0060] Next, transistor 124 has the function of controlling the conductivity state between wiring 16 and node B. Alternatively, transistor 124 controls the timing of supplying the potential of wiring 16 to node B. It has a function to control. Alternatively, transistor 124 reduces the potential of node B. It has the function of controlling the ming. Thus, transistor 124 acts as a switch. It has a function.

[0061] Next, we will describe an example of the channel width of each transistor.

[0062] First, the channel width of transistor 121 is determined by the relationship between transistors 111 and 112. It is preferable that it is larger than the channel width of transistors 122-124. In other words, the circuit The largest transistor among those that 100 possesses is preferable. This is because the transistor Since 121 has the role of driving the wiring 12, it requires a large driving capacity. Yes, it exists. Furthermore, the channel width of transistor 121 is more than twice or even ten times that of transistor 123. Preferably, the following: More preferably, 3 times or more and 8 times or less. Even more preferably It is between 4 and 6 times.

[0063] Next, the channel width of transistor 122 is, transistor 111, transistor 112, It is preferable that this is greater than the channel width of transistors 123 and 124. Because transistor 122 has the role of driving the wiring 12, it has a large driving capacity. Because it requires power. Furthermore, the channel width of transistor 122 is... It is preferable that the channel width is between 2 and 30 times the channel width of the 24 channels. More preferably, it is 4 times or more. It is 15 times or less. More preferably, it is 6 times or more and 10 times or less.

[0064] Note that the channel width of transistor 122 is larger than the channel width of transistor 121. It is possible.

[0065] The channel width of transistor 123 is greater than the channel width of transistor 124. This is preferable because, in the first and third operations, due to timing discrepancies, Even if transistors 123 and 124 are turned on simultaneously, the potential of node B remains This is to allow it to be increased. Note that the channel width of transistor 123 Preferably, this is 1.5 times or more and 10 times or less the channel width of transistor 124. More preferably, it is between 2 and 8 times. Even more preferably, it is between 2.5 and 5 times. ru.

[0066] Furthermore, the current supply capability of the transistor is controlled by the channel width of the transistor. This is possible. Specifically, the larger the channel width of the transistor, the greater the current supply of the transistor. The supply capacity will improve. However, the factors that control the current supply capacity of the transistor are the transistor It is not limited to the channel width of the transistor. For example, the channel length of the transistor or the channel width of the transistor The current supply capability can be controlled by the potential difference (Vgs) between the gate and source. Specifically, the smaller the channel length of the transistor, the lower the current supply capability of the transistor. It improves. And the larger the potential difference (Vgs) between the gate and source of the transistor, the better. This improves the current supply capability of the transistor. In addition, the transistor can be configured with a multi-gate structure. By doing so, the current supply capacity can be reduced.

[0067] As described above, there are several ways to control the current supply capability of a transistor. Therefore, In the following, the channel width is controlled as a method for controlling the current supply capability of the transistor. If a method is given as an example, the channel width is the channel length or the gate of the transistor. This can be rephrased as the potential difference (Vgs) between the source and the element.

[0068] (Embodiment 2) This embodiment describes an example of a semiconductor device and an example of a method for driving that semiconductor device. This will be clarified. The semiconductor device of this embodiment shall have the semiconductor device of Embodiment 1.

[0069] First, an example of a semiconductor device according to this embodiment will be described.

[0070] Figure 11 shows an example of a semiconductor device of this embodiment. The semiconductor device shown in Figure 11 has circuit 3 It shall have circuits 00, 400 and 500. Circuit 400 is a circuit 401_1~ Let's assume we have 401_m (where m is a natural number). And the circuits 401_1~401_m Thus, each of the semiconductor devices described in Embodiment 1 can be used. In Figure 11, the circuit For each of the devices designated as 401_1 to 401_m, the semiconductor device shown in Figure 1 will be used. Circuit 500 shall have circuits 501 and 502.

[0071] Circuit 300 consists of wiring 21_1~21_m, wiring 23, wiring 24_1~24_4, and wiring 25 and is connected to wiring 27. Circuit 400 is connected to wiring 21_1~21_m and wiring 22_1~2 2m is connected to wiring 24_1~24_4, wiring 25, wiring 26 and wiring 27. Circuit 401_i (where i is one of 1 to m) is wiring 21_i, wiring 22_i, wiring 24_ One of 1 to 24_4 is connected to wiring 25, wiring 26, and wiring 27. Then, In path 401_i, wiring 11, wiring 12, wiring 13, wiring 14, wiring 15 and wiring 1 6 is one of the following: wiring 21_i, wiring 22_i, wiring 24_1~24_4, wiring 25, wiring 26, and wiring 27 shall be connected. Circuit 500 shall be connected to wiring 23 and wiring 24 It is connected to wires 1-24-4, wire 25, wire 26 and wire 27. Circuit 501 is connected to wire 2 3 and wiring 24_1~24_4 are connected, and circuit 502 is connected to wiring 25, wiring 26 and wiring It connects to 27.

[0072] Let's assume that circuit 401_i is connected to wiring 24_1. In this case, circuit 401_ i+1, circuit 401_i+2, and circuit 401_i+3 are respectively wired 24_2 and wired 24_ 3. Often connected to wiring 24_4. Alternatively, to circuit 401_i-3, circuit 401_ i-2, circuit 401_i-1, respectively, are connected to wiring 24_2, wiring 24_3, and wiring 24_4. They are often connected.

[0073] Note that in circuit 401_i, among the wiring 24_1~24_4, when signal SOUTi is at a high level... It is preferable that the wiring be connected to such a wire during the specified period, where its potential becomes L level. Therefore, the period during which transistors 111 and 112 are turned on simultaneously is omitted. This allows for a reduction in power consumption.

[0074] Circuit 500 controls the timing of supplying signals or voltages to circuits 300 and 400. It has a control function. And circuit 500 is the type in which circuits 300 and 400 operate. It has a function to control the ming. In other words, circuit 500 has a function as a controller. It shall be done.

[0075] Circuit 501 consists of wires 23, 24_1, 24_2, 24_3 and 24_4 Each of these outputs signals SP, CK1, CK2, CK3, and CK4. It has a function to control the timing. In other words, circuit 501 is a signal generation circuit (or timing It shall have the function of a generator. Therefore, circuit 501, Switches, diodes, transistors, oscillator circuits, clocked generators, PLL circuits It may also have a frequency divider circuit, etc.

[0076] As shown in Figure 12, signals SP, CK1, CK2, CK3 and CK4 are These are often digital signals. The high-level potential of these signals is generally VDD1 The potential of the L level is approximately VSS. The signal SP is the start pulse. It shall have the function of a horizontal synchronization signal or a vertical synchronization signal. Therefore, wiring 23 has the function of a signal line (also called a start signal line) Signals CK1 to CK4 shall each function as clock signals. The phases of CK1 to CK4 are assumed to be shifted by 1 / 4 period (90°) each. Wiring 24_1 to 24_4 functions as a clock signal line (also called a signal line). They shall possess.

[0077] Furthermore, as shown in Figure 12, signals CK1 to CK4 are assumed to be balanced. Balance means: This refers to a state where the period of time spent at the H level and the period of time spent at the L level are roughly equal within one cycle. However, this embodiment is not limited to this example. For example, as shown in Figure 13(A) Therefore, signals CK1~CK4 can be unbalanced. Unbalanced means that at the H level... This refers to a difference between the period of time it takes to reach level L and the period of time it takes to reach level L. Note that, in this context, "different" generally means... Assume that it is outside the range of cases where they are equal.

[0078] Furthermore, as shown in Figures 13(B) and 13(C), the semiconductor device of this embodiment has a single It is possible to use a phase clock signal. In this case as well, the clock signal is as shown in Figure 13. As shown in B), equilibrium is possible, and as shown in Figure 13(C), non-equilibrium is possible. It is possible to do so. However, this embodiment is not limited to this example. The semiconductor device of this embodiment uses a 3-phase clock signal or a 5-phase or more clock signal. It is possible.

[0079] Circuit 502 has voltages VDD1 and VDD2 connected to wires 25, 26, and 27, respectively. , it shall have the function of outputting voltage VSS. In other words, circuit 502 is a power supply circuit (or It shall have the function of a regulator (also called a power regulator). Therefore, wiring 25 is power It shall function as a power line or positive power line. Wiring 27 shall be a power line, a negative power line, and a green wire. It shall have the function of a ground wire or earth. Therefore, circuit 502 is Switches, transistors, capacitive elements, coils, diodes, regulators, DC-DC converters It may have a power converter and / or a boost circuit.

[0080] Circuits 500, 501, and 502 are configured according to the configuration of circuits 300 and 400. Therefore, it is possible to supply various signals or various voltages to circuits 300 and 400. ru.

[0081] Circuit 300 receives signals and voltages supplied from circuit 500 (for example, signal SP, signal CK1 Depending on the voltages (~CK4, VDD1, and VSS), signals SOUT1 to SOUTm are output. It has a function to control the timing of the operation. Signals SOUT1 to SOUTm are digital signals. This is often the case, and the potential of its H level is generally VDD1, and the potential of its L level is Generally, it is set to VSS. Then, circuit 300 sets signals SOUT1 to SOUTm in order to H It shall have a function to convert to a level. In other words, circuit 300 shall be a shift register circuit. It shall have the following functions. However, this embodiment is not limited to this example. For example, circuit 300 has the function of setting signals SOUT1 to SOUTm to a high level in any order. It is possible to have this. Therefore, circuit 300 has the function of a decoder circuit. It is possible to do so.

[0082] Furthermore, signals SOUT1 to SOUTm are connected to circuit 4 via wiring 21_1 to 21_m, respectively. It is assumed that this is input to 00. For example, the signal SOUTi is input to the circuit via wiring 21_i. It is assumed that this is input to 401_i. Therefore, wiring 21_1 to 21_m are, respectively, signals It shall function as a line.

[0083] Note that in the timing chart shown in Figure 12, one of the periods during which the signal SOUTi reaches a high level is The period in which the signal SOUTi-1 is at a high level overlaps with a portion of the period in which the signal A portion of the period during which SOUTi is at a high level, and a portion of the period during which signal SOUTi+1 is at a high level. There is some overlap. This results in a period during which signals SOUT1 to SOUTm are at a high level. This allows for a longer duration. Therefore, the drive frequency of circuit 300 can be slowed down, and the power consumption can be reduced. This can reduce power consumption. However, this embodiment is not limited to this example. For example, as shown in Figures 13(A) to (C), signals SOUT1 to SOUTm are respectively It is possible for the periods when the levels reach H to not overlap.

[0084] Circuit 400 receives signals from circuit 300 (for example, signals SOUT1 to SOUTm) and , signals and voltages supplied from circuit 500 (for example, signals CK1~CK4, voltage VDD1 The system outputs signals BOUT1 to BOUTm according to the voltages VDD2 and VSS. It has a function to control the timing. Signals BOUT1 to BOUTm are digital signals. In many cases, the potential of its H level is approximately VDD2, and the potential of its L level is approximately Let's call it VSS. The timing at which signals BOUT1 to BOUTm reverse is signal S The timing of the inversion of OUT1 to SOUTm is assumed to be roughly equal to that of the circuit. 400 shall have the function of increasing the amplitude voltage of signals SOUT1 to SOUTm. .

[0085] Next, an example of the operation of the semiconductor device of this embodiment will be described.

[0086] Figure 14 is an example of a timing chart for circuit 401_i. Figure 14 shows the signal SOU Ti, signal CK, potential at node A of circuit 401_i, potential at node B of circuit 401_i, And signal BOUTi is shown. Signal CK is one of signals CK1 to CK4. CK is low level when signal SOUTi, one of the signals CK1 to CK4, is at a high level. The signal will be as follows. The timing chart shown in Figure 14 is for period Ta, period Tb and It has a period Tc. In the timing chart shown in Figure 14, there is a period other than Ta. Tb and the period Tc are arranged in order.

[0087] Note that signal SOUTi corresponds to signal IN1 shown in Figure 2. Signal CK is shown in Figure This corresponds to signal IN2 shown in Figure 2. Signal BOUTi corresponds to signal OUT shown in Figure 2. This will be done accordingly.

[0088] First, during period Ta, signal SOUTi becomes high and signal CK becomes low. Then, circuit 400_i performs the first operation. Therefore, signal BOUTi becomes high level. This results in raising the potential of the H level of signal SOUTi from VDD1 to VDD2. It is possible.

[0089] Next, during period Tb, the signal SOUTi becomes low and the signal CK becomes high. Then, circuit 400_i performs its second operation. As a result, signal BOUTi becomes low. It will become.

[0090] Next, during period Tc, the signal SOUTi remains at a low level, and the signal CK remains at a low level. This is what happens. Then, circuit 400_i performs the fourth operation. Furthermore, since period Tb precedes period Tc, the potential Va is VDD1 - Vth111. Maintain the signal. Therefore, the signal BOUTi remains at a low level.

[0091] As described above, the semiconductor device of this embodiment increases the amplitude voltage of the output signal of circuit 300. Then, it can output. This reduces the amplitude voltage of circuit 300. This is possible. Therefore, the power consumption of circuit 300 can be reduced.

[0092] Alternatively, circuits 401_1 to 401_m each have a first operation, a second operation, and a fourth operation. It often does one of the following. Therefore, transistors 111 and 112 Since there is no period when both are on simultaneously, power consumption can be reduced.

[0093] Next, an example of circuit 300 will be described.

[0094] Figure 15 shows an example of circuit 300. Circuit 300 has circuits 310_1 to 310_m. Circuit 310_i consists of wiring 21_i, wiring 21_i-1, and wiring 21_i+2. Any three of the wires 24_1 to 24_4, wire 25 and wire 27 are connected. Let it be as follows. However, circuit 310_1 is connected to wiring 23 instead of wiring 21_i-1. It often happens.

[0095] Circuits 310_1 to 310_m are, respectively, transistor 311, transistor 312, and transistor 310_m. Transistor 313, Transistor 314, Transistor 315, Transistor 316, Transistor It shall have transistor 317, transistor 318 and transistor 319. The first terminal of transistor 311 is connected to wiring 33, and the second terminal of transistor 311 is connected to wiring 33. It is connected to wiring 32. The first terminal of transistor 312 is connected to wiring 37. The second terminal of transistor 312 is connected to wiring 32, and the gate of transistor 312 It is connected to wiring 35. The first terminal of transistor 313 is connected to wiring 37. The second terminal of transistor 313 is connected to wiring 32. The first terminal of transistor 314 The terminal of transistor 314 is connected to wiring 37, and the second terminal of transistor 314 is connected to transistor 31 The gate of transistor 314 is connected to the gate of transistor 313. The first terminal of transistor 315 is connected to wire 36, and transistor 3 The second terminal of 15 is connected to the gate of transistor 311, and the gate of transistor 315. The terminal is connected to wiring 31. The first terminal of transistor 316 is connected to wiring 36. The second terminal of transistor 316 is connected to the gate of transistor 313, The gate of transistor 316 is connected to wiring 38. The first terminal of transistor 317 is The gate of transistor 317 is connected to wiring 35, and is connected to wiring 36. The first terminal of transistor 318 is connected to the second terminal of transistor 317, and the transistor The second terminal of transistor 318 is connected to the gate of transistor 313, and transistor 318 The gate of the transistor is connected to wiring 34. The first terminal of transistor 319 is connected to wiring 37. The second terminal of transistor 319 is connected to the gate of transistor 313. The gate of transistor 319 is connected to wiring 31.

[0096] Furthermore, the gate of transistor 311, the second terminal of transistor 314, and the transistor The connection point with the second terminal of transistor 315 is indicated as node C. The gate of transistor 313 and The gate of transistor 314, the second terminal of transistor 316, and transistor 31 The connection point between the second terminal of 8 and the second terminal of transistor 319 is indicated as node D.

[0097] Note that transistors 311-319 are assumed to be N-channel type. Therefore, this is a practical All semiconductor devices in this configuration can be constructed using N-channel transistors. However, this embodiment is not limited to this example. For example, transistors 311-3 All 19 can be P-channel type.

[0098] In circuit 310_i, wire 31 is connected to wire 21_i-1. Wire 32 is Wiring 21_i is connected. Wirings 33-35 are selected from wirings 24_1-24_4. It is connected to three wires. For example, if wire 33 is connected to wire 24_1, Wire 34 is connected to wire 24_2, and wire 35 is connected to wire 24_3. Wire 36 is Wiring 25 is connected. Wiring 37 is connected to wiring 27. Wiring 38 is connected to wiring 21_ It is connected to i+2. However, in circuit 310_1, wire 31 is connected to wire 23. It will be done.

[0099] Next, an example of the operation of circuit 300 will be described.

[0100] Figure 16 shows an example of a timing chart that can be used for circuit 310_i. The timing chart shown in 6 is for signals IN33, IN34, IN35, and SO UTi-1, signal SOUTi+1, potential at node C (potential Vc), potential at node D (potential Vd) and signal SOUTi are shown. The timing chart shown in Figure 16 is for period T It shall have periods 1 to T9. Periods T5 to T9 are arranged in order, and period T The elements 1 through T4 are arranged in a repeating sequence.

[0101] First, during period T1, signal SOUTi becomes L level, and signal SOUTi+2 becomes L level. The bell rings, signal IN33 goes to L level, signal IN34 goes to H level, signal IN 35 becomes high level. Therefore, transistor 316 turns off, and transistor 31 7 turns on, transistor 318 turns on, and transistor 319 turns off. Then, node D becomes conductive with wiring 36. Consequently, node D is at the potential of wiring 36 ( For example, when voltage VDD is supplied, the potential of node D rises. Therefore, Transistor 314 turns on. At this time, transistor 315 turns off, so node C This creates a conductive state with wiring 37. Then, node C receives the potential (voltage VSS) of wiring 37. Since this is supplied, the potential of node C will be approximately VSS. Therefore, transistor 3 11 turns off. At this time, transistors 312 and 313 turn on. Therefore, wiring 32 becomes conductive with wiring 37. Then, the potential (voltage VSS) of wiring 37 is supplied to wiring 32, so the potential of wiring 32 becomes approximately VSS. Thus, signal SOUTi becomes the L level.

[0102] Next, in period T2, compared with period T1, the difference is that signal IN34 becomes the L level. Therefore, transistor 318 turns off, so wiring 36 and node D become non-conductive. Then, node D becomes a floating state, so the potential of node D maintains the potential in period T1.

[0103] Next, in period T3, compared with period T2, the differences are that signal IN33 becomes the H level and signal IN3 5 becomes the L level. Therefore, transistors 317 and transistor 312 turn off.

[0104] Next, in period T4, compared with period T3, the difference is that signal IN34 becomes the H level. Therefore, transistor 318 turns on.

[0105] Next, in period T5, signal SOUTi becomes the H level, signal SOUTi+2 becomes the L level signal IN33 becomes the L level, signal IN34 becomes the L level, and signal IN35 becomes the H level. Therefore, transistor 316 turns off, transistor 317 turns on, transistor 318 turns off, and transistor 319 turns on. Thus, wiring 37 and node D become conductive. Then, the potential (voltage VSS) of wiring 37 is supplied to node D, so the potential of node D becomes approximately VSS. Therefore, the transistor Transistor 314 turns off. At this time, transistor 315 turns on, so node C This creates a conductive state with wiring 36. Then, the potential of wiring 36 is supplied to node C. Then, the potential of node C begins to rise. Eventually, the potential of node C reaches the potential of wiring 32 (VSS). ) and the sum of the threshold voltage of transistor 311 (Vth311) (VSS+Vth311) Yes. Then transistor 311 turns on. At this time, transistor 312 turns on. As a result, transistor 313 turns off, and wire 32 is connected to wires 37 and 33. The circuit becomes open. Then, the potential (voltage VSS) of wiring 37 and the potential of wiring 33 are connected to wiring 32. (L-level signal IN33) is supplied, so the potential of wiring 37 is approximately VSS. Thus, the signal SOUTi becomes L level. Subsequently, the potential of node C continues to rise. Eventually, the potential of node C becomes VDD1-Vth315 (Vth315 is transistor 3 The threshold voltage becomes 15. Then, transistor 315 turns off, and node C becomes floating. This state is maintained. Therefore, the potential of node C is maintained at VDD1-Vth315.

[0106] Next, during period T6, signal SOUTi-1 remains at a high level, and signal SOUTi+2 The signal remains at a low level, signal IN33 becomes high level, and signal IN34 remains at a low level. As a result, signal IN35 becomes low. Therefore, transistor 316 remains off. As a result, transistor 317 turns off, and transistor 318 remains off. Since transistor 319 remains on, node D remains in continuity with wiring 37. Therefore, the potential (voltage VSS) of wiring 37 remains supplied to node D. Therefore, the potential at node D remains roughly at VSS. As a result, transistor 314 is turned off. It remains as is. At this time, transistor 315 remains off. Then node C is Because it becomes a floating state, the potential of node C remains at VDD1-Vth315. , transistor 311 remains on. And transistors 312 and 312 Since terminal 313 is turned off, wiring 32 becomes conductive with wiring 33. At this time, signal I As N33 reaches a high level, the potential of wiring 32 begins to rise. At the same time, the potential of node C However, due to the bootstrap operation, it rises. As a result, the potential of node C becomes VDD1+ It rises to Vth311 (where Vth311 is the threshold voltage of transistor 311) + V1. Therefore, the potential of wiring 32 rises to approximately VDD1. In this way, the signal SOUTi This will be at level H.

[0107] Next, during period T7, signal SOUTi-1 becomes low and signal IN34 becomes high. This is different from period T6. Therefore, transistor 318 turns on, The inverter 319 turns off. Then, node D becomes floating, and the potential of node D... It is generally maintained at VSS.

[0108] Next, during period T8, signal SOUTi-1 remains at a low level, and signal SOUTi+2 When the signal becomes high, signal IN33 becomes low, and signal IN34 remains high. As a result, the signal IN35 becomes high level, so transistor 316 turns on, and the transistor Transistor 317 turns on, transistor 318 turns on, and transistor 319 turns off. As a result, node D becomes electrically connected to wiring 36. Then, node D is connected to the wiring Since a potential of 36 (voltage VDD1) is supplied, the potential of node D rises. Therefore, transistor 314 turns on. At this time, transisttor 315 remains off, and node C becomes conductive with wiring 37. Then, the potential of wiring 37 ( voltage VSS) is supplied to node C, so the potential of node C becomes approximately VSS. Therefore, transistor 311 turns off. At this time, since transisttors 312 and 313 turn on, wiring 32 becomes conductive with wiring 33 and wiring 37. Then, since the potential of wiring 37 (voltage VSS) is supplied to wiring 32, the potential of wiring 32 becomes approximately VSS. Thus, signal SOUTi becomes the L level.

[0109] Next, in period T9, compared with period T8, the difference is that signal IN34 becomes the L level. Therefore, transisttor 318 turns off. <[

[0110] The above described an example of circuit 300.

[0111] Note that the gate of transisttor 317 can be connected to wiring 34, and the gate of transisttor 318 can be connected to wiring 35.

[0112] Note that transisttor 319 can be omitted.

[0113] Note that transisttor 312 can be omitted.

[0114] (Embodiment 3) In this embodiment, an example of a display device and an example of a pixel included in the display device will be described. Particularly, an example of a liquid crystal display device and an example of a pixel included in the liquid crystal display device will be described. Note that in this The drive circuit of the display device in the embodiment has the semiconductor device of Embodiment 1 to Embodiment 2. This is possible.

[0115] First, an example of the display device of this embodiment will be described.

[0116] Figure 17(A) shows an example of the display device of this embodiment. The display device shown in Figure 17(A) is Circuit 1001, Circuit 1002, Circuit 1003_1, Pixel section 1004 and terminal 1005 It shall have multiple wires extending from circuit 1003_1 to the pixel section 1004. These multiple wires shall be placed as gate signal lines (also called scan lines) It shall have a function. Alternatively, the pixel section 1004 shall have multiple wires from the circuit 1002. They shall be arranged in an extended manner. The multiple wires shall be video signal lines (or data lines) It shall have the function of (u). And it shall be arranged as an extension from circuit 1003_1. Corresponding to multiple wires and multiple wires extending from circuit 1002, multiple Pixels are to be arranged. However, this embodiment is not limited to this example. For example, various other wirings can be arranged in the pixel section 1004. It can function as a gate signal line, data line, power line, or capacitance line, etc. ru.

[0117] In the display device shown in Figure 17(A), circuit 1003_1 is on the same substrate 100 as the pixel unit 1004. 6 is formed, and circuits 1001 and 1002 are formed on a separate substrate from the pixel section 1004. The driving frequency of circuit 1003_1 shall be compared with that of circuit 1001 or circuit 1002. Therefore, it is often slow. For this reason, amorphous semiconductors are used as the semiconductor layer of transistors. This makes it easier to use materials such as crystalline semiconductors, microcrystalline semiconductors, oxide semiconductors, and organic semiconductors. As a result, the display device can be made larger. Alternatively, the display device can be manufactured at a lower cost. can.

[0118] Circuit 1001 supplies signals, voltage, or current to circuits 1002 and 1003_1. It has a function to control the timing of the operation. Alternatively, circuit 1001 and circuit 1002 have a function to control the timing of the operation. It has the function of controlling path 1003_1. Thus, circuit 1001 is a controller, It has functions as a control circuit, timing generator, power supply circuit, or regulator, etc. It shall be assumed that...

[0119] Circuit 1002 has the function of controlling the timing of supplying the video signal to the pixel unit 1004. Alternatively, circuit 1002 controls the brightness or transmittance of the pixels in the pixel section 1004. It has a function to control. Thus, circuit 1002 is a drive circuit, a source driver circuit or It shall have functions such as a signal line drive circuit.

[0120] Circuit 1003_1 has a function to control the timing of supplying the gate signal to the pixel unit 1004. It has a function to control the timing of pixel selection. Alternatively, circuit 1003_1 has a function to control the timing of pixel selection. Thus, circuit 1003_1 is a gate driver (also called a scan line driving circuit). It shall have the function of ).

[0121] As shown in Figure 17(B), the display device of this embodiment has circuit 1003_2. It is possible to do so. Circuit 1003_2 has the same function as circuit 1003_1. And so, the same wiring is driven by circuits 1003_1 and 1003_2. This reduces the load on circuits 1003_1 and 1003_2. However, this embodiment is not limited to this example. For example, if circuit 1003_1 is odd The gate signal line of the first stage is driven, and circuit 1003_2 drives the gate signal lines of the even-numbered stages. This makes it possible to reduce the drive frequency of circuits 1003_1 and 1003_2. It can be cut. As another example, the display device of this embodiment has circuit 1003_1 and It is possible to have three or more circuits with similar functions.

[0122] In the display device shown in Figure 17(B), circuits 1003_1 and 1003_2 are pixels. Circuits 1001 and 1002 are formed on the same substrate 1006 as part 1004, and the pixel part 10 It shall be formed on a separate substrate from 04. The dynamic frequency is often slower compared to circuit 1001 or circuit 1002. Therefore, The semiconductor layer of the transistor can be an amorphous semiconductor, amorphous semiconductor, a microcrystalline semiconductor, or an oxide semiconductor. This makes it easier to use materials such as organic semiconductors. As a result, it becomes possible to enlarge the display device. Yes, it is possible. Or, display devices can be manufactured inexpensively.

[0123] Furthermore, as shown in Figure 17(C), circuits 1002, 1003_1 and 1003_ 2 is formed on the same substrate 1006 as the pixel portion 1004, and circuit 1001 is different from the pixel portion 1004. It can be formed on a separate substrate. This allows for a reduction in external circuitry. Therefore, it is possible to improve reliability, reduce manufacturing costs, or increase yield.

[0124] Furthermore, as shown in Figure 17(D), some of the circuits 1002, circuits 1002a and 1003 _1 and circuit 1003_2 are formed on the same substrate 1006 as the pixel section 1004, and circuit 100 The circuit 1002b of another part of 1 can be formed on a separate substrate from the pixel section 1004. Yes. Circuit 1002a includes a ratio of switches, shift registers and / or selectors. It is possible to use circuits with relatively low drive frequencies. This allows for the semiconductor of the transistor to be used. The semiconductor layers include amorphous semiconductors, amorphous materials, microcrystalline semiconductors, oxide semiconductors, and organic semiconductors. This makes it easier to use. As a result, the display device can be made larger. Or, Display devices can be manufactured at a low cost.

[0125] Note that circuits 1003_1, 1003_2, 1002 and / or 1002a As a part, the semiconductor devices of Embodiments 1 and 2 can be used. Since the dynamic voltage can be reduced, power consumption can be reduced.

[0126] Next, an example of a pixel in the pixel unit 1004 will be described.

[0127] Figure 17(E) shows an example of a pixel. Pixel 3020 is a transistor 3021, liquid crystal element It has 3022 and a capacitive element 3023. The first terminal of transistor 3021 is connected to wiring 3 Connected to 031, the second terminal of transistor 3021 is connected to one of the power sources of liquid crystal element 3022. The electrode and one electrode of the capacitive element 3023 are connected, and the gate of the transistor 3021 is connected. It is connected to wire 3032. The other electrode of liquid crystal element 3022 is connected to electrode 3034. The other electrode of the capacitive element 3023 is connected to the wiring 3033.

[0128] A video signal is input to wiring 3031 from circuit 1002 shown in Figures 17(A) to (D). Therefore, wiring 3031 is connected to the video signal line (also called the source signal line) and It shall have the function of the following. The wiring 3032 is connected to circuit 1 shown in Figures 17(A) to (D). A gate signal is input from circuit 003_1 and / or circuit 1003_2. Wiring 3032 shall function as a gate signal line. Wiring 3033 and electric A constant voltage is supplied to pole 3034 from circuit 1001 shown in Figures 17(A) to (D). Therefore, wiring 3033 shall function as a power line or a capacitance line. Alternatively, electrode 3034 shall function as a common electrode or a counter electrode. However, this embodiment is not limited to this example. For example, wiring 3031 has a pre A charge voltage can be supplied. The precharge voltage is supplied to electrode 3034. The voltage is often approximately equal to the value of the applied voltage. As another example, wiring 3033 has a signal A number can be input. In this way, the voltage applied to the liquid crystal element 3022 can be controlled. This makes it possible to reduce the amplitude of the video signal and enable inverted drive. As another example, a signal can be input to electrode 3034. In this way, This enables frame reversal drive.

[0129] Transistor 3021 is in a state of electrical conductivity between wiring 3031 and one electrode of liquid crystal element 3022. It shall have a function to control the timing of writing the video signal to the pixels. It shall have a control function. Thus, transistor 3021 shall be a switch. The capacitive element 3023 shall have the function of controlling the electrical charge of one electrode of the liquid crystal element 3022. It shall have the function of maintaining the potential difference between the position and the potential of wiring 3033. Alternatively, liquid crystal The element 3022 shall have a function to maintain a constant voltage. As shown above, the capacitive element 3023 is assumed to have the function of a retaining capacitance.

[0130] (Embodiment 4) This embodiment describes an example of a semiconductor device and an example of its operation. In particular, an example of a signal line driving circuit and an example of its operation will be described.

[0131] First, an example of the signal line driving circuit of this embodiment will be described.

[0132] Figure 18(A) shows an example of the signal line drive circuit of this embodiment. The signal shown in Figure 18(A) The line drive circuit shall have circuits 2001 and 2002. Circuit 2002 is Assume there are multiple circuits named Path 2002_1 to 2002_N (where N is a natural number). Lines 2002_1 to 2002_N are, respectively, transistors 2003_1 to 2003_k (k The system is assumed to have multiple transistors (where is a natural number). The signal line drive cycle of this embodiment The connection relationships of the circuits will be explained using circuit 2002_1 as an example. Transistor 2003_ The first terminals of 1-2003_k are connected to wiring 2004_1-2004_k, respectively. The second terminals of transistors 2003_1 to 2003_k are connected to wires S1 to Sk, respectively. The gates of transistors 2003_1 to 2003_k are connected to wiring 2005_1. It will continue.

[0133] Note that transistors 2003_1 to 2003_k are N-channel type. However, this actual Examples of the form of implementation are not limited to this. For example, transistor 2003_1~2003 All of _k can be of type P-channel.

[0134] Circuit 2001 outputs high-level signals sequentially to wiring 2005_1 to 2005_N. It has a function to control the timing. Alternatively, select circuits 2002_1 to 2002_N in order. It has a selection function. Thus, circuit 2001 has the function of a shift register. However, this embodiment is not limited to this example. For example, circuit 2001 is distributed It is possible to output high-level signals in various sequences on lines 2005_1 to 2005_N. Alternatively, it is possible to select circuits 2002_1 to 2002_N in various orders. Thus, circuit 2001 can function as a decoder.

[0135] Circuit 2002_1 is a circuit where wiring 2004_1~2004_k and wiring S1~Sk are electrically connected. It has a function to control the timing. Alternatively, circuit 2002_1 is connected to wiring 2004_1~2 This has a function to control the timing of supplying the potential of 004_k to the wiring S1~Sk. Thus, circuit 2002_1 can function as a selector.

[0136] Note that circuits 2002_2 to 2002_N have the same functionality as circuit 2002_1. Let's assume that.

[0137] Next, transistors 2003_1 to 2003_N are connected to wiring 2004_1 to 2004, respectively. It has a function to control the timing when _k and wiring S1~Sk become conductive. Alternatively, Zistar 2003_1~2003_N each control the potential of wiring 2004_1~2004_k. It has a function to control the timing supplied to wiring S1~Sk. For example, transistor 2 003_1 has the function of controlling the timing when wiring 2004_1 and wiring S1 become electrically connected. Alternatively, transistor 2003_1 supplies the potential of wiring 2004_1 to wiring S1. It has a function to control the timing of the operation. In this way, transistor 2003_1~20 Each of the 03_N units can function as a switch.

[0138] In addition, signals are often input to wiring 2004_1 to 2004_k. In many cases, the signal is an analog signal corresponding to image information (also called an image signal). Thus, the signal can function as a video signal. Therefore, Wiring lines 2004_1 to 2004_k can function as signal lines. Furthermore, this embodiment is not limited to this example. For example, depending on the pixel configuration, It can be a tally signal, it can be an analog voltage, and analog It is possible for it to be an electric current.

[0139] Next, we will explain an example of the operation of the signal line driving circuit shown in Figure 18(A).

[0140] Figure 18(B) shows a timing curve that can be used in the signal line drive circuit of this embodiment. An example is shown. The timing chart shown in Figure 18(B) shows signals 2015_1~20 An example of 15_N and signals 2014_1~2014_k is shown. Signals 2015_1~201 5_N are examples of output signals from circuit 2001, and signals 2014_1~2014_ k is an example of a signal input to wiring 2004_1 to 2004_k. The operation period of the gate drive circuit shall correspond to the gate selection period in the display device. The gate selection period shall be divided into period T0 and periods T1 to TN. T0 is the period for simultaneously applying a pre-charge voltage to the pixels belonging to the selected row. It shall function as a pre-charge period. Periods T1 to TN shall each be selected The period for writing the video signal to the pixels belonging to the selected row, and the writing period It shall have the necessary functions.

[0141] First, during period T0, circuit 2001 has H level wiring 2005_1~2005_N. The signal is supplied. Then, for example, in circuit 2002_1, transistor 200 Since 3_1~2003_k will be turned on, wires 2004_1~2004_k and wire S1 ~Sk becomes conductive. At this time, wiring 2004_1~2004_k has prechart The precharge voltage Vp is supplied. Therefore, the precharge voltage Vp is the transistor 2003_ Outputs are sent to wiring S1 to Sk via 1 to 2003_k. Therefore, the preacher The voltage Vp is written to the pixels belonging to the selected row, so the pixels belonging to the selected row The base is pre-charged.

[0142] During periods T1 to TN, circuit 2001 receives a high-level signal via wiring 2005_1 to 2 Outputs to 005_N in order. For example, during period T1, circuit 2001 outputs H level The signal is output to wiring 2005_1. Then, transistors 2003_1~2003_k Since it turns on, wiring 2004_1~2004_k and wiring S1~Sk become conductive. Yes. At this time, the wiring 2004_1~2004_k will have Data(S1)~Data( Sk) is input. Data(S1) to Data(Sk) are each from transistor 20 Through 03_1~2003_k, the pixels belonging to the selected row, from column 1 to column k It is written to the pixel. In this way, for the period T1 to TN, the pixels belonging to the selected row are written to The video signal is written sequentially, in k columns at a time.

[0143] As described above, the video signal is written to the pixels in multiple columns, The number of connections or wires can be reduced. Therefore, the number of connections to external circuits can be reduced. Therefore, it is possible to improve yield, improve reliability, reduce the number of parts and / or reduce costs. This can be done by writing the video signal to the pixels in multiple columns. The writing time can be extended. Therefore, it prevents insufficient writing of the video signal. This allows for an improvement in the quality of the displayed information.

[0144] Furthermore, increasing k can reduce the number of connections to external circuits. However, If k is too large, the time it takes to write to the pixels decreases. Therefore, it is preferable that k ≤ 6. It is preferable that k ≤ 3. Even more preferable that k = 2. This is preferable. However, this example of the embodiment is not limited to this.

[0145] In particular, if a pixel has n color elements (where n is a natural number), then k = n or k = n × d (where d is a natural number). It is preferable that the number of color elements of a pixel is red (R), green (G), and blue (B). When divided into three parts, it is preferable that k=3 or k=3×d. However, in this implementation Examples of forms are not limited to these. For example, a pixel may have m (where m is a natural number) subpixels. When a pixel is divided into subpixels (also called secondary pixels), k=m or k=m It is preferable that ×d. For example, when a pixel is divided into two subpixels, k=2. It is preferable that there be a case where there are n color elements in the pixel, k = m × n or k = m × It is preferable that the number of parts is n × d. However, the example of this embodiment is not limited to this.

[0146] Furthermore, all of the signal line driving circuits in this embodiment can be formed on the same substrate as the pixel section. Furthermore, all of the signal line driving circuits in this embodiment are on a separate substrate from the pixel section (for example, a silicon It can be formed on a substrate (such as a concrete substrate or an SOI substrate). Alternatively, the reliability of this embodiment A portion of the line drive circuit (for example, circuit 2002) is formed on the same substrate as the pixel section, in the form of this embodiment. Another part of the signal line driving circuit (e.g., circuit 2001) is formed on a separate substrate from the pixel section. It is possible.

[0147] Figure 18(C) shows that circuits 2001 and 2002 are formed on the same substrate as the pixel section 2007. An example of the configuration in this case is shown. This shows the connection between the substrate on which the pixel portion is formed and the external circuit. Since the number can be reduced, it can lead to improved yield, improved reliability, reduced part count, or lower costs. This can lead to reductions in the scanning line drive circuit 2006A and scanning line drive circuit 2 006B is also formed on the same substrate as the pixel section 2007, further improving the connection with external circuits. The number of successors can be reduced.

[0148] Figure 18(D) shows that the circuit 2002 is formed on the same substrate as the pixel section 2007. This shows an example of a configuration when circuit 2001 is formed on a separate substrate. Even in this case, the pixel section Since the number of connections between the substrate on which the coating is formed and the external circuit can be reduced, the yield can be improved. Reliability can be improved, the number of parts can be reduced, or costs can be reduced. Alternatively, the pixel part Since fewer circuits are formed on the same circuit board as in 2007, the bezel can be made smaller.

[0149] Furthermore, the semiconductor devices of Embodiments 1 and 2 can be used as circuit 2001. This allows for a reduction in the driving voltage, thereby reducing power consumption. Alternatively, the polarity of all transistors can be set to N-channel type, thus the manufacturing process This allows for reductions. Therefore, it can lead to improved yield, reduced manufacturing costs, or improved reliability. It is possible to aim higher.

[0150] (Embodiment 5) This embodiment describes an example of the structure of a semiconductor device. In particular, the structure of a transistor Let me explain an example of construction.

[0151] First, the structure of the transistor in this embodiment will be described.

[0152] Figure 19(A) shows an example of a top-gate type transistor and a display element formed on it. An example is shown. The transistor shown in Figure 19(A) consists of a substrate 5260 and an insulating layer 5261 and region 5262a, region 5262b, region 5262c, region 5262d, and 5262 A semiconductor layer 5262 having e, an insulating layer 5263, a conductive layer 5264, and an opening It has an insulating layer 5265 and a conductive layer 5266. The insulating layer 5261 is on the substrate 5260. The semiconductor layer 5262 is formed on top of the insulating layer 5261. The insulating layer 5263 is , is formed to cover the semiconductor layer 5262. The conductive layer 5264 is formed to cover the semiconductor layer 5262 and It is formed on top of the insulating layer 5263. The insulating layer 5265 is formed on top of the insulating layer 5263 and the conductive layer 526 The conductive layer 5266 is formed on top of 4. The conductive layer 5266 is formed on top of the insulating layer 5265 and at the openings of the insulating layer 5265. It is formed in this section. In this way, a top-gate type transistor is formed.

[0153] Figure 19(B) shows an example of a bottom-gate type transistor and a display element formed on it. An example is shown. The transistor shown in Figure 19(B) consists of a substrate 5300 and a conductive layer 5301 And, insulating layer 5302, semiconductor layer 5303a, semiconductor layer 5303b, conductive layer 5304 It has an insulating layer 5305 having an opening and a conductive layer 5306. The conductive layer 5301 is It is formed on the substrate 5300. The insulating layer 5302 is formed to cover the conductive layer 5301. The semiconductor layer 5303a is formed on the conductive layer 5301 and the insulating layer 5302. The conductive layer 5303b is formed on top of the semiconductor layer 5303a. The conductive layer 5304 is a semiconductor It is formed on layer 5303b and on insulating layer 5302. Insulating layer 5305 is formed on insulating layer 53 It is formed on 02 and on the conductive layer 5304. The conductive layer 5306 is formed on the insulating layer 5305. and is formed in the opening of the insulating layer 5305. In this way, a bottom gate type transistor is formed It is formed.

[0154] Figure 19(C) shows an example of a transistor formed on a semiconductor substrate. The transistor has a semiconductor substrate 5352 having regions 5353 and 5355, and an insulating Layer 5356, insulating layer 5354, conductive layer 5357, insulating layer 5358 having an opening It has a conductive layer 5359. The insulating layer 5356 is formed on the semiconductor substrate 5352. The edge layer 5354 is formed on the semiconductor substrate 5352. The conductive layer 5357 is formed on the insulating layer 53 It is formed on top of 56. The insulating layer 5358 is formed on top of insulating layer 5354, insulating layer 5356 and conductive layer The conductive layer 5359 is formed on top of the insulating layer 5358 and the insulating layer 5358 It is formed in the opening. Thus, in region 5350 and region 5351, respectively, Ta is created.

[0155] Furthermore, in the transistors shown in Figures 19(A) to (C), as shown in Figure 19(A), On top of the transistor, there is an insulating layer 5267 having an opening, a conductive layer 5268, and It is possible to form an insulating layer 5269, an emitting layer 5270, and a conductive layer 5271. The insulating layer 5267 is formed on the conductive layer 5266 and the insulating layer 5265. Layer 5268 is formed on top of insulating layer 5267 and in the openings of insulating layer 5267. 269 ​​is formed on the insulating layer 5267 and the conductive layer 5268. The light-emitting layer 5270 is The conductive layer 5271 is formed on the insulating layer 5269 and in the openings of the insulating layer 5269. It is formed on the margin layer 5269 and on the light-emitting layer 5270.

[0156] Furthermore, in the transistors shown in Figures 19(A) to (C), as shown in Figure 19(B), It is possible to form a liquid crystal layer 5307 and a conductive layer 5308 on top of the transistor. The liquid crystal layer 5307 is placed on top of the insulating layer 5305 and the conductive layer 5306. Layer 5308 is formed on top of the liquid crystal layer 5307.

[0157] In addition to the layers shown in Figures 19(A) to (C), it is also possible to form various other layers. For example, on the insulating layer 5305 and on the conductive layer 5306, there is a film that functions as an alignment film. It is possible to form an insulating layer and / or an insulating layer that functions as a protrusion. As another example, on top of the conductive layer 5308, there is an insulating layer, colorfill, which functions as a protrusion. It is possible to form a matrix and / or a black matrix, as another example. It is possible to form an insulating layer having the function of an orientation film beneath layer 5308.

[0158] Note that regions 5262c and 5262e are regions to which impurities are added, and the source region It shall have the function of a region or drain region. Region 5262b and Region 5262 d is a region where impurities are added at a lower concentration than in region 5262c or region 5262e. It shall function as an LDD (Lightly Doped Drain) area. Region 5262a is a region where no impurities have been added, and it functions as a channel region. It has. However, this embodiment is not limited to this example. For example, region 5262 It is possible to add impurities to a. In this way, the characteristics of the transistor can be improved. This allows for control of the threshold voltage, etc. However, when added to region 5262a The concentration of impurities is in region 5262b, region 5262c, region 5262d, or region 5262e. It is preferable that the concentration is lower than that of the impurities added. As another example, region 5262c or Region 5262e can be omitted. Or, only N-channel transistors. It is possible to provide region 5262c or region 5262e.

[0159] Furthermore, semiconductor layer 5303b is a semiconductor layer to which phosphorus and other impurity elements are added. It shall have an n-type conductivity. However, the semiconductor layer 5303a may be an oxide semiconductor or When a compound semiconductor is used, the semiconductor layer 5303b can be omitted.

[0160] For example, a semiconductor substrate (e.g., semiconductor substrate 5352) can be an n-type or p-type conductive type. A single-crystal Si substrate having is available. And region 5353 is semiconductor group This region of plate 5352 has impurities added to it and functions as a well. For example, if the semiconductor substrate 5352 has a p-type conductivity, then region 5353 has an n-type conductivity. It shall have the following characteristics. On the other hand, for example, if the semiconductor substrate 5352 has an n-type conductivity. Region 5353 shall have a p-type conductivity. Region 5355 shall have impurities in the semiconductor. This is a region added to substrate 5352 and has the function of either a source region or a drain region. It shall be so. Furthermore, it is possible to form an LDD region on the semiconductor substrate 5352.

[0161] Next, we will explain an example of the functions that each layer possesses.

[0162] The insulating layer 5261 shall function as an undercoat. The insulating layer 5354 shall function between elements. It shall function as a separation layer (e.g., a field oxide film). Insulating layer 5263, The insulating layer 5302 and the insulating layer 5356 shall function as gate insulating films. The conductive layer 5264, conductive layer 5301, and conductive layer 5357 have the function of gate electrodes. The insulating layers 5265, 5267, 5305 and 5358 shall be , having the function of an interlayer film or planarization film. Conductive layer 5266, conductive layer 530 4 and the conductive layer 5359 are used as wiring, electrodes for transistors, or electrodes for capacitive elements. It shall have the ability. Conductive layer 5268 and conductive layer 5306 are pixel electrodes or reflective electrodes. It shall have the function of a partition. The insulating layer 5269 shall have the function of a partition. The conductive layer 5271 and the conductive layer 5308 function as counter electrodes or common electrodes, etc. It shall have the following characteristics. However, this embodiment is not limited to this example.

[0163] Next, we will describe the materials, structure, and characteristics of each layer.

[0164] First, as an example of a substrate (for example, substrate 5260 or substrate 5300), a semiconductor substrate (for example) (e.g., single crystal substrate or silicon substrate), SOI substrate, glass substrate, quartz substrate, plastic substrate Plates, metal substrates, stainless steel substrates, substrates having stainless steel foil, Tungsten substrate, substrate with tungsten foil, flexible substrate, laminated film Examples include paper containing fibrous materials, or substrate films. An example of a glass substrate is... Aluminoborosilicate glass, aluminoborosilicate glass, or soda-lime glass are examples of such materials. Examples of flexible substrates include polyethylene terephthalate (PET) and polyethylene. Plastics such as naphthalate (PEN) and polyethersulfone (PES) Or, flexible synthetic resins such as acrylic. An example of a laminated film is... For example, polypropylene, polyester, vinyl, polyvinyl fluoride, or vinyl chloride. Examples of base films include polyester, polyamide, polyimide, and inorganic vapor. These include adhesive films or paper materials. In particular, semiconductor substrates, single crystal substrates, or SOI substrates. By manufacturing transistors using this method, variations in characteristics, size, or shape can be reduced. This allows for the manufacture of transistors with low current capacity, high current capability, and small size. When circuits are constructed using such transistors, the power consumption of the circuit can be reduced, or the circuit can be highly integrated. It is possible to achieve transformation.

[0165] Furthermore, a transistor is formed on one substrate, and then the transistor is transferred to another substrate. This is possible. Examples of other substrates include, in addition to the above-mentioned substrates, paper substrates and cellophane substrates. Substrates, stone substrates, wood substrates, fabric substrates (natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyester) Polyurethane, polyester) or regenerated fibers (acetate, cupro, rayon, recycled) These include substrates containing polyester, leather substrates, or rubber substrates. By doing so, it is possible to form transistors with good characteristics and transistors with low power consumption. This allows for the manufacture of more durable devices, improved heat resistance, weight reduction, and thinner designs.

[0166] Furthermore, all the circuits necessary to achieve the specified function are placed on the same substrate (for example, glass It can be formed on substrates, plastic substrates, single crystal substrates, or SOI substrates, etc. This reduces costs by reducing the number of components, or by reducing the number of connections to circuit components. This can lead to improved reliability.

[0167] Furthermore, it is not necessary to form all the circuits required to achieve a given function on the same circuit board. It is possible. In other words, some of the circuits necessary to realize a predetermined function are formed on a certain substrate. Furthermore, another part of the circuit necessary to achieve the predetermined function is formed on a separate substrate. It is possible to do so. For example, a part of the circuit necessary to realize a certain function is made of glass. Another part of the circuitry formed on the substrate and necessary to realize a predetermined function is a single crystal substrate. It can be formed on (or SOI substrate). And to realize a predetermined function A single crystal substrate (also called an IC chip) on which another part of the necessary circuitry is formed is called COG ( The IC is connected to a glass substrate via a Chip-On-Glass (Chip On Glass) and the IC is placed on the glass substrate. It is possible to place the chip. Alternatively, the IC chip can be placed using TAB (Tape Auto). omated Bonding), COF(Chip On Film), SMT(Su Using glass (rface Mount Technology), or printed circuit boards, etc. It can be connected to a circuit board.

[0168] Next, the insulating layer (for example, insulating layer 5261, insulating layer 5263, insulating layer 5265, insulating layer 526 7. Examples of insulating layers 5269, 5305, 5356, and 5358) For example, a film containing oxygen or nitrogen (e.g., silicon oxide (SiOx), silicon nitride (SiNx)) , silicon oxide nitride (SiOxNy) (x>y>0), silicon oxide nitride (SiNxOy) (x> y>0) etc., carbon-containing films (e.g., DLC (diamond-like carbon), organic Materials (e.g., siloxane resin, epoxy, polyimide, polyamide, polyvinylphenyl) Single-layer structures of ammonium compounds, benzocyclobutene, or acrylics, or laminated structures thereof. There are such examples. However, this embodiment is not limited to these examples.

[0169] Furthermore, if the insulating layer has a two-layer structure, a silicon nitride film is provided as the first insulating layer, and the second layer A silicon oxide film is provided as an insulating layer. If the insulating layer has a three-layer structure, the first insulating layer A silicon oxide film is provided as the first insulating layer, a silicon nitride film is provided as the second insulating layer, and the third insulating layer is It is preferable to provide a silicon oxide film.

[0170] Next, semiconductor layers (for example, semiconductor layer 5262, semiconductor layer 5303a, and semiconductor layer 5303b) Examples of such semiconductors include non-single-crystal semiconductors (e.g., amorphous silicon, multicrystalline silicon). Crystalline silicon, microcrystalline silicon, etc., single-crystal semiconductors, compound semiconductors, or oxide semiconductors (For example, ZnO, InGaZnO, SiGe, GaAs, IZO (Indium zinc acid) Indium tin oxides, ITO (indium tin oxide), SnO, TiO, AlZnSnO (AZTO) Examples include organic semiconductors, or carbon nanotubes.

[0171] Furthermore, when manufacturing polycrystalline silicon or microcrystalline silicon, a catalyst (such as nickel) is used. By doing so, the crystallinity is further improved, and transistors with good electrical properties can be manufactured. This is possible. Therefore, gate driver circuit (scan line drive circuit), source driver circuit (signal driver circuit) (Line drive circuit), part of the source driver circuit (e.g., a switch for splitting the video signal) ) and signal processing circuits (signal generation circuit, gamma correction circuit, DA conversion circuit, etc.) are mounted on the board. It can be formed into a body. In particular, microcrystalline silicon can be produced using a catalyst (such as nickel). In this case, crystallinity can be improved simply by applying heat treatment without laser irradiation. This is possible. Therefore, it is possible to suppress unevenness in the crystalline structure of silicon, thus improving image quality. It is possible to display improved images. However, without using a catalyst (such as nickel), multi-phase It is possible to manufacture crystalline silicon or microcrystalline silicon.

[0172] Furthermore, improving the crystallinity of silicon to polycrystalline or microcrystalline forms can affect the entire panel. It is desirable to do so, but it is not limited to this. In only a portion of the panel, silicon The crystallinity of the material may be improved. Selectively improving crystallinity is achieved by selecting the laser light. This can be achieved by illuminating the target, for example, the peripheral circuit region, which is an area other than the pixel. Areas such as gate driver circuits and source driver circuits, or parts of source driver circuits. Areas where the circuit needs to operate at high speed, such as the area of ​​analog switches. It is possible to irradiate it with laser light. On the other hand, the pixel area is operated at high speed. Because the need is low, the pixel circuit can operate without problems even if the crystallinity is not improved. This allows for a smaller area to be used to improve crystallinity, thus shortening the manufacturing process. This allows for improved throughput and reduced manufacturing costs. Furthermore, because it can be manufactured with fewer required manufacturing equipment, it reduces manufacturing costs. It is possible.

[0173] Next, conductive layers (for example, conductive layer 5264, conductive layer 5266, conductive layer 5268, conductive layer 527 1. Conductive layer 5301, conductive layer 5304, conductive layer 5306, and conductive layer 5308, conductive layer 5 Examples of 357 and conductive layers 5359 include single films or their laminated structures. Examples of such individual films include aluminum (Al), tantalum (Ta), and titanium (Ti). Molybdenum (Mo), Tungsten (W), Neodymium (Nd), Chromium (Cr), Nickel Kel (Ni), platinum (Pt), gold (Au), silver (Ag), copper (Cu), manganese (Mn) Cobalt (Co), niobium (Nb), silicon (Si), iron (Fe), palladium (P) d) Carbon (C), scandium (Sc), zinc (Zn), gallium (Ga), indigenous It is composed of in (In), tin (Sn), zirconium (Zr), and cerium (Ce). A group, one element selected from this group, a compound containing one or more elements selected from this group There are various materials. Another example of such a single film is a nanotube material (for example, carbon nanotubes). Nanotubes, organic nanotubes, inorganic nanotubes, or metallic nanotubes, etc. A film containing a molecular film, or a conductive plastic (e.g., polyethylenedioxythiophene (P Examples include EDOT, etc. Note that the individual membranes are composed of phosphorus (P), boron (B), arsenic (A). It may contain s), and / or oxygen (O), etc.

[0174] As an example of such a compound, one or more elements selected from the above group may be used. Compounds containing nitrogen (e.g., alloys), one or more elements selected from the above group, and nitrogen. A compound with (e.g., a nitride film), or one or more elements selected from the above group. Examples include compounds of elements and silicon (e.g., silicide films). An example of an alloy is... Indium tin oxide (ITO), indium zinc oxide (IZO), and silicon oxide are included in the indium Tin oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO), cadmium tin oxide (CTO), Aluminum Neodymium (Al-Nd), Aluminum Tungsten (Al- W), aluminum zirconium (Al-Zr), aluminum titanium (Al-Ti), Aluminum cerium (Al-Ce), magnesium silver (Mg-Ag), molybdenum niole Molybdenum (Mo-Nb), molybdenum tungsten (Mo-W), molybdenum tantalum (Mo- Examples include titanium nitride, tantalum nitride, and molybdenum nitride. Examples include tungsten silicide and titanium silicide. Examples include nickel silicide, aluminum silicon, and molybdenum silicon.

[0175] Next, an example of the light-emitting layer (e.g., 5270) is an organic EL element or an inorganic EL element. Examples of organic EL elements include a hole injection layer made of hole injection material and a hole transport material. A hole transport layer made of a light-emitting material, an electron transport layer made of an electron transport material, electron An electron injection layer made of injection material, or a layer made by mixing multiple of these materials. These can be single-layer structures or layered structures of these materials.

[0176] Next, as an example of the liquid crystal layer 5307, light transmission or opacity is achieved through the optical modulation effect of the liquid crystal. There is an element that controls overheating. This element can be constructed from a pair of electrodes and a liquid crystal layer. Yes, it exists. Furthermore, the optical modulation effect of liquid crystals is due to the electric field acting on the liquid crystal (horizontal electric field, vertical electric field). It is controlled by (or by an electric field in an oblique direction). Specifically, an example of a liquid crystal element is For example, nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, and discotic liquid crystal. Thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, polymer dispersed type Liquid crystal (PDLC), ferroelectric liquid crystal, antiferroelectric liquid crystal, main-chain liquid crystal, side-chain polymer liquid crystal, plasma Examples include MA-LESS LCDs (PALC) and banana-shaped LCDs. Also, the driving of the LCD... The methods include TN (Twisted Nematic) mode and STN (Super Twisted Nematic mode, IPS (In-Plane-Switching) ng) mode, FFS (Fringe Field Switching) mode, MV A (Multi-domain Vertical Alignment) mode, PV A(Patterned Vertical Alignment) mode, ASV(A Advanced Super View mode, ASM (Axially Symmetry) tric aligned Micro-cell) mode, OCB(Optical (Compensated Birefringence) mode, ECB (Elec (Trially Controlled Birefringence) Mode, FL C (Ferroelectric Liquid Crystal) mode, AFLC ( AntiFerroelectric Liquid Crystal) mode, PDL C (Polymer Dispersed Liquid Crystal) mode, P NLC (Polymer Network Liquid Crystal) mode, There are modes such as Stohst mode and Blue Phase mode.

[0177] The layers constituting the above transistors are formed using inkjet or printing methods. This makes it possible to manufacture at room temperature, at low vacuum, or on large substrates. Therefore, it is possible to manufacture without using a mask (reticle). Therefore, the transistor layout can be easily changed. Alternatively, resist Since it becomes possible to manufacture without using [a specific method], material costs are reduced and the number of processes can be decreased. Alternatively, since it becomes possible to apply the film only to the necessary parts, etching can be performed after the film has been deposited on the entire surface. This method is less wasteful and lower in cost compared to the traditional method of mixing ingredients.

[0178] The above describes one example of transistor structure. However, the structure of a transistor is as described above. The structure described above is not the only possible structure; various other structures are also available.

[0179] For example, transistors include MOS type transistors, junction type transistors, and bipod type transistors. It is possible to use transistors such as MOS transistors. In particular, MOS type transistors can be used. By using transistors, the size of the transistor can be reduced. In particular, By using a bipolar transistor as the transistor, it is possible to pass a large current. This allows for high-speed operation of the circuit.

[0180] As another example, a transistor has a structure in which gate electrodes are located above and below the channel. This is possible. By arranging gate electrodes above and below the channel, This results in a circuit configuration where multiple transistors are connected in parallel. Therefore, the channel region As this increases, the current value can be increased. Alternatively, gate electrodes can be placed above and below the channel. By arranging the structure in such a way, a depletion layer is more likely to form, thus improving the S value. It is possible.

[0181] As another example, a transistor has a structure in which the gate electrode is located above the channel region. Structures in which the gate electrode is located below the channel region, positive staggered structure, inverse staggered structure, A structure in which the channel region is divided into multiple regions, a structure in which the channel regions are connected in parallel, or channel It is possible to have a structure in which the regions are connected in series.

[0182] As another example, a transistor has a source electrode or drain in the channel region (or part thereof). It is possible to have a structure in which the in electrodes overlap. Channel region (or part thereof) By creating a structure in which the source electrode and drain electrode overlap, a portion of the channel region This prevents the device from becoming unstable due to the accumulation of electric charge.

[0183] The transistor in this embodiment is a semiconductor device or display device according to Embodiments 1 to 4. It can be used for this purpose.

[0184] (Embodiment 6) This embodiment describes an example of the cross-sectional structure of a display device.

[0185] Figure 20(A) shows an example of a top view of a display device. A drive circuit 5392 and A pixel section 5393 is formed. An example of a drive circuit 5392 is a scan line drive circuit Alternatively, there are signal line drive circuits, etc.

[0186] Figure 20(B) shows an example of an A-B cross-section of the display device shown in Figure 20(A). The display device is Substrate 5400, conductive layer 5401, insulating layer 5402, semiconductor layer 5403a, semiconductor layer 540 3b, conductive layer 5404, insulating layer 5405, conductive layer 5406, insulating layer 5408, liquid crystal layer 54 07, the conductive layer 5409 and the substrate 5410 are to be provided. The conductive layer 5401 is on the substrate 54 It shall be formed on top of 00. The insulating layer 5402 is formed to cover the conductive layer 5401. The semiconductor layer 5403a is formed on the conductive layer 5401 and the insulating layer 5402. It shall be made that the semiconductor layer 5403b is formed on top of the semiconductor layer 5403a. The conductive layer 5404 is formed on the semiconductor layer 5403b and the insulating layer 5402. The insulating layer 5405 is formed on the insulating layer 5402 and the conductive layer 5404. It shall be made of a material and shall have openings. The conductive layer 5406 is on top of the insulating layer 5405 and It shall be formed in the opening of the edge layer 5405. The liquid crystal layer 5407 is on top of the insulating layer 5405. The insulating layer 5408 shall be formed on the insulating layer 5405 and the conductive layer 5406. The conductive layer 5409 is formed on top of the liquid crystal layer 5407 and the insulating layer 5405. It shall be formed on top of.

[0187] The conductive layer 5401 shall function as a gate electrode. The insulating layer 5402 shall function as a gate electrode. It shall function as a conductive insulating film. The conductive layer 5404 is used for wiring and transistors. It shall have the function of an electrode or an electrode of a capacitive element. The insulating layer 5405 is interlayer It shall have the function of a film or planarization film. The conductive layer 5406 is used for wiring, pixel electrodes or It shall have the function of a reflective electrode. The insulating layer 5408 shall have the function of a sealing material. The conductive layer 5409 shall have the function of a counter electrode or a common electrode. Let's assume that.

[0188] In this case, parasitic capacitance may occur between the drive circuit 5392 and the conductive layer 5409. This results in a smudge or delay in the output signal of the drive circuit 5392 or the potential of each node. This can sometimes occur. Therefore, power consumption may increase. However, Figure 2 As shown in 0(B), an insulating layer having the function of a sealant is placed on the drive circuit 5392. By forming 5408, a gap is created between the drive circuit 5392 and the conductive layer 5409. Raw capacitance can be reduced because the dielectric constant of the sealing material is greater than that of the liquid crystal layer. This is because it is often low. Therefore, the output signal of the drive circuit 5392 or the power of each node This can reduce positional saturation or delay. Therefore, power consumption can be reduced. ru.

[0189] Furthermore, as shown in Figure 20(C), a portion of the drive circuit 5392 is placed on top of it, functioning as a sealing material. It is possible to form an insulating layer 5408 that allows for this. This makes it possible to reduce the parasitic capacitance that occurs between the drive circuit 5392 and the conductive layer 5409. Therefore, the output signal of the drive circuit 5392 or the potential of each node can be reduced. can.

[0190] Furthermore, the display element is not limited to liquid crystal elements, but can include various other display elements such as EL elements or electrophoretic elements. It is possible to use elements.

[0191] The structure of the display device in this embodiment is similar to that of the semiconductor device or display device in Embodiments 1 to 5. It can be applied. For example, as a semiconductor layer of a transistor, a non-single-crystal semiconductor, microcrystalline When using crystalline semiconductors, organic semiconductors, or oxide semiconductors, the channel width of the transistor is It often becomes larger. However, as in this embodiment, the parasitic capacitance of the drive circuit is reduced. This allows the transistor channel width to be reduced. Therefore, the layout area Since the size can be reduced, the display device can have a narrow bezel. Alternatively, the display device The image can be rendered in high definition.

[0192] (Embodiment 7) This embodiment describes an example of a semiconductor device and an example of a semiconductor device manufacturing process. In particular, we will explain an example of the transistor manufacturing process and an example of the capacitive element manufacturing process. In particular, the fabrication process when using an oxide semiconductor as the semiconductor layer will be described.

[0193] Figures 21(A) to (C) show an example of the manufacturing process for transistors and capacitive elements. The STA5441 is an inverse staggered thin-film transistor, with a source electrode on top of an oxide semiconductor layer. Alternatively, the wiring may be provided via the drain electrode.

[0194] First, a first conductive layer is formed over the entire surface of the substrate 5420 by sputtering. Next, Using a resist mask formed by a photolithography process using a first photomask Then, the first conductive layer is selectively etched to form conductive layer 5421 and conductive layer 5422. The conductive layer 5421 can function as a gate electrode, and the conductive layer 5422 It can function as one electrode of a capacitive element. However, it is not limited to this. The conductive layers 5421 and 5422 are used as electrodes for wiring, gate electrodes, or capacitive elements. It is possible to have a part that can do this. After this, the resist mask is removed.

[0195] Next, the insulating layer 5423 is formed over the entire surface using plasma CVD or sputtering. The insulating layer 5423 can function as a gate insulating layer, and the conductive layer 5421 It is formed to cover the conductive layer 5422. The thickness of the insulating layer 5423 is 50 nm. It is often around 250nm.

[0196] Next, a resist mask formed by a photolithography process using a second photomask. Using this method, the insulating layer 5423 is selectively etched to reach the conductive layer 5421. Hole 5424 is formed. After this, the resist mask is removed. However, this is not limited to this. Therefore, it is possible to omit the contact hole 5424. Alternatively, an oxide semiconductor layer After the formation of the first layer, it is possible to form the contact hole 5424. The cross-sectional view corresponds to Figure 21(A).

[0197] Next, an oxide semiconductor layer is formed over the entire surface by sputtering. However, this is not limited to this method. Furthermore, an oxide semiconductor layer is formed by sputtering, and a buffer layer is then placed on top of it (e.g. eba n + It is possible to form a layer. The thickness of the oxide semiconductor layer can be 5 nm to 2 nm. It is often 00nm.

[0198] Next, the oxide semiconductor layer is selectively etched using a third photomask. Remove the resist mask.

[0199] Next, a second conductive layer is formed over the entire surface by sputtering. Then, a fourth photomask is formed. The resist mask formed by the photolithography process used is selectively used to create a second conductive material. The layers are etched to form conductive layer 5429, conductive layer 5430, and conductive layer 5431. The conductive layer 5429 is connected to the conductive layer 5421 via the contact hole 5424. The conductive layers 5429 and 5430 function as source electrodes or drain electrodes. This is possible, and the conductive layer 5431 can function as the other electrode of the capacitive element. However, this is not limited to the conductive layer 5429, conductive layer 5430 and conductive layer 5431. , including parts that function as wiring, source or drain electrodes, or electrodes of a capacitive element. This is possible. The cross-sectional view at this stage corresponds to Figure 21(B).

[0200] Next, a heat treatment is performed at 200°C to 600°C in an atmospheric or nitrogen atmosphere. The process rearranges the In-Ga-Zn-O non-single crystal layer at the atomic level. Furthermore, heat treatment (including photo-annealing) releases strains that hinder carrier movement. Oh, the timing of this heat treatment is not limited; it can be done in various ways after the formation of the oxide semiconductor. It can be done at any time.

[0201] Next, an insulating layer 5432 is formed over the entire surface. The insulating layer 5432 has a single-layer structure. This is possible, and a laminated structure is also possible. For example, as the insulating layer 5432 is organic When using an insulating layer, the composition that is the material for the organic insulating layer is applied and placed in an atmospheric or nitrogen atmosphere. An organic insulating layer is formed by heat treatment at 200°C to 600°C under atmospheric conditions. By forming an organic insulating layer in contact with the oxide semiconductor layer, a thin film with highly reliable electrical properties can be produced. A film transistor can be fabricated. Note that an organic insulating layer is used as the insulating layer 5432. In such cases, a silicon nitride film or a silicon oxide film can be provided beneath the organic insulating layer.

[0202] Next, a third conductive layer is formed over the entire surface. Then, a photolithograph is performed using a fifth photomask. The third conductive layer is selectively etched using the resist mask formed by the process, The electrolytic layer 5433 and the conductive layer 5434 are formed. A cross-sectional view at this stage is shown in Figure 21(C). This corresponds to the conductive layer 5433 and conductive layer 5434, wiring, pixel electrodes, reflective electrodes, light-transmitting It can function as an electrode or an electrode of a capacitive element. In particular, the conductive layer 5434 is conductive Since it is connected to the electroplating 5422, it can function as an electrode for the capacitive element 5442. However, it is not limited to having a function of connecting the first conductive layer and the second conductive layer. This is possible. For example, by connecting conductive layer 5433 and conductive layer 5434, The conductive layer 5422 and the conductive layer 5430 form a third conductive layer (conductive layer 5433 and conductive layer 5434) It becomes possible to connect via this.

[0203] Through the above process, the transistor 5441 and the capacitive element 5442 can be manufactured. The transistor in this embodiment is used in the semiconductor device or display device of Embodiments 1 to 8. It can be used for placement.

[0204] Furthermore, as shown in Figure 21(D), an insulating layer 5435 is formed on the oxide semiconductor layer 5425. It is possible to do so.

[0205] Furthermore, as shown in Figure 21(E), after patterning the second conductive layer, the oxide semiconductor layer It is possible to form 5425.

[0206] Note that the substrate, insulating layer, conductive layer, and semiconductor layer in this embodiment may be different from those in other embodiments or The materials described herein may be used.

[0207] (Embodiment 8) This embodiment describes an example of an electronic device.

[0208] Figures 22(A) to 22(H) and 23(A) to 23(D) are diagrams showing electronic devices. Yes, these electronic devices consist of a casing 5000, a display unit 5001, a speaker 5003, and an LED. Lamp 5004, operation key 5005 (including power switch or operation switch), connection terminal Child 5006, Sensor 5007 (force, displacement, position, velocity, acceleration, angular velocity, rotational speed, distance, Light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, electric current, voltage, power, radiation, (Including functions for measuring flow rate, humidity, gradient, vibration, odor, or infrared radiation), Microphone It can have n5008, etc.

[0209] Figure 22(A) shows a mobile computer, and in addition to the above, it includes switch 5009, It may have an infrared port 5010, etc. Figure 22(B) shows a portable device equipped with a recording medium. This is a type of image playback device (for example, a DVD player), and in addition to the above, a second display It may have a section 5002, a recording medium reading section 5011, etc. Figure 22(C) is a goggle. It is a type display, and in addition to the above, it has a second display unit 5002, a support unit 5012, It may have earphones 5013, etc. Figure 22(D) is a portable gaming machine, as described above. In addition to the above, it may also have a recording medium reading unit 5011, etc. Figure 22(E) shows This is a digital camera with a TV receiving function, and in addition to the above, it has an antenna 5014 and a shutter It may have a touch button 5015, an image receiving unit 5016, etc. Figure 22(F) is a portable It is a type of gaming machine, and in addition to the above, it also has a second display unit 5002, a recording medium reading unit 5011, It can have the following. Figure 22(G) is a television receiver, and in addition to the above, it has It may have a tuner, an image processing unit, etc. Figure 22(H) shows a portable television receiver. In addition to the above, it also has a charger 5017 capable of transmitting and receiving signals, etc. Yes, it is possible. Figure 23(A) shows a display, and in addition to the above, there is a support base 5018, etc. It can have the following. Figure 23(B) is a camera, and in addition to the above, it has an external connection port. It may have a 5019 hub, a shutter button 5015, an image receiving unit 5016, etc. Figure 23(C) shows a computer, and in addition to the above, a pointing device 50 It may have external connection ports 5019, a reader / writer 5021, etc. (Figure) 23(D) is a mobile phone, and in addition to the above, it includes a transmitter, a receiver, and a mobile phone / mobile phone. It may have a tuner for a 1-segment partial reception service for terminals, etc.

[0210] The electronic devices shown in Figures 22(A) to 22(H) and Figures 23(A) to 23(D) are various It can have various functions. For example, various types of information (still images, videos, text images, etc.) Functions that display information on the display unit, touch panel function, calendar, date or time display, etc. Functions, functions that control processing through various software (programs), wireless communication functions, The ability to connect to various computer networks using wireless communication functions, and wireless communication functions Functions that use to transmit or receive various data, programs recorded on recording media, or It can have functions such as reading data and displaying it on the display unit. Furthermore, multiple In electronic devices having a display unit, one display unit is primarily used to display image information, and another... A function that primarily displays text information on one display unit, or a function that takes parallax into account on multiple display units. It can have functions such as displaying three-dimensional images by displaying images. Furthermore, Electronic devices having an image receiving unit include functions for taking still images, functions for taking videos, and shooting Functions to automatically or manually correct the captured image, and the recording medium (external or camera) on which the captured image is stored. It can have functions such as saving images internally and displaying captured images on the display unit. Furthermore, the electronic devices shown in Figures 22(A) to 22(H) and Figures 23(A) to 23(D) The functions it can possess are not limited to these, and it can have a variety of functions.

[0211] The electronic device described in this embodiment has a display unit for displaying some kind of information. This is characterized by the semiconductor device described in Embodiments 1 to 9, which is used as the display unit. Alternatively, by using a display device, manufacturing costs can be reduced, reliability can be improved, or yield can be increased. This allows for the measurement of things like that.

[0212] Next, we will explain some application examples of semiconductor devices.

[0213] Figure 23(E) shows an example of a semiconductor device being installed as an integral part of a building. ) consists of a housing 5022, a display unit 5023, a remote control device 5024 which is the operating unit, and a speaker 5 Includes 025, etc. The semiconductor equipment is wall-mounted and integrated with the building, and the installation space It can be installed without requiring a large space.

[0214] Figure 23(F) shows another example in which semiconductor equipment is installed within a building and integrated with the building itself. The display panel 5026 is installed together with the unit bath 5027, and the bather This allows viewing of the display panel 5026.

[0215] In this embodiment, walls and a unit bathroom were used as examples of buildings, but the actual form The configuration is not limited to this, and semiconductor devices can be installed in various types of buildings.

[0216] Next, we will show an example in which a semiconductor device is integrated with a mobile device.

[0217] Figure 23(G) shows an example of a semiconductor device installed in an automobile. (Display panel) 5028 is attached to the vehicle body 5029 and is controlled by the movement of the vehicle body or from inside or outside the vehicle body The system can display the entered information on demand. It also includes a navigation function. It's okay to do so.

[0218] Figure 23(H) shows an example of a semiconductor device being integrated with a passenger aircraft. Yes. Figure 23(H) shows a display panel 5031 on the ceiling 5030 above the seats of a passenger airplane. This diagram shows the shape of the unit when installed and in use. The display panel 5031 is located on the ceiling 50 30 is attached integrally with the hinge portion 5032, and the extension and retraction of the hinge portion 5032 Passengers will be able to view the display panel 5031. The display panel 5031 can be operated by passengers. It has the function of displaying information by doing so.

[0219] In this embodiment, examples of mobile bodies include automobile bodies and aircraft fuselages. However, this is not limited to motorcycles, four-wheeled vehicles (including automobiles, buses, etc.), and trains (monorails). It can be installed on various things, including railroads, railways, ships, etc. [Explanation of symbols]

[0220] 11 Wiring 12 Wiring 13 Wiring 14 Wiring 15 Wiring 16 Wiring 21 Wiring 22 Wiring 23 Wiring 24 Wiring 25 Wiring 26 Wiring 27 Wiring 31 Wiring 32 Wiring 33 Wiring 34 Wiring 35 Wiring 36 Wiring 37 Wiring 38 Wiring 100 circuits 110 circuits 111 transistors 112 transistors 120 circuits 121 transistors 122 transistors 123 Transistors 124 transistors 125 Capacitive element 126 Capacitive elements 13B Wiring 16A wiring 16B Wiring 16C wiring 300 circuits 310 circuits 311 transistors 312 transistors 313 Transistors 314 transistors 315 transistors 316 transistors 317 transistors 318 transistors 319 transistors 400 circuits 401 Circuit 500 circuits 501 Circuit 502 Circuit 1001 Circuit 1002 Circuit 1003 Circuit 1004 pixel section 1005 terminal 1006 substrate 111d diode 2001 Circuit 2002 Circuit 2003 Transistor 2004 Wiring 2005 Wiring 2007 Pixel section 2014 signal 2015 signal 3020 pixels 3021 Transistor 3022 liquid crystal element 3023 Capacitive element 3031 Wiring 3032 Wiring 3033 Wiring 3034 Electrode 5000 cabinets 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation Keys 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared Port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Support stand 5019 External connection port 5020 Pointing Device 5021 Leader / Writer 5022 enclosure 5023 Display section 5024 Remote control device 5025 Speaker 5026 Display Panel 5027 Unit Bathroom 5028 Display Panel 5029 Car body 5030 Ceiling 5031 Display Panel 5032 Hinge section 5260 circuit board 5261 Insulating layer 5262 Semiconductor layer 5263 Insulating layer 5264 Conductive layer 5265 Insulating layer 5266 Conductive layer 5267 Insulating layer 5268 Conductive layer 5269 Insulating layer 5270 Emitting layer 5271 Conductive layer 5300 circuit boards 5301 Conductive layer 5302 Insulating layer 5304 Conductive layer 5305 Insulating layer 5306 Conductive layer 5307 Liquid crystal layer 5308 Conductive layer 5350 area 5351 area 5352 Semiconductor substrate 5353 area 5354 Insulating layer 5355 area 5356 Insulating layer 5357 Conductive layer 5358 Insulating layer 5359 Conductive layer 5391 circuit board 5392 Drive Circuit 5393 pixel section 5400 circuit boards 5401 Conductive layer 5402 Insulating layer 5404 Conductive layer 5405 Insulating layer 5406 Conductive layer 5407 Liquid crystal layer 5408 Insulating layer 5409 Conductive layer 5410 circuit board 5420 circuit board 5421 Conductive layer 5422 Conductive layer 5423 Insulating layer 5424 Contact Hole 5425 Oxide semiconductor layer 5429 Conductive layer 5430 Conductive layer 5431 Conductive layer 5432 Insulating layer 5433 Conductive layer 5434 Conductive layer 5435 Insulating layer 5441 Transistor 5442 Capacitive element 1002a Circuit 1002b Circuit 2006A Scan Line Drive Circuit 2006B Scan Line Drive Circuit 5262a area 5262b area 5262c area 5262d area 5262e area 5303a Semiconductor layer 5303b Semiconductor layer 5403a Semiconductor layer 5403b Semiconductor layer

Claims

[Claim 1] It has a transistor, a liquid crystal element, and a capacitive element. The transistor has a semiconductor layer containing an oxide semiconductor, The oxide semiconductor includes one of ZnO, InGaZnO, SiGe, GaAs, IZO, ITO, SnO, TiO, and AlZnSnO. The oxide semiconductor overlaps with an insulating layer that functions as a sealing material. LCD display device.

Images