Quantum cascade detector

The pseudo-multi-stage quantum cascade structure addresses sensitivity degradation in high-temperature environments by connecting active layers in series and using cladding layers to enhance resistance and absorption, ensuring effective operation at room temperature.

JP2026136590APending Publication Date: 2026-08-26HAMAMATSU PHOTONICS KK
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Patent Information

Application Number
JP2025022175
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-02-14
Publication Date
2026-08-26

AI Technical Summary

Technical Problem

Quantum cascade detectors face challenges in maintaining sensitivity while operating in high-temperature environments due to decreased element resistance, which is exacerbated by the narrowing energy gap between subbands in the quantum well structure, limiting their effectiveness in room temperature conditions.

Method used

A pseudo-multi-stage quantum cascade structure is formed by connecting multiple ridge portions of active layers in series, increasing element resistance without reducing sensitivity, achieved by electrically connecting upper and lower metal layers between adjacent unit structures and using cladding layers to confine light absorption.

Benefits of technology

This configuration allows the quantum cascade detector to operate effectively at room temperature with maintained sensitivity by enhancing element resistance and light absorption efficiency, enabling detection of long wavelengths with high sensitivity.

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Abstract

This suppresses sensitivity degradation and enables operation in high-temperature environments. [Solution] The quantum cascade detector 1 comprises a semiconductor substrate 10 and a plurality of unit structures 20 formed on the semiconductor substrate 10, each having a ridge portion 21 including an active layer 22. The plurality of unit structures 20 are arranged on the main surface 10a of the semiconductor substrate 10. Each unit structure 20 comprises a contact layer 23 electrically connected to the active layer 22, an upper metal layer 24 electrically connected to the active layer 22, and a lower metal layer 25 electrically insulated from the upper metal layer 24 and electrically connected to the contact layer 23. Each contact layer 23 included in the plurality of unit structures 20 is separated from each other. The upper metal layer 24 of the first unit structure among the plurality of unit structures 20 is electrically connected to the lower metal layer 25 of the second unit structure adjacent to the first unit structure, so that each ridge portion 21 of the plurality of unit structures 20 is electrically connected in series.
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Description

[Technical Field]

[0001] This disclosure relates to a quantum cascade detector. [Background technology]

[0002] Patent Document 1 discloses a quantum cascade detector. In a quantum cascade detector, light is detected by utilizing inter-subband transitions (inter-subband absorption) in a quantum well structure. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2017-147428 [Overview of the project] [Problems that the invention aims to solve]

[0004] Regarding the quantum cascade detectors described above, there is a need for specifications that are sensitive to long wavelengths (e.g., 10 μm or more) and capable of operating at room temperature. However, in the long wavelength range, the energy between subbands in the quantum well structure narrows, and the element resistance of the active layer, including the quantum well structure, tends to decrease. If the element resistance becomes as low as or below the input impedance of the readout circuit for reading photocurrent from the quantum cascade detector, it becomes difficult for photocurrent to flow from the quantum cascade detector to the readout circuit. In order to increase the element resistance so that this problem does not occur, the quantum cascade detector must be kept at a sufficiently low temperature, which makes it difficult to operate the quantum cascade detector in high-temperature environments such as room temperature.

[0005] Another method to increase the resistance of the device is to increase the crystal growth thickness (number of stages) of the quantum well structure that constitutes the active layer. However, due to the constraints of semiconductor processes, there is a limit to the thickness to which the active layer can be formed with precision. Furthermore, the resistance of the device can also be increased by reducing the area (ridge width) of the active layer, but this reduces the sensitivity because the light-receiving surface becomes smaller. Additionally, the resistance of the device can also be increased by reducing the absorption length of the active layer, but this impairs the effect of efficiently absorbing the detected light by guiding it along the active layer (waveguide effect).

[0006] As described above, operating a quantum cascade detector in high-temperature environments such as room temperature requires reducing the ridge width or absorption length of the active layer, but this presents a trade-off problem where sensitivity decreases as a result.

[0007] Therefore, one aspect of this disclosure aims to provide a quantum cascade detector that can suppress sensitivity degradation and enable operation in high-temperature environments. [Means for solving the problem]

[0008] [1] Semiconductor substrate and The present invention comprises a plurality of unit structures formed on the semiconductor substrate, each having a ridge portion composed of an active layer having a quantum cascade structure, The plurality of unit structures are arranged in a first direction on the main surface of the semiconductor substrate. Each of the aforementioned plurality of unit structures is A contact layer is provided between the semiconductor substrate and the active layer and is electrically connected to the active layer, An upper metal layer is provided on the side opposite to the semiconductor substrate relative to the active layer and is electrically connected to the active layer, The system comprises a lower metal layer that is electrically insulated from the upper metal layer and electrically connected to the contact layer, Each of the contact layers included in the plurality of unit structures is separated from each other. In the quantum cascade detector, the upper metal layer of the first unit structure among the plurality of unit structures is electrically connected to the lower metal layer of the second unit structure adjacent to the first unit structure among the plurality of unit structures, such that the ridge portions of each of the plurality of unit structures are connected in series and electrically.

[0009] In the quantum cascade detector of [1] above, a pseudo multi-stage quantum cascade structure is formed by a plurality of ridge portions (active layers) connected in series and electrically. Thereby, since the element resistance of the quantum cascade detector can be increased, operation in a high-temperature environment such as room temperature can be realized. Further, since the element resistance can be increased by the pseudo multi-stage quantum cascade structure as described above, other methods accompanied by a decrease in sensitivity for increasing the element resistance can be avoided. Therefore, according to the above configuration, a decrease in sensitivity can be suppressed and operation in a high-temperature environment can be realized.

[0010] [2] The quantum cascade detector of [1], wherein the upper metal layer of the first unit structure is formed continuously with the lower metal layer of the second unit structure.

[0011] According to the above configuration, the upper metal layer of the first unit structure and the lower metal layer of the second unit structure can be reliably electrically connected between the first unit structure and the second unit structure adjacent to each other. Thereby, the above-described pseudo multi-stage quantum cascade structure can be reliably formed.

[0012] [3] The quantum cascade detector of [1] or [2], wherein the length of the ridge portion in the second direction perpendicular to the main surface and the third direction perpendicular to the first direction is larger than the width of the ridge portion in the first direction.

[0013] According to the above configuration, by making the length (absorption length) of the ridge in the third direction greater than the width (ridge width) of the ridge in the first direction, the light absorption efficiency of the active layer can be ensured in each unit structure. On the other hand, by keeping the ridge width smaller than the absorption length in each unit structure, the density of the unit structure in the first direction can be increased. This makes it easier to simultaneously incident the light to be detected on each of the light-receiving surfaces of multiple unit structures. In other words, it becomes possible to treat each of the light-receiving surfaces of multiple unit structures as a pseudo-single incident surface, thereby improving the convenience of the quantum cascade detector.

[0014] [4] A quantum cascade detector according to any of [1] to [3], wherein the main surface of the semiconductor substrate is provided with grooves extending in a second direction perpendicular to the main surface and a third direction perpendicular to the first direction between the ridge portion of the first unit structure and the ridge portion of the second unit structure, so as to separate the contact layer of the first unit structure and the contact layer of the second unit structure.

[0015] According to the above configuration, the contact layers of the adjacent first and second unit structures can be physically and reliably separated by the grooves. This ensures that short circuits between adjacent contact layers are reliably prevented.

[0016] [5] A quantum cascade detector according to any of [1] to [4], wherein each of the plurality of unit structures comprises a lower cladding layer provided between the active layer and the contact layer, and an upper cladding layer provided between the active layer and the upper metal layer.

[0017] According to the above configuration, by providing an upper cladding layer and a lower cladding layer that sandwich the active layer above and below it, the propagating light can be confined within the active layer, and light absorption can be efficiently generated. This improves the sensitivity of the quantum cascade detector.

[0018] [6] The quantum cascade detector according to any one of [1] to [5], wherein a texture structure is provided on the back surface of the semiconductor substrate opposite to the main surface.

[0019] According to the above configuration, light to be detected can be incident from the back surface of the semiconductor substrate. That is, by refracting and scattering the light incident on the back surface of the semiconductor substrate with the texture structure, light having an electric field component effective for intersubband transition can be incident on the active layer to cause light absorption.

[0020] [7] The quantum cascade detector according to any one of [1] to [6], wherein in the outermost unit structure arranged on the outermost side in the first direction among the plurality of unit structures, the end surface on the first side of the active layer is configured to be exposed.

[0021] According to the above configuration, light to be detected can be incident from the end surface (the end surface of the active layer of the outermost unit structure) in the arrangement direction (the first direction) of the plurality of unit structures.

Advantages of the Invention

[0022] According to one aspect of the present disclosure, it is possible to provide a quantum cascade detector that can suppress a decrease in sensitivity and can operate in a high-temperature environment.

Brief Description of the Drawings

[0023] [Figure 1] FIG. 1 is a plan view of the quantum cascade detector of the first embodiment. [Figure 2] FIG. 2 is a cross-sectional view of the quantum cascade detector taken along line II-II of FIG. 1. [Figure 3] FIG. 3 is a cross-sectional view of the quantum cascade detector taken along line III-III of FIG. 1. [Figure 4] FIG. 4 is a cross-sectional view of the quantum cascade detector of the second embodiment. [Figure 5] FIG. 5 is a cross-sectional view of the quantum cascade detector of the second embodiment. [Figure 6]Figure 6 is a cross-sectional view of the quantum cascade detector according to the third embodiment. [Figure 7] Figure 7 is a side view of the quantum cascade detector according to the fourth embodiment. [Figure 8] Figure 8 is a cross-sectional view of the quantum cascade detector according to the fifth embodiment. [Modes for carrying out the invention]

[0024] Embodiments of this disclosure will be described in detail below with reference to the drawings. In the following description, the same reference numerals will be used for identical or equivalent elements, and redundant explanations will be omitted. Also, terms such as "top" and "bottom" are for convenience based on the states shown in the drawings. Furthermore, some parts of the drawings are exaggerated in order to clearly explain the characteristic parts of the embodiment. For this reason, the dimensional ratios of each part in the drawings may differ from the actual dimensional ratios. [First Embodiment]

[0025] As shown in Figures 1 to 3, the quantum cascade detector 1 according to the first embodiment includes a semiconductor substrate 10 and a plurality of unit structures 20 formed on the semiconductor substrate 10. The quantum cascade detector 1 detects light to be detected by utilizing inter-subband transitions (inter-subband inter-stress) in the quantum well structure.

[0026] The semiconductor substrate 10 is formed, for example, in the shape of a rectangular flat plate. The semiconductor substrate 10 is, for example, a semi-insulating InP substrate. The semiconductor substrate 10 has a main surface 10a on which a plurality of unit structures 20 are formed, and a back surface 10b opposite to the main surface 10a. The plurality of unit structures 20 are arranged on the main surface 10a in one direction along the main surface 10a. Hereinafter, the arrangement direction of the plurality of unit structures 20 will be described as the X direction (first direction), the thickness direction of the semiconductor substrate 10 as the Z direction (second direction), and the direction perpendicular to the X and Z directions as the Y direction (third direction).

[0027] As an example, multiple unit structures 20 include four unit structures 201, 202, 203, and 204. In Figures 1 and 2, the unit structures 201, 202, 203, and 204 are arranged sequentially along the X direction from left to right. Each unit structure 20 has a ridge portion 21 that extends in a stripe-like manner in the Y direction. The ridge portion 21 is the part of the unit structure 20 that contains the active layer 22, and is the part that protrudes from the main surface 10a in the Z direction and extends in the Y direction. Hereinafter, the respective ridge portions 21 of unit structures 201, 202, 203, and 204 will be referred to as ridge portions 21A, 21B, 21C, and 21D.

[0028] Each ridge portion 21 (active layer 22) of the multiple unit structures 20 is electrically connected in series by a configuration described later. More specifically, the multiple ridge portions 21A to 21D are connected in a cascaded manner along the Y direction. That is, ridge portions 21B and 21C are connected by a connection configuration similar to the one used to electrically connect ridge portion 21A and ridge portion 21B, and ridge portion 21C and ridge portion 21D are also connected.

[0029] The active layer 22 has a cascade structure in which absorption regions (light absorption layers) used for absorbing and detecting light and transport regions (electron transport layers) used for transporting electron carriers are stacked alternately in multiple stages. For example, in the active layer 22, when n is an integer of 3 or more, and a semiconductor stack structure consisting of n quantum well layers including an absorption well layer and n quantum barrier layers is considered as one periodic unit stack, these unit stacks are stacked in multiple stages. In the active layer 22, by stacking the above unit stacks in multiple stages, a cascade structure is formed in which absorption regions that detect the light to be detected by subband absorption, including an absorption well layer, and transport regions that transport electrons excited by subband absorption are stacked alternately.

[0030] The quantum well layer may be composed of, for example, an InGaAs layer. The quantum barrier layer may be composed of, for example, an InAlAs layer. That is, the active layer 22 may be composed of an InGaAs / InAlAs quantum well structure. As an example, the absorption well layer may be doped with Si, an n-type impurity, at a density of 5 × 10⁻¹⁶ to supply electrons, which are carriers. 17 cm -3 It's doped.

[0031] Each unit structure 20 includes, in addition to the active layer 22, a contact layer 23, an upper metal layer 24, and a lower metal layer 25.

[0032] The contact layer 23 is provided between the main surface 10a of the semiconductor substrate 10 and the active layer 22, and is electrically connected to the active layer 22. As described in the second embodiment later, other layers may be provided between the active layer 22 and the contact layer 23. The width (length in the X direction) of the contact layer 23 is greater than the width of the ridge portion 21 (active layer 22). More specifically, the contact layer 23 has a portion that extends outward from the ridge portion 21 in at least one direction (both sides in this embodiment) in the X direction. As an example, the contact layer 23 is composed of an InGaAs layer with a thickness of 250 nm and an InAlAs layer with a thickness of 0.2 nm. Furthermore, the contact layer 23 functions as a high-concentration doped layer with a higher doping density than the active layer 22. For example, the InGaAs layer of the contact layer 23 contains n-type impurities, such as Si, with a doping density of 3 × 10⁻¹⁶. 18 cm -3 It's doped.

[0033] As shown in Figure 2, each contact layer 23 contained in each unit structure 20 is separated from each other. That is, in adjacent unit structures 20 (for example, unit structure 201 and unit structure 202), the contact layer 23 of one unit structure 20 (unit structure 201) is not in physical contact with the contact layer 23 of the other unit structure 20 (unit structure 202).

[0034] In this embodiment, grooves 11 extending in the Y direction are formed on the main surface 10a of the semiconductor substrate 10, separating the contact layer 23 of one adjacent unit structure 20 (e.g., unit structure 201) from the contact layer 23 of the other unit structure 20 (e.g., unit structure 202) between the ridge portions 21 of one unit structure 20 and the ridge portions 21 of the other unit structure 20. The contact layer 23 of each unit structure 20 is provided on a flat portion of the main surface 10a where the grooves 11 are not formed.

[0035] On the main surface 10a of the semiconductor substrate 10, an insulating layer 30 is provided so as to cover the inner surface of the groove portion 11, the contact layer 23, and the ridge portion 21 (active layer 22). In the portion of the insulating layer 30 that overlaps with the upper surface of the contact layer 23 on one side of the ridge portion 21 (left side in Figure 2), an opening 30a is provided that has a predetermined width in the X direction and extends in the Y direction, exposing a part of the contact layer 23. In addition, the insulating layer 30 is provided with an opening 30b that has a predetermined width in the X direction and extends in the Y direction, exposing at least a part of the upper surface of the active layer 22. In this embodiment, the insulating layer 30 is formed so as to cover the side surface of the active layer 22 but not the upper surface of the active layer 22. That is, the opening 30b is formed so as to expose the entire upper surface of the active layer 22.

[0036] The upper metal layer 24 is provided on the side opposite to the semiconductor substrate 10 relative to the active layer 22 and is electrically connected to the active layer 22. As described in the second embodiment later, other layers may be provided between the active layer 22 and the upper metal layer 24. The upper metal layer 24 is provided so as to cover the upper surface of the active layer 22 and the insulating layer 30. The upper metal layer 24 is in contact with the upper surface of the active layer 22 through the opening 30b of the insulating layer 30. One end 24a of the upper metal layer 24 (the left end in Figure 2) is located between the opening 30a of the insulating layer 30 and the ridge portion 21. The other end of the upper metal layer 24 of one unit structure 20 (the right end in Figure 2) is continuously connected to the lower metal layer 25 of another unit structure 20 adjacent to the other side (right side) of the unit structure 20.

[0037] The lower metal layer 25 is electrically insulated from the upper metal layer 24 and electrically connected to the contact layer 23. The lower metal layer 25 is in contact with the upper surface of the contact layer 23 through an opening 30a in the insulating layer 30. The end 25a of the lower metal layer 25 on the ridge portion 21 side (the right end in Figure 2) is separated from the end 24a of the upper metal layer 24. As a result, the upper metal layer 24 and the lower metal layer 25 are electrically insulated from each other within the same unit structure 20. The end of the lower metal layer 25 of one unit structure 20 opposite to the end 25a (the left end in Figure 2) is continuously connected to the upper metal layer 24 of another unit structure 20 adjacent to one side (left side) of that unit structure 20.

[0038] As shown in Figures 1 and 2, in this embodiment, the portion from the end 24a of the upper metal layer 24 of one unit structure 20 (e.g., unit structure 201) to the end 25a of the lower metal layer 25 of another unit structure 20 (e.g., unit structure 202) adjacent to the other side (right side) of the unit structure 20 is configured as a single continuous metal layer. This metal layer (upper metal layer 24 and lower metal layer 25) can be formed from a metallic material such as Au, Cu, or Al.

[0039] In this embodiment, the upper metal layer 24 of unit structure 201 is integrally formed with the lower metal layer 25 of unit structure 202, the upper metal layer 24 of unit structure 202 is integrally formed with the lower metal layer 25 of unit structure 203, and the upper metal layer 24 of unit structure 203 is integrally formed with the lower metal layer 25 of unit structure 204. That is, when focusing on a first unit structure (e.g., unit structure 201), which is one of the multiple unit structures 20, the upper metal layer 24 of the first unit structure is electrically connected to the lower metal layer 25 of a second unit structure (e.g., unit structure 202) adjacent to the first unit structure among the multiple unit structures 20. As a result, each ridge portion 21 of the multiple unit structures 20 is electrically connected in series.

[0040] As shown in Figure 3, in this embodiment, one end face E1 of the quantum cascade detector 1 in the Y direction is the incident surface to which the light L (detected light) to be detected by the quantum cascade detector 1 is incident. Each ridge portion 21 has a waveguide structure composed of an active layer 22 extending in the Y direction. That is, within the range in which the ridge portion 21 (active layer 22) exists in the X direction, the light L incident from end face E1 travels from end face E1 to the other end face E2 while repeatedly undergoing total internal reflection between the upper metal layer 24 and the back surface 10b of the semiconductor substrate 10 (the interface between the back surface 10b and the air layer). In this process, the light L is absorbed by the active layer 22, and a photocurrent is generated. Therefore, the wider the width of the ridge portion 21 (active layer 22) in the X direction (ridge width), the larger the region (light-receiving area) to which the light L can be guided to the active layer 22, and the longer the length of the ridge portion 21 in the Y direction (absorption length), the higher the efficiency of the light absorption described above (i.e., the efficiency of converting light L into a photocurrent).

[0041] Generally, in the long wavelength band (e.g., 10 μm or longer), the energy between subbands in the quantum well structure narrows, and the element resistance of the active layer 22 containing the quantum well structure tends to decrease. If the element resistance becomes as low as or lower than the input impedance of the readout circuit (not shown) for reading the photocurrent from the quantum cascade detector 1, it becomes difficult for the photocurrent to flow from the quantum cascade detector 1 to the readout circuit.

[0042] In conventional structures, only one unit structure 20, as described in this embodiment, was provided. Alternatively, even if multiple unit structures 20 were provided, these multiple unit structures 20 (ridge portions 21) were not connected in series or electrically. In this case, one way to increase the element resistance of the unit structure 20 is to increase the crystal growth thickness of the active layer 22 (i.e., the number of stages in the InGaAs / InAlAs quantum well structure described above), but due to the constraints of semiconductor processes, there is a limit to the thickness of the active layer 22 that can be formed with high precision. Furthermore, the element resistance can also be increased by reducing the area (ridge width) of the active layer 22, but this reduces the sensitivity because the light-receiving surface becomes smaller. Additionally, the element resistance can also be increased by reducing the absorption length (length in the Y direction) of the active layer 22, but this impairs the waveguide effect (i.e., the effect of efficiently absorbing light L by guiding it along the active layer 22 in the Y direction) as explained using Figure 3.

[0043] In contrast, the quantum cascade detector 1 forms a pseudo-multi-stage quantum cascade structure by multiple ridge sections 21 (active layers 22) connected in series and electrically. This allows the element resistance of the quantum cascade detector 1 to be increased, enabling operation in high-temperature environments such as room temperature. Furthermore, as described above, the element resistance can be increased by the pseudo-multi-stage quantum cascade structure (i.e., a structure in which multiple active layers 22 of multiple ridge sections 21A to 21D are pseudo-stacked in multiple stages), thus avoiding other methods that would reduce sensitivity in order to increase element resistance (for example, shortening the absorption length of each ridge section 21 or reducing the overall width of the light-receiving surface of each ridge section 21 (active layer 22) (the sum of the ridge widths of each ridge section 21A to 21D)). Therefore, the quantum cascade detector 1 can suppress sensitivity degradation and enable operation in high-temperature environments.

[0044] More specifically, in this embodiment, the upper metal layer 24 and the lower metal layer 25 are cascaded between adjacent unit structures 20, and the active layers 22 contained in each of the multiple ridge sections 21A to 21D are electrically connected, thereby forming a pseudo-active layer consisting of multiple active layers 22 from multiple ridge sections 21A to 21D (an active layer with the sum of the number of stages of each active layer 22). In other words, with the quantum cascade detector 1, by suppressing the thickness of each individual active layer 22 (the active layer 22 contained in each unit structure 20) while forming a single pseudo-active layer with a large number of stages, the overall element resistance of the element formed by the multiple ridge sections 21A to 21D can be increased. This makes it possible to avoid methods that have a trade-off relationship with sensitivity in order to increase element resistance (i.e., methods that shorten the absorption length (length in the Y direction) of each ridge section 21 or reduce the sum of the ridge widths of each ridge section 21 (the width of the overall light-receiving surface)). As a result, high sensitivity performance and room temperature operation can be achieved simultaneously. According to the quantum cascade detector 1, for example, light to be detected in the long wavelength band, such as from the VLWIR band to the THz band (e.g., the wavelength band from 10 μm to 3 mm), can be detected with high sensitivity under room temperature conditions.

[0045] In the quantum cascade detector 1, in the adjacent first unit structure (e.g., unit structure 201) and second unit structure (e.g., unit structure 202), the upper metal layer 24 of the first unit structure is continuously formed with the lower metal layer 25 of the second unit structure. With this configuration, the upper metal layer 24 of the first unit structure and the lower metal layer 25 of the second unit structure can be reliably electrically connected between the adjacent first and second unit structures. This makes it possible to reliably form the pseudo-multi-stage quantum cascade structure described above.

[0046] In the quantum cascade detector 1, the length (absorption length) of the ridge portion 21 in the Y direction is greater than the width (ridge width) of the ridge portion 21 in the X direction. With the above configuration, by making the absorption length of the ridge portion 21 greater than the ridge width, the light absorption efficiency of the active layer 22 can be ensured in each unit structure 20. On the other hand, by keeping the ridge width smaller than the absorption length in each unit structure 20, the density of the unit structures 20 in the X direction (i.e., the number of unit structures 20 included in the range of a unit length in the X direction) can be increased. In other words, the light-receiving surfaces of multiple unit structures 20 can be compactly arranged in the X direction. This makes it easier to simultaneously incident the light to be detected on each light-receiving surface of multiple unit structures 20 (the range in the X direction where the ridge portion 21 exists on the end face E1). In other words, since each light-receiving surface of multiple unit structures 20 can be treated as a pseudo-single incident surface, the convenience of the quantum cascade detector 1 can be improved.

[0047] In the quantum cascade detector 1, the main surface 10a of the semiconductor substrate 10 is provided with grooves 11 extending in the Y direction between the ridge portion 21 of the first unit structure and the ridge portion 21 of the second unit structure, so as to separate the contact layer 23 of the adjacent first unit structure (e.g., unit structure 201) and the contact layer 23 of the adjacent second unit structure (e.g., unit structure 202). With this configuration, the contact layers 23 of the adjacent first and second unit structures can be reliably separated by the grooves 11. This reliably prevents short circuits from occurring between adjacent contact layers 23. [Second Embodiment]

[0048] As shown in Figures 4 and 5, the quantum cascade detector 1A of the second embodiment differs from the quantum cascade detector 1 in that it has multiple unit structures 20A instead of multiple unit structures 20. The unit structure 20A differs from the unit structure 20 in that it has a lower cladding layer 26 and an upper cladding layer 27.

[0049] The lower cladding layer 26 is provided between the active layer 22 and the contact layer 23. For example, the lower cladding layer 26 is deposited over the entire upper surface of the contact layer 23, and the lower metal layer 25 is in contact with the upper surface of the lower cladding layer 26 through the opening 30a of the insulating layer 30. The upper cladding layer 27 is provided between the active layer 22 and the upper metal layer 24. For example, the upper cladding layer 27 is deposited over the entire upper surface of the active layer 22.

[0050] The lower cladding layer 26 and the upper cladding layer 27 are low refractive index layers formed from a material with a lower refractive index than the active layer 22, in order to allow the active layer 22 to function as a core (high refractive index layer). The lower cladding layer 26 and the upper cladding layer 27 are formed from, for example, InP. In each of the lower cladding layer 26 and the upper cladding layer 27, the doping density of impurities (n-type impurities) is, for example, 5 × 10⁻⁶. 16 cm -3 The above 2 x 10 17 cm -3 The following applies:

[0051] In the quantum cascade detector 1A, by providing an upper cladding layer 27 and a lower cladding layer 26 that sandwich the active layer 22 above and below it, propagating light can be confined within the active layer 22, as shown in Figure 5, and light absorption can be efficiently generated. This improves the sensitivity of the quantum cascade detector 1A. [Third Embodiment]

[0052] As shown in FIG. 6, the quantum cascade detector 1B of the third embodiment is different from the quantum cascade detector 1 in that it has a semiconductor substrate 10B instead of the semiconductor substrate 10. The semiconductor substrate 10B is different from the semiconductor substrate 10 in that a texture structure T is provided on the back surface 10b. The texture structure T is a concavo-convex structure configured to generate an electric field component effective for intersubband transitions in the active layer 22 by refracting and scattering the detection target light L incident from the back surface 10b. As an example, the concavo-convex height h and the concavo-convex period Γ of the concavo-convex structure can be set within the ranges shown in the following formulas (1) and (2). Here, λ is the wavelength of the detection target light L, and n sub is the refractive index of the semiconductor substrate 10B. The concavo-convex height h is the Z-direction distance between the highest part (tip) of the convex part and the lowest part (bottom) of the concave part. The concavo-convex period Γ is the distance along the XY plane between the centers of adjacent convex parts (or concave parts) in the XY plane. According to such a texture structure T having a concavo-convex structure, the detection target light L can be preferably scattered. h≧λ / 2n sub ···(1) Γ≧λ / 2n sub ···(2)

[0053] According to the quantum cascade detector 1B, the detection target light L can be incident from the back surface 10b of the semiconductor substrate 10. That is, by refracting and scattering the light incident on the back surface 10b of the semiconductor substrate 10 with the texture structure T, light having an electric field component effective for intersubband transitions can be incident on the active layer 22 to cause light absorption. [Fourth Embodiment]

[0054] As shown in Figure 7, the quantum cascade detector 1C of the fourth embodiment differs from the quantum cascade detector 1 in that the outermost outer unit structure 20C, which is located on the first side S1 in the X direction (on the right side in the example of Figure 7), is configured to expose the end face 22a of the first side S1 of the active layer 22. For example, in the outer unit structure 20C, the portion of the first side S1 of the unit structure 204 of the quantum cascade detector 1 is cut off along the YZ plane so that the end faces of the first side S1 of the semiconductor substrate 10, contact layer 23, active layer 22, and upper metal layer 24 are exposed.

[0055] According to the quantum cascade detector 1C, the light L to be detected can be incident from the end face (end face 22a of the active layer 22 of the outer unit structure 20C) in the arrangement direction (X direction) of the multiple unit structures 20. [Fifth Embodiment]

[0056] As shown in Figure 8, the quantum cascade detector 1D of the fifth embodiment is identical to the quantum cascade detector 1A of the second embodiment in that it has a lower cladding layer 26 and an upper cladding layer 27, but differs from the quantum cascade detector 1A in that the lower metal layer 25 is configured to be in direct contact with the contact layer 23.

[0057] In the quantum cascade detector 1D, as an example, in each unit structure 20A, the X-direction end 26a of the lower cladding layer 26, located below the lower metal layer 25, is located inward in the X direction (to the right in Figure 8) compared to the end of the contact layer 23. The insulating layer 30 is deposited so as to cover the end 26a. The opening 30a of the insulating layer 30 is located above the contact layer 23, outside the end 26a (to the left in Figure 8). As a result, the lower metal layer 25 is in contact with the upper surface 23a of the contact layer 23 through the opening 30a of the insulating layer 30.

[0058] In the quantum cascade detector 1A described above, the lower metal layer 25 is connected to the contact layer 23 via the lower cladding layer 26, which can lead to a decrease in sensitivity due to the lower cladding layer 26 acting as a resistive component. In contrast, the quantum cascade detector 1D improves sensitivity compared to the quantum cascade detector 1A by directly contacting the lower metal layer 25 with the contact layer 23. [Differentiation]

[0059] Although several embodiments (First to Fifth Embodiments) of the quantum cascade detector have been described above, the quantum cascade detector of this disclosure is not limited to these embodiments. The materials and shapes of each component are not limited to the specific materials and shapes described above, but a variety of other materials and shapes can be used. Furthermore, some components included in one embodiment may be omitted or modified as appropriate, or they may be arbitrarily combined with components included in other embodiments.

[0060] In the above embodiment, four unit structures 20 are provided, but the number of unit structures 20 is not limited to the above example; it may be two, three, or five or more.

[0061] In the above embodiment, as shown in Figure 2, each unit structure 20 was defined by a boundary line passing through the center of the groove 11 in the X direction. However, multiple unit structures 20 do not necessarily have to be defined as in the example in Figure 2. That is, each of the multiple unit structures 20 can be defined to include the ridge portion 21, contact layer 23, upper metal layer 24, and lower metal layer 25 described above. Furthermore, the shapes and dimensions of each part of each unit structure 20 may be the same as those of the others, or they may be different.

[0062] In the above embodiment, the upper metal layer 24 of the first unit structure and the lower metal layer 25 of the second unit structure were continuously connected over the entire Y-direction between the adjacent first unit structure (e.g., unit structure 201) and the second unit structure (e.g., unit structure 202). However, the upper metal layer 24 of the first unit structure and the lower metal layer 25 of the second unit structure may be partially connected. [Explanation of Symbols]

[0063] 1, 1A, 1B, 1C, 1D... Quantum cascade detector, 10... Semiconductor substrate, 10a... Main surface, 10b... Back surface, 11... Groove, 20, 20A, 201, 202, 203, 204... Unit structure, 20C... Outer unit structure, 21... Ridge section, 21A, 21B, 21C, 21D... Ridge section, 22... Active layer, 22a... End face, 23... Contact layer, 24... Upper metal layer, 25... Lower metal layer, 26... Lower cladding layer, 27... Upper cladding layer, 30... Insulating layer, S1... First side, T... Texture structure.

Claims

1. Semiconductor substrate and The present invention comprises a plurality of unit structures formed on the semiconductor substrate, each having a ridge portion composed of an active layer having a quantum cascade structure, The plurality of unit structures are arranged in a first direction on the main surface of the semiconductor substrate. Each of the aforementioned plurality of unit structures is A contact layer is provided between the semiconductor substrate and the active layer and is electrically connected to the active layer, An upper metal layer is provided on the side opposite to the semiconductor substrate relative to the active layer and is electrically connected to the active layer, The system comprises a lower metal layer that is electrically insulated from the upper metal layer and electrically connected to the contact layer, Each of the contact layers included in the plurality of unit structures is separated from each other. A quantum cascade detector in which the upper metal layer of a first unit structure among the plurality of unit structures is electrically connected to the lower metal layer of a second unit structure adjacent to the first unit structure among the plurality of unit structures, such that the ridge portions of each of the plurality of unit structures are electrically connected in series.

2. The quantum cascade detector according to claim 1, wherein the upper metal layer of the first unit structure is formed continuously with the lower metal layer of the second unit structure.

3. The quantum cascade detector according to claim 1, wherein the length of the ridge portion in a second direction perpendicular to the main surface and in a third direction perpendicular to the first direction is greater than the width of the ridge portion in the first direction.

4. The quantum cascade detector according to claim 1, wherein the main surface of the semiconductor substrate is provided with grooves extending in a second direction perpendicular to the main surface and a third direction perpendicular to the first direction between the ridge portion of the first unit structure and the ridge portion of the second unit structure, so as to separate the contact layer of the first unit structure and the contact layer of the second unit structure.

5. The quantum cascade detector according to claim 1, wherein each of the plurality of unit structures comprises a lower cladding layer provided between the active layer and the contact layer, and an upper cladding layer provided between the active layer and the upper metal layer.

6. The quantum cascade detector according to claim 1, wherein a textured structure is provided on the back surface of the semiconductor substrate opposite to the main surface.

7. The quantum cascade detector according to claim 1, wherein the outermost unit structure among the plurality of unit structures, which is located on the first side in the first direction, is configured to expose the first side end face of the active layer.

Citation Information

Patent Citations

  • Quantum cascade detector

    JP2017147428A