Chamber impedance management in a processing chamber

Abstract

Embodiments of the present disclosure include apparatus and methods for controlling plasma uniformity by controlling plasma density in a bulk plasma across the center and peripheral edge regions of a substrate. Plasma uniformity can be controlled by using an RF tuning circuit coupled to one of multiple electrodes positioned relative to the substrate during plasma processing. Adjusting at least one electrical characteristic of the RF tuning circuit can control the effect of the generated RF fundamental frequency and associated RF harmonic frequencies on plasma processing results. Beneficially, one or more of the tuning circuits and methods of using the tuning circuits can be used to control reactive neutral species concentration, ion energy and angular distribution, ion directionality and directional uniformity, providing individual adjustment knobs for individually controlling ion flux and reactive neutral species uniformity across the surface of the substrate.

Description

[Technical Field]

[0001] FIELD OF THE INVENTION

[0001] Embodiments herein are directed to plasma generating devices used in semiconductor device manufacturing, and in particular to processing chambers configured to generate plasma within a chamber volume and process semiconductor substrates therein. [Background technology]

[0002]

[0002] Reliable fabrication of high aspect ratio features is one of the key technological challenges for next generation semiconductor devices. One method for forming high aspect ratio features uses a plasma-assisted etching process, such as a reactive ion etching (RIE) process, to transfer openings in a masking layer to exposed portions of the underlying substrate surface.

[0003] In a typical plasma-assisted etching process, a substrate is positioned on a substrate support, such as an electrostatic chuck (ESC), located in a processing chamber, a plasma is formed over the substrate, and ions are accelerated from the plasma toward the substrate across a plasma sheath (i.e., an electron-depleted region) formed between the plasma and the substrate surface. Openings in a masking layer are transferred to the substrate surface through a combination of chemical and physical interactions between plasma-generated neutrals and colliding ions (resulting in anisotropic etching). The process results at the substrate surface depend, among other things, on the properties of the plasma and plasma sheath formed there.

[0004]

[0004] Plasma chambers are often configured to form a capacitively coupled plasma and to control the plasma sheath using two or more radio frequency (RF) power sources. For example, a high frequency component may be used to ignite and sustain the plasma and determine the plasma density and therefore the ion flux at the substrate surface, while a low frequency component may be used to control the voltage drop across the plasma sheath.

[0005]

[0005] However, non-uniformities in plasma density and / or plasma sheath geometry due to harmonic generation during plasma formation can cause undesirable process variations in etched feature profiles and etch uniformity. Excessive process non-uniformities can adversely affect device yield and reduce it. Such non-uniformities are often particularly pronounced near the substrate edge and can be caused, inter alia, by non-uniform power distribution, variations in chamber geometry, differences in surface material properties, and / or electrical discontinuities between the substrate edge and the surface of an ESC located nearby. Material discontinuities at the substrate edge are believed to be due to boundary effects caused by RF waves, causing non-uniformities at the substrate edge. Harmonics generated from the RF power used to generate the plasma have been shown to be the primary root cause of etch rate and profile non-uniformities. Because harmonics are generated, at least in part, by non-linearities in the plasma sheath, and because their effect on the formed plasma sheath is difficult to completely eliminate, properly managing and / or reducing harmonic frequency waves is important for overall plasma uniformity control. Because some of the generated RF harmonics have wavelengths that are short relative to the size of the substrate being processed, it is believed that standing waves formed by the generated harmonics result in a non-uniform plasma from the center to the edge of the substrate, leading to non-uniform etch rates and an overall tilt of the etched features.

[0006]

[0006] Therefore, there is a need in the art to control and / or minimize the adverse effects of boundary effects and RF harmonics generated within a plasma chamber, and there is a need for a system, one or more devices, and a method that solves the above-mentioned problems. Summary of the Invention

[0007]

[0007] Embodiments provided herein generally include apparatus (e.g., plasma processing systems) and methods for plasma processing of substrates in a processing chamber. In some embodiments, aspects of the apparatus and methods are directed to improving processing uniformity across a surface of the substrate, reducing the defectivity of the surface of the substrate, or both.

[0008] An embodiment of the present disclosure includes a plasma processing chamber. The substrate support assembly has a substrate support surface disposed within a processing space of the plasma processing chamber. The substrate support assembly includes a first electrode, a first portion of dielectric material disposed on the first electrode, the first portion of dielectric material forming the substrate support surface, and a second electrode disposed at a distance from the first electrode in a first direction parallel to the substrate support surface. A first voltage generator is electrically coupled to the first electrode. A radio frequency (RF) generator is electrically coupled to the RF electrode. The RF generator is configured to generate a plasma in the processing space by providing an RF signal to the RF electrode, the RF signal including a fundamental RF frequency. A first filter assembly is electrically coupled between the first electrode and the first voltage generator. The first filter assembly includes one or more capacitive and inductive elements configured to substantially block the fundamental RF frequency and harmonics of the fundamental RF frequency received at the first electrode from passing to the first voltage generator. A first tuning circuit is electrically coupled between the first electrode and the first filter assembly, and includes a plurality of impedance generating elements, including at least one variable impedance element, configured to adjust one or more characteristics of a fundamental RF frequency and / or one of the harmonics of the fundamental RF frequency established at the first electrode when plasma is generated in the processing space.

[0009] An embodiment of the present disclosure includes a method for processing a substrate in a plasma processing chamber. The method includes generating and maintaining a plasma in a processing space of the plasma processing chamber by supplying a radio frequency (RF) signal to an RF electrode, the RF signal including a fundamental RF frequency. A first portion of the plasma is formed over a substrate support surface of a substrate support assembly and the first electrode. A second portion of the plasma is formed over the substrate support surface of the substrate support assembly and the second electrode. One or more characteristics of the fundamental RF frequency and / or harmonics of the fundamental RF frequency at the first electrode are adjusted relative to one or more characteristics of the fundamental RF frequency and / or harmonics of the fundamental RF frequency at the second electrode to vary a ratio of plasma density in the second portion of the plasma to plasma density in the first portion of the plasma using a tuning circuit coupled to the first electrode.

[0010] Other embodiments include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the operations of the methods.

[0011]

[0011] So that the above-mentioned features of the present disclosure can be understood in detail, a more particular description of the present disclosure briefly summarized above can be had by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the accompanying drawings illustrate only exemplary embodiments and therefore should not be considered as limiting the scope of the present disclosure, which may also admit of other equally effective embodiments. [Brief explanation of the drawings]

[0012] [Figure 1A] 1 is a schematic cross-sectional view of a processing system according to one or more embodiments configured to perform methods described herein. [Figure 1B]1 is a schematic cross-sectional view of a processing system according to one or more embodiments configured to perform methods described herein. [Figure 2]

[0013] FIG. 1C is a simplified schematic diagram of one or both of the processing systems shown in FIGS. 1A-1B, according to one or more embodiments. [Figure 3]

[0014] FIG. 1C is a simplified schematic diagram of a PV source assembly that can be used in one or both of the processing systems shown in FIGS. 1A-1B, according to one or more embodiments. [Figure 4]

[0015] 4 illustrates a PV waveform including multiple voltage pulses that can be provided in the power supply lines of the first PV source assembly shown in FIG. 3 according to one or more embodiments. [Figure 5]

[0016] 1A-D show exemplary radio frequency (RF) waveforms that can be established at the electrodes using embodiments described herein. [Figure 6]

[0017] 1A-B are graphs of process results using edge-tuned circuitry according to embodiments described herein. [Figure 7]

[0018] FIG. 1 illustrates a processing method that can be performed using embodiments described herein. DETAILED DESCRIPTION OF THE INVENTION

[0013]

[0019] For ease of understanding, where possible, identical reference numerals have been used to designate identical elements common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further description.

[0014]

[0020] Embodiments of the present disclosure include apparatus and methods used to process substrates in a plasma processing chamber. In some embodiments, aspects of the apparatus and methods are directed to improving the results of the plasma treatment process across the surface of the substrate. In some embodiments, the apparatus and methods improve the uniformity of the plasma formed over the center and edge of the substrate and / or the control over the distribution of ion flux and energy at the surface of the substrate.

[0015]

[0021] Embodiments of the present disclosure may include apparatus and methods for providing a pulsed voltage (PV) waveform delivered from one or more PV generators to one or more electrodes in a processing chamber, while providing a radio frequency (RF) generated RF waveform from an RF generator to one or more RF electrodes in the processing chamber. The one or more PV waveforms delivered from the one or more PV generators are configured to establish a substantially constant sheath voltage to provide a desired ion energy distribution function (IEDF) at a substrate surface during one or more plasma processing steps performed in the processing chamber.

[0016]

[0022] Some embodiments of the present disclosure include apparatus and methods for controlling plasma uniformity, for example, by controlling electron density in the bulk plasma over the central and circumferential edge regions of a substrate. In some embodiments, plasma uniformity is controlled by using an RF tuning circuit coupled to one of multiple electrodes positioned relative to the substrate during plasma processing. In one example, plasma uniformity is controlled by using an RF tuning circuit coupled to an electrode centrally located below the substrate and / or an RF tuning circuit coupled to an electrode located below the edge of the substrate. Thus, by adjusting at least one electrical characteristic of the RF tuning circuit, the effect of the generated RF fundamental frequency and associated RF harmonic frequencies on plasma processing results can be controlled. More specifically, it has been found that adjusting and controlling one or more characteristics of the generated RF fundamental frequency and harmonic frequencies, such as the amplitude and phase of the RF frequency, can improve plasma processing uniformity and process results. Advantageously, one or more of the tuning circuits and methods of using the tuning circuits can be used to control reactive neutral species concentration, ion energy and angular distribution, ion directionality and directional uniformity, and provide individual tuning knobs for individually controlling ion flux and / or reactive neutral species uniformity across the surface of the substrate.

[0017] Plasma Processing System Example

[0023] 1A and 1B are schematic cross-sectional views of processing systems 10A and 10B, respectively, configured to perform one or more of the plasma processing methods described herein. FIGURE 2 is a simplified schematic diagram of a processing scheme usable with one or both of the processing systems 10A and 10B, according to one or more embodiments disclosed herein. FIGURE 3 shows one example of a tuning circuit and filter configuration within a PV source assembly that can be used in one or both of the processing systems 10A and 10B to control and adjust plasma uniformity over a substrate surface, according to one or more embodiments disclosed herein.

[0018]

[0024] 1A and 1B are configured for plasma-assisted etching processes, such as reactive ion etching (RIE) plasma processing. However, it should be noted that the embodiments described herein may also be used with processing systems configured for use in other plasma-assisted processes, such as plasma-enhanced deposition processes (e.g., plasma-enhanced chemical vapor deposition (PECVD) processes, plasma-enhanced physical vapor deposition (PEPVD) processes, plasma-enhanced atomic layer deposition (PEALD) processes), plasma treatment processes, or plasma-based ion implantation processes (e.g., plasma doping (PLAD) processes).

[0019]

[0025] As shown in FIGS. 1A-1B, processing systems 10A-10B are configured to form a capacitively coupled plasma (CCP), and processing chamber 100 includes an upper electrode (e.g., chamber lid 123) disposed within processing space 129, facing a lower electrode (e.g., substrate support assembly 136) disposed within processing space 129. In a typical CCP processing system, a radio frequency (RF) source (e.g., RF generator 118) is electrically coupled to one of the upper or lower electrodes (e.g., 123 or 136) and provides an RF signal configured to ignite and sustain a plasma (e.g., plasma 101). This plasma is capacitively coupled to each of the upper and lower electrodes and is disposed in a processing region therebetween. Typically, the opposing upper or lower electrode (e.g., 123 or 136) may be coupled to ground or to a second RF generator (not shown). 1A-1B, one or more components of the substrate support assembly 136, such as the support base 107, may be electrically coupled to a plasma generator assembly 163 that includes an RF generator 118. Here, the chamber lid 123 may be electrically coupled to ground.

[0020]

[0026] 1A-1B, each of processing systems 10A and 10B includes a processing chamber 100 that includes a substrate support assembly 136, a system controller 126, and a plasma control assembly 188. In the embodiments described herein, it is contemplated that any one or combination of the features, configurations, and / or structural components of processing system 10A (e.g., the structural components of substrate support assembly 136) and / or the electrical components of plasma control assembly 188 may be used in processing system 10B, and vice versa.

[0021]

[0027] The processing chamber 100 typically includes a chamber body 113 including a chamber lid 123, one or more sidewalls 122, and a chamber base 124, which collectively define a processing space 129. The one or more sidewalls 122 and the chamber base 124 are generally sized and shaped to provide structural support for the elements of the processing chamber 100 and comprise a material configured to withstand pressure and additional energy applied thereto while a plasma 101 is generated in a vacuum environment maintained within the processing space 129 of the processing chamber 100 during processing. In one example, the one or more sidewalls 122 and the chamber base 124 are formed from a metal, such as aluminum, an aluminum alloy, a stainless steel alloy, or the like.

[0022]

[0028] A gas inlet 128 disposed through the chamber lid 123 is used to supply one or more process gases or vapors to the process space 129 from a process gas source 119 that is fluidly connected to the gas inlet 128. In some embodiments, the chamber lid 123 includes a showerhead 127 through which the gas or vapor is distributed into the process space 129. In some embodiments, the gas or vapor is supplied to the process space 129 using a gas inlet disposed through one of the one or more sidewalls 122 (not shown). The substrate 103 enters and exits the process space 129 through an opening (not shown) in one of the one or more sidewalls 122. The opening is sealed with a slit valve (not shown) during plasma processing of the substrate 103.

[0023]

[0029] In some embodiments, a plurality of lift pins 20 movably disposed through openings formed in the substrate support assembly 136 are used to facilitate substrate transfer to and from the substrate support surface 105A. In some embodiments, the plurality of lift pins 20 are disposed above and coupled to and / or engageable with a lift pin hoop (not shown) disposed within the processing volume 129. The lift pin hoop may be coupled to a shaft (not shown) that hermetically extends through the chamber base 124. The shaft may be coupled to an actuator (not shown) that is used to raise and lower the lift pin hoop. When in the raised position, the lift pin hoop engages the plurality of lift pins 20 to raise the upper surface of the lift pins above the substrate support surface 105A, lifting the substrate 103 therefrom and allowing a robotic handler (not shown) to access the inactive (backside) surface of the substrate 103. When the lift pin hoop is in the lowered position, the plurality of lift pins 20 are flush with or recessed below the substrate support surface 105A, and the substrate 103 rests thereon.

[0024]

[0030] The system controller 126, also referred to herein as a processing chamber controller, includes a central processing unit (CPU) 133, memory 134, and support circuits 135. The system controller 126 is used to control the process sequence (including the substrate bias method described herein) when processing the substrate 103. The CPU 133 is a general-purpose computer processor configured for use in an industrial environment to control the processing chamber 100 and its associated sub-processors. The memory 134, described herein as generally non-volatile memory, may include random access memory, read-only memory, floppy or hard disk drives, or other suitable forms of local or remote digital storage. The support circuits 135 are conventionally coupled to the CPU 133 and may include cache, clock circuits, input / output subsystems, power supplies, etc., and combinations thereof. Software instructions (programs) and data can be coded and stored in the memory 134 to instruct the processor in the CPU 133. Software programs (or computer instructions) readable by the CPU 133 in the system controller 126 determine which tasks are executable by components in the processing systems 10A and / or 10B. Typically, a program readable by the CPU 133 in the system controller 126 includes code that, when executed by the processor (CPU 133), performs tasks related to the plasma processing schemes described herein. The program may include instructions that are used to control various hardware and electrical components in the processing systems 10A and / or 10B to perform various process tasks and various process sequences used to implement the methods described herein. In one embodiment, the program includes instructions used to implement one or more of the methods described herein.

[0025]

[0031] The plasma control assembly 188 generally includes a plasma generator assembly 163, a first pulsed voltage (PV) source assembly 196 for establishing a first PV waveform at the bias electrode 104, and a second PV source assembly 197 for establishing a second PV waveform at the edge control electrode 115. In some embodiments, the plasma generator assembly 163 supplies an RF signal to the support base 107 (e.g., a powered electrode or cathode). This RF signal can be used to generate (sustain and / or ignite) a plasma 101 in a processing region 129 disposed between the substrate support assembly 136 and the chamber lid 123. In some embodiments, the RF generator 118 is configured to supply an RF signal having a frequency greater than 400 kHz (e.g., a frequency of about 1 MHz or greater, or a frequency of about 2 MHz or greater (e.g., a frequency of about 13.56 MHz or greater, a frequency of about 27 MHz or greater, a frequency of about 40 MHz or greater, etc., or a frequency between about 30 MHz and about 200 MHz (e.g., between about 30 MHz and about 160 MHz, between about 30 MHz and about 120 MHz, or between about 30 MHz and about 60 MHz)).

[0026]

[0032] In some embodiments, the plasma control assembly 188, the first PV source assembly 196, and / or the second PV source assembly 197 include tuning circuits 154, which may be used to adjust one or more characteristics of the plasma 101 formed between the substrate support assembly 136 and the chamber lid 123, as described above. In some embodiments, the tuning circuits 154 may be used to adjust the density of the portion of the plasma 101 formed over the peripheral edge region 103B of the substrate 103 disposed on the substrate support assembly 136 relative to the density of the portion of the plasma 101 formed over the surface of the central region 103A of the substrate 103. As discussed further below, one or more of the edge tuning circuits 154 enable manipulation of one or more characteristics of harmonics of the RF power provided by the RF generator 118 used to maintain the plasma 101 in the region over the central region 103A and / or the peripheral edge region 103B of the substrate support assembly 136. For example, the tuning circuit 154 in one or both of the PV source assemblies 196, 197 may be used to adjust one or more of the voltage, current, and / or phase characteristics of the RF signal received by and reflected through use of the tuning circuit 154 due to the RF source 118 providing an RF signal to the plasma 101. In this example, adjusting the voltage, current, and / or phase of the reflected portion of the received RF signal is used to adjust the plasma characteristics between the center and edge regions of the substrate.

[0027]

[0033] As described further below, tuning circuit 154 may be electrically coupled to bias electrode 104 and / or edge control electrode 115 disposed on substrate support assembly 136. In some embodiments, the RF signal used to ignite and / or sustain plasma 101 is supplied from plasma generator assembly 163 to support base 107, which is capacitively coupled to bias electrode 104 and edge control electrode 115 through a layer of dielectric material disposed therebetween. Edge tuning circuit 154 may be used to adjust one or more characteristics of the RF power used to sustain the plasma in the region over bias electrode 104 and edge control electrode 115, such as by adjusting the voltage, current, and / or phase of the RF power at bias electrode 104 relative to edge control electrode 115.

[0028]

[0034] In some embodiments, the difference between the voltage, current, and / or phase of the RF power used to ignite and / or maintain a plasma in the region over the edge control electrode 115 and the bias electrode 104 and their harmonic components is determined and / or monitored by measuring or determining the respective voltage, current, and / or phase of the RF power at various RF frequencies received at the edge control electrode 115 and / or the bias electrode 104 or at the output of the tuning circuit 154. In some embodiments, one or more characteristics of the RF power at the edge control electrode 115 and / or the bias electrode 104 are measured and / or determined using a signal detection module 187. In some embodiments, one or more characteristics of the generated RF power are measured and / or determined using a signal detection module 187 that is communicatively coupled to the system controller 126. The signal detection module 187 is generally configured to receive electrical signals from electrical signal traces (not shown) electrically coupled to various components within the processing systems 10A and 10B, such as nodes N1, N2, N3, and N4 in FIGS. 2 and 3 . The signal detection module 187 may include a plurality of input channels 172 (FIGS. 1A-1B), each configured to receive an electrical signal from a corresponding electrical signal trace, and a data acquisition module 169. The electrical signals received by the input channels 172 may include, but are not limited to, one or more characteristics of an RF signal supplied to the electrode, an RF waveform established at the output of a tuning circuit 154 coupled to one or both of the bias electrode 104 and the edge control electrode 115 through a transmission line, a pulse voltage (PV) waveform established at one or both of the bias electrode 104 and the edge control electrode 115, and a chucking voltage supplied to one or both of the bias electrode 104 and the edge control electrode 115. The electrical signals received by the input channels 172 may be detected and monitored using an RF current sensor (not shown) configured to sense an RF current I(t) and an RF voltage sensor (not shown) configured to sense an RF voltage V(t).The RF current I(t) and RF voltage V(t) may be received by an analog input of the microcontroller and then converted to a digital representation that is transferred to the system controller 126. The phase angle θ (the time difference between I(t) and V(t)) may be determined using a phase detector (not shown) in the input channel 172, or may be determined after I(t) and V(t) have been converted to a digital representation.

[0029]

[0035] In some embodiments, the data acquisition module 169 is configured to generate control signals that are used to automatically control one or more characteristics of the RF signal, RF waveform, PV waveform, and / or chucking voltage during substrate processing. In some embodiments, desired changes in one or more characteristics are communicated by the system controller 126 to the signal detection module 187, and the data acquisition module 169 can be used to implement the desired changes.

[0030]

[0036] As described above, in some embodiments, the plasma generator assembly 163, including the RF generator 118 and the RF matching assembly 160, is generally configured to supply a desired amount of continuous wave (CW) or pulsed RF power at a desired substantially fixed sinusoidal waveform frequency to an electrode, such as the support base 107 of the substrate support assembly 136, based on control signals provided by the system controller 126. In some embodiments, the support base 107 is an RF electrode that is electrically coupled to the RF generator 118 via an RF matching circuit 162 and a pulsed voltage (PV) waveform filter assembly 161, both of which are disposed within the RF matching assembly 160. The PV waveform filter assembly 161 includes one or more electrical elements configured to substantially prevent current generated by the output of the PV waveform generator 150 from flowing through the RF power supply line 167 and damaging the RF generator 118. The PV waveform filter assembly 161 acts as a high impedance (e.g., high Z) to the PV signal generated from the PV pulse generator in the PV waveform generator 150, thereby suppressing current flow to the RF matching circuit 162 and the RF generator 118.

[0031]

[0037] In some embodiments, the RF matching assembly 160 and the RF generator 118 are used to ignite and sustain a processing plasma 101 using an electric field generated by a process gas disposed within the processing space 129 and RF power (RF signal) supplied by the RF generator 118 to the support base 107. The processing space 129 is fluidly connected to one or more dedicated vacuum pumps through a vacuum exhaust 120, which maintains the processing space 129 at sub-atmospheric conditions and evacuates the process gas and / or other gases therefrom. In some embodiments, a substrate support assembly 136 disposed within the processing space 129 is disposed on a support shaft 138. The support shaft 138 is grounded and extends through the chamber base 124.

[0032]

[0038] As briefly described above, the substrate support assembly 136 generally includes a substrate support 105 (e.g., an ESC substrate support) and a support base 107. In some embodiments, the substrate support assembly 136 can further include an insulating plate 111 and a grounded plate 112, as described further below. The support base 107 is electrically isolated from the chamber base 124 by the insulating plate 111, and the grounded plate 112 is interposed between the insulating plate 111 and the chamber base 124. The substrate support 105 is thermally coupled to and disposed on the support base 107. In some embodiments, the support base 107 is configured to regulate the temperature of the substrate support 105 and the substrate 103 disposed on the substrate support 105 during substrate processing. In some embodiments, the support base 107 includes one or more cooling channels (not shown) disposed therein. The one or more cooling channels are in fluid communication with and are in fluid connection with a coolant source (not shown), such as a refrigerant source or water source having a relatively high electrical resistance. In some embodiments, the substrate support 105 includes a heater (not shown), such as a resistive heating element, embedded in its dielectric material, where the support base 107 is formed from a corrosion-resistant, thermally conductive material, such as a corrosion-resistant metal, for example, aluminum, an aluminum alloy, or stainless steel, and is bonded to the substrate support by adhesive or mechanical means.

[0033]

[0039] Typically, the substrate support 105 is formed of a dielectric material, such as a bulk-sintered ceramic material, e.g., a corrosion-resistant metal oxide or metal nitride material, such as aluminum oxide (Al2O3), aluminum nitride (AlN), titanium oxide (TiO), titanium nitride (TiN), yttrium oxide (YO3), mixtures thereof, or combinations thereof. In embodiments herein, the substrate support 105 further includes a bias electrode 104 embedded in the dielectric material. In some embodiments, one or more characteristics of the RF power used to maintain the plasma 101 in the processing region above the bias electrode 104 are determined and / or monitored by measuring an RF waveform established at the bias electrode 104 (e.g., first RF waveform 601 in FIG. 6 ). Typically, the first RF waveform is established by providing an RF signal from the plasma generator assembly 163 to the substrate support 105, which is capacitively coupled to the bias electrode.

[0034]

[0040] In one configuration, the bias electrode 104 is a chucking pole used to secure (i.e., chuck) the substrate 103 to the substrate support surface 105A of the substrate support 105 and bias the substrate 103 relative to the processing plasma 101 using one or more of the pulsed voltage biasing schemes described herein. Typically, the bias electrode 104 is formed of one or more conductive components, such as one or more metal meshes, foils, plates, or combinations thereof. In some embodiments, the bias electrode 104 is electrically coupled to a clamping network 116. The clamping network 116 supplies a chucking voltage, such as a static DC voltage between about −5000 V and about 5000 V, to the bias electrode 104 using an electrical conductor, such as a coaxial power supply line 157 (e.g., a coaxial cable). As further described below, the clamping network 116 includes a bias compensation circuit element 116A, a DC power supply 155, and a bias compensation module blocking capacitor (referred to herein as blocking capacitor C B Also referred to as a blocking capacitor C Bis disposed between the output of a pulse voltage (PV) waveform generator 150 and the bias electrode 104 via a filter assembly 151 and a tuning circuit 154.

[0035]

[0041] 1A and 1B, the substrate support assembly 136 includes an edge control electrode 115 positioned below the edge ring 114, surrounding the bias electrode 104, and / or spaced a distance from the center of the bias electrode 104. Generally, for a processing chamber 100 configured to process a circular substrate, the edge control electrode 115 is annular in shape, made from a conductive material, and configured to surround at least a portion of the bias electrode 104. In some embodiments, such as shown in FIG. 1A, the edge control electrode 115 is positioned within the region of the substrate support 105. In some embodiments, as shown in FIG. 1A, the edge control electrode 115 includes a conductive mesh, foil, and / or plate and is spaced a similar distance (i.e., in the Z direction) from the edge ring 114 as the bias electrode 104 is spaced from the substrate support surface 105A of the substrate support 105. In some other embodiments, such as shown in FIG. 1B , the edge control electrode 115 comprises a conductive mesh, foil, and / or plate and is positioned on or within a region of the dielectric pipe 110 that surrounds at least a portion of the bias electrode 104 and / or the substrate support 105. The dielectric pipe 110 can be made of various insulators, such as aluminum oxide, aluminum nitride, or quartz. In some embodiments, the dielectric pipe 110 can include multiple components made of the same or different materials. Alternatively, in some other embodiments (not shown), the edge control electrode 115 is positioned within or coupled to the edge ring 114. The edge ring 114 is disposed on and adjacent to the substrate support 105.

[0036]

[0042] In some embodiments, one or more characteristics of the RF power used to maintain the plasma 101 in the processing region above the bias electrode 104 and the edge control electrode 115 are determined and / or monitored for a waveform including fundamental and harmonic radio frequencies (RF) established at the bias electrode 104 and a waveform including fundamental and harmonic RF frequencies established at the edge control electrode 115. The fundamental and harmonic RF waves established at the electrodes and controlled by one or more of the methods described herein may have the same RF frequency but different current, voltage, and / or phase electrical characteristics. In one example, the primary RF frequency provided by the RF source 118 is provided at a radio frequency of approximately 40 MHz, and the harmonic controlled by use of a tuning circuit 154 coupled to the electrode (e.g., the bias electrode 104 or the edge electrode 115) has an RF frequency of approximately 80 MHz (e.g., the first harmonic). In some cases, one or more characteristics of the fundamental and harmonic RF waves established at the electrodes can be manipulated using a tuning circuit 154 in one of the PV source assemblies, such as PV source assembly 196 or 197, to adjust the plasma density in regions on the center or outer edge of substrate 103. In this example, tuning circuit 154 of second PV source assembly 197 can be used to control the generation of activated species in bulk plasma 101. This allows fine tuning of the ion and / or radical flux at the edge (edge ​​region 103B) of substrate 103 relative to the center region 103A of substrate 103.

[0037]

[0043] In some embodiments, as shown, PV source assemblies 196 and 197 include a clamping network 116 electrically coupled to bias electrode 104 and edge control electrode 115 using electrical conductors (e.g., coaxial cables), such as coaxial power supply lines 157 and 158, respectively. Clamping network 116 can be used to supply a static DC voltage, such as between about −5000 V and about 5000 V, to the edge control electrode, and includes one or more bias compensation circuit elements 116A, DC power supply 155, and blocking capacitor C. BA blocking capacitor C B is located between the output of a pulsed voltage (PV) waveform generator 150 and the edge control electrode 115. The clamp network 116 can be used to supply the edge control electrode 115 with a clamp voltage that is the same or different from the clamp voltage supplied to the bias electrode 104, which is supplied from another clamp network 116 (first PV source assembly 196), to provide an additional process adjustment knob.

[0038]

[0044] In some embodiments, the processing chamber 100 further includes a dielectric pipe 110, or collar, that at least partially surrounds a portion of the substrate support assembly 136. The dielectric pipe 110 provides a dielectric barrier between the RF high-temperature substrate support assembly 136 and the grounded liner 108 and protects the substrate support 105 and / or support base 107 from contact with corrosive process gases or plasmas, cleaning gases or plasmas, or their by-products. Typically, the dielectric pipe 110, insulating plate 111, and grounded plate 112 are surrounded by the liner 108. In some embodiments, a plasma screen 109 is positioned between the cathode liner 108 and the sidewall 122 to prevent plasma from forming in the space below the plasma screen 109 between the liner 108 and one or more sidewalls 122.

[0039] Processing Control Scheme

[0045] 2 is a simplified schematic diagram of a bias and edge control scheme that can be used with one or both of the processing systems 10A-10B shown in FIGURES 1A and 1B. As shown in FIGURE 2, the RF generator 118 and the PV waveform generator 150 are configured to supply RF waveforms and pulsed voltage waveforms, respectively, to one or more electrodes disposed within the processing space 129 of the processing chamber 100. In one embodiment, the RF generator 118 and the PV waveform generator 150 are configured to simultaneously supply RF waveforms and pulsed voltage waveforms to one or more electrodes disposed within the substrate support assembly 136.

[0040]

[0046] In one non-limiting example, the RF generator 118 and the PV waveform generator 150 are configured to supply an RF waveform and a pulsed voltage waveform to the support base 107 and the bias electrode 104, respectively, both of which are disposed within the substrate support assembly 136. In another example, the RF generator 118, the first PV waveform generator 150, and the second PV waveform generator 150 are configured to supply an RF waveform, a first pulsed voltage waveform, and a second pulsed voltage waveform to the support base 107, the bias electrode 104, and the edge control electrode 115, respectively, all of which are disposed within the substrate support assembly 136. The RF generator 118 is configured to supply an RF signal comprising a sinusoidal RF waveform to one or more electrodes disposed within the chamber body 113 by providing the RF signal through an RF (plasma) matching assembly 160, which includes an RF matching circuit 162 and a PV waveform filter assembly 161. Additionally, each of the PV waveform generators 150 is configured to supply a pulsed voltage (PV) waveform 401 ( FIG. 4 ), typically comprising a series of voltage pulses (e.g., microsecond or sub-microsecond voltage pulses, including nanosecond voltage pulses), to one or more electrodes disposed within the chamber body 113 by establishing a PV waveform on the bias electrode 104 or edge electrode 115 through a radio frequency (RF) filter assembly 151 and a tuning circuit 154.

[0041]

[0047] 3, RF filter assembly 151 includes a plurality of inductors and capacitors configured to prevent or at least minimize RF signals, including the fundamental RF frequency and its associated harmonics, generated by supplying RF power to plasma 101 formed by RF generator 118 from flowing back into high voltage supply 155 and PV waveform generator 150. Generally, RF filter assembly 151 will include at least one of a parallel resonant circuit, a low-pass filter, and one or more tuned shunt frequency elimination circuits for use in power supply lines coupling high voltage supply 155 and / or PV waveform generator 150 to their respective electrodes. In one example, as shown in FIG. 3, the parallel resonant circuit includes inductor L4 and capacitor C4 configured to block the fundamental frequency (e.g., 40 MHz) generated by RF generator 118. In one example, a tuned shunt frequency rejection circuit including a series inductor L5 and capacitor C5 arrangement coupled between power supply line 157 and ground is configured to attenuate (reduce the amplitude of) harmonics of a fundamental frequency (e.g., 80 MHz or 160 MHz) generated by RF generator 118. In some embodiments, RF filter assembly 151 may include multiple tuned shunt frequency rejection circuits (not shown) configured to individually attenuate different harmonic frequencies from backflowing into high voltage supply 155 and PV waveform generator 150. In another example, as shown in FIG. 3 , a low-pass filter includes inductor L3 and capacitor C3. These inductor L3 and capacitor C3 are configured to allow the PV waveform to pass through the RF filter assembly while substantially attenuating the fundamental RF frequency and all harmonics generated by RF generator 118. The low-pass filter portion of RF filter assembly 151 may be configured to attenuate RF frequencies above 400 kHz (e.g., RF frequencies above 500 kHz or RF frequencies above 1 MHz).

[0042]

[0048] As described above, the tuning circuit 154 in the PV source assemblies 196, 197 is generally configured to control and adjust the uniformity of the plasma formed between the chamber lid 123 and the substrate support assembly 136, for example, by controlling the plasma density (i.e., the free electron density in the bulk plasma 101) across the center and / or edge of the substrate 103. In some embodiments, as shown in FIGS. 1A and 2 , the tuning circuit 154 is electrically coupled between the bias electrode 104 (e.g., the centrally located electrode) and the RF filter assembly 151 and the PV waveform generator 150 of the first PV source assembly 196, and the tuning circuit 154 is electrically coupled between the edge control electrode 115 (the edge bias electrode) and the RF filter assembly 151 and the PV waveform generator 150 of the second PV source assembly 197. However, in some embodiments, the tuning circuit 154 is disposed within only one of the PV source assemblies 196 or 197.

[0043]

[0049] 3, the tuning circuit 154 includes a plurality of inductors and capacitors configured to control or affect the signal amplitude and / or phase of fundamental and / or harmonic RF frequencies coupled to the bias electrode 104 and / or edge control electrode 115 by modifying the RF impedance that the RF signal sees at the electrodes 104, 115.

[0044]

[0050] This series, parallel, or more complex geometry circuit can be used to control the phase and / or amplitude of the RF signal coupled to the bias electrode 104 and / or edge control electrode 115 by varying the impedance of a tuning circuit 154, which includes a first tunable impedance including an inductor L1 and a variable capacitor VC3 connected in series or parallel, and a second tunable impedance including an inductor L2 and a variable capacitor VC1 connected in series or parallel. In one example, the first tunable impedance is coupled between the second tunable impedance and the respective electrode 104 or 115. Because the RF impedance at node N2 of the filter assembly 151 is very high, the only path for RF to travel from the electrode 104 or 115 will be through the tuning circuit 154. At least one node of the tuning circuit 154 is coupled to RF ground. Each of the first and second tunable impedances can be adapted to independently tune to a resonant frequency, above the resonant frequency, or below the resonant frequency. For example, the resonant frequency can be the frequency of the RF generator 118 and / or a harmonic thereof.

[0045]

[0051] In some embodiments, when the combined impedance of the tuning circuit 154 and the power supply lines 157, 158 is tuned to be very low, essentially resistive, at a harmonic frequency, the RF voltage at the substrate or edge ring surface at that harmonic frequency is substantially zero. This tuning configuration minimizes or negligible RF power absorption by the plasma at that harmonic frequency, minimizing plasma non-uniformity effects caused by the harmonic frequency. By setting the impedance-generating components located within the tuning circuit 154, the tuning circuit 154 can thus be used to attenuate and / or modify the effect of the harmonic waveform on the RF voltage established at the substrate.

[0046]

[0052] As the first and second tunable impedances are tuned above and / or below the resonant frequency, the total impedance of the tuning circuit and power supply line becomes capacitive or inductive. This changes the RF voltage and the phase angle between the RF voltage and RF current at electrode 104 or 115. The amplitude of the RF signal may also be affected, which may depend on the RF impedance of electrodes 104 and 115. As the characteristics of the load created by the generated plasma change, tuning circuit 154 can be adjusted to compensate for variations in the RF signal received by tuning circuit 154 at harmonic frequencies.

[0047]

[0053] The tuning circuit 154 may further include a plurality of first and second adjustable impedances, each having a different resonant frequency (e.g., a harmonic frequency) and adjustable to different combinations of frequencies above or below the associated resonant frequency. Thus, different combinations of RF amplitude and phase angle adjustment between RF voltage and current at one or more frequencies may be obtained. The frequencies need not be harmonically related, as long as there are adjustable impedances for these frequencies. Also contemplated herein are series, parallel, or more complex connections between first and second adjustable impedances having different resonant frequencies.

[0048]

[0054] The variable capacitors VC1 and VC3 may have a capacitive range of approximately 3 pF to approximately 5000 pF, but are not limited thereto. The inductors L1 and L2 may have an inductive range of approximately 0.01 μH to approximately 1000 μH, but are not limited thereto. The motor position actuator of the position control and monitoring circuit of the system controller 126 may also include a position sensor that indicates the mechanical position of the adjustable element, such as the amount of shaft rotation of a variable vacuum capacitor, or a synchronous stepper motor position count (detection of maximum and minimum shaft rotations clockwise and counterclockwise) after the minimum and maximum rotation positions have been determined. The position values ​​may be correlated in a capacitance (or inductance)-position value table. Thus, the capacitance and / or inductance values ​​may be monitored and set to desired positions based on the required capacitance / inductance values. The adjustable element position values ​​may be used to monitor and pre-set the adjustable element positions according to the teachings of the present disclosure.

[0049]

[0055] In some embodiments, the type of tuning circuit 154 can be selected based on a desired ability to control the plasma density distribution, which can be achieved by adjusting one or more parameters of the tuning circuit 154, such that one or more characteristics of the RF waveform established at the edge control electrode 115 can be adjusted relative to one or more characteristics of the first RF waveform established at the bias electrode 104. As mentioned above, FIG. 3 schematically illustrates one example of a processing chamber 100 including a plasma generator assembly 163 and a first PV source assembly 196, which includes a schematic diagram of the tuning circuit 154 and the RF filter assembly 151. For ease of discussion, and without intending to limit the scope of the disclosure provided herein, FIG. 3 includes only a detailed schematic diagram of the first PV source assembly 196. However, the second PV source assembly 197 can also be similarly configured and separately controlled.

[0050]

[0056] The settings of the impedance-generating components in the tuning circuit 154 can also be used to attenuate the harmonic RF waveforms, which will generally involve reducing the RF power detected at node N1 ( FIG. 3 ). In some embodiments, the settings of the impedance-generating components in the tuning circuit 154 are used to substantially or completely attenuate the harmonic RF waveforms such that no or negligible harmonic RF waveforms reach the RF filter assembly 151 (e.g., node N2). The RF filter assembly 151 is then configured to further attenuate the attenuated harmonic RF waveforms to no or negligible levels at the output of the PV waveform generator 150 and / or high voltage module 155 (e.g., node N3).

[0051]

[0057] In some embodiments, as shown in FIG. 3 , due to the configuration of the RF filter assembly 151 and tuning circuit 154, the PV waveform 401 generated by the PV waveform generator 150 passes through the RF filter assembly 151 and tuning circuit 154, is applied to the bias electrode 104, and becomes established on the substrate 103. FIG. 4 shows an example of a PV waveform 401 including multiple voltage pulses. In this example, the PV waveform 401 provided by the PV waveform generator 150 includes multiple asymmetrically shaped voltage pulses 401c, each of which includes two main phases: an ion current phase 401b and a sheath collapse phase 401a. At the end of the ion current phase 401b and the beginning of the sheath collapse phase 401a, a rising edge of the PV waveform 401 is generated by the PV source assembly, which forms part of a typically short, narrow positive pulse that transitions from a negative voltage level to a positive voltage greater than 0 volts. The duration of the positive section of the pulse (e.g., T OFF ) can be varied, and in some embodiments, the waveform period (T P =T OFF +T ON ) between 1% and 90% of the waveform period (T P) is between 5% and 85% of the ion current phase 401b. In one example, the repetition frequency of the voltage pulses in the PV waveform 401 can be between approximately 100 kHz and 500 kHz, e.g., between 200 kHz and 400 kHz. Overall control of the PV waveform supply from the PV waveform generator 150 is controlled by using signals provided from the system controller 126. In one non-limiting example, the PV waveform generator 150 is configured to maintain a predetermined substantially constant negative voltage across its output (i.e., with respect to ground) during the ion current phase 401b by repeatedly opening and closing one or more switches in the PV waveform generator 150 at a predetermined rate. In one implementation, during a first phase of the pulse interval, a first switch is used to connect the high voltage supply to the bias electrode 104, and during a second phase of the pulse interval, a second switch is used to connect the bias electrode 104 to ground.

[0052]

[0058] Beneficially, the tuning circuit 154 can be configured to provide a wide range of desired plasma processing conditions across the surface of the substrate 103 to control and / or adjust the plasma density distribution at different points between the center and edge of the substrate 103.

[0053]

[0059] In some embodiments, the tuning circuit 154 is automatically adjusted by command from the system controller 126 to maintain desired processing conditions, such as to account for changes in plasma impedance at the fundamental frequency and / or one or more harmonic frequencies during gas flow changes, power changes, or pulse voltage changes. For example, the method may be used to automatically adjust the capacitances V and / or V of the tuning circuit to account for detected changes in RF power found at harmonics of the fundamental frequency. In some embodiments, the system controller 126 may be configured to: detect signals of one or more electrical parameters at corresponding nodes N of the processing systems 10A, 10B using the signal detection module 187; determine whether the processing systems 10A, 10B are operating within desired processing conditions by comparing characteristics of the detected signals with one or more control limits stored in memory; and adjust one or more variable impedance components in the tuning circuit 154 to correct for undesired variations if the electrical signal characteristics are outside the control limits. Some embodiments include automatically adjusting the tuning circuit 154, such as adjusting the variable capacitance VC1 or VC3, to maintain a desired RF voltage amplitude ratio, RF current amplitude ratio, and / or RF phase difference between the fundamental and harmonic frequencies in the edge control electrode 115 and / or bias electrode 104.

[0054]

[0060] In another embodiment, based on plasma processing result data collected from substrates processed in the plasma processing chamber, adjustments can be made to one or more of the one or more variable impedance components to correct for undesirable process results observed in one or more previously processed substrates, such as an increased etch rate in the center relative to the edge of one or more substrates. In one example, the system controller 126, or a system user, may set one or more of the variable impedance components in the tuning circuit 154 to a first set point intended to correct the previously observed undesirable process result by adjusting the effect of fundamental and / or harmonic frequencies on the plasma density and / or sheath formed on the surface of the substrate. One or more programs stored in the system controller 126, or a system user, can further modify the process results by adjusting the set points of one or more of the variable impedance components from the first set point based on additional data received from subsequent analysis of substrates processed using the first set points of the variable impedance components.

[0055] Plasma treatment example

[0061] 5A-5D show experimentally generated RF waveforms. The RF waveforms are superpositions of fundamental and harmonic RF frequencies established at two electrodes within process chamber 100. Each of FIGS. 5A-5D includes RF voltage waveform 501V and RF current waveform 501C (both established at edge electrode 115) and RF voltage waveform 502V (established at bias electrode 104). The change seen between each of FIGS. 5A-5D involves adjustment of variable capacitor V C1 in a tuning circuit configured similarly to tuning circuit 154 shown in FIG. 3.

[0056]

[0062] As shown in FIG. 5A, the variable capacitors VC1 and VC3 of the tuning circuit 154 are set to a first setting, and the MAs shown in FIG. 1, RF voltage waveform 501V and RF current waveform 501C were realized, each having a first amplitude and in phase with each other. Similarly, RF voltage waveform 502V measured at bias electrode 104 had a first amplitude and was measured at time T M In this case, it is in phase with the RF voltage waveform 501V.

[0057]

[0063] 5B, variable capacitors VC1 and VC3 in tuning circuit 154 were set to a second setting to achieve new second RF voltage waveform 501V, second RF current waveform 501C, and second RF voltage waveform 502V established at edge electrode 115 and bias electrode 104, respectively. As shown in FIG. 5B, the second setting of variable capacitors VC1 and VC3 in tuning circuit 154 was set to a second setting for a time T M 5A. The second RF voltage waveform 501V and the second RF current waveform 501C each have a second amplitude and maintain the same phase as each other, as shown in FIG. 5A. The amplitude of the second RF voltage waveform 501V is decreased from the first RF voltage waveform 501V shown in FIG. 5A. The second amplitude of the second RF current waveform 501C is increased from the first RF current waveform 501C shown in FIG. 5A due to changes in the variable capacitors VC1 and VC3. The second RF voltage waveform 502V measured at the bias electrode 104 has a second amplitude greater than the first RF voltage waveform 502V, and is maintained in phase with each other for a time T M 5. The second RF voltage waveform 501V is shifted to a position out of phase with the second RF voltage waveform 501V.

[0058]

[0064] 5C, variable capacitors VC1 and VC3 of tuning circuit 154 were set to a third setting to achieve new third RF voltage waveform 501V, third RF current waveform 501C, and third RF voltage waveform 502V established at edge electrode 115 and bias electrode 104, respectively. As shown in FIG. 5C, the third setting of variable capacitors VC1 and VC3 in tuning circuit 154 was set to a third setting for a time T M5A, a third RF voltage waveform 501V and a third RF current waveform 501C are realized, each having a third amplitude and shifted relative to each other so as to be out of phase with each other. The amplitude of third RF voltage waveform 501V is increased from the first RF voltage waveform 501V shown in FIG. 5A. The amplitude of third RF current waveform 501C is increased from the first RF current waveform 501C shown in FIG. 5A. Third RF voltage waveform 502V measured at bias electrode 104 has a third amplitude greater than first RF voltage waveform 502V, and is measured at time T M , the third RF voltage waveform 501V is shifted to a position that is out of phase with the third RF voltage waveform 501V by approximately 180°.

[0059]

[0065] 5D, variable capacitors VC1 and VC3 of tuning circuit 154 were set to a fourth setting to achieve new fourth RF voltage waveform 501V, fourth RF current waveform 501C, and fourth RF voltage waveform 502V established at edge electrode 115 and bias electrode 104, respectively. As shown in FIG. 5D, the fourth settings of variable capacitors VC1 and VC3 in tuning circuit 154 each have a fourth amplitude and are set for time T M 5A. The fourth RF voltage waveform 501V and the fourth RF current waveform 501C are shifted relative to each other so as to be out of phase with each other, as shown in FIG. 5A. The amplitude of the fourth RF voltage waveform 501V is increased from the first RF voltage waveform 501V shown in FIG. 5A. The amplitude of the fourth RF current waveform 501C is increased from the first RF current waveform 501C shown in FIG. 5A. The fourth RF voltage waveform 502V has a fourth amplitude that is greater than the first RF voltage waveform 502V, and is maintained at time T M 5. It is in phase with the third RF voltage waveform 501V at

[0060]

[0066] 6A-6B are graphs illustrating the effect on the etch rate across the surface of a substrate produced by adjusting the characteristics of either an edge-tuned circuit or a center-tuned circuit, according to embodiments described herein. Figure 6A illustrates the effect on the etch rate produced by adjusting the capacitance of the variable capacitor of tuning circuit 154 coupled to edge electrode 115, shown by curves S1, S2, and S3, respectively. Figure 6B illustrates the effect on the etch rate produced by adjusting the capacitance of the variable capacitor of tuning circuit 154 coupled to bias electrode 104, shown by curves S1, S2, and S3, respectively.

[0061] Processing method example

[0067] 7 is a process flow diagram illustrating a method 700 for controlling plasma processing results on a substrate, according to one embodiment. In step 702, the method 700 includes providing a first radio frequency (RF) signal to an electrode, such as the support base 107 of the substrate support assembly 136, disposed within the processing volume 129 of the processing chamber 100. Generally, the RF signal is provided to the electrode using a plasma generator assembly 163 electrically coupled through an RF matching circuit 162 and a PV waveform filter 161. Here, the RF signal is configured to ignite and / or sustain a processing plasma 101 in a processing region 129A of the processing chamber 100, the processing region 129A being disposed between the substrate support assembly 136 and the chamber lid 123. In some embodiments, the RF signal has a fundamental RF frequency of about 1 MHz or greater, such as about 13.56 MHz or greater, or even 40 MHz or greater.

[0062]

[0068] In some embodiments, step 702 further includes electrostatically clamping the substrate 103 to the substrate support 105 by supplying a chucking voltage to the bias electrode 104 from a DC power supply 155 electrically coupled to the bias electrode 104 using power supply line 157. The chucking voltage is used to create a potential difference between the substrate 103 and the bias electrode 104, resulting in an electrostatic attraction force (chucking force) through the capacitance of a first portion of dielectric material disposed therebetween. In some embodiments, method 700 includes flowing an inert gas (e.g., helium) into a gap region disposed between the substrate 103 and the substrate support surface 105A and / or between the edge ring 114 and a surface of the substrate support assembly 136 to promote heat transfer therebetween.

[0063]

[0069] In step 704, method 700 (optionally) includes establishing pulsed voltage (PV) waveforms at one or both of bias electrode 104 and edge control electrode 115. Here, a first PV voltage waveform including asymmetric voltage pulses may be established at bias electrode 104 using first PV source assembly 196, and a second PV waveform may be established at edge control electrode 115 using second PV source assembly 197. As described above, PV waveform generator 150 may be used to establish a substantially constant sheath voltage (e.g., a substantially constant difference between substrate potential and plasma potential) that provides a single peak IEDF for ions accelerated toward the substrate surface, and / or may be operated to provide a desired IEDF profile of ion energy at the substrate surface.

[0064]

[0070] In some embodiments, the first and / or second PV waveforms include a series of repeating cycles, with the waveform within each cycle having a first portion occurring during a first time interval (e.g., a sheath formation phase and an ion current phase) and a second portion occurring during a second time interval (e.g., a sheath collapse phase). In some embodiments, the waveform established at the surface of the substrate is substantially constant during at least a portion of the second time interval, the second time interval being longer than the first time interval. In some embodiments, the first PV waveform and / or the second PV waveform each have a voltage peak in the first time interval and a substantially positive slope or a substantially negative slope during at least a portion of the second time interval. In some embodiments, the second time interval is longer than the first time interval. In other embodiments, the second time interval is shorter than or approximately the same as the first time interval.

[0065]

[0071] In step 706, method 700 includes adjusting one or more characteristics of an RF waveform having a fundamental frequency and a harmonic RF frequency of the fundamental RF frequency received at bias electrode 104 or edge control electrode 115. In some embodiments, one or more characteristics of the RF waveform at either or both of the fundamental and harmonic frequencies are adjusted, such as by changing the voltage amplitude ratio of the RF waveform, adjusting the current amplitude ratio of the RF waveform, adjusting the phase difference between the RF voltage and RF current of the RF waveform, adjusting the phase difference of the RF voltage or RF current between bias electrode 104 and edge control electrode 115, adjusting the supplied power ratio between bias electrode 104 and edge control electrode 115, or a combination thereof. Adjusting one or more characteristics of the RF waveform is performed by adjusting the electrical characteristics of one or more of the impedance-generating elements in tuning circuit 154.

[0066]

[0072] In some embodiments, adjusting the harmonic waveforms changes plasma uniformity across at least a portion of the processing region 129A. For example, in one embodiment, the processing region 129A is defined by the chamber lid 123 and the substrate support assembly 136, and the plasma 101 is a bulk plasma formed therebetween. In some embodiments, a first portion of the plasma 101 is formed in a region disposed between the chamber lid 123 and the bias electrode 104, and a second portion of the plasma 101 is formed in a region disposed between the chamber lid 123 and the edge control electrode 115. In these embodiments, adjusting the fundamental and / or harmonic waveforms changes the plasma density in the second portion of the plasma 101 relative to the plasma density in the first portion of the plasma 101.

[0067]

[0073] It has been discovered that by adjusting one or more variable impedance elements in tuned circuits coupled to electrodes disposed within the processing volume, as described above, the RF waveforms generated at two or more electrodes can be altered to adjust process variables of the plasma treatment process. It is believed that by adjusting characteristics such as the amplitude and phase of the fundamental and / or harmonic RF waveforms and adjusting one or more variable impedance elements in at least one tuned circuit coupled to the electrodes, plasma density and sheath characteristics can be adjusted to improve process results.

[0068]

[0074] In some embodiments of the processing chamber 100, the system controller 126 is configured to automatically adjust the tuning circuit 154 based on desired process conditions and / or desired characteristics for the fundamental and / or selected harmonic RF waveforms seen at the edge control electrode 115 and / or bias electrode 104. In some embodiments, the tuning circuit characteristics are controlled by adjusting one or more components of the tuning circuit 154 to desired set points and / or within desired control limits. The desired set points and / or control lists are selected by a user and stored in instructions used to control the processing system 10A, 10B. For example, the variable capacitances VC1 and VC3 of the tuning circuit 154 may be controlled to desired capacitances determined by a user and stored in the memory of the system controller 126. However, in some embodiments, the tuning circuit 154 may be adjusted manually. The system controller 126 can utilize information provided by experimental data, such as the data shown in FIGS. 5A-5D, to adjust and / or control the settings of the variable impedance elements seen in the tuning circuit 154 before or during plasma processing.

[0069]

[0075] RF plasma density control methods can be implemented independently and / or in combination with pulsed voltage (PV) waveform bias methods, providing independent and finer control over ion energy, IEDF, ion directionality, ion flux, and activated neutral gas molecule flux at the substrate surface compared to conventional RF bias CCP systems.

[0070]

[0076] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof, the scope of which is determined by the claims that follow.

Claims

1. 1. A plasma processing chamber comprising: a substrate support assembly having a substrate support surface disposed within a processing volume of the plasma processing chamber, a first electrode; a first portion of dielectric material disposed on the first electrode, the first portion of dielectric material forming the substrate support surface; and a second electrode spaced apart from the first electrode in a first direction parallel to the substrate support surface; a substrate support assembly including: a first voltage generator electrically coupled to the first electrode; a radio frequency (RF) generator electrically coupled to an RF electrode, the RF generator configured to generate a plasma in the processing space by supplying an RF signal to the RF electrode, the RF signal including a fundamental RF frequency; a first filter assembly electrically coupled between the first electrode and the first voltage generator, the first filter assembly including one or more capacitive and inductive elements configured to substantially block the fundamental RF frequency and harmonics of the fundamental RF frequency received at the first electrode from passing to the first voltage generator; a first tuning circuit electrically coupled between the first electrode and the first filter assembly, the first tuning circuit comprising: A plurality of impedance generating elements including at least one variable impedance element Including, a first tuning circuit, wherein the plurality of impedance-generating elements of the first tuning circuit are configured to adjust one or more characteristics of the fundamental RF frequency and / or one of the harmonics of the fundamental RF frequency established at the first electrode when the plasma is generated in the processing space; 1. A plasma processing chamber comprising:

2. a signal detection module configured to detect a characteristic of the one of the harmonics of the fundamental RF frequency; a system controller configured to adjust a setting of the one or more variable impedance elements of the first tuning circuit based on the detected characteristic of the one of the harmonics of the fundamental RF frequency; The plasma processing chamber of claim 1 further comprising:

3. 3. The plasma processing chamber of claim 2, wherein the detected characteristic comprises an amplitude or a phase of the harmonic of the fundamental RF frequency, and wherein adjusting the one or more variable impedance elements comprises adjusting a position of a variable capacitor of the one or more variable impedance elements.

4. a signal detection module configured to detect a characteristic of the fundamental RF frequency; a system controller configured to adjust a setting of the one or more variable impedance elements of the first tuning circuit based on the detected characteristic of the fundamental RF frequency; and The plasma processing chamber of claim 1 further comprising:

5. 5. The plasma processing chamber of claim 4, wherein the detected characteristic comprises an amplitude or a phase of the fundamental RF frequency, and wherein adjusting the one or more variable impedance elements comprises adjusting a position of a variable capacitor of the one or more variable impedance elements.

6. a second voltage generator electrically coupled to the second electrode; a second filter assembly electrically coupled between the second electrode and the second voltage generator, the second filter assembly including one or more capacitive and inductive elements configured to substantially block the fundamental RF frequency and the harmonics of the fundamental RF frequency from reaching the second voltage generator; and a second tuning circuit electrically coupled between the second electrode and the second filter assembly, the second tuning circuit comprising: A plurality of impedance generating elements including at least one variable impedance element Including, a second tuning circuit, the plurality of impedance generating elements of the second tuning circuit configured to adjust one or more characteristics of one of the harmonics of the fundamental RF frequency established at the first electrode when the plasma is generated in the processing space; The plasma processing chamber of claim 1 further comprising:

7. a system controller configured to adjust a setting of the one or more variable impedance elements of the second tuning circuit based on the detected characteristic of the one of the harmonics of the fundamental RF frequency. The plasma processing chamber of claim 6 further comprising:

8. 8. The plasma processing chamber of claim 7, wherein the detected characteristic comprises an amplitude or a phase of the harmonic of the fundamental RF frequency, and wherein adjusting the one or more variable impedance elements comprises adjusting a position of a variable capacitor of the one or more variable impedance elements.

9. a second voltage generator electrically coupled to the second electrode; a second filter assembly electrically coupled between the second electrode and the second voltage generator, the second filter assembly including one or more capacitive and inductive elements configured to substantially block the fundamental RF frequency and the harmonics of the fundamental RF frequency from reaching the second voltage generator; and a second tuning circuit electrically coupled between the second electrode and the second filter assembly, the second tuning circuit comprising: A plurality of impedance generating elements including at least one variable impedance element Including, a second tuning circuit, the plurality of impedance-generating elements of the second tuning circuit configured to adjust one or more characteristics of the fundamental RF frequency established at the first electrode when the plasma is generated in the processing space; and The plasma processing chamber of claim 1 further comprising:

10. a system controller configured to adjust a setting of the one or more variable impedance elements of the second tuning circuit based on the detected characteristic of the fundamental RF frequency. The plasma processing chamber of claim 9 further comprising:

11. 11. The plasma processing chamber of claim 10, wherein the detected characteristic comprises an amplitude or a phase of the fundamental RF frequency, and wherein adjusting the one or more variable impedance elements comprises adjusting a position of a variable capacitor of the one or more variable impedance elements.

12. 10. The plasma processing chamber of claim 1, wherein the RF signal supplied by the RF generator is configured to ignite and sustain a plasma from a gas or vapor supplied to a processing region of the processing chamber.

13. computer-implemented instructions stored in a memory configured, when executed by a processor, to perform a method for processing a substrate, the instructions comprising: (i) igniting and maintaining a plasma from a gas or vapor supplied to the processing space, wherein a first portion of the plasma is formed on the substrate support surface and the first electrode of the substrate support assembly, and a second portion of the plasma is formed on the substrate support surface and the second electrode of the substrate support assembly; (ii) adjusting one or more characteristics of the fundamental RF frequency and / or the one of the harmonics of the fundamental RF frequency at the first electrode relative to one or more characteristics of the fundamental RF frequency and / or the harmonic of the fundamental RF frequency at the second electrode by using the tuning circuit to vary a ratio of plasma density in the second portion of the plasma to plasma density in the first portion of the plasma; computer-implemented instructions, The plasma processing chamber of claim 1 further comprising:

14. the first voltage generator is configured to establish an asymmetric pulsed voltage waveform at the first electrode; the asymmetric pulsed voltage waveform includes a series of repetitive pulses, each repetitive pulse having a first portion occurring during a first time interval and a second portion occurring during a second time interval; the waveform has a voltage peak during the first time interval; and the waveform has a substantially positive slope, a substantially negative slope, or is substantially constant during at least a portion of the second time interval; The plasma processing chamber of claim 1 .

15. 1. A method for processing a substrate in a plasma processing chamber, comprising: generating and maintaining a plasma within a processing volume of the plasma processing chamber, generating and maintaining the plasma by supplying a radio frequency (RF) signal to an RF electrode, the RF signal including a fundamental RF frequency; a first portion of the plasma is formed above a substrate support surface and a first electrode of a substrate support assembly; generating and maintaining a plasma, a second portion of the plasma being formed on the substrate support surface and a second electrode of the substrate support assembly; adjusting one or more characteristics of the fundamental RF frequency and / or harmonics of the fundamental RF frequency at the first electrode relative to one or more characteristics of the fundamental RF frequency and / or harmonics of the fundamental RF frequency at the second electrode by using a tuning circuit coupled to the first electrode to vary a ratio of plasma density in the second portion of the plasma to plasma density in the first portion of the plasma; A method comprising:

16. 16. The method of claim 15, wherein adjusting the one or more characteristics of the fundamental RF frequency and / or the harmonics of the fundamental RF frequency comprises adjusting a position of a variable capacitor of one or more variable impedance elements of the tuned circuit.

17. establishing an asymmetric pulsed voltage waveform at the first electrode by a first voltage generator; further comprising the asymmetric pulsed voltage waveform includes a series of repetitive pulses, each repetitive pulse having a first portion occurring during a first time interval and a second portion occurring during a second time interval; the waveform has a voltage peak during the first time interval; and 16. The method of claim 15, wherein the waveform has a substantially positive slope, a substantially negative slope, or is substantially constant during at least a portion of the second time interval.

18. establishing an asymmetric pulsed voltage waveform at the second electrode by a second voltage generator; further comprising the asymmetric pulsed voltage waveform includes a series of repetitive pulses, each repetitive pulse having a first portion occurring during a first time interval and a second portion occurring during a second time interval; the waveform has a voltage peak during the first time interval; and 18. The method of claim 17, wherein the waveform has a substantially positive slope, a substantially negative slope, or is substantially constant during at least a portion of the second time interval.

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