System and method for increasing substrate processing speed using square pulse signals

Abstract

A system and method for increasing substrate processing speed using a square wave signal are described. One method includes generating a square wave signal by a low frequency (LF) radio frequency (RF) pulse generator. The method further includes generating a sinusoidal RF signal by a high frequency (HF) RF signal generator and supplying the square wave signal to a filter connected to an electrode of a plasma chamber. The method also includes supplying the sinusoidal RF signal to an impedance matching circuit connected to the electrode. Supplying the square wave signal reduces power reflected from the plasma chamber toward the HFRF signal generator, and reducing the power reflected toward the HFRF signal generator increases the substrate processing speed.

Description

[Technical Field]

[0001] The present embodiment relates to a system and method for increasing substrate processing speed using square pulse signals. [Background technology]

[0002] In a plasma tool, a radio frequency (RF) generator is connected to a matching network. The matching network is connected to a plasma chamber. A semiconductor wafer is placed in the plasma chamber. The RF generator generates an RF signal and transmits it to the matching network. The matching network outputs a correction signal based on the RF signal and transmits the correction signal to the plasma chamber for processing the semiconductor wafer. The RF generator is controlled to increase the processing rate of the semiconductor wafer. However, the increased processing rate may not be achieved.

[0003] The background art provided herein is intended to provide a general background to the present disclosure. The inventors' work within the scope of this background art, and aspects of the description that may not otherwise be admitted as prior art at the time of filing, are not admitted, explicitly or implicitly, as prior art to the present disclosure. Summary of the Invention

[0004]

[0009] Embodiments of the present disclosure provide a system, an apparatus, a method, and a computer program for increasing the processing speed of a substrate using a rectangular pulse signal. It should be understood that the present embodiments can be embodied in various forms, such as a process, an apparatus, a system, a device, or a method stored on a computer-readable medium. Several embodiments are described below.

[0005] In one embodiment, a method for increasing substrate processing speed using a square wave signal is described. The method includes generating a square wave signal by a low frequency (LF) radio frequency (RF) pulse generator. The method further includes generating a sinusoidal RF signal by a high frequency (HF) RF signal generator and supplying the square wave signal to a filter connected to an electrode of a plasma chamber. The method also includes supplying the sinusoidal RF signal to an impedance matching circuit connected to the electrode. Supplying the square wave signal reduces power reflected from the plasma chamber toward the HFRF signal generator. Reducing the power reflected toward the HFRF signal generator increases the substrate processing speed.

[0006] In one embodiment, a controller for increasing substrate processing speed using a square wave signal is described. The controller includes a processor that controls an LFRF pulse generator to generate a square wave signal and to provide the square wave pulse signal to a filter. The filter is connected to an electrode of a plasma chamber. The processor also controls an HFRF signal generator to generate a sinusoidal RF signal and to provide the sinusoidal RF signal to an impedance matching circuit. The impedance matching circuit is connected to the electrode. The LFRF pulse generator is controlled to reduce power reflected from the plasma chamber toward the HFRF signal generator. Reducing the power reflected toward the HFRF signal generator increases the substrate processing speed. The controller further includes a memory device connected to the processor.

[0007] In one embodiment, a system for increasing substrate processing speed using a square wave signal is described. The system includes an LFRF pulse generator that generates the square wave signal. The system further includes an HFRF signal generator that generates a sinusoidal RF signal. The system further includes a filter connected to the LFRF pulse generator and receiving the square wave signal, and a plasma chamber having an electrode connected to the filter. The system further includes an impedance matching circuit disposed between the HFRF signal generator and the electrode of the plasma chamber. The impedance matching circuit receives the sinusoidal RF signal. The LFRF pulse generator reduces power reflected from the plasma chamber toward the HFRF signal generator. Reducing the power reflected toward the HFRF signal generator increases the substrate processing speed.

[0008] Some advantages of the systems and methods described herein include increased substrate processing speed. An HFRF signal generator is used in combination with an LFRF pulse generator instead of an LFRF signal generator. The LFRF pulse generator generates a square wave signal. During each cycle of the clock signal, the square wave signal has a short pulse of positive potential followed by a square negative potential. This negative potential may include a series of micropulses. This series of micropulses may be referred to herein as a "flat negative square pulse." This flat negative square pulse results in plasma sheath stability (e.g., voltage and thickness stability). Stable sheath voltage and thickness results in less impedance change of the plasma seen by the LFRF pulse generator and HFRF signal generator. Less impedance change allows for faster and more accurate tuning of the high frequency of the HFRF signal generator. This faster and more accurate tuning of the high frequency increases substrate processing speed.

[0009] Other aspects will become apparent from the following detailed description considered in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0010] The embodiments are best understood by referring to the following description in conjunction with the accompanying drawings.

[0011] [Figure 1] FIG. 1 illustrates one embodiment of a system for generating a square wave signal.

[0012] [Figure 2A] FIG. 2A is a graph illustrating one embodiment of a clock signal.

[0013] [Figure 2B] FIG. 2B is a graph illustrating an embodiment of high frequency delivered power and high frequency reflected power for each cycle of a clock signal.

[0014] [Figure 2C] FIG. 2C is a graph showing voltage versus time for a square wave signal generated by a low frequency (LF) radio frequency (RF) pulse generator.

[0015] [Figure 2D] FIG. 2D is a graph illustrating one embodiment of a voltage signal representing the voltage at the bottom plasma sheath.

[0016] [Figure 3] FIG. 3 is a diagram illustrating one embodiment of an LFRF pulse generator.

[0017] [Figure 4A] FIG. 4A is a graph showing that a higher amount of power is reflected back toward a high frequency (HF) RF signal generator when using an LFRF signal generator compared to when using an LFRF pulse generator.

[0018] [Figure 4B] FIG. 4B is a graph showing that a lower amount of power is reflected back toward the HFRF signal generator when using an LFRF pulse generator compared to when using an LFRF signal generator.

[0019] [Figure 5] FIG. 5 is a graph showing the forward and reflected power of an LFRF signal.

[0020] [Figure 6] FIG. 6 illustrates one embodiment of a system using an HFRF signal generator in combination with an LFRF signal generator, illustrating increased substrate processing speeds when using an LFRF pulse generator. DETAILED DESCRIPTION OF THE INVENTION

[0021] In the following embodiments, a system and method for increasing the processing speed of a substrate using a square pulse signal is described. It will be apparent that the present embodiments may be practiced without some or all of these specific details. In other instances, well-known processes have not been described in detail in order to avoid unnecessarily obscuring the present embodiments.

[0022] FIG. 1 illustrates one embodiment of a system 100 for generating a square wave. The system 100 includes a host computer 102, a low-frequency (LF) radio frequency (RF) pulse generator 104, a high-frequency (HF) RF signal generator 106, a matched filter housing 108, and a plasma chamber 112. Examples of the host computer 102 include a desktop computer, a laptop, a tablet, a smartphone, and a controller. The host computer 102 includes a processor 116 and a storage device 118. By way of example, the processor described herein can be an application-specific integrated circuit (ASIC), a central processing unit (CPU), a field-programmable gate array (FPGA), a programmable logic device (PLD), an integrated controller, or a microcontroller. Examples of the storage device described herein include read-only memory (ROM) and random-access memory (RAM). Illustratively, the storage device is flash memory or a redundant array of independent disks (RAID). The processor 116 is connected to the storage device 118.

[0023] The LFRF pulse generator 104 is, for example, a device that periodically generates multiple high-voltage nanosecond pulses. By way of example, the LFRF pulse generator is a nanosecond pulser. Herein, each high-voltage nanosecond pulse may be referred to as a "sub-pulse." Examples of low frequencies include frequencies in the range of 10 kilohertz (kHz) to 800 kHz. By way of example, the low frequency may be a reference frequency of 400 kHz. Further by way of example, the operating frequency of the LFRF pulse generator 104 is 400 kHz.

[0024] Examples of high frequencies include frequencies in the range of 13 megahertz (MHz) to 120 MHz, inclusive. For example, the high frequency may be a reference frequency of 13.56 MHz, 27 MHz, 40 MHz, 60 MHz, or 100 MHz. Illustratively, the operating frequency of the HFRF signal generator 106 is 60 MHz. The high frequency is greater than the low frequency. For example, the low frequency is 400 kHz and the high frequency is 60 MHz. Another example is that the low frequency is 100 kHz and the high frequency is 60 MHz. The plasma chamber 112 is, for example, a capacitively coupled (CCP) plasma chamber.

[0025] The matching filter housing 118 includes an HF filter 120 and a matching circuit 122. The HF filter 120 includes, for example, an inductor. As another example, the HF filter 120 is not an impedance matching circuit. For example, the HF filter 120 does not match the impedance of a load connected to the output 142 of the HF filter 120 to the impedance of a signal source connected to the input 140 of the HF filter 120. The load connected to the output 142 is, for example, a combination of an RF connection 144, an output connection 146, an RF transmission line 148, and the plasma chamber 112. The signal source connected to the input 140 is, for example, an RF cable 138 and an LFRF pulse generator 104. As another example, the HF filter 120 includes an inductor connected in parallel with a capacitor. Examples of the matching circuit 122 include an impedance matching circuit and an impedance matching network. For example, an impedance matching circuit or an impedance matching network has a branch circuit including multiple circuit components (e.g., capacitors, inductors, resistors, etc.) connected to each other. For example, two of the multiple circuit components of the matching circuit 122 are connected to each other in series or in parallel.

[0026] The plasma chamber 112 includes a substrate support pedestal 124, such as an electrostatic chuck (ESC). The plasma chamber 112 further includes an upper electrode 126 disposed above the substrate support pedestal 124, with a gap 128 formed between the upper electrode 126 and the substrate support pedestal 124. The upper electrode 126 faces the substrate support pedestal 124 and is connected to ground potential. A lower electrode 130 embedded in the substrate support pedestal 124 is made of a metal such as aluminum or an aluminum alloy. The substrate support pedestal 124 is made of a metal and a ceramic such as aluminum oxide (Al2O3). The upper electrode 126 is made of metal.

[0027] The system 100 further includes a power sensor 135 connected to the output 132 of the HFRF signal generator 106. An example of the power sensor 135 is a sensor that measures the transmitted power at the output 132.

[0028] The processor 116 is connected to an input 134 of the LFRF pulse generator 104 via a transfer cable 132. The transfer cable may be, for example, a cable that allows serial data transfer, parallel data transfer, or data transfer via a universal serial bus (USB). The LFRF pulse generator 104 has an output 136 that is connected to an input 140 of the HF filter 120 via an RF cable 138. For example, the RF cable 138 is connected to a first end of an inductor of the HF filter 120. As an example, the RF cable includes an RF wire and an RF sheath that surrounds the RF wire.

[0029] The HF filter 120 has an output 142 connected to an output connection 146 of the matched filter housing 108 via an RF connection 144. For example, a second end of the inductor of the HF filter 120 is connected to the RF connection 144. The RF connection used herein may be, for example, an RF strap or an RF cable. The output connection 146 may be, for example, soldering between the RF connection 144 and the RF connection 160. As another example, the output connection 146 may be a fastener such as a screw or bolt connecting the RF connections 144 and 160. The output connection 146 is connected to the lower electrode 130 via an RF transmission line 148. For example, the RF transmission line 148 includes an RF rod, an insulating material, an RF sheath, and one or more RF straps. The insulating material is disposed between the RF rod and the RF sheath. The insulating material surrounds the RF rod, and the RF sheath surrounds the insulating material. In this example, the RF rod is connected to the output connection 146. The RF rod is also connected to the output connection 146 via one of one or more RF straps. The RF rod is connected to the lower electrode 130.

[0030] The processor 116 is also connected to an input 152 of the HFRF signal generator 106 via a transmission cable 150. The output 132 of the HFRF signal generator 106 is connected to an input 156 of the matching circuit 122 via an RF cable 154. For example, a first end of the branch circuit is connected to the RF cable 154. The output 158 ​​of the matching circuit 122 is connected to the output connection 146 via an RF connection 160. For example, a second end of the branch circuit is connected to the RF connection 160. The power sensor 135 is connected to the processor 116 via a transmission cable 162.

[0031] The processor 116 generates a recipe signal 164 and transmits it to the LFRF pulse generator 104 via the transfer cable 132 and the input 134. As an example, the recipe signal 164 includes information (e.g., pulse width and sub-pulse width) about a square wave signal 166 generated by the LFRF pulse generator 104. As an example, the square wave signal 166 is not a sinusoidal signal but has a low frequency. In this example, the envelope (e.g., power level) of the sinusoidal signal is constant or substantially constant. For example, the power levels have power amounts within a predetermined range (e.g., within ±10% of each other). For example, the square wave signal has multiple periodically repeated sub-pulses, each with a sub-pulse width. In this example, the square wave signal also has RF voltage ringing. In this example, each sub-pulse has a rectangular or square envelope, and the RF voltage ringing is noise (e.g., a series of micro-pulses) immediately following the sub-pulse. Additionally, in this example, the envelope of the sub-pulse is greater than the envelope of the RF voltage ringing by a predetermined amount (e.g., more than 100%). Further illustratively, the maximum amplitude of the sub-pulse is more than twice the maximum amplitude of the RF voltage ringing. Pulse width and sub-pulse width are discussed in more detail below. The pulse width defines the low frequency of the square wave signal 166. For example, the low frequency is the reciprocal of the pulse width.

[0032] As an example, the information included in recipe signal 164 does not include the power level (such as the maximum power amplitude) of square wave signal 166. Rather, in this example, the power level of the sub-pulses of square wave signal 166 is defined by the sub-pulse width. Illustratively, a larger sub-pulse width corresponds to a lower power level, and a smaller sub-pulse width corresponds to a higher power level. As an example, the information included in recipe signal 164 is received from a user via an input device connected to processor 116. Examples of input devices include a keyboard, a mouse, a stylus, and a keypad. The power level may be, for example, a maximum amplitude or a peak-to-peak amplitude.

[0033] The processor 116 further generates a recipe signal 168 and transmits it to the HFRF signal generator 106 via the transfer cable 150 and the input 152. As an example, the recipe signal 168 includes information (such as a high frequency and a power level) of the RF signal 170 to be generated by the HFRF signal generator 106. The RF signal 170 has a high frequency.

[0034] Upon receiving recipe signal 164, the processor of LFRF pulse generator 104 stores the information contained in recipe signal 164 in a memory device of LFRF pulse generator 104. The processor of LFRF pulse generator 104 is connected to the memory device of LFRF pulse generator 104. The processor and memory device form part of the controller of LFRF pulse generator 104.

[0035] Similarly, upon receiving the recipe signal 168, the processor of the HFRF signal generator 106 stores the information contained in the recipe signal 168 in a memory device of the HFRF signal generator 106. The processor of the HFRF signal generator 106 is connected to the memory device of the HFRF signal generator 106.

[0036] Processor 116 also generates and transmits a trigger signal 172 to the processor of LFRF pulse generator 104 via transmission cable 164 and input 134. Trigger signal 172 is also transmitted from processor 116 to the processor of HFRF signal generator 106 via transmission cable 150 and input 152. For example, processor 116 transmits trigger signal 172 to both LFRF pulse generator 104 and HFRF signal generator 106 simultaneously.

[0037] Upon receiving trigger signal 172, the processor of LFRF pulse generator 104 accesses information stored in a memory device of LFRF pulse generator 104 and, based on that information, controls multiple signal components of LFRF pulse generator 104 to generate square wave signal 166. For example, square wave signal 166 is generated to have the pulse width and sub-pulse widths included in recipe signal 164 received from processor 116. The signal components of LFRF pulse generator 104 are described in more detail below. Square wave signal 166 is, for example, a signal having multiple sub-pulses (e.g., square pulses) that are periodically repeated according to the pulse width. Each square pulse has a sub-pulse width.

[0038] Similarly, upon receiving trigger signal 172, the processor of HFRF signal generator 106 accesses information stored in a memory device of HFRF signal generator 106 and, based on that information, controls multiple signal components of HFRF signal generator 106 to generate RF signal 170. For example, RF signal 170 is generated to have the power level and radio frequency included in recipe signal 168 received from processor 116. RF signal 170 is, for example, a sinusoidal signal, such as a sinusoidal waveform having multiple periodically repeating sine waves.

[0039] The signal component of the LFRF pulse generator 104 transmits a square wave signal 166 to the HF filter 120 via the output 136, the RF cable 138, and the input 140. For example, the square wave signal 166 is received at a first end of an inductor in the HF filter 120. The HF filter 120 modifies the impedance of the square wave signal 166 and outputs a modified backward wave signal 174 at its output. For example, the modified backward wave signal 174 is output from a second end of the inductor of the HF filter 120. By way of example, the modified backward wave signal 174 is not a sinusoidal signal. The modified backward wave signal 174 is transmitted from the output 142 via the RF connection 144 to the output connection 146.

[0040] Furthermore, the signal components of the HFRF signal generator 106 transmit an RF signal 170 to the matching circuit 122 via the output 132, the RF cable 154, and the input 156. For example, the RF signal 170 is received at a first end of the branch circuit. The matching circuit 122 matches the impedance of a load connected to the output 158 ​​to the impedance of a signal source connected to the input 156, and outputs a modified RF signal 176 from the output 158. For example, the branch circuit modifies the impedance of the RF signal 170 by matching the impedance of a load connected to the output 158 ​​to the impedance of a signal source connected to the input 156, and outputs the modified RF signal 176 from a second end of the branch circuit. The load connected to the output 158 ​​is, for example, a combination of the RF connection 160, the RF output connection 146, the RF transmission line 148, and the plasma chamber 112. The signal source connected to the input 156 is, for example, a combination of the RF cable 154 and the HFRF signal generator 106. The modified RF signal 176 is transmitted from output 158 ​​via RF connection 160 to output connection 146 .

[0041] The first portion of the modified RF signal 176 is combined (e.g., added) with the modified backward wave signal 174 at output connection 146 to provide a combined signal 178 at output connection 146. For example, the amplitude of the first portion of the modified RF signal 176 and the amplitude of the modified backward wave signal 174 are added at output connection 146. By way of example, the combined signal 178 is a square wave signal and not a sine wave signal.

[0042] Furthermore, a second portion 180 of the modified RF signal 176 is reflected from the output connection 146, via the RF connection 144, and toward the HF filter 120. The second portion 180 comprises a high frequency component. The HF filter 120 removes the high frequency component from the second portion 180 of the modified RF signal 176 to provide a reflected filtered signal 182 at the input 140. With the high frequency component removed from the second portion 180, the reflected filtered signal 182 does not damage the signal components and processor of the LFRF pulse generator 104. The reflected filtered signal 182 is reflected back toward the LFRF pulse generator 104 via the RF cable 138.

[0043] The composite signal 178 is transmitted to the electrode 130 via the RF rod of the RF transmission line 148. By way of example, the power of the composite signal 178 is represented as a square wave signal having the high-frequency power fluctuations of the first portion of the modified RF signal 176. When the composite signal 178 is supplied to the electrode 130 and one or more process gases (e.g., an oxygen-containing gas, a fluorine-containing gas, or a combination thereof) are supplied to the gap 128, a plasma is ignited or sustained within the gap 128. The plasma is bounded by an upper plasma sheath 129A and a bottom plasma sheath 129B. The plasma processes a substrate S (e.g., a semiconductor wafer) disposed on the substrate support pedestal 124. Examples of processes on the substrate S include etching the substrate S, depositing material on the substrate S, cleaning the substrate S, etc. The use of the LFRF pulse generator 104 in combination with the HFRF signal generator 106 provides faster frequency tuning of the HFRF signal generator 106 compared to using an LFRF signal generator in combination with the HFRF signal generator 106 (as shown in FIG. 6).

[0044] In one embodiment of this specification, the terms "RF ringing" and "RF voltage ringing" are used interchangeably.

[0045] 2A is a graph 200 illustrating one embodiment of a clock signal 202. Clock signal 202 is generated by processor 116 (FIG. 1) and transmitted via transmission cable 132 to the processor of LFRF pulse generator 104 (FIG. 1). The processor of LFRF pulse generator 104 controls the signal components of LFRF pulse generator 104 in synchronization with clock signal 202. Clock signal 202 is also transmitted via transmission cable 150 (FIG. 1) to the processor of HFRF signal generator 106 (FIG. 1). The processor of HFRF signal generator 106 controls the signal components of HFRF signal generator 106 in synchronization with clock signal 202.

[0046] Graph 200 plots the logic levels of clock signal 202 versus time t. Logic levels are plotted on the y-axis of graph 200, and time t is plotted on the x-axis of graph 200. Time t increases in the positive x-direction of the x-axis from time t0 to time t30. Note that the time interval between two consecutive points on the x-axis of graph 200 is equal to the time interval between any other two consecutive points on the x-axis. For example, a first time interval from time t0 to time t5 is equal to a second time interval from time t5 to time t10.

[0047] Clock signal 202 periodically transitions between logic level 1 and logic level 0. For example, in cycle 1 of clock signal 202, clock signal 202 is at logic level 1 from time t0 to time t5. Also in cycle 1, clock signal 202 transitions from logic level 1 to logic level 0 at time t5. Furthermore, in cycle 1, clock signal 202 maintains logic level 0 from time t5 to time t10. In this manner, logic levels 1 and 0 are repeated in cycles 2 and 3 of clock signal 202.

[0048] 2B is a graph 210 illustrating an embodiment of RF source power and RF reflected power for each cycle of clock signal 202 (FIG. 2A). RF source power is forward power supplied from HFRF signal generator 106 (FIG. 1) to electrode 130 (FIG. 1) through RF wires of RF cable 154, matching circuit 122, RF connection 160, output connection 146, and RF rods of RF transmission line 148. RF reflected power is power reflected from plasma chamber 112 back toward HFRF signal generator 106 through the RF sheath of RF transmission line 148, output connection 146, RF connection 160, the housing of matching circuit 122, and the RF sheath of RF cable 154.

[0049] Graph 210 is a plot of high-frequency supplied power and high-frequency reflected power against time t. The high-frequency supplied power and high-frequency reflected power are plotted on the y-axis of graph 210, and time t is plotted on the x-axis of graph 210. The power plotted on the y-axis of graph 210 ranges from power amount -P5 to power amount P5. The power amount increases from power amount -P5 to power amount P5.

[0050] The RF power supply has an envelope 212, which is a power level. Time t is the same as time t in graph 200 (FIG. 2A). As shown in FIG. 2A, power level 212 is constant or substantially constant. For example, power level 212 is a power amount P5 from time t0 to time t30. Illustratively, power level 212 is within a predetermined threshold range (e.g., within ±10%) of power amount P5.

[0051] The high-frequency reflected power also has an envelope 214, which is a power level. The power level 214 is not constant for each cycle of the clock signal 202 (FIG. 2A). Rather, the power level 214 is at power level P2 from time t0 to time t2, and transitions from the amount of power P2 to the amount of power P1 at time t2. The power level 214 maintains the amount of power P1 from time t2 to time t10. In this manner, the high-frequency reflected power periodically alternates between power levels P2 and P1 for each cycle of the clock signal 202.

[0052] Power sensor 135 (FIG. 1) measures the RF transmitted power of RF signal 170 (FIG. 1) and transmits it to processor 116 (FIG. 1) via transmission cable 162. The RF transmitted power is embedded in power signal 163 (FIG. 1). Processor 116 determines the RF reflected power as the difference between the RF delivered power and the RF transmitted power received from power sensor 135. Processor 116 obtains the RF delivered power by accessing storage device 118 (FIG. 1).

[0053] FIG. 2C is a graph 220 showing the voltage of the square wave signal 166 generated by the LFRF pulse generator 104 (FIG. 1) versus time t. The voltage of the square wave signal 166 is plotted on the y-axis of the graph 220, and time t is plotted on the x-axis of the graph 220. The x-axis of the graph 220 is the same as the x-axis of FIG. 2B (graph 210). The voltage values ​​of the square wave signal 166 range from −V4 to V4. The voltage values ​​increase from −V4 to V4. For example, a voltage value −V3 is greater than a voltage value −V4, and a voltage value −V2 is greater than a voltage value −V3. Furthermore, the difference between any two consecutive voltage values ​​in the graph 220 is equal. For example, the difference between voltage values ​​−V3 and −V4 is equal to the difference between voltage values ​​−V2 and −V3.

[0054] The voltage of the square wave signal 166 has a sub-pulse 222 and RF voltage ringing 224 in cycle 1. The sub-pulse 222 has a sub-pulse width 226. The sub-pulse width 226 is the time interval from time t0 to time t3, and so on. At time t0, the sub-pulse 222 has a voltage value −V3, and at time t3, it has a voltage value −V3. The sub-pulse 222 has a voltage value −V3 at time t0 and rises from the voltage value −V3 to a voltage value V4 between time t0 and time t1.2. The sub-pulse 222 further falls from the voltage value V4 to a voltage value −V3 between time t1.2 and time t3. The sub-pulse 222 is surrounded by a rectangular envelope 228. By controlling the sub-pulse width 226, the envelope 228 becomes square. As an example, the subpulse width of any subpulse of square wave signal 166 ranges from 10 nanoseconds (ns) to 500 ns, and the rise time of each subpulse of square wave signal 166 is approximately 50 ns. Illustratively, the rise time of each subpulse of square wave signal 166 ranges from 40 ns to 60 ns.

[0055] Subpulse 222 is immediately followed by RF voltage ringing 224. RF voltage ringing 224 has a ringing width 230 that is greater than subpulse width 226. RF voltage ringing 224 occurs over a time interval from time t3 to time t10. RF voltage ringing 224 occurs over a time interval longer than subpulse width 226 of subpulse 222. RF voltage ringing 224 is comprised of a series of micropulses, each with a smaller amplitude than subpulse 222. For example, the maximum amplitude of the subpulse is V4, and the maximum amplitude of RF voltage ringing 224 is −V3. Furthermore, the micropulse width of each micropulse of RF voltage ringing 224 is smaller than subpulse width 226 of subpulse 222. The micropulse width is, for example, the time interval during which one micropulse of square wave signal 166 occurs. The amplitude is, for example, the maximum amplitude or peak-to-peak amplitude. In this manner, the sub-pulse and series of micro-pulses are repeated periodically in each of cycles 2 and 3.

[0056] As an example, each sub-pulse of square wave signal 166 has the same or substantially the same sub-pulse width 226. For example, the sub-pulse widths of each sub-pulse of square wave signal 166 are within ±10% of each other. Also, the micro-pulse width is outside the range of the sub-pulses of square wave signal 166. For example, the micro-pulse width is substantially smaller than the sub-pulse width of voltage signal 137. As another example, the micro-pulse width of RF voltage ringing 224 decreases as RF voltage ringing 224 progresses.

[0057] Square wave signal 166 also has a pulse width 232. Pulse width 232 is the width between the maximum amplitudes of two successive sub-pulses in square wave signal 166. For example, pulse width 232 is the time interval between time t1.2 when sub-pulse 222 has a voltage value V4 and time t11.2 when the subsequent sub-pulse 234 has a voltage value V4.

[0058] Note that pulse width 232 represents the pulse width of square wave signal 166 between any two consecutive cycles, such as cycles 1, 2, and 3. For example, pulse width 232 is the pulse width of square wave signal 166. In this example, pulse width 232 is substantially the same between any two consecutive cycles, such as cycles 1, 2, and 3. For example, pulse width 232 between cycle 2 and cycle 1 is within ±10% of pulse width 232 between cycle 3 and cycle 2.

[0059] In cycle 2, square wave signal 166 has a sub-pulse 234 followed by RF voltage ringing. Sub-pulse 234 has a voltage value V4. Voltage value V4 is the peak value (e.g., maximum amplitude) of sub-pulse 234.

[0060] 2D is a graph 231 illustrating one embodiment of a voltage signal 232 representing the voltage at the bottom plasma sheath 129B of the plasma. The voltage at the bottom plasma sheath 129B (FIG. 1) is plotted on the y-axis of graph 231, and time t is plotted on the x-axis of graph 231. The x-axis of graph 231 is the same as the x-axis of graph 220. The voltage ranges from a voltage value V0 to a voltage value V5. The voltage value increases from V0 to V5.

[0061] During each cycle of clock signal 202 (FIG. 2A), the voltage of bottom plasma sheath 129B is substantially constant or constant. For example, the voltage of bottom plasma sheath 129B is at a voltage value V5 from time t3 to time 10. Also, the voltage of bottom plasma sheath 129B is at a voltage value V5 from time t13 to time 20. Such a constant or substantially constant voltage is achieved when generating square wave signal 166 to ignite or sustain a plasma in plasma chamber 112 (FIG. 1). This constant or substantially constant voltage reduces the change in plasma impedance at output 132 of HFRF signal generator 106 (FIG. 1) compared to when an LFRF signal is used to generate a plasma in plasma chamber 112. Therefore, the use of square wave signal 166 allows for more accurate and faster tuning of the RF frequency of HFRF signal generator 104 (FIG. 1) compared to when an LFRF signal is used.

[0062] When the HFRF signal generator 106 is used in combination with the LFRF pulse generator 104 (shown in FIG. 1), the time required to tune the HFRF signal generator 106 is shorter than when the HFRF signal generator 106 is used in combination with the LFRF signal generator (shown in FIG. 6). For example, the processor 116 controls the HFRF signal generator 106 to generate an RF signal 170 having a frequency HF1. ​​When the RF signal 170 has the frequency HF1, the processor 116 receives a power signal 163 from the power sensor 135 via the transmission cable 150 (FIG. 1). The power signal 163 indicates a first transmitted power amount of the RF signal 170 at the output 132 (FIG. 1). The processor 116 calculates a high-frequency reflected power of the RF signal 170 as RP1 based on the first transmitted power amount and the power supplied by the HFRF signal generator 106. Illustratively, processor 116 calculates R P1 by subtracting the first amount of transmitted power from the power supplied by HFRF signal generator 106. Continuing with this example, processor 116 further controls HFRF signal generator 106 to modify the frequency of RF signal 170 from HF1 to HF2. When RF signal 170 has frequency HF2, processor 116 receives power signal 163 from power sensor 135 via transmission cable 150. This power signal 163 indicates a second amount of transmitted power of RF signal 170 at output 132 ( FIG. 1 ). Processor 116 calculates a high-frequency reflected power of RF signal 170 as R P2 based on the second amount of transmitted power and the power supplied by HFRF signal generator 106. Illustratively, processor 116 calculates R P2 by subtracting the second amount of transmitted power from the power supplied by HFRF signal generator 106. The processor 116 determines that RP2 is smaller than RP1 and continues to control the HFRF signal generator 106 to operate at the frequency HF2. Note that the period from when the processor 116 controls the HFRF signal generator 106 to generate the RF signal 170 having the frequency HF1 to when the processor 116 determines that RP2 is smaller than RP1 is TP1.

[0063] Continuing with the above example, instead of using the LFRF pulse generator 104, the LFRF signal generator (FIG. 6) and the HFRF signal generator 106 are connected to the plasma chamber 112 via an impedance matching circuit (FIG. 6). When the LFRF signal generator (FIG. 6) and the HFRF signal generator 106 are connected to the plasma chamber 112 via the impedance matching circuit (FIG. 6), the processor 116 controls the HFRF signal generator 106 to generate an HFRF signal (FIG. 6) having a frequency HF3. When the HFRF signal has the frequency HF3, the processor 116 receives a power signal 163 from the power sensor 135. The power signal 163 indicates a third transmitted power amount of the RF signal 170 at the output 132. The processor 116 calculates a high frequency reflected power of the RF signal 170 as RP3 based on the third transmitted power amount and the power supplied by the HFRF signal generator 106. Illustratively, processor 116 calculates RP3 by subtracting the third transmitted power amount from the power supplied by HFRF signal generator 106. Continuing with this example, processor 116 further controls HFRF signal generator 106 to modify the frequency of the HFRF signal from HF3 to HF4. When the HFRF signal has frequency HF4, processor 116 receives power signal 163 from power sensor 135 via transmission cable 150. This power signal 163 indicates a fourth transmitted power amount of RF signal 170 at output 132. Processor 116 calculates the high-frequency reflected power of RF signal 170 as RP4 based on the fourth transmitted power amount and the power supplied by HFRF signal generator 106. Illustratively, processor 116 calculates RP4 by subtracting the fourth transmitted power amount from the power supplied by HFRF signal generator 106. The processor 116 determines that RP4 is smaller than RP3, and continues to control the HFRF signal generator 106 to operate at the frequency HF4. Note that the period from when the HFRF signal generator 106 is controlled to generate the HFRF signal having the frequency HF3 until when it determines that RP4 is smaller than RP3 is TP2. Furthermore, TP2 is longer than TP1, and RP2 is smaller than RP4.Because RP2 is smaller than RP4, when the HFRF signal generator 106 is used in combination with the LFRF pulse generator 104, the HFRF signal generator 106 is tuned more precisely than when the HFRF signal generator 106 is used in combination with the LFRF signal generator (see FIG. 6). Also, because TP2 is longer than TP1, when the HFRF signal generator 106 is used in combination with the LFRF signal generator (see FIG. 6), the time required for high frequency tuning of the HFRF signal generator 104 increases.

[0064] 3 illustrates one embodiment of LFRF pulse generator 104. LFRF pulse generator 104 includes signal components 300 and a controller 306. Signal components 300 include a voltage source and regulator 302, a power storage section 308, and a switch and transformer system 310. RF voltage ringing as described herein is, for example, noise originating from one or more of signal components 300.

[0065] The voltage source and regulator 302 may include, for example, a combination of a voltage source (such as a direct current (DC) voltage source) and a voltage regulator (such as a variable resistor). The voltage source is connected to the voltage regulator. The switch and transformer system 310 may include, for example, a combination of a switch (such as a solid-state switch) and a transformer. An example of a solid-state switch is a transistor or a group of transistors. The solid-state switch is connected to a transformer. In one example, the transformer includes a primary winding and a secondary winding. The power storage unit 308 may include, for example, a capacitor.

[0066] The controller 306 includes, for example, a processor and a storage device. The processor of the controller 306 is connected to the storage device of the controller 306. As another example, the controller 306 is an ASIC or a PLD.

[0067] Processor 116 is connected to the processor of controller 306 via transfer cable 132. The processor of controller 306 is connected to the switches of switch-transformer system 310. The voltage regulator of voltage source-regulator 302 is connected to power storage 308.

[0068] Furthermore, the power storage unit 308 is connected to a transformer, and the switch is also connected to the transformer. For example, the power storage unit 308 is connected to a first end of a primary winding, and the switch is connected to a second end of the primary winding. The secondary winding of the transformer is connected to the RF cable 138.

[0069] Upon receiving the information contained in the recipe signal 164, the processor of the controller 306 stores the information in a memory device of the controller 306. The voltage supply generates a voltage signal and provides it to the voltage regulator. The voltage regulator regulates the voltage signal (e.g., maintains it to correspond to a predetermined voltage signal) and outputs a regulated voltage signal that is sent to the power storage unit 308. The power storage unit 308 accumulates charge in response to the regulated voltage signal.

[0070] Furthermore, upon receiving trigger signal 172 (e.g., at time t0), the processor of controller 306 accesses the storage device of controller 306 to obtain sub-pulse width 226 (FIG. 2C) of square wave signal 166 (FIG. 1) and generates and sends an ON command signal to the switch. Upon receiving the ON command signal, the switch is turned ON, and a switch current signal generated to discharge the charge stored in power storage 308 is supplied to the primary winding of the transformer for the duration of sub-pulse width 226. The secondary winding converts (e.g., increases or decreases) the voltage quantity of the switch current signal to another quantity and outputs the converted voltage quantity to initiate generation of sub-pulse 222 (FIG. 2C). The converted voltage quantity is the voltage of sub-pulse 222.

[0071] At the end of the sub-pulse width 226, the processor of the controller 306 generates and sends an OFF command signal to the switch. Upon receiving the OFF command signal, the switch turns OFF and stops supplying the switch current signal to the primary winding. When the supply of the switch current signal stops, the voltage applied by the switch current signal drops, and the voltage across the primary winding decreases. When the voltage across the primary winding decreases, the converted voltage decreases, ending the generation of the sub-pulse 222 and outputting the reduced converted voltage. This reduced converted voltage is the voltage of the RF voltage ringing 230 (FIG. 2C).

[0072] The processor of the controller 306 controls the switch to be OFF until the end of cycle 1 of the clock signal 202 (FIG. 2A). After the end of cycle 1, at the beginning of cycle 2, the processor of the controller 306 controls the switch to be ON again for the duration of the sub-pulse width 226, generating a sub-pulse 234. In this manner, multiple sub-pulses of the square wave signal 166 and multiple RF voltage ringings are generated.

[0073] 4A is a graph 400 illustrating the increased amount of power reflected back toward the HFRF signal generator 106 (FIG. 1) when using a LFRF signal generator (FIG. 6) compared to when using the LFRF pulse generator 104 (FIG. 1). Graph 400 includes a plot 402 of the real versus imaginary part of the voltage reflection coefficient (gamma, Γ). As shown in graph 400, the first number of values ​​in plot 402 is close to a gamma magnitude of 1, which represents the edge of a circle 404.

[0074] 4B is a graph 410 illustrating that using the LFRF pulse generator 104 (FIG. 1) reduces the amount of power reflected back toward the HFRF signal generator 106 (FIG. 1) compared to using the LFRF signal generator (FIG. 6). Graph 410 includes a plot 412 of the real versus imaginary part of the voltage reflection coefficient. As shown in graph 410, the number of second values ​​in plot 412 is close to a gamma magnitude of 1. Note that the number of second values ​​is less than the number of first values.

[0075] FIG. 5 is a graph 500 illustrating the forward power and reflected power of an LFRF signal (FIG. 6). Graph 500 plots the forward power and reflected power of the LFRF signal versus time t. The forward power and reflected power of the LFRF signal are plotted on the y-axis of graph 500, and time t is plotted on the x-axis of graph 500. The x-axis of graph 500 is the same as the x-axis of graph 210 (FIG. 2B). Graph 500 includes an envelope 502 of the forward power of the LFRF signal and an envelope 504 of the reflected power of the LFRF signal. The envelopes may be, for example, power levels. The forward power and reflected power of the LFRF signal range from a power value of -P5 to a power value of P5. The power value increases from -P5 to P5.

[0076] The forward power plotted in graph 500 is the power supplied by the LFRF signal generator (FIG. 6), and the reflected power is the power reflected back toward the LFRF signal generator (FIG. 6). Comparing graph 210 with graph 500, it can be seen that when the LFRF signal generator (FIG. 6) is used instead of the LFRF pulse generator 104 (FIG. 1), a greater amount of power is reflected back toward the LFRF signal generator 106 (FIG. 1).

[0077] 6 is a diagram illustrating one embodiment of a system 600 using an HFRF signal generator 106 in combination with an LFRF signal generator 602, illustrating the increased processing rate of a substrate S when using the LFRF pulse generator 104 (FIG. 1). The system 600 includes the LFRF signal generator 602, the HFRF signal generator 106, an impedance matching circuit (IMC) 604, and the plasma chamber 112. The LFRF signal generator 602 operates at a low frequency.

[0078] The LFRF signal generator 602 is connected to an input 606 of the IMC 604 via an RF cable 604. By way of example, the RF cable 604 is not capable of withstanding the voltage of the square wave signal 104 (FIG. 1). By way of example, if the square wave signal 104 were to pass through the RF cable, the RF cable would be damaged. By way of further example, the maximum amplitude of the square wave signal 104 is greater than the maximum amplitude of the RF signal 616 generated by the LFRF signal generator 602. The HFRF signal generator 602 is also connected to an input 610 of the IMC 604 via an RF cable 608. An output 612 of the IMC 604 is connected to the electrode 130 via an RF transmission line 614.

[0079] The LFRF signal generator 602 generates an RF signal 616, which is a sinusoidal signal, and transmits it to the IMC 604 via the RF cable 604 and the input 606. The HFRF signal generator 106 also generates an RF signal 170 and transmits it to the IMC 604 via the RF cable 608 and the input 610.

[0080] The IMC 604 includes a first circuit disposed between the input 606 and the output 612 and a second circuit disposed between the input 610 and the output 612. The first circuit modifies the impedance of a load connected to the output 612 to match the impedance of a signal source connected to the input 606 and outputs a first modified signal, which is a sinusoidal signal. The load connected to the output 612 is, for example, a combination of an RF transmission line 614 and the plasma chamber 112. The signal source connected to the input 606 is, for example, a combination of an RF cable 604 and an LFRF signal generator 602.

[0081] The second circuit also modifies the impedance of a load connected to the output 612 to match the impedance of a signal source connected to the input 610, and outputs a second modified signal, which is a sinusoidal signal. The signal source connected to the input 610 is, for example, a combination of an RF cable 608 and an HFRF signal generator 106. The first and second modified signals are summed within the IMC 604, and a modified signal 618 is output. The modified signal 618 is transmitted from the output 612 to the electrode 130 and used to process the substrate S. The modified signal 618 is a sinusoidal signal, not a square wave signal.

[0082] It should be noted that because RF signal 616 is provided along with RF signal 170, a greater amount of power is reflected from plasma chamber 112 toward HFRF signal generator 106 than when square wave signal 166 is used in combination with RF signal 170. This greater amount of high frequency reflected power reduces the processing efficiency of substrate S.

[0083] The embodiments described herein may be practiced with various computer system configurations, including handheld hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, etc. The embodiments may also be practiced in distributed computing environments where tasks are performed by remote processing hardware units that are linked through a network.

[0084] In some embodiments, the controller is part of a system, which may be part of the examples described above. Such systems include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (such as a wafer pedestal or gas flow system). These systems are integrated with electronics for controlling the operation of the systems before, during, and after processing of semiconductor wafers or substrates. The electronics, also referred to as a "controller," may control various components or subparts of these one or more systems. The controller is programmed to control any of the processes disclosed herein depending on the processing requirements and / or system type. These processes include process gas supply, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid supply settings, position and motion settings, wafer transfer to and from the tool, and wafer transfer to and from other transfer tools and / or load locks connected or associated with the system.

[0085] In various embodiments, a controller is broadly defined as an electronic device having various integrated circuits, logic, memory, and / or software to receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. Integrated circuits include chips as firmware that store program instructions, digital signal processors (DSPs), chips defined as ASICs, PLDs, and / or one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions are instructions communicated to the controller as various individual settings (or program files) that define parameters, factors, variables, etc. for performing a particular process on or for a semiconductor wafer or for a system. In some embodiments, the program instructions are part of a recipe defined by a process engineer to accomplish one or more processing steps in the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0086] In some embodiments, the controller is part of or connected to a computer, where the computer is integrated with the system, coupled to the system, or otherwise networked with the system, or a combination thereof. For example, the controller may reside in the "cloud" or on all or part of a factory host computer system. This allows for remote access of wafer processing. The computer enables remote access to the system to monitor the progress of a manufacturing process, examine past manufacturing process history, or examine trends or performance indicators from multiple manufacturing processes, change parameters of a current process, set up processing steps following the current process, or initiate a new process.

[0087] In some embodiments, a process recipe is provided to the system from a remote computer (e.g., a server) over a network, where the network includes a local network or the Internet. The remote computer includes a user interface that allows for input or programming of parameters and / or settings. These parameters and / or settings are then communicated from the remote computer to the system. In some examples, the controller receives instructions in the form of data that specify parameters, factors, and / or variables associated with each of the processing steps performed during one or more operations. It should be understood that these parameters, factors, and / or variables are specific to the type of process being performed and the type of tool the controller is configured to interface with or control. Thus, as described above, the controller is distributed, such as by including one or more individual controllers. These individual controllers are networked and operate toward a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes includes one or more integrated circuits mounted in the chamber that communicate with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer), which cooperate to control the process in the chamber.

[0088] In various embodiments, examples of systems to which the method may be applied include, but are not limited to, a plasma etch chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, or any other semiconductor processing chamber associated with or used in the manufacturing and / or production of semiconductor wafers.

[0089] Furthermore, in some embodiments, the above-described operations are applicable to several types of plasma chambers, such as plasma chambers including inductively coupled plasma (ICP) reactors, transformer-coupled plasma chambers, plasma chambers including conductor tools, dielectric tools, and electron cyclotron resonance (ECR) reactors. For example, one or more RF generators are connected to an inductor in an ICP reactor. Examples of inductor shapes include a solenoid, a dome coil, and a flat coil.

[0090] As described above, depending on the process steps being performed by the tool, the host computer communicates with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used in material transport to and from wafer containers to tool locations and / or load ports within a semiconductor manufacturing factory.

[0091] With the above embodiments in mind, it should be understood that some of these embodiments employ various computer-implemented operations with data stored in computer systems. These operations are physical manipulations of physical quantities. Any of the operations described herein that are part of the embodiments are useful machine operations.

[0092] Some embodiments also relate to hardware units or apparatus for performing these operations. The apparatus is specially configured for a special purpose computer. When defined as a special purpose computer, the computer is operable for a specific purpose, but also performs other processes, program execution, or routines not included in the specific purpose.

[0093] In some embodiments, the operations described above may be processed by a computer selectively activated or configured by one or more computer programs stored in a computer memory or cache or obtained over a computer network. If the data is obtained over a computer network, the data may be processed by other computers on the computer network (e.g., a cloud of computing resources).

[0094] One or more embodiments may be fabricated as computer-readable code recorded on a non-transitory computer-readable medium. The non-transitory computer-readable medium is any data storage hardware unit (e.g., a storage device, etc.) that stores data. The data is then read by a computer system. Examples of non-transitory computer-readable media include hard drives, network-attached storage (NAS), ROM, RAM, compact disc ROM (CD-ROM), CD-recordable (CD-R), CD-rewritable (CD-RW), magnetic tape, and other optical and non-optical data storage hardware units. In some embodiments, the non-transitory computer-readable medium comprises a tangible computer-readable medium distributed over network-connected computer systems such that the computer-readable code is stored and executed in a distributed manner.

[0095] It should be noted that although the above method steps are described in a particular order, in various embodiments other housekeeping steps may be performed between these steps, these method steps may be coordinated to occur at slightly different times, these method steps may be distributed in a system that allows these method steps to occur at various intervals, or these method steps may be performed in a different order than described above.

[0096] Furthermore, it should be noted that in one embodiment, one or more features of any of the above-described embodiments may be combined with one or more features of any of the other embodiments also described above without departing from the scope of the various embodiments described in this disclosure.

[0097] Although the above embodiments have been described in some detail to provide a clear understanding of the present invention, it will be apparent that certain changes and modifications may be made within the scope of the appended claims. Therefore, the present embodiments are merely illustrative and should not be construed as limiting the present invention, and the embodiments are not limited to the details set forth herein.

Claims

1. 1. A method for increasing substrate processing speed using a square wave signal, comprising: generating said square wave signal by a low frequency (LF) radio frequency (RF) pulse generator; generating a sinusoidal RF signal by a high frequency (HF) RF signal generator; applying the square wave signal to a filter connected to an electrode of a plasma chamber; applying the sinusoidal RF signal to an impedance matching circuit connected to the electrode; wherein applying the square wave signal reduces power reflected from the plasma chamber toward the HFRF signal generator, and reducing the power reflected toward the HFRF signal generator increases a processing rate of the substrate.

2. 10. The method of claim 1, The method of claim 1, wherein the power is reduced compared to the power reflected from the plasma chamber toward the HFRF signal generator when the HFRF signal generator is used in combination with an LFRF signal generator instead of the LFRF pulse generator.

3. 10. The method of claim 1, modifying the impedance of the square wave signal to output a modified backward wave signal; modifying the impedance of the sinusoidal RF signal and outputting a modified RF signal; combining the modified backward wave signal with the modified RF signal to output a combined signal; applying the composite signal to the electrodes; The method further comprises:

4. 10. The method of claim 1, the square wave signal has a kilohertz (kHz) radio frequency and the sinusoidal RF signal has a megahertz (MHz) radio frequency; The method further includes removing the MHz radio frequency from the reflected RF signal of the MHz radio frequency with the filter and outputting the filtered signal to the LFRF pulse generator.

5. 10. The method of claim 1, the square wave signal includes a sub-pulse followed by a plurality of pulses in each of a plurality of clock cycles of a clock signal; the plurality of pulses having a peak-to-peak amplitude that is less than the peak-to-peak amplitude of the sub-pulses; The method, wherein the square wave signal has a kilohertz (kHz) radio frequency, the kHz radio frequency being a repetition frequency of peak values ​​of sub-pulses of the square wave signal over the clock cycles.

6. 10. The method of claim 1, The method, wherein the square wave signal is a non-sinusoidal signal.

7. 7. The method of claim 6, the non-sinusoidal signal includes a sub-pulse followed by a plurality of pulses in each of a plurality of clock cycles of a clock signal; The method, wherein the plurality of pulses have a peak-to-peak amplitude that is less than the peak-to-peak amplitude of the sub-pulses.

8. 10. The method of claim 1, The filter is not an impedance matching circuit, The method, wherein the square wave signal has a kilohertz (kHz) radio frequency and the sinusoidal RF signal has a megahertz (MHz) radio frequency.

9. 9. The method of claim 8, The method wherein the kHz frequency is in the range of 10 kHz to 800 kHz.

10. 1. A controller for increasing a substrate processing rate using a square wave signal, comprising: a processor; a storage device connected to the processor; Equipped with the processor is configured to control a low frequency (LF) radio frequency (RF) pulse generator to generate the square wave signal and to provide the square wave signal to a filter connected to an electrode of a plasma chamber; the processor is configured to control a high frequency (HF) RF signal generator to generate a sinusoidal RF signal and to supply the sinusoidal RF signal to an impedance matching circuit connected to the electrode; The LFRF pulse generator is controlled to reduce power reflected from the plasma chamber toward the HFRF signal generator, and the reduced power reflected toward the HFRF signal generator increases the processing rate of the substrate.

11. 11. The controller of claim 10, The power is reduced compared to the power reflected from the plasma chamber toward the HFRF signal generator when the HFRF signal generator is used in combination with an LFRF signal generator instead of the LFRF pulse generator.

12. 11. The controller of claim 10, the filter is configured to modify the impedance of the square wave signal to output a modified back wave signal; the impedance matching circuit is configured to modify the impedance of the sinusoidal RF signal and output a modified RF signal; the filter is connected to the electrode via a first RF connection and an output connection, and the impedance matching circuit is connected to the electrode via a second RF connection and the output connection; the output connection is configured to combine the modified backward wave signal with the modified RF signal to output a combined signal; The output connection is configured to transfer the composite signal to the electrode.

13. 11. The controller of claim 10, the square wave signal has a kilohertz (kHz) radio frequency and the sinusoidal RF signal has a megahertz (MHz) radio frequency; The filter is configured to remove the MHz radio frequency from the reflected RF signal of the MHz radio frequency and output the filtered signal to the LFRF pulse generator.

14. 11. The controller of claim 10, the square wave signal includes a sub-pulse followed by a plurality of pulses in each of a plurality of clock cycles of a clock signal; the plurality of pulses having a peak-to-peak amplitude that is less than the peak-to-peak amplitude of the sub-pulses; The square wave signal has a kilohertz (kHz) radio frequency, the kHz radio frequency being a repetition frequency of peak values ​​of sub-pulses of the square wave signal over the clock cycles.

15. 11. The controller of claim 10, the square wave signal is a non-sinusoidal signal; the non-sinusoidal signal includes a sub-pulse followed by a plurality of pulses in each of a plurality of clock cycles of a clock signal; The plurality of pulses have a peak-to-peak amplitude that is less than the peak-to-peak amplitude of the sub-pulses.

16. 11. The controller of claim 10, The filter is not an impedance matching circuit, The square wave signal has a kilohertz (kHz) radio frequency and the sinusoidal RF signal has a megahertz (MHz) radio frequency.

17. 17. The controller of claim 16, The kHz frequency ranges from 50 kHz to 800 kHz.

18. 1. A system for increasing substrate processing speed using square wave signals, comprising: a low frequency (LF) radio frequency (RF) pulse generator configured to generate the square wave signal; a high frequency (HF) RF signal generator configured to generate a sinusoidal RF signal; a filter connected to the LFRF pulse generator to receive the square wave signal; a plasma chamber having an electrode connected to the filter; an impedance matching circuit disposed between the HF RF signal generator and the electrode of the plasma chamber, the impedance matching circuit configured to receive the sinusoidal RF signal; Equipped with The LFRF pulse generator is configured to reduce power reflected from the plasma chamber toward the HFRF signal generator, and the reduced power reflected toward the HFRF signal generator increases a processing rate of the substrate.

19. 20. The system of claim 18, The system, wherein the power is reduced compared to the power reflected from the plasma chamber toward the HFRF signal generator when the HFRF signal generator is used in combination with an LFRF signal generator instead of the LFRF pulse generator.

20. 20. The system of claim 18, the filter is configured to modify the impedance of the square wave signal to output a modified back wave signal; the impedance matching circuit is configured to modify the impedance of the sinusoidal RF signal and output a modified RF signal; the filter is connected to the electrode via a first RF connection and an output connection, and the impedance matching circuit is connected to the electrode via a second RF connection and the output connection; the output connection is configured to combine the modified backward wave signal with the modified RF signal to output a combined signal; The output connection is configured to transfer the composite signal to the electrode.

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