Flexible circuit board, COF module, and electronic device including the same
The flexible circuit board design addresses via alignment issues by controlling bending regions with specific length ratios and protective layers, ensuring reliable connection and reduced bezel area.
Patent Information
- Application Number
- JP2025540859
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-01-13
- Filing Date
- 2024-01-15
- Publication Date
- 2026-01-21
AI Technical Summary
Existing flexible circuit boards face issues with via alignment displacement due to stress when bent, leading to potential changes in via shape and size, which affects the reliability and bezel area of display panels.
A flexible circuit board design with specific length ratios between pad portions and vias, including protective layers to control bending regions and prevent stress transmission to vias, ensuring reliable connection and reduced bezel area.
The design allows for controlled bending without displacing vias, maintaining alignment and reducing bezel area, thereby enhancing reliability and flexibility.
Smart Images

Figure 2026502298000001_ABST
Abstract
Description
[Technical Field]
[0001] The embodiments relate to flexible circuit boards, COF modules, and electronic devices including the same. [Background technology]
[0002] Recently, various electronic products have become thinner, smaller, and lighter, and accordingly, various researches are being conducted to mount semiconductor chips at high density in a narrow area of the electronic products.
[0003] A COF (Chip On Film) includes a flexible substrate. As a result, the COF can be applied to flexible displays. For example, the COF can be applied to various wearable electronic devices. Furthermore, the COF can form a fine pitch. As a result, the COF can be applied to high-resolution displays.
[0004] The COF is a flexible circuit board in the form of a thin film, in which a semiconductor chip is mounted. For example, the semiconductor chip may be an integrated circuit (IC) chip or a large scale integrated circuit (LSI) chip.
[0005] The chip may be connected to an external circuit board and a display panel via a circuit pattern. For example, pads may be disposed on one end and the other end of the circuit pattern. One of the pads may be electrically connected to a terminal of the chip. The other pad may be connected to a terminal of the circuit board and a terminal of the display panel. This electrically connects the chip, the circuit board, and the display panel via the COF. This allows signals to be transmitted to the display panel via the circuit pattern.
[0006] Meanwhile, the flexible circuit board may be flexible, so that when connected to the circuit board and the display panel, the flexible circuit board can be bent in one direction, i.e., the flexible circuit board includes a bending region.
[0007] When the bending region and the via overlap, the position of the via may change due to stress.
[0008] Therefore, there is a need for a flexible circuit board, a COF module, and an electronic device including the same, which have a new structure that can solve the above problems.
[0009] A patent related to the flexible circuit board is Korean Patent KR10-0618898 (September 1, 2006). Summary of the Invention [Problem to be solved by the invention]
[0010] The embodiments provide flexible circuit boards, COF modules, and electronic devices including the same with various designs.
[0011] The embodiments seek to provide a flexible circuit board, a COF module, and an electronic device including the same with improved reliability. [Means for solving the problem]
[0012] A flexible circuit board according to an embodiment includes a substrate having a first surface and a second surface opposite to the first surface, a first circuit pattern disposed on the first surface, a second circuit pattern disposed on the first surface and the second surface, a third circuit pattern disposed on the first surface and the second surface, a first protective layer disposed on the first surface, and a second protective layer disposed on the second surface, wherein a chip mounting area is defined on the first surface, and the first circuit pattern includes a first pad portion connected to a chip on the chip mounting area, a second pad portion connected to an external printed circuit board, and a first wiring portion connected to the first pad portion and the second pad portion, and the second circuit pattern includes a second wiring portion connected to the chip. the third circuit pattern includes a third pad portion, a fourth pad portion connected to an external display panel, and a second wiring portion connected to the third pad portion and the fourth pad portion; the third circuit pattern includes a fifth pad portion connected to the chip, a sixth pad portion connected to the display panel, and a third wiring portion connected to the fifth pad portion and the sixth pad portion; the second circuit pattern includes a first via connecting the second wiring portion on the first surface to the second wiring portion on the second surface; and the second wiring portion is defined by a first length which is the distance from an end of the fourth pad portion to the first via closest to the fourth pad portion, and a second length which is the length of the fourth pad portion, and the first length is longer than the second length. [Effects of the Invention]
[0013] In the flexible circuit board according to the embodiment, a first length of the region between the pad portion and the via can be controlled, where the first length is defined as the length from an end of the second protective layer to the first via of the first via group.
[0014] Therefore, the flexible circuit board according to the embodiment can be bent once more in the region having the first length, thereby reducing the bezel area of the display panel.
[0015] Also, the flexible circuit board does not bend in the area where the vias are located.
[0016] This prevents stress from being transmitted to the vias when the flexible circuit board is bent, thereby preventing the alignment of the vias from being displaced due to the stress, and preventing the shape and size of the vias from being changed. [Brief explanation of the drawings]
[0017] [Figure 1] FIG. 2 is a diagram illustrating a top view of a flexible circuit board according to an embodiment. [Figure 2] FIG. 2 is a diagram illustrating a bottom view of the flexible circuit board according to the embodiment. [Figure 3] FIG. 2 is an enlarged view of region A in FIG. [Figure 4] FIG. 2 is an enlarged view of region B in FIG. [Figure 5] FIG. 3 is an enlarged view of region C in FIG. 2. [Figure 6] FIG. 3 is an enlarged view of region D in FIG. 2. [Figure 7] FIG. 2 is an enlarged view of region E in FIG. [Figure 8] FIG. 2 is an enlarged view of region F in FIG. [Figure 9] 10A and 10B are diagrams for explaining the shape into which the COF module can be bent. [Figure 10] 10A and 10B are diagrams for explaining the shape into which the COF module can be bent. [Figure 11] FIG. 3 is an enlarged view of region G in FIG. 2. [Figure 12] 10A and 10B are diagrams for explaining the shape into which the COF module according to the embodiment can be bent. [Figure 13] 10A and 10B are diagrams for explaining the shape into which the COF module according to the embodiment can be bent. [Figure 14] FIG. 4 is a cross-sectional view taken along the line AA′ in FIG. 3. [Figure 15] FIG. 4 is a cross-sectional view taken along the line AA′ in FIG. 3. [Figure 16] 10A to 10C are diagrams illustrating various shapes into which a COF module including a flexible circuit board according to an embodiment can be bent. [Figure 17] 10A to 10C are diagrams illustrating various shapes into which a COF module including a flexible circuit board according to an embodiment can be bent. [Figure 18] 10A to 10C are diagrams illustrating various shapes into which a COF module including a flexible circuit board according to an embodiment can be bent. [Figure 19] 10A to 10C are diagrams illustrating various shapes into which a COF module including a flexible circuit board according to an embodiment can be bent. [Figure 20] 1A and 1B are diagrams illustrating an electronic device including a flexible circuit board according to an embodiment. [Figure 21] 1A and 1B are diagrams illustrating an electronic device including a flexible circuit board according to an embodiment. [Figure 22] 1A and 1B are diagrams illustrating an electronic device including a flexible circuit board according to an embodiment. DETAILED DESCRIPTION OF THE INVENTION
[0018] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the technical concept of the present invention is not limited to the described embodiments and may be realized in various different forms, and one or more of the components of the embodiments may be selectively combined or substituted within the scope of the technical concept of the present invention.
[0019] Furthermore, unless otherwise clearly defined and described, terms (including technical and scientific terms) used in the examples of the present invention are to be interpreted as meanings that would be commonly understood by a person of ordinary skill in the art to which the present invention belongs, and commonly used terms, such as those defined in dictionaries, may be interpreted in light of the contextual meaning of the relevant art.
[0020] Furthermore, terms used in the examples of the present invention are intended to describe the examples and are not intended to limit the present invention. In this specification, the singular form can also include the plural form unless otherwise specified in the phrase, and when it is stated as "A and (and) at least one (or more) of B and C," it can include one or more of all possible combinations of A, B, and C.
[0021] Furthermore, when describing components of the embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. are used only to distinguish the component from other components, and the terminology does not determine the essence, order, or procedure of the component.
[0022] Furthermore, when a component is described as being "coupled," "coupled," or "connected" to another component, it includes not only cases where the component is directly coupled, coupled, or connected to the other component, but also cases where the component is "coupled," "coupled," or "connected" by other components between the component and the other component.
[0023] Furthermore, when described as being formed or disposed "above or below" each component, "above" or "below" includes not only the case where the two components are in direct contact with each other, but also the case where one or more other components are formed or disposed between the two components.
[0024] Furthermore, when it is expressed as "upper" or "lower," it can mean not only the upper direction but also the lower direction based on one component.
[0025] In the following description, the first direction 1D may be defined as the width direction of the flexible circuit board, and the second direction 2D may be defined as the length direction of the flexible circuit board.
[0026] On the other hand, in the following drawings, for the sake of convenience of explanation, all circuit patterns disposed below the protective layer are shown by solid lines.
[0027] Hereinafter, a flexible circuit board, a COF module, and an electronic device including the same according to embodiments will be described with reference to the drawings.
[0028] 1 to 6, a flexible circuit board 1000 according to an embodiment may include a substrate 100, a circuit pattern, and a protective layer.
[0029] The substrate 100 may include a first surface 1S and a second surface 2S opposite to the first surface 1S. The circuit pattern and the protective layer may be disposed on the first surface 1S and the second surface 2S.
[0030] The substrate 100 may include a cut line CL. The flexible circuit board 1000 may be cut along the cut line CL. For example, the circuit pattern, the protective layer, and a chip may be disposed on the substrate 100. Then, the substrate 100 may be cut along the cut line CL. This allows a COF module 2000 to be manufactured.
[0031] The base material 100 may include an effective area AA and a non-effective area UA. The effective area AA and the non-effective area UA may be separated by the cut line CL. Specifically, the effective area AA may be defined as the area inside the cut line CL. The non-effective area UA may be defined as the area outside the cut line CL.
[0032] The circuit pattern, the protective layer, and the chip may be disposed in the effective area AA. Dummy patterns DP and sprocket holes SH may be disposed in the non-effective area UA. The dummy patterns can increase the strength of the substrate 100, thereby preventing the flexible circuit board 1000 from warping. The flexible circuit board 1000 can be wound and unwound in a roll-to-roll manner using the sprocket holes SH.
[0033] The substrate 100 may include a chip mounting area CHA. The chip mounting area CHA may be disposed within the effective area AA. The chip is disposed in the chip mounting area CHA. The pad portion of the circuit pattern may be disposed within the chip mounting area CHA. The protective layer is not disposed on the chip mounting area CHA.
[0034] The substrate 100 may include a ductile material. For example, the substrate 100 may include polyimide (PI). However, examples are not limited thereto. The substrate 100 may include a polymer material such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN).
[0035] The substrate 100 may have a thickness of 20 μm to 100 μm. For example, the substrate 100 may have a thickness of 25 μm to 50 μm. For example, the substrate 100 may have a thickness of 30 μm to 40 μm. If the thickness of the substrate 100 exceeds 100 μm, the thickness of the flexible circuit board may increase, which may reduce the flexibility of the flexible circuit board. Furthermore, if the thickness of the substrate 100 is less than 20 μm, the flexible circuit board 100 may be damaged. In particular, when mounting the chip on the flexible circuit board, heat and pressure are transferred to the substrate 100, which may damage the substrate.
[0036] The circuit pattern and the protective layer may be disposed on the substrate 100. In particular, the circuit pattern and the protective layer may be disposed in the active area AA and the non-active area UA.
[0037] The circuit patterns may include a first circuit pattern 210, a second circuit pattern 220, a third circuit pattern 230, and a fourth circuit pattern 240. In addition, the protective layer may include a first protective layer 310 and a second protective layer 320.
[0038] 1 and 3, the first circuit pattern 210 may be disposed on the first surface 1S. The first circuit pattern 210 may include a first wiring portion 211, a first pad portion 212a, and a second pad portion 212b. The first wiring portion 211, the first pad portion 212a, and the second pad portion 212b may include the same material. Additionally, the first wiring portion 211, the first pad portion 212a, and the second pad portion 212b may be integrally formed.
[0039] The first pad portion 212a may be disposed within the chip mounting area CHA, and thus may be connected to a terminal of the chip, thereby connecting the first circuit pattern 210 to the chip.
[0040] The second pad portion 212b may be disposed outside the chip mounting area CHA and may be connected to a terminal of an external circuit board, thereby connecting the first circuit pattern 210 to the circuit board.
[0041] Meanwhile, the second pad portion 212b may be a first test pad portion. Specifically, the first circuit pattern 210 may be tested before connecting the circuit board to the second pad portion 212b. For example, the first test pad portion may be used to check whether the first circuit pattern has an open circuit or a short circuit.
[0042] In addition, the first wiring part 211 may be disposed between the first pad part 212a and the second pad part 212b. That is, the first wiring part 211 may connect the first pad part 212a and the second pad part 212b. This may connect the chip and the circuit board. Therefore, a signal generated from the chip may be transmitted to the circuit board.
[0043] The first protective layer 310 may be disposed on the first circuit pattern 210. In particular, the first protective layer 310 may be disposed on an area excluding the first pad portion 212a and the second pad portion 212b.
[0044] 1, 2, 4, and 5, the second circuit pattern 220 may be disposed on the first surface 1S and the second surface 2S. The second circuit pattern 220 may include second wiring portions 221a and 221b, a third pad portion 222a, a fourth pad portion 222b, and a first via V1. The second wiring portions 221a and 221b, the third pad portion 222a, and the fourth pad portion 222b may include the same material. Additionally, the second wiring portions 221a and 221b, the third pad portion 222a, and the fourth pad portion 222b may be integrally formed.
[0045] In addition, the first protective layer 310 or the second protective layer 320 is disposed on the second wiring portions 221a and 221b. In addition, the first protective layer 310 or the second protective layer 320 is not disposed on the third pad portion 222a and the fourth pad portion 222b.
[0046] The third pad portion 222a may be disposed on the first surface 1S. The third pad portion 222a may be disposed within the chip mounting area CHA. This allows the third pad portion 222a to be connected to a terminal of the chip. This allows the second circuit pattern 220 and the chip to be connected.
[0047] The fourth pad portion 222b may be disposed on the second surface 2S. The fourth pad portion 222b may be connected to a terminal of an external display panel, thereby connecting the second circuit pattern 220 to the display panel.
[0048] The second wiring portion may include a 2-1 wiring portion 221a and a 2-2 wiring portion 221b. The 2-1 wiring portion 221a is disposed on the first surface 1S. The 2-2 wiring portion 221b is disposed on the second surface 2S. The second wiring portion may connect the third pad portion 222a and the fourth pad portion 222b. In particular, the 2-1 wiring portion 221a may be connected to the third pad portion 222a. Furthermore, the 2-2 wiring portion 221b may be connected to the fourth pad portion 222b.
[0049] This allows the chip to be connected to the display panel, so that signals generated by the chip can be transmitted to the display panel.
[0050] The first protective layer 310 and the second protective layer 320 may be disposed on the second circuit pattern 220. In particular, the first protective layer 310 may be disposed on the second circuit pattern 220 on the first surface 1S. Furthermore, the second protective layer 320 may be disposed on the second circuit pattern 220 on the second surface 2S. The first protective layer 310 and the second protective layer 320 may be disposed on an area excluding the third pad portion 222a and the fourth pad portion 222b.
[0051] The 2-1 wiring portion 221a and the 2-2 wiring portion 221b may be connected to each other. In particular, the 2-1 wiring portion 221a and the 2-2 wiring portion 221b may be connected to each other through the first via V1. The first via V1 may be disposed on the first surface 1S and the second surface 2S. The first via V1 on the first surface 1S and the first via V1 on the second surface 2S may be disposed at positions corresponding to each other.
[0052] The first via V1 includes a first via land VL1 and a first via hole VH1. The first via hole VH1 is formed inside the first via land VL1. A conductive material may be disposed in the first via hole VH1. This allows the 2-1 wiring portion 221a and the 2-2 wiring portion 221b to be electrically connected.
[0053] Meanwhile, the second circuit pattern 220 may include a second test pad portion TP2. The second test pad portion TP2 may be disposed on the second surface 2S. The second test pad portion TP2 may be disposed in the non-effective area UA. In addition, the second passivation layer 320 is not disposed on the second test pad portion TP2. The second test pad portion TP2 may be connected to the 2-2 wiring portion 221b. In particular, the second test pad portion TP2 may be integrally formed with the 2-2 wiring portion 221b.
[0054] The second circuit pattern 220 may be tested before connecting the display panel to the fourth pad portion 222b. For example, the second circuit pattern 220 may be checked for open and short circuits through the second test pad portion TP2.
[0055] 1, 2, 3, and 6, the third circuit pattern 230 may be disposed on the first surface 1S and the second surface 2S. The third circuit pattern 230 may include a third wiring portion 231, a fifth pad portion 232a, a sixth pad portion 232b, and a second via V2. The third wiring portion 231, the fifth pad portion 232a, and the sixth pad portion 232b may include the same material. Additionally, the third wiring portion 231, the fifth pad portion 232a, and the sixth pad portion 232b may be integrally formed.
[0056] The fifth pad portion 232a may be disposed on the first surface 1S. The fifth pad portion 232a may be disposed within the chip mounting area CHA. This allows the fifth pad portion 232a to be connected to a terminal of the chip. This allows the third circuit pattern 230 and the chip to be connected.
[0057] In addition, the sixth pad portion 232b may be disposed on the second surface 2S. The sixth pad portion 232b may be connected to a terminal of an external display panel, thereby connecting the third circuit pattern 230 to the display panel.
[0058] In addition, the third wiring portion 231 may connect the fifth pad portion 232a and the sixth pad portion 232b, thereby connecting the chip to the display panel, and thus transmitting signals generated from the chip to the display panel.
[0059] The first protective layer 310 and the second protective layer 320 may be disposed on the third circuit pattern 230. In particular, the first protective layer 310 may be disposed on the third circuit pattern 230 on the first surface 1S. Furthermore, the second protective layer 320 may be disposed on the third circuit pattern 230 on the second surface 2S. The first protective layer 310 and the second protective layer 320 may be disposed on an area excluding the fifth pad portion 232a and the sixth pad portion 232b.
[0060] The fifth pad portion 232a and the third wiring portion 231 on the second surface 2S may be connected to each other. In particular, the fifth pad portion 232a and the third wiring portion 231 may be connected to each other through the second via V2. The second via V2 may be disposed on the first surface 1S and the second surface 2S. The second via V2 on the first surface 1S and the second via V2 on the second surface 2S may be disposed at positions corresponding to each other.
[0061] The second via V2 includes a second via land VL2 and a second via hole VH2. The second via hole VH2 is formed inside the second via land VL2. A conductive material may be disposed in the second via hole VH2. Thus, the fifth pad portion 232a and the third wiring portion 231 may be electrically connected.
[0062] Meanwhile, the third circuit pattern 230 may include a third test pad portion TP3. The third test pad portion TP3 may be disposed on the second surface 2S. The third test pad portion TP3 may be disposed in the non-effective area UA. In addition, the second passivation layer 320 is not disposed on the third test pad portion TP3. The third test pad portion TP3 may be connected to the third wiring portion 231. In particular, the third test pad portion TP3 may be integrally formed with the third wiring portion 231.
[0063] The third circuit pattern 230 may be tested before connecting the display panel to the sixth pad portion 232b. For example, the third circuit pattern 230 may be tested for open and short circuits via the third test pad portion TP3.
[0064] 1, 7, and 8, the fourth circuit pattern 240 may be disposed on the first surface 1S and the second surface 2S. The fourth circuit pattern 240 may include fourth wiring portions 241a and 241b, a seventh pad portion 242a, an eighth pad portion 242b, and a third via V3. The fourth wiring portions 241a and 241b, the seventh pad portion 242a, and the eighth pad portion 242b may include the same material. Additionally, the fourth wiring portions 241a and 241b, the seventh pad portion 242a, and the eighth pad portion 242b may be integrally formed.
[0065] The seventh pad portion 242a may be disposed on the first surface 1S. The seventh pad portion 242a may be disposed adjacent to the first pad portion 212a. The seventh pad portion 242a may be connected to a terminal of an external circuit board. Thus, the fourth circuit pattern 240 may be connected to the circuit board.
[0066] The eighth pad portion 242b may be disposed on the second surface 2S. The eighth pad portion 242b may be connected to a terminal of an external display panel, thereby connecting the fourth circuit pattern 240 to the display panel.
[0067] The fourth wiring portion may include a 4-1 wiring portion 241a and a 4-2 wiring portion 241b. The 4-1 wiring portion 241a is disposed on the first surface 1S. The 4-2 wiring portion 241b is disposed on the second surface 2S. The fourth wiring portion may connect the seventh pad portion 242a and the eighth pad portion 242b. In particular, the 4-1 wiring portion 241a may be connected to the seventh pad portion 242a. Furthermore, the 4-2 wiring portion 241b may be connected to the eighth pad portion 242b.
[0068] The fourth circuit pattern 240 may be a power supply pattern, and power may be transmitted to the circuit board and the display panel through the fourth circuit pattern 240.
[0069] The first protective layer 310 and the second protective layer 320 may be disposed on the fourth circuit pattern 240. In particular, the first protective layer 310 may be disposed on the fourth circuit pattern 240 on the first surface 1S. Furthermore, the second protective layer 320 may be disposed on the fourth circuit pattern 240 on the second surface 2S. The first protective layer 310 and the second protective layer 320 may be disposed on an area excluding the seventh pad portion 242a and the eighth pad portion 242b.
[0070] The 4-1 wiring portion 241a and the 4-2 wiring portion 241b may be connected to each other. In particular, the 4-1 wiring portion 241a and the 4-2 wiring portion 241b may be connected to each other through the third via V3. The third via V3 may be disposed on the first surface 1S and the second surface 2S. The third via V3 on the first surface 1S and the third via V3 on the second surface 2S may be disposed at positions corresponding to each other.
[0071] The third via V3 includes a third via land VL3 and a third via hole VH3. The third via hole VH3 is formed inside the third via land VL3. A conductive material may be disposed in the third via hole VH3. This may electrically connect the 4-1 wiring portion 241a and the 4-2 wiring portion 241b.
[0072] At least one of the first circuit pattern 210, the second circuit pattern 220, the third circuit pattern 230, and the fourth circuit pattern 240 may include a metal material having excellent electrical conductivity. Specifically, at least one of the first circuit pattern 210, the second circuit pattern 220, the third circuit pattern 230, and the fourth circuit pattern 240 may include copper (Cu). However, embodiments are not limited thereto. At least one of the first circuit pattern 210, the second circuit pattern 220, the third circuit pattern 230, and the fourth circuit pattern 240 may include at least one metal selected from the group consisting of copper (Cu), aluminum (Al), chromium (Cr), nickel (Ni), silver (Ag), molybdenum (Mo), gold (Au), titanium (Ti), and alloys thereof.
[0073] At least one of the first protective layer 310 and the second protective layer 320 may include a solder paste. For example, at least one of the first protective layer 310 and the second protective layer 320 may include a solder paste including a thermosetting resin, a thermoplastic resin, a filler, a hardener, or a hardening accelerator.
[0074] As described above, the second circuit pattern 220 may include a first via V1. Specifically, the second circuit pattern 220 may include a plurality of first vias V1. The number of the first vias V1 may correspond to the number of pad portions of the second circuit pattern 220. Thus, the number of the first vias V1 may be proportional to the number of terminals of the display panel.
[0075] For example, if the flexible circuit board is connected to a VR display panel with a large number of terminals, the number of first vias V1 can be increased. Also, the first vias V1 can be variously arranged according to the width in the first direction 1D and the length in the second direction 2D of the flexible circuit board.
[0076] For example, a plurality of first via groups VG1 may be defined. The first via groups VG1 may include a plurality of first vias V1 arranged in the second direction 2D. The first via groups VG1 may also be spaced apart in the first direction 1D.
[0077] The number of first vias V1 in the first via group VG1 may vary depending on the width in the first direction 1D and the length in the second direction 2D of the flexible circuit board 1000. Also, the number of first vias in the first via group VG1 may vary depending on the width in the first direction 1D and the length in the second direction 2D of the flexible circuit board 1000.
[0078] For example, if the width of the flexible circuit board 1000 is large, the number of first vias V1 in the first via group VG1 may be small. Alternatively, the number of first vias V1 in the first via group VG1 may be large. For example, a flexible circuit board connected to a mobile display panel may have a large width. Accordingly, the number of first vias V1 in the first via group VG1 in the flexible circuit board connected to a mobile display panel may be small. Alternatively, the number of first vias V1 in the first via group VG1 may be large.
[0079] Alternatively, if the width of the flexible circuit board 1000 is small, the number of first vias V1 in the first via group VG1 may be large. Alternatively, the number of first vias V1 in the first via group VG1 may be small. For example, a flexible circuit board connected to a display panel for VR may have a small width. Accordingly, the number of first vias V1 in the first via group VG1 in the flexible circuit board connected to a display panel for VR may be large. Alternatively, the number of first vias V1 in the first via group VG1 may be small.
[0080] Meanwhile, the flexible circuit board 1000 may include a first separation area IA1, a second separation area IA2, and a third separation area IA3. The first separation area IA1 may be defined as the area between the fourth pad portion 222b and the first via V1 closest to the fourth pad portion 222b. The second separation area IA2 may be defined as the area between the first via V1 closest to the fourth pad portion 222b and the cut line CL. The third separation area IA3 may be defined as the area between the sixth pad portion 232b and the chip mounting area CHA.
[0081] The COF module 2000 can be bent. Specifically, referring to (a) and (b) of Figures 2 and 9, the COF module 2000 can be bent at the third separation area IA3. Therefore, the COF module 2000 includes a bending area BA. Specifically, the third separation area IA3 includes the bending area BA.
[0082] 9(b), the first and second separated regions IA1 and IA2 may overlap with the display panel 4000. Therefore, the first and second separated regions IA1 and IA2 may become a bezel region of the display panel 4000. Therefore, as shown in FIG. 9(b), when the lengths of the first and second separated regions IA1 and IA2 are increased, the bezel region of the display panel 4000 may become larger.
[0083] For example, if the number of first vias V1 in the first via group VG1 is increased, the length of the second separation area IA2 may be increased, thereby increasing the bezel area of the display panel 4000. For example, in the case of a COF module 2000 connected to a VR display panel, the number of first vias V1 in the first via group VG1 is large, thereby increasing the length of the second separation area IA2, thereby increasing the bezel area BE of the display panel 4000.
[0084] Alternatively, if the size of the first vias V1 of the first via group VG1 increases, the bezel area of the display panel 4000 may increase. For example, in the case of a COF module 2000 connected to a mobile display panel, the number of first vias V1 of the first via group VG1 is small. However, the size of the first vias V1 may increase. As a result, the length of the second isolation area IA2 increases, and the bezel area BE of the display panel 4000 may increase.
[0085] As a result, the COF module 2000 according to the embodiment may bend in at least two regions. Referring to FIG. 10, the COF module 2000 may include a first bending region BA1 and a second bending region BA2. When the first via V1 is disposed in the second bending region BA2, stress may be transferred to the first via V1. This may cause the size or shape of the first via land VL1 and the first via hole VH1 to change. This may result in misalignment of the first via hole VH1.
[0086] The flexible circuit board 1000 and the COF module that can solve the above problems will be described below.
[0087] FIG. 11 is an enlarged view of the region G in FIG.
[0088] 11, the second circuit pattern 220 may have a length range set for each region. Specifically, the second circuit pattern 220 may have a first length L1, a second length L2, a third length L3, a fourth length L4, and a fifth length L5 defined therein.
[0089] The first length L1 may be defined as the length from the end E1 of the second protective layer 320 to the first via V1 closest to the fourth pad portion 222b. That is, the first length L1 may be defined as the length from the end E1 of the second protective layer 320 to the first first via V1 of the first via group VG1. Also, the first length L1 may be defined as the length from the end of the fourth pad portion 222b to the first first via V1 of the first via group VG1. The first length L1 may be defined as the length of the first isolation region IA1.
[0090] Also, the second length L2 may be defined as the length of the fourth pad portion 222b.
[0091] The third length L3 may be defined as the length from the first via V1 closest to the fourth pad portion 222b to the first via V1 farthest from the fourth pad portion 222b. That is, the third length L3 may be defined as the length from the first via V1 of the first via group VG1 to the last via V1 of the first via group VG1.
[0092] In addition, the fourth length L4 may be defined as the length from the first via V1 farthest from the fourth pad portion 222b to the cut line CL. That is, the fourth length L4 may be defined as the length from the last first via V1 of the first via group VG1 to the cut line CL. That is, the fourth length L4 may be defined as the distance from the last first via V1 of the first via group VG1 to the end of the COF module.
[0093] The sum of the third length L3 and the fourth length L4 may be defined as the length of the second isolation area IA2.
[0094] The first length L1 may be greater than the second length L2. For example, the first length L1 may be 1.5 times or more the second length L2. Specifically, the first length L1 may be 1.5 to 10 times, 2 to 5 times, or 2.5 to 3.5 times the second length L2.
[0095] Furthermore, the first length L1 may be greater than the length L5 of the first via V1. For example, the first length L1 may be 15 times or more the length L5 of the first via V1. In particular, the first length L1 may be 15 to 35 times, 20 to 35 times, or 25 to 35 times the length L5 of the first via V1.
[0096] Furthermore, the first length L1 may be shorter than the third length L3. For example, the first length L1 may be 0.8 times or less the third length L3. Specifically, the first length L1 may be 0.3 to 0.8 times, 0.4 to 0.7 times, or 0.5 to 0.6 times the third length L3.
[0097] Furthermore, the first length L1 may be greater than the fourth length L4. For example, the first length L1 may be 1.5 times or more the fourth length L4. In particular, the first length L1 may be 1.5 to 10 times, 2 to 9 times, or 3 to 8.5 times the fourth length L4.
[0098] For example, the first length L1 may be 5 mm or less. In particular, the first length L1 may be 0.1 mm to 4 mm, 0.5 mm to 3 mm, or 1 mm to 2.5 mm.
[0099] The second length L2 may be 0.5 mm to 1 mm or 0.7 mm to 0.9 mm.
[0100] The third length L3 may be 1 mm to 4 mm, 2 mm to 3.5 mm, or 2.5 mm to 3.3 mm.
[0101] The fourth length L4 may be 0.15 mm to 0.6 mm, 0.2 mm to 0.5 mm, or 0.25 mm to 0.4 mm.
[0102] Since the first length L1 satisfies the above range, the flexible circuit board 1000 can be bent at the first spaced area IA1. That is, the size of the first spaced area IA1 is sufficiently secured. Therefore, the flexible circuit board 1000 can be bent at least one time at the first spaced area IA1.
[0103] The first isolated region IA1 may include a first isolated region IA1a, a second isolated region IA1b, and a third isolated region IA1c, and the second isolated region IA1b may be disposed between the first isolated region IA1a and the third isolated region IA1c.
[0104] 13, the flexible circuit board 1000 may be bent at the third spaced area IA3 and the first and second spaced areas IA1b, thereby reducing the bezel area of the display panel 4000.
[0105] 12, the flexible circuit board 1000 includes a bending region BA. Specifically, the third spaced region IA3 includes the bending region BA. When the flexible circuit board 1000 is bent only at the third spaced region IA3, the first bezel region BE1 of the display panel 4000 can be increased. Specifically, the first bezel region BE1 includes a portion of the third spaced region IA3, the 1-1 spaced region IA1a, the 1-2 spaced region IA1b, the 1-3 spaced region IA1c, and the second spaced region IA2.
[0106] 13, the flexible circuit board 1000 includes a first bending region BA1 and a second bending region BA2. The third spaced region IA3 includes the first bending region BA1. The first-second spaced region IA1b includes the second bending region BA2. When the third spaced region IA3 and the first-second spaced region IA1b are bent, the second bezel region BE2 of the display panel 4000 is reduced. Specifically, the second bezel region BE2 includes a portion of the third spaced region IA3 and portions of the first-first spaced region IA1a and first-second spaced region IA1b.
[0107] 13, the first-second spaced region IA1b is bent only once. However, the embodiment is not limited thereto. For example, the first-second spaced region IA1b may be bent at least two times. That is, the first-second spaced region IA1b may include at least two bending regions.
[0108] The flexible circuit board 1000 according to the embodiment is bent at the first separation area IA1, thereby reducing the bezel area of the display panel.
[0109] In addition, the flexible circuit board 1000 is not bent in the second separation area IA2, so that the flexible circuit board 1000 is not bent in the area where the first via V1 is formed.
[0110] Therefore, when the flexible circuit board 1000 is bent, stress is prevented from being transmitted to the first vias, and the alignment of the first vias is prevented from being shifted due to the stress, and the shape or size of the first vias is prevented from being changed.
[0111] The layer structures of the first circuit pattern, the second circuit pattern, the third circuit pattern, and the fourth circuit pattern will be described below with reference to Figures 14 and 15. For convenience of explanation, the following description will focus on the first circuit pattern. The following description also applies to the second circuit pattern, the third circuit pattern, and the fourth circuit pattern.
[0112] 14, the first circuit pattern may be formed in multiple layers. Specifically, the first wiring portion 211 and the first pad portion 212a may include a first metal layer 201 and a second metal layer 202. Although not shown in FIG. 14, the second pad portion 212b may also include the first metal layer 201 and the second metal layer 202.
[0113] The first metal layer 201 may be a seed layer of the first circuit pattern. For example, the first metal layer 201 may be formed on the substrate 100 by electroless plating using a metal material such as copper (Cu).
[0114] The second metal layer 202 may be a plating layer, for example, formed by electrolytic plating using the first metal layer 201 as a seed layer.
[0115] The thickness of the first metal layer 201 may be less than the thickness of the second metal layer 202 .
[0116] For example, the thickness of the first metal layer 201 may be 0.7 μm to 2 μm, and the thickness of the second metal layer 202 may be 10 μm to 25 μm.
[0117] The first metal layer 201 and the second metal layer 202 may include the same metal material, for example, copper (Cu).
[0118] In addition, an adhesive layer 203 may be disposed on the second metal layer 202. In particular, the adhesive layer 203 may be disposed on the side surfaces of the first metal layer 201, the side surfaces of the second metal layer 202, and the top surface of the second metal layer 202. That is, the adhesive layer 203 may be disposed while enclosing the first metal layer 201 and the metal layer 202.
[0119] The bonding layer 203 may include a metal. In particular, the bonding layer 203 may include tin (Sn).
[0120] The bonding layer 203 may be formed to a thickness of 0.3 μm to 0.7 μm, and the tin content of the bonding layer 203 may increase as it extends from the lower surface to the upper surface.
[0121] That is, the bonding layer 203 is disposed in contact with the second metal layer 202. Accordingly, the bonding layer 203 may have a higher tin content and a lower copper content from the bottom surface to the top surface.
[0122] Therefore, only pure tin remains on the upper surface of the bonding layer 203 in a thickness range of 0.1 μm to 0.3 μm.
[0123] The bonding layer 203 allows the chip terminals, the circuit board terminals, and the display panel terminals to be easily bonded to the pads by heat and pressure. That is, when heat and pressure are applied to the pads, the upper surface of the bonding layer, where pure tin remains, melts. This allows the chip terminals, the circuit board terminals, and the display panel terminals to be easily bonded.
[0124] As a result, the bonding layer 203 can become a part of the first pad portion 212a and the second pad portion 212b.
[0125] The first circuit pattern may be disposed to a thickness of 2 μm to 25 μm. For example, the first circuit pattern may be disposed to a thickness of 5 μm to 20 μm. For example, the first circuit pattern may be disposed to a thickness of 7 μm to 15 μm.
[0126] When the first circuit pattern is formed, flash etching is performed to separate the circuit pattern, thereby etching the first metal layer 201. As a result, the thickness of the first circuit pattern that is finally manufactured may be smaller than the total thickness of the first metal layer 201, the second metal layer 202, and the bonding layer 203 formed during the process.
[0127] If the thickness of the first circuit pattern is less than 2 μm, the resistance of the second circuit pattern may increase, and if the thickness of the first circuit pattern is more than 25 μm, it may be difficult to achieve a fine pattern.
[0128] Meanwhile, a buffer layer 205 may be further disposed between the substrate 100 and the first circuit pattern. The buffer layer 205 may improve adhesion between the substrate 100 and the first circuit pattern, which are different materials.
[0129] The buffer layer 205 may be formed in multiple layers. Specifically, a first buffer layer 205a and a second buffer layer 205b may be disposed on the substrate 100. This allows the first buffer layer 205a to contact the substrate 100. The second buffer layer 205b may contact the first circuit pattern 210.
[0130] The first buffer layer 205a may include a material that has good adhesion to the substrate 100. For example, the first buffer layer 205a may include nickel (Ni). The second buffer layer 205b may include a material that has good adhesion to the second circuit pattern. For example, the second buffer layer 205b may include chromium (Cr).
[0131] The buffer layer 205 may have a thickness in the nanometer range, for example, 20 nm or less.
[0132] The buffer layer 205 can improve adhesion between the substrate 100, which is a different material, and the first circuit pattern, thereby preventing the first circuit pattern from peeling off.
[0133] 15, the adhesive layer 203 may include a plurality of adhesive layers, for example, a first adhesive layer 203a and a second adhesive layer 203b.
[0134] In particular, the first bonding layer 203a may be disposed on the first wiring portion 211, the first pad portion 212a, and the second pad portion 212b.
[0135] In addition, the second adhesive layer 203b may be disposed only on the first pad portion 212a and the second pad portion 212b. That is, the second adhesive layer 203b allows the first wiring portion 211 and the first pad portion 212a and the second pad portion 212b to have different layer structures.
[0136] The first bonding layer 203a and the second bonding layer 203b may contain a metal. In particular, the first bonding layer 203a and the second bonding layer 203b may contain tin (Sn).
[0137] The first adhesive layer 203a and the second adhesive layer 203b may be disposed to have different thicknesses. Specifically, the second adhesive layer 203b may have a thickness greater than that of the first adhesive layer 203a.
[0138] For example, the first adhesive layer 203a may have a thickness of 0.02 μm to 0.06 μm, and the second adhesive layer 203b may have a thickness of 0.2 μm to 0.6 μm.
[0139] If the adhesive layer is disposed thickly in the region between the protective layer 300 and the first wiring portion 211, cracks may occur when the flexible circuit board is bent. Therefore, the first adhesive layer 203a may be formed to have a thin film thickness, thereby preventing cracks from occurring when the flexible circuit board is bent.
[0140] In addition, the second bonding layer 203b may have a tin content that increases as it extends from the lower surface to the upper surface.
[0141] That is, the second bonding layer 203b may have a higher tin content and a lower copper content from the lower surface to the upper surface.
[0142] Therefore, only pure tin remains on the upper surface of the second bonding layer 203b in a thickness range of 0.1 μm to 0.3 μm.
[0143] The second adhesive layer 203b allows the chip terminals, the circuit board terminals, and the display panel terminals to be easily bonded to the pads using heat and pressure. That is, when heat and pressure are applied to the pads, the top surface of the adhesive layer, where pure tin remains, melts. This allows the chip terminals, the circuit board terminals, and the display panel terminals to be easily bonded.
[0144] The flexible circuit board can be bent into various shapes. The COF module 2000 can be bent into various shapes.
[0145] 16 to 19 are diagrams showing various shapes into which a COF module including a flexible circuit board according to an embodiment can be bent.
[0146] 16 to 19, the COF module 2000 can be bent at least three times. For example, referring to FIGS. 16 to 18, the COF module 2000 can be bent three times. That is, the COF module 2000 can include a first bending region BA1, a second bending region BA2, and a third bending region BA3.
[0147] 19, the COF module 2000 may be bent four times, i.e., the COF module 2000 may include a first bending region BA1, a second bending region BA2, a third bending region BA3, and a fourth bending region BA4.
[0148] In detail, the COF module 2000 is bent in the first separation area IA1 and the third separation area IA3, for example, twice in the first separation area IA1 and once in the third separation area IA3, and is not bent in the second separation area IA2 where the vias are disposed.
[0149] Therefore, deformation of the vias can be prevented when bending the COF module 2000. Furthermore, since the COF module 2000 is bent at the first separation area IA1, the size of the bezel area of a display panel connected to the COF module can be reduced.
[0150] 16 to 19, the first and third spaced regions IA1 and IA3 may be curved with the same or different curvatures. For example, referring to FIG. 18, the first and third spaced regions IA1 and IA3 may be curved with different curvatures.
[0151] The flexible circuit board according to the embodiment can be formed into a COF module by mounting a chip CH on the chip mounting area CHA and cutting along the cut line CL.
[0152] The COF module 2000 is located between the display panel 4000 and the circuit board 3000 and can connect electrical signals.
[0153] 13 , one end of the COF module 2000 is connected to the display panel 4000. The other end opposite to the one end is connected to the circuit board 3000. For example, the display panel 4000 may be disposed on one side of the COF module 2000. Also, the circuit board 3000 may be disposed on the other side opposite to the one side of the COF module 2000. However, embodiments are not limited thereto. The display panel 4000 and the circuit board 3000 may be disposed on the same side of the COF module 2000.
[0154] The COF module 2000 includes a flexible substrate, which allows the display panel 4000 and the circuit board 3000 to have both a rigid form and a bending form.
[0155] The COF module 2000 can connect the display panel 4000 and the circuit board 3000, which are arranged facing each other, in a curved shape. This reduces the thickness of the electronic device and improves design flexibility. In addition, the COF module 2000 including the flexible substrate does not break wiring even when curved, thereby improving the reliability of the electronic device.
[0156] In addition, the COF module 2000 can be bent in the first separation area IA1, thereby reducing the bezel area of the display panel 4000. In addition, the COF module 2000 can be prevented from being bent in the second separation area IA2, thereby preventing deformation of vias.
[0157] The COF module is flexible and can be used in a variety of electronic devices.
[0158] For example, referring to Fig. 20, the COF module may be applied to a flexible touch window, and therefore, a touch device including the same may be a flexible touch device.
[0159] 21, the COF module can be applied to various wearable touch devices including curved displays, thereby enabling the wearable touch devices to be slimmer and lighter.
[0160] Referring to FIG. 22, the COF module can be applied to various electronic devices having a display portion, such as a TV, a monitor, and a notebook.
[0161] The features, structures, effects, etc. described in the above-described embodiments are included in at least one embodiment of the present invention and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment can be combined or modified in other embodiments by a person skilled in the art to which the embodiment belongs. Therefore, the content related to such combinations and modifications should be interpreted as being included within the scope of the present invention.
[0162] Furthermore, while the above description has focused on the embodiments, these are merely illustrative and do not limit the present invention. Those skilled in the art will appreciate that various modifications and applications not exemplified above are possible within the scope of the essential characteristics of the present invention. For example, each component specifically illustrated in the embodiments can be modified and implemented. Differences related to such modifications and applications should be construed as being included within the scope of the present invention as defined by the appended claims.
Claims
1. a substrate including a first surface and a second surface opposite the first surface; a first circuit pattern disposed on the first surface; a second circuit pattern disposed on the first surface and the second surface; a third circuit pattern disposed on the first surface and the second surface; a first protective layer disposed on the first surface; a second protective layer disposed on the second surface; a chip mounting area is defined on the first surface; the first circuit pattern includes a first pad portion connected to a chip on the chip mounting area, a second pad portion connected to an external printed circuit board, and a first wiring portion connected to the first pad portion and the second pad portion; the second circuit pattern includes a third pad portion connected to the chip, a fourth pad portion connected to an external display panel, and a second wiring portion connected to the third pad portion and the fourth pad portion; the third circuit pattern includes a fifth pad portion connected to the chip, a sixth pad portion connected to the display panel, and a third wiring portion connected to the fifth pad portion and the sixth pad portion; the second circuit pattern includes a first via that connects a second wiring portion on the first surface and a second wiring portion on the second surface; the second wiring portion has a first length defined as a distance from an end of the fourth pad portion to a first via closest to the fourth pad portion, and a second length defined as a length of the fourth pad portion; The flexible circuit board, wherein the first length is greater than the second length.
2. The flexible circuit board of claim 1 , wherein the first length is 1.5 to 10 times the second length.
3. The second circuit pattern has a third length defined therein, the third length being a length from a first via closest to the fourth pad portion to a first via farthest from the fourth pad portion; The flexible circuit board according to claim 1 , wherein the first length is 0.3 to 0.8 times the third length.
4. The substrate has a defined cut line; a fourth length is defined as a length from a first via that is farthest from the fourth pad portion to the cut line; The flexible circuit board of claim 1 , wherein the first length is 1.5 to 10 times the fourth length.
5. The flexible circuit board of claim 1 , wherein the first length is 15 to 35 times the length of the first via.
6. The flexible circuit board according to claim 1 , wherein the first length is between 0.1 mm and 4 mm.
7. the second length is between 0.5 mm and 1 mm; the third length is between 1 mm and 4 mm; The flexible circuit board according to claim 1 , wherein the fourth length is between 0.15 mm and 0.6 mm.
8. The substrate has a defined cut line; a first separation region defined as a region between the fourth pad portion and the first via closest to the fourth pad portion, a second separation region defined as a region between the first via closest to the fourth pad portion and the cut line, and a third separation region defined as a region between the sixth pad portion and the chip mounting region, The flexible circuit board of claim 1 , wherein at least one of the first spaced apart area and the second spaced apart area is bendable.
9. the first spaced apart region and the third spaced apart region are curved; The flexible circuit board of claim 8 , wherein the first spaced apart region is bent at least once.
10. The flexible circuit board of claim 8 , wherein the second spaced apart area is non-flexible.