Enhanced etching selectivity using halides.

Abstract

The method includes performing a dry etching process to remove a portion of a first layer disposed on a second layer of a stack of alternating layers. The first layer includes a first material, and the second layer includes a second material different from the first material, and the dry etching process forms a passivation layer including by-products on a surface of the second material. A certain amount of the first material of the portion of the first layer remains after performing the dry etching process. The method further includes introducing a halide gas to strengthen the passivation layer on the surface of the second material.

Description

[Technical Field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure relate generally to electronic device manufacturing. In particular, embodiments of the present disclosure relate to achieving improved etch selectivity using halides during electronic device manufacturing. [Background technology]

[0002] An electronic device manufacturing apparatus can include multiple chambers, such as process chambers and load lock chambers. Such an electronic device manufacturing apparatus can employ a robotic device in a transfer chamber configured to transport substrates between the multiple chambers. In some cases, multiple substrates are transferred together. A process chamber can be used in an electronic device manufacturing apparatus to perform one or more processes on a substrate, such as a deposition process and an etching process. For many processes, gases are flowed into the process chamber. Electronic devices, such as semiconductor devices, are manufactured by performing a series of operations, which can include deposition, oxidation, photolithography, ion implantation, etching, etc., to form many patterned layers. Summary of the Invention

[0003] According to one embodiment, a method is provided. The method includes performing a dry etching process to remove a portion of a first layer disposed on a second layer of a stack of alternating layers. The first layer includes a first material, and the second layer includes a second material different from the first material, and the dry etching process forms a passivation layer including by-products on a surface of the second material. A portion of the first material in the portion of the first layer remains after performing the dry etching process. The method further includes introducing a halide gas to strengthen the passivation layer.

[0004] According to one embodiment, a method is provided. The method includes forming a staircase structure for an electronic device from a base structure including an etching mask disposed on a stack of alternating layers. The stack of alternating layers includes a first layer including a first material disposed on a second layer including a second material different from the first material. Forming the staircase structure includes performing a first dry etching process to remove a portion of the first layer from an area and performing a second dry etching process to remove a remaining portion of the first layer from the area. Performing the second dry etching process includes performing a dry etching process to form a passivation layer including by-products on a surface of the second material and introducing a halide gas to strengthen the passivation layer.

[0005] The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings, in which like reference numerals indicate similar elements. It should be noted that different references to "an" or "one" embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one. [Brief explanation of the drawings]

[0006] [Figure 1A-1B] 1A-1C illustrate cross-sectional views of forming an electronic device using halides to achieve improved etch selectivity, according to some embodiments. [Figure 2A-2B] 1A-1C illustrate cross-sectional views of an exemplary method of using halides to achieve improved etch selectivity, according to some embodiments. [Figure 3] 1 is a flowchart of an exemplary method for achieving improved etch selectivity using halides, according to some embodiments. [Figure 4A-4B] 1 is a flowchart of an exemplary method for achieving improved etch selectivity using halides, according to some embodiments. [Figures 5A-5C]1 is a table illustrating exemplary etch process windows, according to some embodiments. [Figure 6] FIG. 1 illustrates a top-down view of an exemplary process for achieving improved etch selectivity using halides, according to some embodiments. DETAILED DESCRIPTION OF THE INVENTION

[0007] Embodiments described herein relate to achieving improved etch selectivity using halides during electronic device fabrication. Etching generally refers to the process of chemically removing layers from a substrate during electronic device fabrication. More specifically, one or more etch masks may be used to protect one or more regions during the etching process, thereby allowing exposed regions to be etched during the etching process. Examples of masks include soft masks (e.g., photoresist) and hard masks (e.g., silicon nitride (SiN) hard masks). For example, etching may be performed after patterning a surface via a lithography process.

[0008] One type of etching process is a wet etching process. A wet etching process is an etching process that uses a wet etchant (in other words, a liquid-phase etchant). More specifically, a wet etching process can be performed by placing a substrate in a wet etchant bath. A wet etching process can be isotropic or anisotropic. An isotropic etching process is an etching process in which the etching rate in the vertical direction is approximately equal to the etching rate in the lateral direction.

[0009] Another type of etching process is the dry etching process. A dry etching process is an etching process that uses dry etching (in other words, a plasma-phase etchant). More specifically, a dry etching process can be performed by utilizing a plasma etchant containing a gas capable of generating plasma. The plasma then generates particles (e.g., free radicals) that can react with the exposed surface of the substrate. Many plasma etchants contain chlorine (Cl) and / or fluorine (F). Thus, the gas etchant can be selected depending on the material to be etched. Examples of plasma etchants that can be used to etch aluminum (Al) include chlorine gas (Cl), carbon tetrachloride (tetrachloromethane) (CCl), silicon tetrachloride (tetrachlorosilane) (SiCl), and boron trichloride (BCl). Examples of plasma etchants that can be used to etch silicon (Si) include Cl, CCl, dichlorodifluoromethane (CClF), sulfur hexafluoride (SF), and nitrogen trifluoride (NF). Examples of plasma etchants that can be used to etch silicon dioxide (SiO2) and silicon nitride (Si3N4) include CHF3, CF4, SF6, and NF3. Examples of dry etching processes include plasma etching, ion milling, and reactive ion etching (RIE). Different etching processes can be performed using different etching process parameters, such as pressure. For example, plasma etching can be performed at a higher pressure than RIE, and RIE can be performed at a higher pressure than ion milling.

[0010] The etch rate of a material generally refers to how quickly the material is removed when exposed to a particular etchant. For example, the etch rate may be expressed as the ratio of length to time (e.g., nanometers (nm) / minute (min)). Etch selectivity may generally refer to the ratio of etch rates between materials exposed to the same etchant. In one example, for material X having an etch rate "Etch Rate 1" and material Y having an etch rate "Etch Rate 2," the etch selectivity may be defined as Etch Rate 1 / Etch Rate 2. More specifically, in this example, material X has a selectivity to material Y of Etch Rate 1 / Etch Rate 2.

[0011] Some electronic devices can include a staircase structure formed by etching respective portions of a stack of alternating layers with respective numbers of etching cycles. The staircase structure can include several steps, where each step corresponds to a respective contact point. Examples of electronic devices that can include a staircase structure include memory devices, more particularly, three-dimensional (3D) memory devices. One example of a memory device that can include a staircase structure is a 3D dynamic random access memory (DRAM) device.

[0012] In one example, the stack can include alternating Si and silicon germanium (SiGe) layers. Selective etching of Si relative to SiGe can be difficult in some etching processes, especially if the Ge content of the SiGe compound is sufficiently low. For example, the Ge content of SiGe can be less than or equal to 10% of the SiGe compound (e.g., the Si to Ge alloy ratio can be at least 9:1). Ideally, the etch selectivity of the material etched to form the staircase structure should be as high as possible to enable more precise control over the shape of the staircase structure. For example, low selectivity can reduce etch profile control due to sidewall damage, etc. Therefore, some etching processes may require either a very narrow process window, slow etching with poor selectivity, and / or the use of different materials, which can lead to the formation of suboptimal staircase structures.

[0013] To address these and other shortcomings, embodiments described herein can achieve improved etch selectivity using halides. The embodiments described herein can be used to form electronic devices that include staircase structures. In some embodiments, the electronic devices are 3D DRAM devices.

[0014] The staircase structure can be formed by dry etching a base structure including an etching mask disposed on a stack of alternating layers. The stack of alternating layers can include a first layer formed from a first material and a second layer formed from a second material. In some embodiments, the first material is Si (i.e., the first layer is a Si layer) and the second material is SiGe (i.e., the second layer is a SiGe layer). For example, the Ge content of the SiGe can be less than or equal to 10% of the SiGe compound (e.g., the alloy ratio of Si to Ge can be at least 9:1).

[0015] The dry etching can involve a cyclic dry etching process. More specifically, the dry etching process can include several dry etching steps forming a cycle. In some embodiments, each dry etching step is an anisotropic etch. The dry etching steps can include a first dry etching step utilizing a low selectivity etch to remove a portion of material from an area exposing a portion of the first layer, a second dry etching step utilizing a first highly selectivity etch to trim the portion of the first layer and expose a portion of the second layer, and a third dry etching step utilizing a second highly selectivity etch to trim the portion of the second layer.

[0016] The second dry etching step can include a dry etching process that generates by-products that form on the surface of the second material. More specifically, the by-products can include salts that selectively form on the surface of the second material. The by-products can resist decomposition due to the dry etching conditions (e.g., chemistry, temperature, and pressure) in the plasma etching chamber. This allows the by-products to function as a passivation layer to protect the second material from dry etching and improve etch selectivity relative to the first material.

[0017] Some amount of the first material targeted during the second dry etching step may remain after the dry etching process. However, by-products are subject to erosion by physical etching or ion bombardment during the dry etching. This erosion of the by-products may reduce the etch selectivity of the first material relative to the second material during subsequent dry etching processes that may need to be performed during the second dry etching step.

[0018] To address by-product erosion to maintain or enhance the etch selectivity of a first material over a second material, embodiments described herein can introduce a halide gas during dry etching (e.g., during the dry etching process). Instead of acting as a plasma etchant, the halide gas interacts with the by-products and the surface of the second material to strengthen the passivation layer through molecular exposure. In some embodiments, strengthening the passivation layer includes at least partially repairing the passivation layer. For example, strengthening the passivation layer can include replenishing the passivation layer (e.g., restoring the passivation layer). That is, the by-products can serve as effective nucleation points for initially forming the passivation layer, and the halide gas can strengthen the passivation layer during the dry etching process. Additionally, the halide gas can saturate reactive and / or etch-damaged sites, which can restore the surface content of the second material. Thus, by maintaining or enhancing the etch selectivity of the first layer relative to the second layer, the introduction of a halide gas during the etching step can improve the geometry of the staircase structure formed from the stack of alternating layers.

[0019] For example, if the first layer is a Si layer and the second layer is a SiGe layer, the substrate can be etched using a plasma etchant having a chemistry that, when exposed to Ge on the surface of the second layer, can result in a surface reaction that forms a passivation layer including by-products. More specifically, the passivation layer can include ammonium hexafluorogermanate (F6GeH8N2). Examples of plasma etchants that can be used to etch a SiGe layer include hydrogen gas (H2), NF3, ammonium fluoride (NH4F), etc. The halide gas can be selected to interact with the SiGe surface and by-products to strengthen the passivation layer. In some embodiments, strengthening the passivation layer includes at least partially repairing the passivation layer. For example, strengthening the passivation layer can include replenishing the passivation layer. In some embodiments, the halide gas includes germanium tetrafluoride (GeF4). Further details regarding the use of halides to achieve improved etch selectivity are described below with reference to FIGS. 1A-5.

[0020] 1A-1B are cross-sectional views illustrating an exemplary method of forming an electronic device ("device") using halides to achieve improved etch selectivity, according to some embodiments. FIG. 1A illustrates a base structure 100A. The base structure 100A includes a stack of alternating layers ("stack") 110 and an etch mask 120 disposed on a substrate 120. For example, obtaining the base structure 100A can include forming the base structure 100A. Forming the base structure 100A can include forming the etch mask 120 on the stack 110.

[0021] The stack 110 includes multiple layers of a first material and multiple layers of a second material, where the first layer including the first material is disposed on the second layer including the second material. More specifically, the first material may be different from the second material. For example, the multiple layers of the first material include layers 112-1 through 112-6, and the multiple layers of the second material include layers 114-1 through 114-6. The stack 110 may include any suitable number of layers of the first material and the second material. In some embodiments, the first material is Si and the second material is SiGe. The etch mask 120 may be formed from any suitable material. In some embodiments, the etch mask 120 includes a soft mask (e.g., photoresist). In some embodiments, the etch mask 120 includes a hard mask.

[0022] 1A , the base structure 100A further includes one or more additional layers such that the stack 110 is disposed on the one or more additional layers. For example, the one or more additional layers may include a substrate layer (e.g., a semiconductor wafer) as an initial layer of the base structure 100A. For example, the stack 110 may be formed directly on the substrate layer. As another example, one or more intervening layers may be present between the stack 110 and the substrate layer.

[0023] 1B includes a processed structure 100B. The processed structure 100B includes a staircase structure 130 formed by etching the stack 110 using the etch mask 120. The staircase structure 130 includes multiple staircase portions, including a staircase portion 132-1 disposed on a layer 134-1 and a staircase portion 132-2 disposed on a layer 134-2. More specifically, the staircase portions 132-1 and 132-2 may include a first material (e.g., Si), and the layers 134-1 and 134-2 may include a second material (e.g., SiGe).

[0024] In some embodiments, etching the stack 110 includes dry etching the stack 110. For example, dry etching the stack 110 may include at least one of plasma etching, ion milling, RIE, etc. More specifically, etching the stack 110 may include performing a cyclic etching process to remove respective amounts of material from respective regions of the stack 110. Respective multiple etching cycles may be performed to remove respective amounts of material. In an embodiment, each etching cycle is a dry etching cycle. For example, the dry etching cycle may be a plasma etching cycle, an ion milling cycle, an RIE cycle, etc.

[0025] The cyclic etching process may include a first etching process for removing a first portion of material from the region of the stack 110 that includes a respective portion of the etching mask 120, a second etching process for removing a second portion of material from the region of the stack 110, and a third etching process for removing a third portion of material from the region of the stack 110. For example, the first etching process may have low selectivity, the second etching process may have high selectivity to the first material (e.g., Si), and the third etching process may have high selectivity to the second material (e.g., SiGe). Because the portions of the etching mask 120 that protected the region of the stack 110 are removed during the cyclic etching process, the region of the stack 110 becomes exposed during subsequent cyclic etching processes performed on other regions of the stack 110. This results in different numbers of cyclic etching processes being performed on each region of the stack 110, enabling the formation of the staircase shape of the staircase structure 130. Further details regarding etching stack 110 will now be described in more detail below with reference to Figures 2A-2B.

[0026] 2A is a diagram illustrating a cross-sectional view of an exemplary method 200 for achieving improved etch selectivity using halides, according to some embodiments. As shown, method 200 includes an initial step 201 in which a base structure is provided that includes stack 110 and an etch mask 120 disposed on stack 110. For example, stack 110 may include layers 112-1, 112-2, 114-1, and 114-2, as described above with reference to FIG. 1A.

[0027] Method 200 further includes etching steps 202, 204, 206, and 208. During etching step 202, a portion of etching mask 120 is removed (e.g., trimmed) to expose region 205. During etching step 204, a portion of material is removed from region 205. The portion of material removed from region 205 during etching step 204 includes material from layers 112-1, 114-1, 112-2, and 114-2 corresponding to region 205. Etching process 204 results in intermediate structure 210 including layers 212, 214, 216, and 114-2. In some embodiments, etching process 204 is a low-selectivity etching process. For example, the etch rate ratio between the first material and the second material can be approximately 1:1. The material of intermediate structure 210 corresponding to region 205 includes a portion of layer 216 and a portion of layer 114-2.

[0028] During etching step 206, another portion of material is removed from region 205. The portion of material removed from region 205 during etching step 206 includes the portion of layer 216 corresponding to region 205. In some embodiments, as shown, the portion of layer 114-2 corresponding to region 205 may also be removed during etching process 204. This may result in intermediate structure 220 including layers 212, 214, 222, and 224, as well as passivation layer 225. The portion of layer 216 corresponding to region 205 formed during etching step 204 should have a thickness suitable for etching step 206. In some embodiments, the portion of layer 216 corresponding to region 205 has a thickness less than or equal to about 10 nm. In some embodiments, the portion of layer 216 corresponding to region 205 has a thickness less than or equal to about 5 nm. Etching step 206 may remove material from the portion of layer 224 corresponding to region 205 such that the portion of layer 224 corresponding to region 205 has a thickness. In some embodiments, the portion of layer 224 corresponding to region 205 has a thickness less than or equal to about 10 nm. In some embodiments, the portion of layer 224 corresponding to region 205 has a thickness less than or equal to about 5 nm.

[0029] Performing the etching step 206 may include performing alternating dry etching processes and passivation layer strengthening processes. For example, with reference to FIG. 2B , performing the etching step 206 may include performing a dry etching process 203. The dry etching process 203 may be performed using a suitable plasma etchant capable of forming by-products on the exposed surface of the second material. In some embodiments, the by-products include F6GeH8N2. The by-products of the dry etching process 203 form an initial passivation layer. After the dry etching process 203 is performed, it is determined whether there is remaining material in the portion of layer 216 corresponding to region 205. If so, performing the etching step 206 may include introducing 207 a halide gas to strengthen the initial passivation layer, resulting in passivation layer 225. More specifically, the halide gas interacts with the by-products and the exposed surface of the second material to strengthen (e.g., at least the initial passivation layer). In some embodiments, strengthening the initial passivation layer includes at least partially repairing the initial passivation layer. For example, strengthening the initial passivation layer can include replenishing the initial passivation layer. In some embodiments, the halide gas includes GeF4. Processes 203 and 207 form a cycle that can be repeated and continued until the portion of layer 216 corresponding to region 205 has been sufficiently removed, resulting in intermediate structure 220 including layer 224.

[0030] The introduction of the halide gas and the resulting formation of the passivation layer 225 can enable the etching process 206 to be highly selective to the first material (e.g., Si). For example, the etching process 206 can have a high Si / SiGe selectivity. In some embodiments, the selectivity of the etching process 206 is greater than or equal to about 3 (e.g., the etch rate ratio between the first material and the second material can be about 3:1). In some embodiments, the selectivity of the etching process 206 is greater than or equal to about 5 (e.g., the etch rate ratio between the first material and the second material can be about 5:1). In some embodiments, the selectivity of the etching process 206 is greater than or equal to about 10 (e.g., the etch rate ratio between the first material and the second material can be about 10:1).

[0031] 2A , during etching process 208, another portion of material is removed from region 205. The portion of material removed during etching process 208 includes the portion of layer 224 corresponding to region 205. This allows etching process 208 to result in intermediate structure 230 including layers 212, 214, 222, and 232. In some embodiments, etching process 208 is highly selective to the second material (e.g., SiGe). For example, etching process 208 can have a high SiGe / Si selectivity. In some embodiments, the selectivity of etching process 208 is greater than or equal to about 3 (e.g., the ratio of the etch rate of SiGe to the etch rate of Si is greater than or equal to about 3). In some embodiments, the selectivity of etching process 208 is greater than or equal to about 5 (e.g., the ratio of the etch rate of SiGe to the etch rate of Si is greater than or equal to about 5). In some embodiments, the selectivity of the etching process 208 is greater than or equal to about 10 (eg, the ratio of the etch rate of SiGe to the etch rate of Si is greater than or equal to about 10).

[0032] 3 depicts an exemplary method 300 for forming an electronic device that uses a halide to achieve improved etch selectivity, according to some embodiments. Method 300 may be performed in an electronic device processing system. More particularly, method 300 may be performed in one or more process chambers (e.g., etch chambers) of the electronic device processing system.

[0033] In step 310, a base structure is provided. The base structure can include a stack of alternating layers and an etch mask disposed on the stack of alternating layers. In some embodiments, providing the base structure includes forming the base structure. For example, forming the base structure can include forming an etch mask on the stack.

[0034] In step 320, a staircase structure is formed from the base structure. More specifically, the staircase structure is formed from the stack using dry etching. The dry etching may include performing several cycles of dry etching steps. Further details regarding steps 310 and 320 are described above with reference to FIGS. 1-2 and then below with reference to FIGS. 4A-4B.

[0035] 4A-4B depict an exemplary method 400 for achieving improved etch selectivity using halides, according to some embodiments. Method 400 may be performed in an electronic device processing system. More particularly, method 400 may be performed in one or more process chambers (e.g., etch chambers) of the electronic device processing system.

[0036] In step 410, a first dry etching step is performed to remove a portion of a first layer of the stack of alternating layers. More specifically, the portion of the first layer can correspond to a specific area to be etched. The first layer can include a first material. In some embodiments, the first material includes Si, and the first layer is a Si layer. In some embodiments, the first dry etching step is a low-selectivity etch.

[0037] In step 420, a second dry etching step is performed to remove the remaining portion of the first layer and a portion of the second layer of the stack. The second layer can include a second material. In some embodiments, the second material includes SiGe and the second layer is a SiGe layer.

[0038] In step 430, a third dry etching step is performed to remove the remaining portions of the second layer. In some embodiments, the third dry etching step is a highly selective etch with respect to the second material.

[0039] 4B, performing the second etching step in step 420 may include performing a first dry etching process of the second dry etching step to remove the first material from the remaining portion of the first layer in step 422. More particularly, the first dry etching process may be performed using a plasma etchant that results in the formation of by-products (e.g., F6GeH8N2 on a SiGe surface) that form an initial passivation layer on the surface of the second material.

[0040] In step 424, it is determined whether the first material of the remaining portion of the first layer remains. If not, this means that the second etching step is complete and the process is terminated (i.e., the process can proceed to step 430 of FIG. 4A to perform a third dry etching step to remove the remaining portion of the second layer). Otherwise, to protect the second material during the subsequent etching process, a halide gas is introduced in step 426 after performing the first dry etching process. The halide gas can interact with the by-products and the surface of the second material to strengthen the initial passivation layer (e.g., GeF4 interacts with F6GeH8N2 and Ge on the SiGe surface). In some embodiments, introducing the halide gas at least partially repairs the initial passivation layer on the surface of the second material. For example, introducing the halide gas can replenish the initial passivation layer on the surface of the second material. The process can then return to step 422 to perform another dry etching process. Because the halide gas exposure strengthened the passivation layer, the surface of the second material is protected during the dry etching process, which can maintain or enhance etch selectivity during the dry etching process. Further details regarding steps 410-430 are described above with reference to Figures 1-3.

[0041] 5A-5C are tables illustrating exemplary etch process windows, according to some embodiments. For example, FIG. 5A is table 500A illustrating an exemplary highly selective etch having high selectivity to a first material. For example, the first material can be Si. The highly selective etch can employ a gas mixture. In some embodiments, as shown, the gas mixture includes CF4, NF3, H2, N2, and Ar. The highly selective etch can be performed at a pressure. In some embodiments, as shown, the pressure ranges from about 1 milliTorr (mTorr or mT) to about 50 mTorr. The highly selective etch can be performed at a source power. In some embodiments, as shown, the source power ranges from about 600 watts (W) to about 1000 W. An electrostatic chuck (ESC) that holds the substrate during the highly selective etch can have a temperature. In some embodiments, as shown, the temperature can range from about 35° C. to about 75° C.

[0042] FIG. 5B is a table 500B illustrating an exemplary low-selectivity etch having low selectivity with respect to a first material and a second material. For example, the first material can be Si and the second material can be SiGe. The low-selectivity etch process can employ a gas mixture. In some embodiments, the gas mixture includes Cl, NF, HBr, O, and Ar, as shown. The low-selectivity etch can be performed at a pressure. In some embodiments, the pressure ranges from about 1 mTorr to about 50 mTorr, as shown. The low-selectivity etch can be performed at a source power. In some embodiments, the source power ranges from about 600 W to about 1000 W, as shown. The ESC, which holds the substrate during the low-selectivity etch, can have a temperature. In some embodiments, the temperature can range from about 35° C. to about 75° C., as shown.

[0043] 5C is a table 500C illustrating an example outline of an etching process for etching a first material and a second material. For example, the first material can be Si and the second material can be SiGe. The etching process can include several steps, including a low-selectivity etch, a high-selectivity etch to the first material, a high-selectivity etch to the second material, and etch mask removal.

[0044] The low-selectivity etch can have a gas mixture. In some embodiments, as shown, the gas mixture includes Cl, NF, HBr, O, and Ar. The low-selectivity etch can be performed for an amount of time. In some embodiments, the amount of time ranges from about 8 seconds (s) to about 12 seconds (s), as shown. The low-selectivity etch can be performed at a pressure. In some embodiments, the pressure ranges from about 1 mTorr to about 50 mTorr, as shown. The low-selectivity etch process can be performed at a source power. In some embodiments, the source power ranges from about 600 W to about 1000 W. For example, as shown, the source power can be about 980 W. The low-selectivity etch process can be performed at a bias power. In some embodiments, the bias power ranges from about 100 W to about 500 W. For example, as shown, the bias power can be about 210 W. The ESC, which holds the substrate during the low-selectivity etch process, can have a temperature. In some embodiments, as indicated, the temperature can range from about 35°C to about 75°C.

[0045] The highly selective etch to the first material can have a gas mixture. In some embodiments, as shown, the gas mixture includes CF4, NF3, H2, N2, and Ar. The highly selective etch to the first material can be performed for an amount of time. In some embodiments, as shown, the amount of time ranges from about 3 seconds to about 7 seconds. The highly selective etch to the first material can be performed at a pressure. In some embodiments, as shown, the pressure ranges from about 1 mTorr to about 50 mTorr. The highly selective etch to the first material can be performed at a source power. In some embodiments, the source power ranges from about 600 W to about 1000 W. For example, as shown, the source power can be about 1000 W. The highly selective etch to the first material can be performed at a bias power. In some embodiments, as shown, the bias power is about 0 W. The ESC, which holds the substrate during the highly selective etch to the first material, can have a temperature. In some embodiments, as indicated, the temperature can range from about 35°C to about 75°C.

[0046] The highly selective etch to the second material can have a gas mixture. In some embodiments, as shown, the gas mixture includes CF4, O2, and He. The highly selective etch to the second material can be performed for an amount of time. In some embodiments, as shown, the amount of time ranges from about 3 seconds to about 7 seconds. The highly selective etch to the second material can be performed at a pressure. In some embodiments, as shown, the pressure ranges from about 50 mTorr to about 100 mTorr. The highly selective etch to the second material can be performed at a source power. In some embodiments, the source power ranges from about 600 W to about 1000 W. For example, as shown, the source power can be about 600 W. The highly selective etch to the second material can be performed at a bias power. In some embodiments, as shown, the bias power is about 100 W. The ESC, which holds the substrate during the highly selective etch to the second material, can have a temperature. In some embodiments, as indicated, the temperature can range from about 35°C to about 75°C.

[0047] The etch mask removal can have a gas mixture. In some embodiments, as shown, the gas mixture includes NF3, O2, N2, and He. The etch mask removal can be performed for an amount of time. In some embodiments, the amount of time ranges from about 10 seconds to about 30 seconds, as shown. The etch mask removal can be performed at a pressure. In some embodiments, the pressure ranges from about 50 mTorr to about 100 mTorr, as shown. The etch mask removal can be performed at a source power. In some embodiments, the source power ranges from about 1000 W to about 3000 W. For example, as shown, the source power can be about 2500 W. The etch mask removal can be performed at a bias power. In some embodiments, as shown, the bias power is about 0 W. The ESC, which holds the substrate during the highly selective etch to the second material, can have a temperature. In some embodiments, as shown, the temperature can range from about 35° C. to about 75° C.

[0048] 6 is a diagram 600 illustrating a top-down view of an exemplary process for achieving improved etch selectivity using halides, according to some embodiments. As shown, an initial substrate 610A is provided, including a first material 612 and a second material 614 (not shown in 610A) below the first material 612. In some embodiments, the first material 612 is Si and the second material 614 is SiGe. In step 602, a first portion of the first material 612 is removed using a dry etching process to expose the second material 614 below the first portion of the first material 612. Because not all of the first material 612 is removed, in step 604, a second portion of the first material 612 is removed using a dry etching process to expose the second material 614 below the second portion of the first material 612. Because not all of the first material 612 is removed, in step 606, a third portion of the first material 612 is removed using a dry etching process to expose the second material 614 underlying the third portion of the first material 612. During one or more of the etching processes 602-606, a halide gas may be introduced to strengthen a passivation layer formed on the exposed second material 614. The passivation layer may protect the second material 614 from being etched during the dry etching process to remove the first material 612, which may improve the selectivity of the dry etching process to the first material 612.

[0049] The above description has set forth numerous specific details, such as examples of particular systems, components, methods, etc., to provide a thorough understanding of some embodiments of the present disclosure. However, it will be apparent to those skilled in the art that at least some embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known components or methods have not been described in detail or have been presented in simple block diagram format to avoid unnecessarily obscuring the present disclosure. Thus, the specific details described are for illustrative purposes only. Particular implementations may differ from these example details and still be considered to be within the scope of the present disclosure.

[0050] References throughout this specification to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment. Thus, the appearances of the phrase "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. In addition, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or." When the term "about" or "approximately" is used herein, it is intended to mean that the stated nominal value is accurate to within ±10%.

[0051] Although the operations of the methods herein are shown and described in a particular order, the order of the operations of each method may be changed such that some operations may be performed in reverse order or such that some operations may be performed at least partially concurrently with other operations. In alternative embodiments, instructions of separate operations or sub-operations may be intermittent and / or interleaved.

[0052] It is to be understood that the above description is intended to be illustrative, and not restrictive. Many other embodiments will be apparent to those skilled in the art upon reading and understanding the above description. The scope of the present disclosure should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. performing a dry etching process to remove a portion of a first layer disposed on a second layer of a stack of alternating layers, the first layer including a first material and the second layer including a second material different from the first material, the dry etching process forming a passivation layer including by-products on a surface of the second material, and an amount of the first material of the portion of the first layer remaining after performing the dry etching process; introducing a halide gas to strengthen the passivation layer on the surface of the second material; A method comprising:

2. 10. The method of claim 1, further comprising, after introducing the halide gas, performing a second dry etching process to remove a second portion of the first layer.

3. The method of claim 1 , wherein the second material comprises germanium (Ge).

4. The method of claim 3 , wherein the second material is silicon germanium (SiGe).

5. The method of claim 3 , wherein the first material is silicon (Si).

6. The halide gas is germanium tetrafluoride (GeF ４ 4. The method of claim 3, comprising:

7. The passivation layer is made of ammonium hexafluorogermanate (F ６ GeH ８ N ２ 4. The method of claim 3, comprising:

8. 10. The method of claim 1, further comprising performing a first dry etching step to form the portion of the first layer, the dry etching process being performed after the first dry etching step as part of a second dry etching step.

9. 9. The method of claim 8, further comprising performing a third dry etching step to remove remaining portions of the second layer.

10. 10. The method of claim 9, wherein the first dry etching step, the second dry etching step, and the third dry etching step are performed to form a staircase structure of an electronic device.

11. The method of claim 10 , wherein the electronic device comprises a three-dimensional dynamic random access memory (3D DRAM) device.

12. forming a staircase structure of an electronic device from a base structure comprising an etching mask disposed on a stack of alternating layers, the stack of alternating layers comprising a first layer comprising a first material disposed on a second layer comprising a second material different from the first material, and forming the staircase structure includes: performing a first dry etching step to remove a portion of the first layer from an area; performing a second dry etching step to remove remaining portions of the first layer from the region, the performing the second dry etching step including: performing a dry etching process to form a passivation layer including by-products on a surface of the second material; and introducing a halide gas to strengthen the passivation layer on the surface of the second material. forming a staircase structure of an electronic device, A method comprising:

13. 13. The method of claim 12, wherein an amount of said portion of said first layer remains after performing said dry etching process.

14. The method of claim 12 , wherein the second material comprises germanium (Ge).

15. The method of claim 14, wherein the second material is silicon germanium (SiGe).

16. The method of claim 14, wherein the first material is silicon (Si).

17. The halide gas is germanium tetrafluoride (GeF ４ 15. The method of claim 14, comprising:

18. The passivation layer is made of ammonium hexafluorogermanate (F ６ GeH ８ N ２ 15. The method of claim 14, comprising:

19. 13. The method of claim 12, wherein forming the staircase structure further comprises performing a third dry etching step to remove remaining portions of the second layer from the region.

20. 13. The method of claim 12, wherein the electronic device comprises a three-dimensional dynamic random access memory (3D DRAM) device.

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