Oscillator circuit with open-loop frequency modulation

Abstract

The oscillator circuit (200) includes a ring oscillator (202) and a ramp generator (204). The ring oscillator (202) includes a first inverter (214) and a second inverter (218). The first inverter (214) has a first inverter input, a first inverter output, and a first power terminal. The second inverter (218) has a second inverter input, a second inverter output, and a second power terminal. The second inverter input is coupled to the first inverter output, and the second inverter output is coupled to the first inverter input. The ramp generator circuit (204) has a ramp output coupled to the first power terminal and the second power terminal.

Description

[Technical Field]

[0001] Many electronic circuits are powered by multiple power supply voltages. When the power supply voltages are lightly loaded (e.g., the load circuit draws a relatively low current), a charge pump circuit can be used to generate the power supply voltages. For example, in a circuit that applies a positive power supply voltage and a negative power supply voltage, a charge pump circuit can be used to generate a negative power supply voltage from the positive power supply voltage when the negative power supply voltage is lightly loaded. A charge pump circuit uses a switched isolation capacitor to convert an input voltage to an output voltage that can be higher than the input voltage or negative relative to the input voltage. In a charge pump circuit, switches coupled to the capacitors are operated sequentially to first charge the capacitor from the input voltage and then transfer the charge to the output. A clock signal used to open and close the charge pump switches can be provided by an oscillator circuit. Summary of the Invention

[0002] Described herein is an oscillator using open-loop frequency modulation suitable for use with a charge pump circuit. In one example, the oscillator includes a ring oscillator and a ramp generator. The ring oscillator includes a first inverter and a second inverter. The first inverter has a first inverter input, a first inverter output, and a first power terminal. The second inverter has a second inverter input, a second inverter output, and a second power terminal. The second inverter input is coupled to the first inverter output, and the second inverter output is coupled to the first inverter input. The ramp generator circuit has a ramp output coupled to the first power terminal and the second power terminal.

[0003] In another example, a circuit includes a charge pump and an oscillator circuit. The charge pump circuit has an oscillator input. The oscillator circuit has an oscillator output coupled to the oscillator input. The oscillator circuit includes a ring oscillator and a ramp generator circuit. The ring oscillator has a power terminal. The ramp generator circuit has a ramp output coupled to the power terminal. The ramp generator circuit is configured to modulate a current provided at the power terminal.

[0004] In a further example, a battery system includes a battery cell and a cell monitor circuit. The cell monitor circuit is coupled to the battery cell. The cell monitor circuit is configured to monitor the voltage of the battery cell. The cell monitor circuit includes a charge pump and an oscillator circuit. The charge pump circuit has an oscillator input. The oscillator circuit has an oscillator output coupled to the oscillator input. The oscillator circuit includes a ring oscillator and a ramp generator circuit. The ring oscillator includes an odd number of inverters coupled in series. The ramp generator is coupled to the ring oscillator. The ramp generator circuit is configured to provide a ramp signal used to modulate a current provided to power the inverter. [Brief explanation of the drawings]

[0005] [Figure 1] FIG. 1 is a block diagram of an example oscillator with open-loop frequency modulation.

[0006] [Figure 2] FIG. 1 is a schematic diagram of an example oscillator circuit with open-loop frequency modulation.

[0007] [Figure 3] 2 is a graph of exemplary electromagnetic emissions of the oscillator circuit of FIG. 1 and a fixed frequency oscillator circuit.

[0008] [Figure 4] FIG. 2 is a block diagram of an example battery system including a charge pump clocked by the oscillator of FIG. 1. DETAILED DESCRIPTION OF THE INVENTION

[0009] The switching of the charge pump generates charging and discharging currents. These currents create periodic current peaks on the power supply conductors, resulting in undesirable electromagnetic emissions (electromagnetic interference (EMI)) at the fundamental and harmonics of the switching frequency. Spread-spectrum techniques can be used to reduce EMI, and some clock generation circuits use a closed-loop phase-locked loop (PLL) architecture to implement spread-spectrum clocking. However, PLL clock generators require a reference clock (e.g., a crystal oscillator) that is unavailable in many applications.

[0010] Charge pumps used in some applications (e.g., automotive battery monitoring applications) do not have stringent jitter or drift specifications for clock timing charge pump switching. Because clock timing specifications in such applications can be relatively relaxed, complex clock generation circuits such as PLLs may not be required. The oscillator circuit described herein simplifies the generation of spread-spectrum clocks by using a ramp generator to control the frequency of a ring oscillator. The ring oscillator may be implemented as a current-starved, inverter-based voltage-controlled oscillator. The ramp generator modulates the clock provided by the ring oscillator. The oscillator circuit is open-loop and does not use a crystal oscillator or other reference clock. Charge pumps using oscillator circuits can provide up to 25 dB of emissions reduction on the charge pump power supply.

[0011] 1 is a block diagram of an example oscillator 100 with open-loop frequency modulation. The oscillator circuit 100 includes a ring oscillator 102, a ramp generator circuit 104, a current control circuit 106, and a current control circuit 108. The ring oscillator 102 provides a clock signal (CLK). The ring oscillator 102 includes multiple inverters connected to form a "ring." The output of each inverter is connected to the input of the subsequent inverter, with the output of the last inverter in the chain connected to the input of the first inverter in the chain. CLK has a frequency determined by the delay of the inverters.

[0012] A current control circuit 106 is coupled between a power supply terminal 110 and a power terminal of the ring oscillator 102. The power terminal of the ring oscillator 102 is coupled to a current output of the current control circuit 106. The current control circuit 106 controls the flow of current from the power supply terminal to the ring oscillator 102. A current control circuit 108 is coupled between a ground terminal 112 and a reference terminal of the ring oscillator 102. The reference terminal of the ring oscillator 102 is coupled to a current input of the current control circuit 108. The current control circuit 108 controls the flow of current from the ring oscillator 102 to ground. By controlling the current flowing through the ring oscillator 102, the current control circuit 106 and the current control circuit 108 control the voltage supplying the inverter of the ring oscillator 102 and the delay of the inverter. Increasing the current flowing through the ring oscillator 102 decreases the delay of the inverter and increases the frequency of CLK. Decreasing the current flowing through the ring oscillator 102 increases the delay of the inverter and decreases the frequency of CLK. Current control circuit 106 and current control circuit 108 may include a variable resistor (eg, a resistor implemented by a field effect transistor (FET)) to set the current flowing through ring oscillator 102 .

[0013] The ramp generator circuit 104 is coupled to the current control circuit 106 and the current control circuit 108. The ramp generator circuit 104 generates a control signal (RAMP) that controls the current control circuit 106, the current control circuit 108, and the current flowing therethrough. RAMP can be a triangular, sinusoidal, or other shaped signal that varies to change the frequency of CLK. The amplitude of RAMP determines the range of current provided to the ring oscillator 102, which in turn determines the frequency range of CLK. Therefore, the frequency range of CLK is determined by the amplitude of RAMP. The period of RAMP determines the rate of change of CLK.

[0014] The CLK provided by oscillator circuit 100 may be used to clock a charge pump circuit. Varying the frequency of CLK spreads the noise created by switching in the charge pump circuit over a relatively wide band, thereby reducing the noise power at a given frequency.

[0015] Some implementations of oscillator circuit 100 may include only one of current control circuit 106 or current control circuit 108. For example, the power terminal of ring oscillator 102 may be connected to power supply terminal 110 rather than being coupled to power supply terminal 110 via current control circuit 106. Alternatively, the reference terminal of ring oscillator 102 may be connected to a ground terminal rather than being coupled to the ground terminal via current control circuit 108.

[0016] FIG. 2 is a schematic diagram of an example oscillator circuit 200 with open-loop frequency modulation. The oscillator circuit 200 is one implementation of the oscillator circuit 100. The oscillator circuit 200 includes a ring oscillator 202, a ramp generation circuit 204, a current mirror circuit 206, a current mirror circuit 208, a transistor 210, and a resistor 212. The ring oscillator 202 is one implementation of the ring oscillator 102. The ring oscillator 202 includes an odd number of inverters coupled in series to form a ring. Although inverters 214, 216, and 218 are shown in FIG. 2, the ring oscillator 202 may include more than two inverters. The input of the inverter 214 (inverter input) is coupled to the output of the inverter 218 (inverter output). CLK is provided to the output of the inverter 218. The input of the inverter 216 is coupled to the output of the inverter 214. The input of inverter 218 is coupled to the output of inverter 216 via any even number (e.g., 0, 2, 4, 6, etc.) of series-coupled intervening inverters. Each inverter of ring oscillator 202 includes a power terminal (inverter power terminal) and a reference terminal. The power terminal is coupled to current mirror circuit 206, and the reference terminal is coupled to current mirror circuit 208.

[0017] Current mirror circuit 206 is an example of current control circuit 106, and current mirror circuit 208 is an example of current control circuit 108. Current mirror circuit 208 includes a control transistor 228 and mirror transistors 230, 232, 234, and 236. Control transistor 228 is diode-connected, and a control terminal (e.g., gate) of each of mirror transistors 230, 232, 234, and 236 is coupled to a control terminal (e.g., gate) of control transistor 228. In practice, current mirror circuit 208 may include a mirror transistor for sinking current flowing from each inverter of ring oscillator 202. The current flowing in control transistor 228 is mirrored (e.g., equal to or proportional to the current flowing in control transistor 228) in each of mirror transistors 230, 232, 234, and 236. The control transistor 228 and the mirror transistors 230, 232, 234, and 236 may be n-channel field effect transistors (NFETs).

[0018] The current mirror circuit 206 includes a control transistor 220 and mirror transistors 222, 224, and 226. The control transistor 220 is diode-connected, and the control terminal (e.g., gate) of each of the mirror transistors 222, 224, and 226 is coupled to the control terminal (e.g., gate) of the control transistor 220. In practice, the current mirror circuit 206 may include a mirror transistor for sourcing current to each inverter of the ring oscillator 202. The current flowing through the control transistor 220 is mirrored (e.g., equal to or proportional to the current flowing through the control transistor 220) in each of the mirror transistors 222, 224, and 226. The current flowing through the control transistor 220 is controlled by a mirror transistor 230 of the current mirror circuit 208. The control transistor 220 and the mirror transistors 222, 224, and 226 may be p-channel field-effect transistors (PFETs).

[0019] The ramp generation circuit 204 is one implementation of the ramp generator circuit 104. The ramp generation circuit 204 includes a comparator 238, a capacitor 240, a switch 244, a switch 246, a current source 248, and a current source 250. An input of the current source 248 is coupled to the power supply terminal 110. A first terminal of the switch 244 is coupled to the output of the current source 248, and a second terminal of the switch 244 is coupled to the top plate of the capacitor 240. A control input of the switch 244 is coupled to the comparator output. An output of the current source 250 is coupled to the ground terminal. A first terminal of the switch 246 is coupled to the input of the current source 250, and a second terminal of the switch 246 is coupled to the top plate of the capacitor 240. A control input of the switch 246 is coupled to the output of the comparator 238.

[0020] A first input (comparator input) of comparator 238 is coupled to the top plate of capacitor 240. A second input (comparator input) of comparator 238 is coupled to a reference voltage circuit (e.g., a bandgap circuit). Comparator 238 compares the voltage on the top plate of capacitor 240 (RAMP) to a reference voltage received from the reference voltage circuit. If the voltage on the top plate of capacitor 240 is greater than the reference voltage (e.g., greater than the reference voltage by a predetermined hysteresis voltage), comparator 238 provides an output voltage that opens switch 244 and closes switch 246. If the voltage on the top plate of capacitor 240 is less than the reference voltage (e.g., less than the reference voltage by a predetermined hysteresis voltage), comparator 238 provides an output voltage that closes switch 244 and opens switch 246.

[0021] When switch 244 is closed and switch 246 is open, current flows from current source 248, charging capacitor 240 and increasing the voltage on the top plate of capacitor 240. When switch 246 is closed and switch 244 is open, capacitor 240 is discharged through current source 250 and the voltage on the top plate of capacitor 240 decreases. The current sourced by current source 248 may be the same as the current sunk by current source 250. Therefore, voltage RAMP may increase or decrease in forming a triangular wave ramp signal.

[0022] The ramp generation circuit 204 controls the current flowing through the ring oscillator 202 via transistor 210. The top plate of capacitor 240 is coupled to the control terminal (e.g., gate) of transistor 210. A first current terminal (e.g., source) of transistor 210 is coupled to the power supply terminal 110 via resistor 212. A second current terminal (e.g., drain) of transistor 210 is coupled to the current mirror circuit 208 (control transistor 228). Transistor 210 may be a PFET. As the voltage on RAMP decreases, the current flowing through transistor 210 increases. As the voltage on RAMP increases, the current flowing through transistor 210 decreases. The current flowing through transistor 210 is mirrored in the current flowing through mirror transistors 222, 224, 226, 232, 234, and 236, varying the current flowing through ring oscillator 202 and changing the frequency of ring oscillator 202. The range of the RAMP voltage and the corresponding range of the CLK frequency may vary across implementations of oscillator circuit 200. For example, in one implementation of oscillator circuit 200, the RAMP voltage may vary by approximately + / - 6.5% (e.g., from 500 millivolts to 570 millivolts) and the CLK frequency may vary by approximately + / - 12% (e.g., from 37 megahertz (MHz) to 47 MHz).

[0023] 3 is a graph of example electromagnetic emissions for one implementation of a charge pump circuit using oscillator circuit 100 and one implementation of a charge pump circuit using a fixed-frequency oscillator circuit. In FIG. 3, the x-axis of the graph represents frequency (Hz), and the y-axis of the graph represents the magnitude of emissions in decibels (dB). Emissions 302 are generated by a charge pump circuit using one implementation of oscillator circuit 100, and emissions 304 are generated by a charge pump circuit using a 32 MHz fixed-frequency oscillator. The graph shows that emissions 302 are more than 25 dB lower than emissions 304 (e.g., 26.65 dB lower in FIG. 3).

[0024] 4 is a block diagram of an example battery system 400 including a charge pump clocked by one implementation of oscillator circuit 100. The battery system 400 includes a battery cell 402, a cell monitor circuit 404, and a battery management circuit 406. The battery cell 402 may be a lithium-ion battery cell, a lithium polymer battery cell, or any other type of battery cell. The cell monitor circuit 404 is coupled to the battery cell 402. The cell monitor circuit 404 may monitor the voltage of the battery cell 402. For example, circuit elements of the cell monitor circuit 404 may sample and digitize the voltage of the battery cell 402. In some examples, the cell monitor circuit 404 may be coupled to multiple battery cells and may measure the voltages of the multiple battery cells. The cell monitor circuit 404 is coupled to the battery management circuit 406. The cell monitor circuit 404 may provide battery voltage measurements to the battery management circuit 406 for use in managing the battery cell 402. For example, the battery management circuitry 406 may adjust the current drawn from the battery cells 402 based on the voltage measurements provided by the cell monitor circuitry 404 .

[0025] The cell monitor circuit 404 includes a charge pump circuit 408 and an oscillator circuit 100 coupled to the charge pump circuit 408. The oscillator circuit 100 provides a clock signal used to operate the charge pump circuit 408. The charge pump circuit 408 may provide a boosted voltage used in the cell monitor circuit 404, for example, to a controlled switch (e.g., NFETS) that switches the voltage of the battery cell 402 within the cell monitor circuit 404. By clocking the charge pump circuit 408 with the oscillator circuit 100, the cell monitor circuit 404 can substantially reduce EMI generated by the charge pump circuit 408 without using a complex PLL and associated crystal oscillator.

[0026] Battery system 400 may be used to reduce EMI in electric vehicles, power tools, or other battery-powered systems.

[0027] In this description, the term "couple" may encompass a connection, communication, or signal path that enables a functional relationship consistent with this description. For example, if device A generates a signal that controls device B to perform a certain action, then (a) in a first example, device A is coupled to device B by a direct connection, or (b) in a second example, device A is coupled to device B via an intervening component C such that device B is controlled by device A via a control signal generated by device A, where intervening component C does not change the functional relationship between device A and device B.

[0028] Also, as used herein, the phrase "based on" means "based at least in part on." Thus, if X is based on Y, X can be a function of Y and any number of other factors.

[0029] A device that is "configured to" perform a certain task or function may be configured (e.g., programmed and / or hardwired) by a manufacturer at the time of manufacture to perform that function and / or may be configurable (or reconfigurable) by a user after manufacture to perform that function and / or other additional or alternative functions. Such configuration may be via firmware and / or software programming of the device, via the configuration and / or layout of hardware components, via the device's interconnections, or via a combination thereof.

[0030] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" are used interchangeably. Unless otherwise noted, these terms are used generally to refer to an interconnection between, or termination of, a device element, circuit element, integrated circuit, device, or other electronic or semiconductor component.

[0031] A circuit or device described herein as including particular components may instead be coupled to those components and adapted to form the described circuit or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and / or inductors), and / or one or more sources (such as voltage and / or current sources) may instead include only the semiconductor elements in a single physical device (e.g., a semiconductor die and / or integrated circuit (IC) package) and may be adapted to be coupled to at least some of the passive elements and / or sources during or after manufacture, e.g., by an end user and / or third party, to form the described structure.

[0032] Although the use of particular transistors is described herein, other transistors (or equivalent devices) can be substituted with little or no change to the remaining circuit elements. For example, field effect transistors (“FETs”) (e.g., n-channel FETs (NFETs) or p-channel FETs (PFETs)), bipolar junction transistors (BJTs—e.g., NPN or PNP transistors), insulated gate bipolar transistors (IGBTs), and / or junction field effect transistors (JFETs) can be used in place of or in conjunction with the devices described herein. The transistors can be depletion-mode devices, drain-extension devices, enhancement-mode devices, natural transistors, or other types of device structure transistors. Additionally, the devices can be implemented in / on silicon substrates (Si), silicon carbide substrates (SiC), gallium nitride substrates (GaN), or gallium arsenide substrates (GaAs).

[0033] In the claims, reference may be made to a transistor's control input and its current terminals. In the context of a FET, the control input is the gate and the current terminals are the drain and source. In the context of a BJT, the control input is the base and the current terminals are the collector and emitter.

[0034] As used herein, a FET is "on" means that a conducting channel for the FET exists and that a drain current can flow through the FET. As used herein, a FET is "off" means that a conducting channel does not exist and therefore no drain current can flow through the FET. However, an "off" FET may still have current flowing through the body diode of the transistor.

[0035] The circuits described herein are reconfigurable to include additional or different components to provide functionality at least partially similar to that available before the component was replaced. A component shown as a resistor, unless otherwise noted, generally represents any one or more elements coupled in series and / or parallel to provide the amount of impedance represented by the depicted resistor. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as the single resistor or capacitor.

[0036] While certain elements of the described examples are included in an integrated circuit and others are external to the integrated circuit, in other examples, additional or fewer features may be incorporated into the integrated circuit. Also, some or all of the features illustrated as being external to the integrated circuit may be included in the integrated circuit, and / or some features illustrated as being internal to the integrated circuit may be incorporated outside the integrated circuit. As used herein, the term "integrated circuit" means one or more circuits that are (1) incorporated within / on a semiconductor substrate, (2) incorporated within a single semiconductor package, (3) incorporated within the same module, and / or (4) incorporated within / on the same printed circuit board.

[0037] Use of the term "ground" in the foregoing description includes chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection applicable to or suitable for the teachings herein. Unless otherwise stated herein, "about," "approximately," or "substantially" preceding a parameter means within + / - 10% of the parameter, or, if the parameter is zero, a reasonable range of values ​​around zero.

[0038] Modifications may be made to the exemplary embodiments described, and other embodiments are possible, within the scope of the claims of the invention.

Claims

1. 1. An oscillator circuit comprising: A ring oscillator; a ramp generator circuit; Including, The ring oscillator comprises: a first inverter having a first inverter input, a first inverter output, and a first power terminal; a second inverter having a second inverter input, a second inverter output, and a second power terminal; Including, the second inverter input is coupled to the first inverter output, and the second inverter output is coupled to the first inverter input; the ramp generator circuit includes a ramp output coupled to the first power terminal and the first inverter input; Oscillator circuit.

2. 2. The oscillator circuit of claim 1, the ring oscillator includes a third inverter having a third inverter input, a third inverter output, and a third power terminal; the third inverter input is coupled to the first inverter output; the third inverter output is coupled to the second inverter input; the third power terminal is coupled to a lamp output; Oscillator circuit.

3. 2. The oscillator circuit of claim 1, further comprising a current mirror circuit; The current mirror circuit a first transistor including a first control terminal, the first transistor coupled between a power supply terminal and the first power terminal, the first control terminal coupled to the lamp output; a second transistor including a second control terminal, the second transistor coupled between the power supply terminal and the second power terminal, the second control terminal coupled to the lamp output; Including, Oscillator circuit.

4. 2. The oscillator circuit of claim 1, the first inverter includes a first reference terminal; the second inverter includes a second reference terminal; the oscillator circuit includes a current mirror circuit; The current mirror circuit a first transistor including a first control terminal, the first transistor coupled between a ground terminal and the first reference terminal, the first control terminal coupled to the lamp output; a second transistor including a second control terminal, the second transistor coupled between the ground terminal and the second reference terminal, the second control terminal coupled to the lamp output; Including, Oscillator circuit.

5. 2. The oscillator circuit of claim 1, the ramp generator circuit a comparator having a first comparator input, a second comparator input, and a comparator output; the first comparator input is coupled to the lamp output; the comparator, the second comparator input coupled to a reference voltage circuit; a first switch coupled between a power supply terminal and the first comparator input, the first switch having a first control input coupled to the comparator output; a second switch coupled between a ground terminal and the first comparator input, the second switch having a second control input coupled to the comparator output; 1. An oscillator circuit comprising:

6. 6. An oscillator circuit according to claim 5, the ramp generator circuit a first current source coupled between the power supply terminal and the first switch; a second current source coupled between the ground terminal and the second switch; 1. An oscillator circuit comprising:

7. 6. An oscillator circuit according to claim 5, The oscillator circuit further includes a capacitor coupled between the ground terminal and the first comparator input.

8. 6. An oscillator circuit according to claim 5, The oscillator circuit further includes a transistor coupled between the power supply terminal and the ground terminal, the transistor having a control terminal coupled to the first comparator input.

9. A circuit comprising: a charge pump circuit having an oscillator input; an oscillator circuit having an oscillator output coupled to the oscillator input; Including, the oscillator circuit a ring oscillator having a power terminal; a lamp generator circuit having a lamp output coupled to the power terminal; Including, the ramp generator circuit is configured to modulate the current provided to the power terminals; circuit.

10. 10. The circuit of claim 9, wherein the oscillator circuit includes an odd number of inverters coupled in series, the inverters including inverter power terminals coupled to the power terminal.

11. 10. The circuit of claim 9, the oscillator circuit includes a current mirror circuit connected between a power supply terminal and the ring oscillator; The current mirror circuit a control terminal coupled to the lamp output; a current output coupled to the power terminal; Including, The current mirror circuit is configured to modulate the current provided at the current output based on a ramp signal received at the control terminal. circuit.

12. 10. The circuit of claim 9, the ring oscillator includes a reference terminal; the oscillator circuit a current mirror circuit coupled between a ground terminal and the ring oscillator; The current mirror circuit a control terminal coupled to the lamp output; a current input coupled to the reference terminal; wherein the current mirror circuit is configured to modulate the current received at the current input based on a ramp signal received at the control terminal. circuit.

13. 10. The circuit of claim 9, wherein the ramp generator circuit is configured to provide a triangular ramp signal to modulate the current provided at the power terminals.

14. 10. The circuit of claim 9, the ramp generator circuit a comparator having a comparator input and a comparator output; a capacitor having a top plate coupled to the comparator input and the comparator output; Including, the comparator is configured to control charging and discharging of the capacitor to provide a ramp signal at the top plate. circuit.

15. 15. The circuit of claim 14, the ramp generator circuit a current source having a current input and a current output, the current input coupled to a power supply terminal; a switch coupled between the current output and the top plate; Including, the switch having a control input coupled to the comparator output and configured to control charging of the capacitor; circuit.

16. 15. The circuit of claim 14, the ramp generator circuit a current source having a current input and a current output, the current output coupled to a ground terminal; a switch coupled between the current input and the top plate; Including, the switch having a control input coupled to the comparator output and configured to control the discharge of the capacitor; circuit.

17. 1. A battery system comprising: A battery cell; a cell monitor circuit coupled to the battery cell; Including, the cell monitor circuit is configured to monitor the voltage of the battery cell; The cell monitor circuit a charge pump circuit having an oscillator input; an oscillator circuit having an oscillator output coupled to the oscillator input; Including, the oscillator circuit a ring oscillator including an odd number of inverters coupled in series; a ramp generator circuit coupled to the ring oscillator; Including, The battery system, wherein the ramp generator circuit is configured to provide a ramp signal used to modulate a current provided to power the inverter.

18. 18. The battery system of claim 17, the oscillator circuit a current mirror circuit coupled between a power supply terminal and the ring oscillator; The current mirror circuit a control terminal coupled to the ramp generator circuit; a current output coupled to the ring oscillator; Including, The battery system, wherein the current mirror circuit is configured to modulate the current provided to the ring oscillator based on the ramp signal received at the control terminal.

19. 20. The battery system of claim 18, the current mirror circuit is a first current mirror circuit; the oscillator circuit includes a second current mirror circuit coupled between a ground terminal and the ring oscillator; the second current mirror circuit includes a control terminal coupled to the ramp generator and a current input coupled to the ring oscillator, the current mirror circuit configured to modulate the current received at the current input based on the ramp signal received at the control terminal.

20. 20. The battery system of claim 19, the ramp generator circuit a comparator having a comparator input and a comparator output; a capacitor having a top plate coupled to the comparator input and the comparator output; Including, the comparator is configured to control charging and discharging of the capacitor to provide the ramp signal at the top plate. Battery system.

Images