High electron mobility transistor and method for manufacturing the same

Abstract

Embodiments of the present invention provide a High Electron Mobility Transistor (HEMT) comprising: a first drain terminal; a gate terminal; a second drain terminal; a channel layer, part of which forms a first element together with the first drain terminal and the gate terminal, and part of which forms a second element together with the second drain terminal and the gate terminal; a first barrier layer that forms a first two-dimensional electron gas (2DEG) region at the interface with the channel layer within the first element; and a second barrier layer that forms a second two-dimensional electron gas region at the interface with the channel layer within the second element, wherein the physical properties of the first barrier layer and the second barrier layer are different from those of the first barrier layer.

Description

Technical Field

[0001] This embodiment relates to a high electron mobility transistor (HEMT) and a manufacturing technology thereof.

Background Art

[0002] All silicon power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) have an intrinsic body diode connected in parallel to the drain and the source. As is well known, a diode is a unidirectional conduction device in the forward bias state. Therefore, when a MOSFET operates in the fourth quadrant of the current-voltage (IV) graph, its body diode is in the forward bias state, which shows typical diode current-voltage (IV) characteristics when the gate bias is 0 or negative, and shows resistive behavior with a positive gate bias value. Therefore, as a conduction control device, MOSFETs are mainly used in the first quadrant, i.e., for switching, amplification, etc. in most applications. In other words, silicon MOSFETs are unidirectional devices operating in the first quadrant.

[0003] During the past few decades, the power industry has begun to use gallium nitride (GaN: Gallium Nitride) materials in the fabrication of transistors due to the high energy bandgap and high electron mobility of the transistors. This enables high performance of the transistors. GaN-based transistors are called high electron mobility transistors (HEMTs) and provide low on-resistance of the transistors. Such composite transistor types have many advantages such as high switching frequency, high power density, high thermal conductivity, etc., and have become one of the major emerging devices in power electronics, providing many benefits with efficient system design and small footprints.

[0004] Unlike silicon transistors, GaN HEMTs lack a body diode, and their current conduction occurs through a two-dimensional electron gas (2DEG) layer several nanometers thick. The 2DEG emerges at the interface between the AlxGa1-xN barrier layer and the GaN channel layer due to the spontaneous piezoelectric polarization of the two layers.

[0005] There are several ways to adjust the surface charge density of a 2DEG. For example, one can change the mole fraction of aluminum in the barrier layer, or perform N-type doping in both layers. If a uniform epitaxial layer is used and the same layout dimensions are applied to the entire drain and source region, the GaN HEMT will have the same IV curve in the first and third quadrants, but in opposite directions. That is, these curves are symmetric with respect to the origin in its IV system. In this sense, the GaN HEMT is a bidirectional device, in contrast to a unidirectional silicon MOSFET.

[0006] When such devices are used for bidirectional conduction, there is no need to distinguish between the source and drain of the GaN HEMT. The transistor name can be simplified to bidirectional GaN (bi-GaN). In the case of bi-GaN, the first drain D1, the second drain D2, and the gate are labeled to indicate the three terminals of the transistor, and the D1 / D2 terminals become interchangeable if a uniform epitaxial layer and identical layout dimensions are used in the D1 and D2 regions.

[0007] On the other hand, several applications based on the bidirectional characteristics of GaN HEMTs are gaining popularity. Examples include OVP (overvoltage protection) circuits for smartphone charging and high-side load switching. The structure of bi-GaN HEMT devices is symmetrical in D1 and D2 and has the same high-voltage capability. As a result, the Ron of bi-GaN HEMTs is increased compared to unidirectional devices, which can be a challenge to using dual functions and limit performance when one of the functions requires a low Ron.

[0008] GaN HEMTs are also well known for their high material and process costs compared to silicon and other composite semiconductor processes. While their performance is very attractive, the high cost has been a major factor in the market's hesitation to make this technology a more commercial option. Reducing die size and improving packaging density are fundamental goals that are essential not only for performance but, more importantly, for this industry. [Overview of the project] [Problems that the invention aims to solve]

[0009] Against this backdrop, the objective of this embodiment is to provide a solution that improves on-resistance Ron performance, expands bi-GaN application programs, and provides a technology that enables die size reduction for better packaging density and lower die cost.

[0010] bi-GaN can offer solutions in new application areas that silicon transistors cannot achieve. For example, in functions such as bidirectional switching. In this case, one bi-GaN can replace two reverse-connected MOSFETs to achieve bidirectional switching in a common-source configuration, which simplifies the design and reduces chip size.

[0011] Through innovative gate driver design, bi-GaN can perform two different functions simultaneously. A common application of bi-GaN is to symmetrically arrange D1 and D2 around the gate, maintain the same drain extension distance to the gate, and maintain the same 2DEG density. However, the different performance characteristics of bi-GaN may differ depending on the specific application requirements for D1 and D2. For example, one function might be high-voltage switching in the first quadrant, while the other function might be reverse-voltage blocking in the third quadrant. A symmetrically designed bi-GaN may be able to satisfy one function well, but may compromise the other function, potentially limiting the overall performance.

[0012] Functionally, bi-GaN may face situations where the roles of D1 and D2 compete with each other and limit each other. For example, the high-voltage switching side may require high withstand voltage and switching capability, while the reverse-cutoff side may focus on voltage cutoff capability. The high-voltage switching side, with its high withstand voltage, yields a higher Ron. The Ron of the reverse-cutoff side is connected in series with the Ron of the high-voltage switching side. This additional Ron can negatively impact switching performance, especially in situations where Ron must be minimized on the high-switching and high-withstand voltage sides. Therefore, maintaining a good balance of the individual performance of bi-GaN across diverse modes becomes more challenging due to the different performance targets of the devices.

[0013] The solution here is to custom-configure the D1 and D2 2DEG using basic GaN device principles and essential fabrication elements to maximize performance on each side while simultaneously reducing device spacing and improving packaging density. [Means for solving the problem]

[0014] To achieve the aforementioned objective, one embodiment is a HEMT (High Electron Mobility Transistor) comprising a first drain terminal and a gate terminal, The present invention provides a HEMT comprising: a second drain terminal; a channel layer, part of which forms a first element together with the first drain terminal and the gate terminal, and the other part of which forms a second element together with the second drain terminal and the gate terminal; a first barrier layer that forms a first two-dimensional electron gas (2DEG) region at the interface with the channel layer within the first element; and a second barrier layer that forms a second two-dimensional electron gas region at the interface with the channel layer within the second element, wherein the physical properties of the first barrier layer and the second barrier layer are different from those of the first barrier layer.

[0015] The first element can operate as a voltage blocking element, and the second element can operate as a switching element.

[0016] The first barrier layer and the second barrier layer contain an AlGaN material, and the Al mole fractions in the first barrier layer and the second barrier layer can be different from each other.

[0017] Due to the difference in physical properties between the first barrier layer and the second barrier layer, the electron densities of the first two-dimensional electron gas region and the second two-dimensional electron gas region can be different from each other.

[0018] The electron density of the second two-dimensional electron gas region may be higher than the electron density of the first two-dimensional electron gas region.

[0019] The length between the first drain terminal and the gate terminal on the upper surface of the channel layer, and the length between the second drain terminal and the gate terminal, can be different from each other.

[0020] The doping concentrations in the first barrier layer and the second barrier layer can be different from each other.

[0021] The HEMT is of a horizontal type, with the channel layer positioned vertically below the first drain terminal, the gate terminal, and the second drain terminal, and arranged horizontally in the order of the first drain terminal, the gate terminal, and the second drain terminal, and a grounding plate may be positioned horizontally between the gate terminal and the second drain terminal.

[0022] The grounding plate is positioned between the gate terminal and the second drain terminal, but does not need to be positioned between the gate terminal and the first drain terminal.

[0023] Another embodiment is a HEMT (High Electron Mobility Transistor), comprising a first drain terminal, a gate terminal, a second drain terminal, a channel layer where a part thereof forms a first element together with the first drain terminal and the gate terminal, and another part thereof forms a second element together with the second drain terminal and the gate terminal, and a barrier layer that forms a two-dimensional electron gas (2DEG: Two-Dimensional Electron Gas) region at an interface with the channel layer and forms two-dimensional electron gas regions with different densities from each other in the first element and the second element.

[0024] The physical properties of the barrier layer in the first element and the physical properties of the barrier layer in the second element can be different from each other.

[0025] The barrier layer contains an AlGaN material, and the Al molar fraction of the AlGaN material in the first element and the second element can be different from each other.

[0026] The N-type doping concentration of the barrier layer in the first element and the second element can be different from each other.

[0027] The 2DEG density of the second element can be 1.5 times or more the 2DEG density of the first element.

[0028] The first element can operate as a voltage blocking element, and the second element can operate as a switching element.

[0029] Another embodiment provides a method for manufacturing a HEMT (High Electron Mobility Transistor), comprising the steps of: forming a channel layer in which a portion of the HEMT forms a first element together with a first drain terminal and a gate terminal, and the other portion forms a second element together with a second drain terminal and the gate terminal; forming a first barrier layer having first physical properties on the channel layer; forming the gate terminal on the first barrier layer; forming a first protective layer on the first barrier layer and the gate terminal; removing the first protective layer and the first barrier layer in the second element by etching; and laminating a second barrier layer having second physical properties on the etched portion of the first barrier layer to form a barrier layer including the first barrier layer and the second barrier layer having different physical properties.

[0030] The method for manufacturing the HEMT may further include the steps of: laminating a second barrier layer having second physical properties on an etched portion of the first barrier layer, then forming a second protective layer on the second barrier layer; forming an oxide film on the second protective layer; polishing the oxide film with the second protective layer as the endpoint; removing the first oxide film remaining on the first element from the oxide film; removing the second barrier layer and the second protective layer in the region of the oxide film excluding the portion protected by the second oxide film remaining on the second element; and removing the remaining second oxide film and the first protective layer.

[0031] The first barrier layer and the second barrier layer can be formed by metal-organic chemical vapor deposition (MOCVD).

[0032] The oxide film can be formed by plasma-enhanced chemical vapor deposition (PECVD).

[0033] The aforementioned polishing may be chemical mechanical planarization (CMP). [Effects of the Invention]

[0034] As described above, this embodiment provides a solution to improve on-resistance Ron performance, expands bi-GaN application programs, and offers a technology that enables die size reduction for better packaging density and lower die cost. [Brief explanation of the drawing]

[0035] [Figure 1] Figure 1 is a cross-sectional view of a HEMT according to one embodiment. [Figure 2] Figure 2 is a magnified view of the terminals and channel layer in a cross-section of a GaN HEMT according to one embodiment. [Figure 3] Figure 3 shows the configuration of a switching element according to one embodiment. [Figure 4] Figure 4 shows the configuration of a voltage blocking element according to one embodiment. [Figure 5] Figure 5 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 6] Figure 6 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 7] Figure 7 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 8] Figure 8 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 9] Figure 9 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 10] Figure 10 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 11] Figure 11 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 12] Figure 12 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 13] Figure 13 shows a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed. [Figure 14] Figure 14 is a graph showing the relationship between 2DEG density and on-resistance. [Figure 15] Figure 15 is a graph showing the relationship between 2DEG density and pressure resistance. [Modes for carrying out the invention]

[0036] Hereinafter, some embodiments of the present invention will be described in detail with reference to illustrative drawings. Note that in assigning reference numerals to the components in each drawing, the same component will be given the same reference numeral whenever possible, even if it is shown in other drawings. In addition, if a specific description of a related known configuration or function in the description of the present invention is deemed to obscure the gist of the present invention, such detailed description will be omitted.

[0037] Furthermore, when describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc., may be used. Such terms are used to distinguish a component from other components, and do not limit the properties, order, sequence, etc., of the component. When it is stated that a component is "connected," "joined," or "connected" to another component, it should be understood that the component may be directly connected or connected to the other component, but other components may also be "connected," "joined," or "connected" to each other.

[0038] Figure 1 is a cross-sectional view of a HEMT according to one embodiment.

[0039] Referring to Figure 1, a high-electron-mobility transistor (HEMT) can include a first drain terminal D1, a gate terminal GT, and a second drain terminal D2. For ease of explanation, the side where terminals D1, GT, and D2 are located is considered the upper side, and the side where the substrate layer 162 is formed is considered the lower side.

[0040] HEMT100 is a semiconductor device with high electron mobility and is known to exhibit excellent performance in high-speed switching and high-frequency ranges. HEMT100 is based on a two-dimensional electron gas (2DEG). At the interface between the barrier layer 102 and the channel layer 132 contained in HEMT100, spontaneous polarization and strain polarization couple to form a strong electric field. This phenomenon induces abundant electrons into the channel layer 132, allowing for the formation of 2DEG.

[0041] Electrons in 2DEG have a very low effective mass, resulting in less scattering due to lattice defects and impurities, and thus high mobility. These characteristics of 2DEG enable the HEMT100 to operate at higher frequencies and improve switching speed.

[0042] Based on the aforementioned characteristics, HEMT100 is known to have low noise and high energy efficiency. It also has relatively low on-resistance, which can improve the efficiency of power application devices. Furthermore, HEMT100 can withstand high power densities due to the 2DEG formed by a strong electric field.

[0043] HEMT100 can be fabricated using a GaN (Gallium Nitride) base.

[0044] GaN HEMTs are high-performance electronic devices that can possess attributes particularly suitable for high-power, high-frequency applications. GaN HEMTs are known to have superior electrical characteristics compared to traditional silicon-based transistors, which is due to the physical and electrical properties of the GaN material. Below, one embodiment will be described, focusing on an example where the HEMT is GaN HEMT100.

[0045] The barrier layer 102 may be made of AlGaN, and the channel layer 132 may be made of GaN.

[0046] GaN HEMT100 can contain a two-dimensional electron gas (2DEG). In an AlGaN / GaN structure, GaN HEMT100 can form a 2DEG at the interface between the barrier layer 102 and the channel layer 132. Such a 2DEG creates a channel in which electrons have very high mobility and can move.

[0047] GaN possesses extremely high breakdown voltage (BV) and high thermal conductivity. Therefore, GaN HEMT100 can operate stably even at high voltages, effectively dissipating heat and making it suitable for high-power applications.

[0048] The GaN HEMT100 can have a high electron channel density due to the large number of electrons provided through the barrier layer 102, thereby achieving low on-resistance Ron and high current capacity. Furthermore, the GaN HEMT100 can have a very fast switching speed due to GaN's high electron mobility and 2DEG channel characteristics.

[0049] GaN material itself is known to have a breakdown voltage (BV) approximately 10 times higher than silicon, and its high thermal conductivity makes it advantageous for heat management. Furthermore, GaN has high electron mobility, making it very suitable for high-frequency applications, and its wide bandgap allows for stable maintenance of electrical properties even at high temperatures.

[0050] The GaN HEMT100 may further include a substrate layer 162. The substrate layer 162 may be formed from a single crystal substrate of SiC (Silicon Carbide), Si, GaN, or AIN (Aluminum Nitride). In one embodiment, the substrate layer 162 may be composed of silicon Si.

[0051] A buffer layer 152 may be placed on the substrate layer 162. The buffer layer 152 may be formed of AIN (Aluminum Nitride).

[0052] An AlGaN layer 142 may be placed on the buffer layer 152, and a channel layer 132 may be placed on the AlGaN layer 142.

[0053] A barrier layer 102 can be placed on the channel layer 132. Since the channel layer 132, which is made of GaN, and the barrier layer 102, which is made of AlGaN, are layers formed from different bandgap semiconductor elements, a high-density electron region (or channel) can be formed at the interface between the two layers.

[0054] A first drain terminal D1, a gate terminal GT, and a second drain terminal D2 may be arranged on the channel layer 132. The GaN HEMT 100 is of the horizontal type, and in the vertical direction, the channel layer 132 may be arranged below the first drain terminal D1, the gate terminal GT, and the second drain terminal D2. And in the horizontal direction, the first drain terminal D1, the gate terminal GT, and the second drain terminal D2 may be arranged in that order.

[0055] A p-GaN layer 112 may be further arranged between the gate terminal GT and the barrier layer 102, or between the gate terminal GT and the channel layer 132.

[0056] A grounding plate 122 may be placed between the gate terminal GT and the second drain terminal D2. The grounding plate 122 may be placed horizontally between the gate terminal GT and the second drain terminal D2. The grounding plate 122 may not be in direct contact with the channel layer 132, and an insulating layer may be placed between them. A barrier layer 102 may be placed between the insulating layer and the channel layer 132.

[0057] Figure 2 is a magnified view of the terminals and channel layer in a cross-section of a GaN HEMT according to one embodiment.

[0058] Referring to Figure 2, a first drift region 202, a second drift region 204, and a channel region 212 may be formed in the channel layer 132.

[0059] A first drift region 202 may be formed in the channel layer 132 between the first drain terminal D1 and the gate terminal GT. A second drift region 204 may be formed in the channel layer 132 between the second drain terminal D2 and the gate terminal GT. A channel region 212 may be formed in the channel layer 132 at a position corresponding to the gate terminal GT—for example, below the gate terminal GT. If a p-GaN layer 112 is placed below the gate terminal GT, the p-GaN layer 112 may be placed on the channel region 212.

[0060] When the GaN HEMT100 is turned on, the resistance Ron to the current flowing from the first drain terminal D1 to the second drain terminal D2 can have the same resistance value as the series combination of the first drift resistance Ron1 formed in the first drift region 202, the channel resistance Rch formed in the channel region 212, and the second drift resistance Ron2 formed in the second drift region 204. Ron = Ron1 + Rch + Ron2

[0061] The magnitude of the first drift resistance Ron1 may be proportional to the length lgd1 of the first drift region 202. The length lgd1 of the first drift region 202 can be measured as the minimum distance between the edge of the first drain terminal D1, which is in contact with the upper surface of the channel layer 132, and the edge of the gate terminal GT. The shorter the length lgd1 of the first drift region 202, the smaller the magnitude of the first drift resistance Ron1 may be.

[0062] The magnitude of the second drift resistance Ron2 may be proportional to the length lgd2 of the second drift region 204. The length lgd2 of the second drift region 204 can be measured as the minimum distance between the edge of the second drain terminal D2, which is in contact with the upper surface of the channel layer 132, and the edge of the gate terminal GT. The shorter the length lgd2 of this second drift region 204, the smaller the magnitude of the second drift resistance Ron2 may be.

[0063] Functionally, the GaN HEMT100 can be configured into two elements, DEV1 and DEV2.

[0064] The first element DEV1 may consist of a first drain terminal D1, a gate terminal GT, and a region in the channel layer 132 corresponding to the position from the first drain terminal D1 to the gate terminal GT.

[0065] The second element DEV2 may consist of a second drain terminal D2, a gate terminal GT, and a region in the channel layer 132 corresponding to the position from the second drain terminal D2 to the gate terminal GT.

[0066] The first element DEV1 can operate as a voltage blocking element, and the second element DEV2 can operate as a high-frequency switching element. The on / off state of the GaN HEMT100 can be determined according to the operation of the second element DEV2, and the breakdown voltage characteristics of the GaN HEMT100 can be determined by the first element DEV1 when it is turned off.

[0067] In the second element DEV2, a grounding plate 122 may be placed between the gate terminal GT and the second drain terminal D2 in order to reduce HCI (Hot Carrier Injection).

[0068] On the other hand, the barrier layers 102a and 102b may include a first barrier layer 102a and a second barrier layer 102b having different physical properties from each other.

[0069] The first barrier layer 102a can form a first two-dimensional electron gas region at the interface with the channel layer 132 within the first element DEV1. The second barrier layer 102b can form a second two-dimensional electron gas region at the interface with the channel layer 132 within the second element DEV2. By arranging barrier layers 102a and 102b with different physical properties in each element DEV1 and DEV2 in this way, each element DEV1 and DEV2 can exhibit optimal performance. For example, the performance of the first element DEV1 as a voltage blocking element can be optimized, and the performance of the second element DEV2 as a high-frequency switching element can be optimized.

[0070] The on-resistance Ron can be inversely proportional to the 2DEG density. The higher the 2DEG density, the lower the on-resistance Ron can be. For example, the 2DEG density of the second two-dimensional electron gas region formed in the second element DEV2 may be higher than the 2DEG density of the first two-dimensional electron gas region formed in the first element DEV1. This can further reduce the on-resistance Ron of the second element DEV2.

[0071] When barrier layers 102a and 102b contain AlGaN material, the physical properties of the first barrier layer 102a and the second barrier layer 102b can be made different by making the Al mole fraction of the AlGaN material in the first element DEV1 and the second element DEV2 different, and thus the 2DEG density can be made different.

[0072] By varying the N-type doping concentrations of barrier layers 102a and 102b, the physical properties of the first barrier layer 102a and the second barrier layer 102b can be made different, and their 2DEG densities can also be made different.

[0073] Due to the difference in physical properties between the first barrier layer 102a and the second barrier layer 102b, the electron densities of the first two-dimensional electron gas region and the second two-dimensional electron gas region may differ from each other. For example, the electron density of the second two-dimensional electron gas region may be higher than that of the first two-dimensional electron gas region.

[0074] The doping concentrations of the first barrier layer 102a and the second barrier layer 102b may differ, and the 2DEG densities of the first element DEV1 and the second element DEV2 may differ. For example, the 2DEG density of the second element DEV2 may be 1.5 times or more that of the first element DEV1.

[0075] Figure 3 shows the configuration of a switching element according to one embodiment.

[0076] Referring to Figure 3, the second element (DEV2, switching element) included in the GaN HEMT may include a second drain terminal D2, a gate terminal GT, a ground plate 122, a second barrier layer 102b, a channel layer 132, and so on.

[0077] The on / off state of the GaN HEMT can be determined by the magnitude of the voltage (hereinafter referred to as the gate voltage) formed between the gate terminal GT and the second drain terminal D2 in the second element DEV2. For example, if the gate voltage is higher than the threshold voltage, the GaN HEMT may be turned on. If the gate voltage is lower than the threshold voltage, the GaN HEMT may be turned off.

[0078] On the other hand, if the gate voltage is higher than the threshold voltage, a channel can form in the channel region of the GaN HEMT, allowing electrons to move from the second drain terminal to the first drain terminal. In this case, the electrons may be in a very high-energy state. This state is sometimes called a "hot" state. When such high-energy electrons collide with the lattice inside the GaN HEMT, various negative effects can occur. For example, the magnitude of the threshold voltage may change, the device may degrade, and leakage current may flow through the insulator of the gate terminal GT. The occurrence of such negative effects is called the HCI (Hot Carrier Injection) phenomenon.

[0079] The grounding plate 122 can mitigate such HCI phenomena. The grounding plate 122 can be connected to ground. Such a grounding plate 122 can reduce the peak electric field, and through this, the aforementioned HCI phenomena can be mitigated.

[0080] A parasitic capacitance called feedback capacitance may form between the gate terminal GT and the second drain terminal D2. Such capacitance can reduce the voltage gain and / or frequency response of the second element DEV2. The ground plate 122 also has the effect of mitigating such feedback capacitance.

[0081] The grounding plate 122, in addition to the aforementioned HCI relaxation effect and feedback capacitance relaxation effect, also has the effect of reducing the second drift resistance. However, if the length of the grounding plate 122 increases, the length of the second drift region increases, which may increase the magnitude of the second drift resistance.

[0082] To reduce the magnitude of the second drift resistance, the designer can determine the length lgfp of the grounding plate 122 in the direction from the second drain terminal D2 to the gate terminal GT to the minimum length specified in the Design Rules (DR).

[0083] The design rule DR can pre-define the smallest possible width or length that can be manufactured in the step for producing the second element DEV2. According to such a design rule DR, the minimum sizes of lines, gates, holes, etc., can be defined. The length lgfp of the grounding plate 122 in the direction from the second drain terminal D2 to the gate terminal GT can be determined by the predetermined minimum length of the design rule DR, thereby minimizing the increase in the second drift resistance due to the length of the grounding plate 122.

[0084] Figure 4 shows the configuration of a voltage blocking element according to one embodiment.

[0085] Referring to Figure 4, the first element (DEV1, voltage blocking element) included in the GaN HEMT may include a first drain terminal D1, a gate terminal GT, a first barrier layer 102a, a channel layer 132, and so on.

[0086] Unlike the second element, the first element DEV1 may not include a grounding plate. The grounding plate may be located between the gate terminal and the second drain terminal, but not between the gate terminal GT and the first drain terminal D1.

[0087] To reduce the first drift resistance, the length lgd1 of the first drift region can be designed to be shorter.

[0088] With respect to the upper surface of the channel layer 132, the length lgd1 between the first drain terminal D1 and the gate terminal GT can be the same as the minimum allowable length of a predetermined photolithography step. By minimizing the length lgd1 of this first drift region, the first drift resistance can be reduced.

[0089] However, if the length of the first drift region lgd1 is shortened, the magnitude of the breakdown voltage BV may decrease. While the breakdown voltage BV can increase with the length of the drift region, as mentioned above, shortening the length of the first drift region lgd1 can have an effect that reduces the breakdown voltage BV.

[0090] To compensate for these effects, one embodiment allows for the application of negative biases as the gate voltage.

[0091] Figures 5 to 13 illustrate a method for manufacturing HEMT according to one embodiment, in which barrier layers with different physical properties are formed.

[0092] Referring to Figure 5, a channel layer 132 can be formed on the AlGaN layer 142.

[0093] Then, a first barrier layer 102a having first physical properties can be formed on the channel layer 132. The first barrier layer 102a can be formed by metal-organic chemical vapor deposition (MOCVD). In metal-organic chemical vapor deposition, a metal-organic compound (e.g., trimethylgallium) and a precursor gas such as a reactive gas (e.g., ammonia) are introduced into a chamber. When the gas reaches the heated substrate surface, it is decomposed by the heat, causing a chemical reaction on the substrate surface to form a desired thin film. During this chemical reaction, metal atoms and other atoms bond, forming a thin, uniform thin film on the substrate. Metal-organic chemical vapor deposition allows for precise control of thickness and composition at the nanometer level, enabling the formation of high-quality thin films and uniform thin film deposition on large-area substrates, which is advantageous for mass production.

[0094] A gate terminal GT can be formed on the first barrier layer 102a. Although not shown in the drawings, in some embodiments, a p-GaN layer may be further formed below the gate terminal GT.

[0095] After the first barrier layer 102a is deposited, wet cleaning may be performed to remove any residue.

[0096] Referring to Figure 6, after the gate terminal GT is formed, a first barrier layer 102a and a first protective layer 1210 may be formed on the gate terminal GT. The first protective layer 1210 may be a nitride film as a hard mask to protect the first barrier layer 102a. For example, the first protective layer 1210 may consist of silicon nitride Si3N4 or other nitrides.

[0097] Then, a photoresist can be applied to the first protective layer 1210 by photolithography, and development can proceed. Here, the photoresist may be applied to the region corresponding to the first element DEV1, but not to the region corresponding to the second element DEV2.

[0098] Referring to Figure 7, after forming the first protective layer 1210 and performing photolithography, etching may be performed with the first barrier layer 102a as the endpoint. The photoresist applied in the previous step may also be removed.

[0099] This etching process can remove the first protective layer 1210 and the first barrier layer 102a that were formed on the second element DEV2.

[0100] Following this etching step, wet cleaning may be performed to remove the photoresist and etching residue.

[0101] Referring to Figure 8, in the second element DEV2, after removing the first barrier layer 102a, a second barrier layer 102b having different physical properties from the first barrier layer 102a can be deposited. The deposition may be metal-organic chemical vapor deposition.

[0102] This deposition process can result in the formation of a first barrier layer 102a on the first element DEV1 and a second barrier layer 102b on the second element DEV2 at the barrier layer level.

[0103] Several additional steps may be taken to remove unwanted portions in the second barrier layer 102b.

[0104] First, a second protective layer 1230 may be formed on the second barrier layer 102b. The second protective layer 1230 may be the same nitride film as the first protective layer 1210.

[0105] Referring to Figure 9, oxide films 1240 and 1242 can be formed on the second protective layer 1230. These oxide films 1240 and 1242 can be formed by plasma-enhanced chemical vapor deposition (PECVD). PECVD can form high-quality thin films at low temperatures. Furthermore, PECVD can be used on heat-sensitive substrates. To form oxide films 1240 and 1242 by PECVD, a plasma can be generated by introducing a reactive gas such as silane SiH4 and oxygen O2 or nitrogen oxide N2O into a chamber, thereby forming oxide films on the second protective layer 1230.

[0106] After the oxide films 1240 and 1242 are formed, a polishing step may be performed with the second protective layer 1230 as the endpoint. The polishing step may be a chemical mechanical planarization (CMP) step. The surfaces of the deposited oxide films 1240 and 1242 can be planarized by chemical and mechanical polishing.

[0107] This polishing step may separate the oxide film into a first oxide film 1240 on the first element DEV1 side and a second oxide film 1242 on the second element DEV2 side. Here, the second oxide film 1242 can play a role in protecting the second barrier layer 102b of the second element DEV2 in subsequent additional steps.

[0108] Referring to Figure 10, the first oxide film 1240 remaining on the first element DEV1 can be removed while performing photolithography to protect the second barrier layer 102b. The first oxide film 1240 can be removed, for example, by wet etching or dry etching. After the removal of the first oxide film 1240, any remaining photoresist can also be removed.

[0109] Referring to Figure 11, after the first oxide film 1240 is removed, the second protective layer 1230 can be removed through an etching step. At this time, a portion of the second protective layer 1230 may remain due to the influence of the second oxide film 1242, etc.

[0110] Referring to Figure 12, after the second protective layer 1230 is removed, the second barrier layer 102b on the first element DEV1 and gate terminal GT may be removed. At this time, the second barrier layer 102b on the second element DEV2 can remain because the second oxide film 1242 functions as a hard mask.

[0111] Referring to Figure 13, the remaining first protective layer, second protective layer, and second oxide film can then be removed through steps such as etching.

[0112] Furthermore, a first barrier layer 102a and a second barrier layer 102b having different physical properties may be formed in the barrier layer.

[0113] Figure 14 is a graph showing the relationship between 2DEG density and on-resistance, and Figure 15 is a graph showing the relationship between 2DEG density and breakdown voltage.

[0114] Referring to Figures 14 and 15, the on-resistance Ron can be inversely proportional to the 2DEG density, and the breakdown voltage BV and the 2DEG density can be approximately inversely proportional.

[0115] In one embodiment, the performance of each element and the overall performance of the HEMT can be optimized by making the 2DEG density of each element different for a HEMT composed of a first element and a second element. For example, by making the 2DEG density of the second element higher than that of the first element—for example, by making the 2DEG density of the second element 1.5 times or more that of the first element—the on-resistance and gate charge of the second element can be lowered while maintaining a high breakdown voltage of the first element.

[0116] Through this manufacturing process, the device size of the HEMT can be minimized while maintaining high breakdown voltage, and on-resistance and gate charge can be kept low.

[0117] As described above, this embodiment provides a solution to improve on-resistance Ron performance, expands bi-GaN application programs, and offers a technology that enables die size reduction for better packaging density and lower die cost.

[0118] The terms "contains," "constitutes," or "possesses," as used above, mean, unless otherwise specified, that the constituent element may be inherent, and should be interpreted as potentially including other constituent elements rather than excluding them. All terms, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the art to which this invention pertains, unless otherwise defined. Commonly used terms, such as those defined in advance, should be interpreted as having their meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined in this invention.

[0119] The above description is merely illustrative of the technical concept of the present invention, and any person with ordinary skill in the art to which the present invention pertains will be able to make various modifications and variations without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed herein are for illustrative purposes only and not to limit the technical concept of the present invention, and the scope of the technical concept of the present invention is not limited by such embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical concepts within an equivalent scope should be interpreted as being included in the scope of the rights of the present invention.

Claims

1. HEMT (High Electron Mobility Transistor), The first drain terminal and Gate terminal and The second drain terminal, A channel layer comprising a portion that together with the first drain terminal and the gate terminal forms a first element, and another portion that together with the second drain terminal and the gate terminal forms a second element, A HEMT comprising a first barrier layer that forms a first two-dimensional electron gas (2DEG) region at the interface with the channel layer within the first element, and a second barrier layer that forms a second two-dimensional electron gas region at the interface with the channel layer within the second element, wherein the physical properties of the first barrier layer and the second barrier layer are different from those of the first barrier layer.

2. The HEMT according to claim 1, characterized in that the first element operates as a voltage blocking element and the second element operates as a switching element.

3. The HEMT according to claim 1, characterized in that the first barrier layer and the second barrier layer contain an AlGaN material, and the Al mole fractions in the first barrier layer and the second barrier layer are different from each other.

4. The HEMT according to claim 1, characterized in that the electron densities of the first two-dimensional electron gas region and the second two-dimensional electron gas region are different from each other due to the difference in physical properties between the first barrier layer and the second barrier layer.

5. The HEMT according to claim 4, characterized in that the electron density of the second two-dimensional electron gas region is higher than the electron density of the first two-dimensional electron gas region.

6. The HEMT according to claim 1, characterized in that the length between the first drain terminal and the gate terminal on the upper surface of the channel layer and the length between the second drain terminal and the gate terminal are different from each other.

7. The HEMT according to claim 1, characterized in that the doping concentrations in the first barrier layer and the second barrier layer are different from each other.

8. The aforementioned HEMT is of the horizontal type, The HEMT according to claim 1, characterized in that the channel layer is arranged vertically below the first drain terminal, the gate terminal and the second drain terminal, the first drain terminal, the gate terminal and the second drain terminal are arranged in that order horizontally, and a grounding plate is arranged horizontally between the gate terminal and the second drain terminal.

9. The HEMT according to claim 8, characterized in that the grounding plate is disposed between the gate terminal and the second drain terminal, and not between the gate terminal and the first drain terminal.

10. HEMT (High Electron Mobility Transistor), The first drain terminal and Gate terminal and The second drain terminal, A channel layer comprising a portion that together with the first drain terminal and the gate terminal forms a first element, and another portion that together with the second drain terminal and the gate terminal forms a second element, A HEMT is characterized by comprising a barrier layer that forms a two-dimensional electron gas (2DEG) region at the interface with the channel layer, while forming two-dimensional electron gas regions of different densities in the first element and the second element.

11. The HEMT according to claim 10, characterized in that the physical properties of the barrier layer in the first element and the physical properties of the barrier layer in the second element are different from each other.

12. The HEMT according to claim 11, characterized in that the barrier layer comprises an AlGaN material, and the Al mole fractions of the AlGaN material in the first element and the second element are different from each other.

13. The HEMT according to claim 11, characterized in that the N-type doping concentrations of the barrier layer in the first element and the second element are different from each other.

14. The HEMT according to claim 10, characterized in that the 2DEG density of the second element is 1.5 times or more the 2DEG density of the first element.

15. The HEMT according to claim 14, characterized in that the first element operates as a voltage blocking element and the second element operates as a switching element.

16. A method for manufacturing HEMT (High Electron Mobility Transistor), The steps include forming a channel layer in the HEMT such that a portion of it forms a first element together with a first drain terminal and a gate terminal, and another portion forms a second element together with a second drain terminal and the gate terminal, The steps include forming a first barrier layer having first physical properties on the channel layer, The steps include forming the gate terminal on the first barrier layer, The steps include forming a first protective layer on the first barrier layer and the gate terminal, The steps include removing the first protective layer and the first barrier layer from the second element by etching, A method for manufacturing HEMT, comprising the step of laminating a second barrier layer having second physical properties on a portion of the first barrier layer that has been etched, thereby forming a barrier layer including the first barrier layer and the second barrier layer having different physical properties.

17. After laminating the second barrier layer having the second physical properties onto the etched portion of the first barrier layer, The steps include forming a second protective layer on the second barrier layer, The steps include forming an oxide film on the second protective layer, The steps include polishing the oxide film using the second protective layer as the endpoint, The steps include removing the first oxide film remaining on the first element from the aforementioned oxide film, The steps include removing the second barrier layer and the second protective layer in the region of the oxide film excluding the portion protected by the second oxide film remaining on the second element, A method for producing HEMT according to claim 16, further comprising the step of removing the remaining second oxide film and the first protective layer.

18. The method for producing HEMT according to claim 16, characterized in that the first barrier layer and the second barrier layer are formed by metal-organic chemical vapor deposition (MOCVD).

19. The method for producing HEMT according to claim 17, characterized in that the oxide film is formed by plasma-enhanced chemical vapor deposition (PECVD).

20. The method for producing HEMT according to claim 17, characterized in that the polishing is chemical mechanical planning (CMP).

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