SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING SYSTEM

Abstract

This substrate processing method includes: a step for irradiating, with an ultraviolet ray, a substrate on which an organic film, a silicon-containing inorganic film, and a resist pattern are layered in this order from below, thereby insolubilizing the resist pattern with respect to a phosphoric acid liquid; a step in which, after the insolubilization step, the phosphoric acid liquid is supplied to the substrate, thereby removing the silicon-containing inorganic film that is exposed from the resist pattern; and a step in which, after the removal step, etching processing is performed on the substrate, thereby transferring the resist pattern to the organic film.

Description

[Technical field]

[0001] The present disclosure relates to a substrate processing method and a substrate processing system. [Background technology]

[0002] Patent Document 1 discloses a technique in which an organic underlayer film containing a thermal acid generator (TAG), an inorganic intermediate film, and a photoresist film are formed on a substrate to be processed, and the substrate is then etched. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2009-109768 A Summary of the Invention [Problem to be solved by the invention]

[0004] The technology according to the present disclosure makes it possible to appropriately transfer a resist pattern to an organic film when an organic film, a silicon-containing inorganic film, and a resist pattern are laminated in this order from below. [Means for solving the problem]

[0005] One aspect of the present disclosure is a substrate processing method including: a step of irradiating, with ultraviolet light, a substrate on which an organic film, a silicon-containing inorganic film, and a resist pattern are laminated in this order from below, to insolubilize the resist pattern in a phosphoric acid solution; a step of supplying the phosphoric acid solution to the substrate after the insolubilization step, to remove the silicon-containing inorganic film exposed from the resist pattern; and a step of performing an etching process on the substrate after the removal step, to transfer the resist pattern to the organic film. Effect of the Invention

[0006] According to the present disclosure, when an organic film, a silicon-containing inorganic film, and a resist pattern are laminated in this order from below, the resist pattern can be appropriately transferred to the organic film. [Brief description of the drawings]

[0007] [Figure 1] 1 is an explanatory diagram showing an outline of the configuration of a wafer processing system as a substrate processing system having a coating and developing processing apparatus as a substrate processing apparatus according to an embodiment of the present invention; [Diagram 2] FIG. 2 is an explanatory diagram showing an outline of an internal configuration of a coating and developing treatment apparatus. [Diagram 3] 1 is a diagram showing the front side of a coating and developing treatment apparatus and an outline of its internal configuration; [Figure 4] 2 is a diagram showing a back side of a coating and developing treatment apparatus and an outline of an internal configuration of the back side; FIG. [Diagram 5] FIG. 2 is a vertical cross-sectional view showing the outline of the configuration of a wet etching unit. [Figure 6] FIG. 2 is a cross-sectional view showing the outline of the configuration of a wet etching unit. [Figure 7] FIG. 2 is a vertical cross-sectional view showing the outline of the configuration of an irradiation unit. [Figure 8] 1 is a flow chart illustrating major steps of an example of wafer processing. [Figure 9] 3A to 3C are schematic partial cross-sectional views showing the state of a wafer in each step of the wafer processing. [Figure 10] This is a diagram showing an SEM image of a wafer in which an SoC film, a SiC film, and a resist pattern (approximately 50 nm thick and 20 nm wide) are stacked in this order from below on a bare Si wafer, after being irradiated with ultraviolet light at an exposure dose of 2000 mJ / cm2. [Figure 11] FIG. 2 shows an SEM image of a wafer that has been UV-irradiated and then immersed in a phosphoric acid solution with a concentration of 85 wt % and a temperature of 150° C. for 90 seconds. [Figure 12] FIG. 1 shows an SEM image of a wet etched wafer after an ashing process. [Figure 13]FIG. 11 is a schematic vertical cross-sectional view showing another example of the wet etching unit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] In the manufacturing process of semiconductor devices, etc., a resist coating process in which a resist liquid is applied onto a substrate such as a semiconductor wafer (hereinafter referred to as "wafer") to form a resist film, an exposure process in which the resist film is exposed to light, and a development process in which the exposed resist film is developed are sequentially performed to form a resist pattern on the substrate. After the resist pattern formation process, the processing target layer is etched using the resist pattern as a mask, and a predetermined pattern is formed in the processing target layer. Dry etching has been used conventionally for the etching.

[0009] Incidentally, along with the miniaturization of semiconductor devices, there is a demand for finer resist patterns, and there is also a demand for thinner resist patterns so that pattern collapse does not occur even in fine resist patterns. In addition, when the resist pattern is thin and the selectivity of the target layer to the resist pattern during dry etching is low, an organic film, a silicon-containing inorganic film, and a resist pattern may be laminated in this order on the target layer. When dry etching is performed on a substrate laminated in this way, the pattern of the resist pattern is transferred in this order to the silicon-containing inorganic film, the organic film, and the target layer.

[0010] In recent years, the miniaturization of semiconductor devices and resist patterns has progressed, and the demand for thinner resist patterns has also progressed. For example, there are cases where the film thickness of a resist pattern is required to be 50 nm or less. However, when dry etching of a silicon-containing inorganic film is performed using such a thin resist pattern as a mask, the resist pattern may disappear during etching, and the pattern of the resist pattern may not be transferred to the silicon-containing inorganic film. In this case, the transfer to the organic film and the transfer to the film to be etched are also poor.

[0011] Therefore, the technology disclosed herein makes it possible to appropriately transfer the resist pattern to the organic film and the underlying layer to be processed when an organic film, a silicon-containing inorganic film, and a resist pattern are stacked in this order from below.

[0012] Hereinafter, a substrate processing method and a substrate processing apparatus according to the present embodiment will be described with reference to the drawings. In this specification and the drawings, elements having substantially the same functional configurations are denoted by the same reference numerals, and duplicated description will be omitted.

[0013] <Wafer processing system> FIG. 1 is an explanatory diagram showing an outline of the configuration of a wafer processing system, serving as a substrate processing system, having a coating and developing processing apparatus as a substrate processing apparatus according to this embodiment.

[0014] The wafer processing system 1 in FIG. 1 includes a coating and developing processing apparatus 2, an etching processing apparatus 3, and a control apparatus 4.

[0015] The coating and developing treatment apparatus 2 performs photolithography treatment on a wafer as a substrate. In the coating and developing treatment apparatus 2, a resist film is formed, etc.

[0016] The etching processing device 3 performs a dry etching process on the wafer. For example, an RIE (Reactive Ion Etching) device that performs a dry etching process on the wafer by plasma processing is used as the etching processing device 3. For example, as described below, the etching processing device 3 performs etching of a silicon inorganic film using a resist pattern and a SoC (spin-on carbon film) pattern as a mask.

[0017] The control device 4 controls the operation of each device. The control device 4 is, for example, a computer equipped with a CPU, a memory, and the like, and has a program storage unit (not shown). The program storage unit stores a program for controlling the operation of the drive systems of the above-mentioned various processing devices and the transport device (not shown), and for realizing the wafer processing described below in the wafer processing system 1. The above program may be recorded in a computer-readable storage medium H and installed from the storage medium H to the control device 4. The storage medium H may be temporary or non-temporary. A part or all of the program may be realized by dedicated hardware (circuit board).

[0018] <Coating and developing treatment equipment> Fig. 2 is an explanatory diagram showing an outline of the internal configuration of the coating and developing treatment apparatus 2. Figs. 3 and 4 are diagrams showing an outline of the internal configuration of the front side and rear side of the coating and developing treatment apparatus 2, respectively.

[0019] 2, the coating and developing treatment apparatus 2 has a cassette station 10 where a cassette C containing a plurality of wafers W is carried in and out, and a treatment station 11 equipped with a plurality of various treatment units that perform predetermined treatments on the wafers W. The coating and developing treatment apparatus 2 has a configuration in which the cassette station 10, the treatment station 11, and an interface station 13 that transfers the wafer W between the treatment station 11 and an exposure apparatus 12 adjacent to the treatment station 11 are integrally connected.

[0020] The cassette station 10 is provided with a cassette mounting table 20. The cassette mounting table 20 is provided with a plurality of cassette mounting plates 21 on which the cassettes C are mounted when the cassettes C are carried in and out of the coating and developing treatment apparatus 2.

[0021] The cassette station 10 is provided with a wafer transport unit 23 that is movable on a transport path 22 that extends in the X direction in the figure. The wafer transport unit 23 is also movable in the up-down direction and around the vertical axis (the θ direction), and can transport wafers W between the cassettes C on each cassette mounting plate 21 and a transfer unit in the third block G3 of the processing station 11, which will be described later.

[0022] The processing station 11 is provided with a plurality of blocks, for example, four blocks G1, G2, G3, and G4, each equipped with various units. For example, a first block G1 is provided on the front side (negative side in the X direction in FIG. 2) of the processing station 11, and a second block G2 is provided on the rear side (positive side in the X direction in FIG. 2) of the processing station 11. A third block G3 is provided on the cassette station 10 side of the processing station 11 (negative side in the Y direction in FIG. 2), and a fourth block G4 is provided on the interface station 13 side of the processing station 11 (positive side in the Y direction in FIG. 2).

[0023] In the first block G1, as shown in FIG. 3, a plurality of liquid processing units, such as a development processing unit 30 as a development section, an SoC film formation unit 31 as an organic film formation section, a SiC film formation unit 32 as an inorganic film formation section, a resist coating unit 33, and a wet etching unit 34 as a wet etching section, are arranged in this order from the bottom.

[0024] The developing unit 30 develops the wafer W. Specifically, the developing unit 30 supplies a developer to the wafer W on which a resist film has been formed, to form a resist pattern.

[0025] The SoC film forming unit 31 applies an organic material (coating liquid) for the SoC film directly onto a layer to be processed, that is, a layer to be etched (eg, a silicon oxide film) formed on the wafer W, to form an SoC film.

[0026] The SiC film forming unit 32 applies a material for the SiC film, which serves as a silicon-containing inorganic film, directly onto the SoC film formed on the wafer W to form the SiC film.

[0027] The resist coating unit 33 forms a resist film by directly coating a chemically amplified resist on the SiC film formed on the wafer W. The chemically amplified resist is, for example, an EUV resist that is photosensitive to EUV, or may be an ArF resist or a KrF resist that is photosensitive to an ArF excimer laser or a KrF excimer laser used in immersion exposure.

[0028] The wet etching unit 34 supplies phosphoric acid liquid to the wafer W on which a resist pattern has been formed by the development processing unit 30 and which has been irradiated with ultraviolet rays by an irradiation unit 41 described below, and etches, i.e., removes, the SiC film exposed from the resist pattern.

[0029] For example, three each of the development processing units 30, the SoC film formation units 31, the SiC film formation units 32, the resist coating units 33, and the wet etching units 34 are arranged horizontally. The number and arrangement of the development processing units 30, the SoC film formation units 31, the SiC film formation units 32, the resist coating units 33, and the wet etching units 34 can be selected arbitrarily. In addition, in the SoC film formation unit 31, the SiC film formation unit 32, the resist coating unit 33, and the wet etching unit 34, the supply of developer, the formation of an SoC film, the formation of an SiC film, the formation of a resist film, and the supply of phosphoric acid solution are performed by the spin coating method (also called the spin coating method).

[0030] As shown in FIG. 4, the second block G2 is provided with a heat treatment unit 40 and an irradiation unit 41 as a modifying section.

[0031] The thermal processing unit 40 performs thermal processing on the wafer W, such as heating or cooling. The irradiation unit 41 irradiates ultraviolet rays onto a wafer W having an SoC film, a SiC film, and a resist pattern stacked in this order on an etching target layer, to make the resist pattern insoluble in phosphoric acid solution. The ultraviolet rays are supplied in a low-oxygen atmosphere, for example, with an oxygen concentration of 0.1% or less.

[0032] These heat treatment units 40 and irradiation units 41 are arranged vertically and horizontally, and the number and arrangement thereof can be selected arbitrarily.

[0033] For example, in the third block G3, a plurality of transfer units 50, 51, 52, 53, 54, 55, 56 are provided in this order from the bottom up, while in the fourth block G4, a plurality of transfer units 60, 61, 62 are provided in this order from the bottom up.

[0034] 2, a region surrounded by the first block G1 to the fourth block G4 forms a wafer transfer region D. In the wafer transfer region D, a wafer transfer unit 70 is disposed.

[0035] The wafer transfer unit 70 has a transfer arm 70a that is movable in, for example, the Y direction, the X direction, the θ direction, and the vertical direction. The wafer transfer unit 70 moves within the wafer transfer region D, and can transfer the wafer W between units in the surrounding first block G1, second block G2, third block G3, and fourth block G4. A plurality of wafer transfer units 70 are arranged vertically as shown in, for example, FIG. 4, and can transfer the wafer W between units of approximately the same height in each of the blocks G1 to G4.

[0036] In addition, in the wafer transfer region D, a shuttle transfer unit 80 is provided which linearly transfers the wafer W between the third block G3 and the fourth block G4.

[0037] The shuttle transfer unit 80 is movable linearly, for example, in the Y direction in Fig. 4. The shuttle transfer unit 80 moves in the Y direction while supporting the wafer W, and can transfer the wafer W between the delivery unit 52 in the third block G3 and the delivery unit 62 in the fourth block G4.

[0038] 2, a wafer transfer unit 90 is provided next to the third block G3 on the positive side in the X direction. The wafer transfer unit 90 has a transfer arm 90a that is movable in, for example, the X direction, the θ direction, and the up and down directions. The wafer transfer unit 90 moves up and down while supporting the wafer W, and can transfer the wafer W to each delivery unit in the third block G3.

[0039] The interface station 13 is provided with a wafer transfer unit 100 and a delivery unit 101. The wafer transfer unit 100 has a transfer arm 100a that is movable in, for example, the Y direction, the θ direction, and the up and down directions. The wafer transfer unit 100 supports a wafer W on, for example, the transfer arm 100a, and can transfer the wafer W between each delivery unit in the fourth block G4, the delivery unit 101, and the exposure device 12.

[0040] In the coating and developing treatment apparatus 2, the above-mentioned treatment units and transport units are controlled by, for example, a control device 4.

[0041] <Wet Etching Unit> Next, a description will be given of the configuration of the above-mentioned wet etching unit 34. Figures 5 and 6 are a vertical cross-sectional view and a horizontal cross-sectional view, respectively, showing an outline of the configuration of the wet etching unit 34.

[0042] The wet etching unit 34 has a processing container 120 whose interior can be closed as shown in Fig. 5. A loading / unloading port 121 for the wafer W is formed on the surface of the processing container 120 facing the wafer transfer region D as shown in Fig. 6, and the loading / unloading port 121 is provided with an opening / closing shutter 122.

[0043] 5, a spin chuck 130 that holds and rotates the wafer W is provided in the center of the processing vessel 120. The spin chuck 130 has a horizontal upper surface, and the upper surface is provided with, for example, a suction port (not shown) for sucking the wafer W. The wafer W can be sucked and held on the spin chuck 130 by suction from the suction port.

[0044] The spin chuck 130 is connected to a chuck driving mechanism 131 and can be rotated at a desired speed by the chuck driving mechanism 131. The chuck driving mechanism 131 has a rotation driving source (not shown) such as a motor that generates a driving force for rotating the spin chuck 130. The chuck driving mechanism 131 is also provided with an elevation driving source such as a cylinder, and the spin chuck 130 can move up and down.

[0045] A cup 132 is provided around the spin chuck 130 to receive and collect liquid scattered or dropped from the wafer W. A discharge pipe 133 for discharging the collected liquid and an exhaust pipe 134 for exhausting the atmosphere inside the cup 132 are connected to the bottom surface of the cup 132.

[0046] As shown in Fig. 6, a rail 140 extending along the Y direction (left and right direction in Fig. 6) is formed on the negative X direction side (downward in Fig. 6) of cup 132. Rail 140 is formed, for example, from the outside of cup 132 on the negative Y direction side (left direction in Fig. 6) to the outside of cup 132 on the positive Y direction side (right direction in Fig. 6). Arms 141 and 145 are attached to rail 140.

[0047] A discharge nozzle 142 is supported on the arm 141 as shown in Figs. 5 and 6. The discharge nozzle 142 discharges phosphoric acid liquid. The arm 141 is movable on the rail 140 by a nozzle driving unit 143 shown in Fig. 6. This allows the discharge nozzle 142 to move from a waiting unit 144 installed outside the cup 132 on the positive Y-direction side to above the center of the wafer W in the cup 132, and further move on the surface of the wafer W in the radial direction of the wafer W. The arm 141 is also movable up and down by the nozzle driving unit 143, and the height of the discharge nozzle 142 can be adjusted. The discharge nozzle 142 is connected to a supply unit (not shown) that supplies phosphoric acid liquid to the discharge nozzle 142.

[0048] A discharge nozzle 146 is supported on the arm 145 as shown in FIG. 5 and FIG. 6. The discharge nozzle 146 discharges a rinsing liquid. The rinsing liquid is, for example, DIW (Deionized Water). The arm 145 is movable on the rail 140 by a nozzle driving unit 147 shown in FIG. 6. This allows the discharge nozzle 146 to move from a waiting unit 148 installed outside the cup 132 on the negative Y-direction side to above the center of the wafer W in the cup 132, and further move on the surface of the wafer W in the radial direction of the wafer W. The arm 145 is also movable up and down by the nozzle driving unit 147, and the height of the discharge nozzle 146 can be adjusted. The discharge nozzle 146 is connected to a supply unit (not shown) that supplies the rinsing liquid to the discharge nozzle 146.

[0049] The configurations of the development processing unit 30, the SoC film formation unit 31, the SiC film formation unit 32, and the resist coating unit 33 are similar to the configuration of the wet etching unit .

[0050] <Irradiation unit> Next, a description will be given of the configuration of the above-mentioned irradiation unit 41. Fig. 7 is a vertical sectional view showing an outline of the configuration of the irradiation unit 41.

[0051] The irradiation unit 41 has a processing container 150 whose interior can be sealed as shown in Fig. 7. A loading / unloading port 151 for the wafer W is formed on a surface of the processing container 150 facing the wafer transfer region D, and an opening / closing shutter 152 is provided at the loading / unloading port 151.

[0052] A gas supply port 160 is formed on the upper surface of the processing vessel 150 to supply a gas other than oxygen gas, for example, an inert gas such as N2 gas, toward the inside of the processing vessel 150, and a gas supply mechanism 162 is connected to the gas supply port 160 via a gas supply pipe 161. The gas supply mechanism 162 has, for example, a flow rate adjustment valve (not shown) that adjusts the flow rate of gas supplied into the processing vessel 150. By introducing a gas other than oxygen gas into the processing vessel 150 using such a gas supply mechanism, the inside of the processing vessel 150 can be made into a low-oxygen atmosphere with an oxygen concentration of 0.1 ppm or less.

[0053] For example, an exhaust port 163 for exhausting the atmosphere inside the processing vessel 150 is formed on the bottom surface of the processing vessel 150, and an exhaust mechanism 165 for exhausting the atmosphere inside the processing vessel 150 is connected to the exhaust port 163 via an exhaust pipe 164. The exhaust mechanism 165 includes an exhaust pump (not shown) and the like. By introducing a gas other than oxygen gas through the gas supply port 160 and exhausting it through the exhaust port 163, the atmosphere within the processing vessel 150 can be quickly replaced with a low-oxygen atmosphere of 0.1 ppm or less.

[0054] A cylindrical support 170 on which a wafer W is horizontally placed is provided inside the processing vessel 150. Lift pins 171 for transferring the wafer W are supported by a support member 172 and installed inside the support 170. The lift pins 171 are provided to pass through through holes 173 formed in an upper surface 170a of the support 170, and three lift pins 171, for example, are provided. A drive mechanism 174 for lifting and lowering the support member 172 to lift and lower the lift pins 171 is provided at a base end of the support member 172. The drive mechanism 174 has a drive source (not shown) such as a motor that generates a drive force for lifting and lowering the support member 172.

[0055] A light source 180, such as a deuterium lamp or an excimer lamp, is provided above the processing vessel 150 to irradiate the wafer W on the support 170 with ultraviolet light having a wavelength of, for example, 172 nm. The light source 180 can irradiate the entire surface of the wafer W with ultraviolet light. A window 181 that transmits ultraviolet light from the light source 180 is provided on a top plate of the processing vessel 150. The wavelength of the ultraviolet light is not limited to 172 nm, and is, for example, 150 nm to 250 nm.

[0056] <Wafer processing> Next, a wafer processing performed using the wafer processing system 1 configured as above will be described. FIG. 8 is a flow chart showing the main steps of an example of the wafer processing. FIGS. 9 and 10 are schematic partial cross-sectional views showing the state of the wafer W at each step of the wafer processing. Note that, as shown in FIG. 9(A), a SiO2 film F1 as an etching target is formed in advance on the surface of the wafer W on which the above-mentioned wafer processing is performed.

[0057] In wafer processing using the wafer processing system 1, first, a cassette C storing a plurality of wafers W is carried into a cassette station 10 of the coating and developing treatment apparatus 2. Then, the wafers W in the cassette C are transferred to a treatment station 11, where the temperature is adjusted in a heat treatment unit 40.

[0058] (Step S1) Thereafter, as shown in FIGS. 8 and 9(A), an SoC film F2 is formed directly on the SiO2 film F1 formed on the wafer W.

[0059] Specifically, the wafer W is transferred to the SoC film forming unit 31, and a coating liquid for the SoC film is spin-coated on the surface of the wafer W, forming an SoC film F2 so as to cover the SiO2 film F1. Next, the wafer W is transferred to the heat treatment unit 40 and subjected to heat treatment. The thickness of the SoC film F2 after the heat treatment in the heat treatment unit 40 is, for example, 50 to 100 nm.

[0060] (Step S2) Subsequently, directly on the SoC film F2 formed on the wafer W, a SiC film F3 is formed.

[0061] Specifically, the wafer W is transported to the SiC film forming unit 32, and a coating liquid for the SiC film is spin-coated onto the surface of the wafer W, so that a SiC film F3 is formed so as to cover the SoC film F2, as shown in FIG. 9(B). Next, the wafer W is transferred to the heat treatment unit 40 and subjected to heat treatment. The thickness of the SiC film F3 after the heat treatment in the heat treatment unit 40 is, for example, 7 to 15 nm.

[0062] (Step S3) Thereafter, a chemically amplified resist film F4 is formed directly on the SiC film formed on the wafer W, as shown in FIG. 9(C).

[0063] Specifically, the wafer W is transferred to the resist coating unit 33, and a chemically amplified resist is spin-coated on the surface of the wafer W, forming a chemically amplified resist film F4 so as to cover the SiC film F3. Next, the wafer W is transferred to the thermal processing unit 40 and subjected to a pre-bake processing. The resist film F4 has a thickness of 30 to 100 nm after the pre-bake treatment.

[0064] (Step S4) Next, the resist film F4 formed on the wafer W is exposed to light.

[0065] Specifically, the wafer W is transported to the exposure device 12 via the interface station 13, and an exposure process is performed using a mask M, as shown in FIG. 9(D), and the resist film F4 on the wafer W is exposed to a desired pattern.

[0066] (Step S5) Next, the exposed resist film formed on the wafer W is developed to form a resist pattern F5, as shown in FIG. 9(E).

[0067] Specifically, after exposure, the wafer W is transferred to the thermal processing unit 40 and subjected to post-exposure baking processing. Next, the wafer W is transferred to the development unit 30, where development processing is performed, and a line-and-space resist pattern F5, for example, is formed. After the pattern is formed, the wafer W is transferred to the heat treatment unit 40, where post-baking processing is performed.

[0068] By steps S1 to S5, the SoC film F2, the SiC film F3, and the resist pattern F5 are formed on the wafer W in this order from the bottom up (that is, without any other films being present between the films).

[0069] (Step S6) Subsequently, as shown in FIG. 9(F), the wafer W is irradiated with ultraviolet rays, and the resist pattern F5 is made insoluble in the phosphoric acid solution.

[0070] Specifically, the wafer W is transported to the irradiation unit 41. Then, in a low-oxygen atmosphere with an oxygen concentration of 0.1% or less, ultraviolet light from the light source 180 is irradiated onto the entire wafer W placed on the support 170, i.e., the entire resist pattern F5. The exposure dose at this time is, for example, 2000 mJ / cm. 2The reason why ultraviolet light is irradiated in a low-oxygen atmosphere is that if the oxygen concentration is not low, ozone is generated by ultraviolet light irradiation, and this ozone removes the resist pattern F5.

[0071] (Step S7) Subsequently, a phosphoric acid solution is supplied to the wafer W, and the SiC film F3 exposed from the resist pattern F6 insolubilized in the phosphoric acid solution is removed. That is, a wet etching process is performed using the resist pattern F6 insolubilized in the phosphoric acid solution as a mask.

[0072] Specifically, the wafer W is transported to the wet etching unit 34. Then, as shown in FIG. 9(G), phosphoric acid solution P from a discharge nozzle 142 is spin-coated onto the surface of the wafer W held by the spin chuck 130, for example, and the SiC film F3 is removed using the resist pattern F6 as a mask. The SiC film F3 is removed until the SoC film F2 is exposed, for example, as shown in FIG. 9(H). This forms a pattern F7 of a laminated film of a resist film and a SiC film. The phosphoric acid solution supplied to the wafer W has, for example, a mass percent concentration of 85-95 wt% and a temperature of 150° C. or higher.

[0073] After the phosphoric acid liquid is supplied from the discharge nozzle 142, a rinse liquid from the discharge nozzle 146 is, for example, spin-coated onto the surface of the wafer W held by the spin chuck 130, and the phosphoric acid liquid is removed from the wafer W. Thereafter, the supply of the rinsing liquid is stopped, and in this state, the wafer W held by the spin chuck 130 is rotated, whereby the wafer W is dried.

[0074] The removal of the SiC film F3 by the phosphoric acid solution, i.e., etching, proceeds isotropically, but the thickness of the SiC film F3 is as thin as 7 to 15 nm as described above. Therefore, if the line width of the resist pattern F5 is about 30 nm to 100 nm, even if the SiC film F3 is etched by the phosphoric acid solution until the SoC film F2 is exposed, no pattern collapse occurs.

[0075] After the wet etching is completed, the wafers W are sequentially accommodated in a cassette C and transferred to the etching processing device 3.

[0076] It is known that the SiC film F3 can be wet-etched with phosphoric acid solution. However, the inventors of the present application have found that resist patterns for EUV and the like are soluble in phosphoric acid solution under normal conditions. After extensive research, the inventors have found that irradiating the resist pattern with ultraviolet light as in step S7 above makes phosphoric acid solution unnecessary. The present disclosure is based on this finding.

[0077] (Step S8) Thereafter, in the etching processing device 3, the wafer W is dry-etched, and the resist pattern F6 is transferred to the SoC film.

[0078] Specifically, the SoC film F2 is dry-etched (first dry etching) using the pattern F7 of the laminated film of the resist film and the SiC film as a mask. Then, the SiO2 film F1 to be etched is dry-etched (second dry etching) using the SoC film F2 to which the resist pattern F6 (its pattern) has been transferred in the first dry etching as a mask. The first and second dry etchings are each performed in a different processing chamber.

[0079] With the above, the wafer processing using the wafer processing system 1 is completed.

[0080] <Other examples of wafer processing> In the above example, when the SiC film F3 is removed by wet etching using a phosphoric acid solution with the resist pattern F6 as a mask, the SiC film F3 is removed until the SoC film F2 underneath is exposed. However, when the SiC film is made thicker than 15 nm for dry etching of the SiC film using the SiC film as a mask, only a part of the upper side of the SiC film may be removed so that the pattern does not collapse during wet etching using a phosphoric acid solution. Then, the remaining SoC film may be removed by dry etching using the resist pattern as a mask in the etching processing device 3. In other words, both wet etching using a phosphoric acid solution and dry etching using the insolubilized resist pattern as a mask may be performed. In this case, too, if the thickness of the SiC film and the amount of wet etching of the SiC film using a nitric acid solution are appropriately set, the resist pattern will not disappear while the resist pattern is being transferred to the SiC film F3.

[0081] <Major Effects> As described above, in this embodiment, the wafer W in which the SoC film, the SiC film, and the resist pattern are stacked in this order from below is irradiated with ultraviolet light, and the resist pattern is insolubilized in the phosphoric acid solution. Then, in this embodiment, when the resist pattern is transferred to the SiC film, only wet etching using the phosphoric acid solution is performed using the insolubilized resist pattern as a mask, or both wet etching using the phosphoric acid solution and dry etching using the insolubilized resist pattern as a mask are performed. Therefore, according to this embodiment, when the resist pattern is transferred to the SiC film, unlike the case where only dry etching is performed as in the conventional method, even if the resist pattern is thin, the pattern does not collapse, and the resist pattern does not disappear during transfer, so that the transfer can be performed appropriately.

[0082] Fig. 10 shows an SEM image of a wafer in which an SoC film, a SiC film, and a resist pattern (approximately 50 nm thick and 20 nm wide) are stacked in this order from below on a bare Si wafer, after being irradiated with ultraviolet light at an exposure dose of 2000 mJ / cm2. Fig. 11 shows an SEM image of the wafer irradiated with ultraviolet light, after being immersed in a phosphoric acid solution with a concentration of 85 wt% and a temperature of 150°C for 90 seconds, i.e., after being wet-etched under the above conditions. Fig. 12 shows an SEM image of the wafer wet-etched under the above conditions, after being ashed.

[0083] After the ultraviolet irradiation, the SiC film F3 is exposed from the resist pattern F6, as shown in FIG. Furthermore, as shown in FIGS. 10 and 11, the wet etching causes changes in the portions that were not covered with the resist pattern F6. As shown in Fig. 12, the portion of the SoC film F2 that was not covered by the resist pattern is removed by the ashing process. From this, it can be seen that in Fig. 11, which shows the state before the ashing process, the portion exposed from the resist pattern F6 is not the SiC film F3 but the SoC film F2. In other words, Figures 10 to 12 show that by performing ultraviolet irradiation and wet etching using a phosphoric acid solution under the above-mentioned conditions, the resist pattern F6 can be transferred to the SiC film F3 without causing pattern collapse.

[0084] <Modification of Wet Etching Unit> FIG. 13 is a schematic vertical sectional view of another example of the wet etching unit. The wet etching unit 34a in FIG. 13 is configured as an integral module with the developing unit, and shares the same components as the developing unit.

[0085] Specifically, the wet etching unit 34a has a discharge nozzle 142 that discharges a nitric acid liquid, a discharge nozzle 146 that discharges a rinsing liquid, and a discharge nozzle 200 that discharges a developing liquid. The discharge nozzle 142 and the discharge nozzle 200 share the spin chuck 130, the cup 210, and the like. This makes it possible to prevent the device from becoming large.

[0086] The cup 210 has a cup body 211 and a movable cup 213 that can be raised and lowered relative to the cup body 211 by a lifting mechanism 212. For example, by lifting the movable cup 213 during wet etching, the phosphoric acid solution and the rinsing solution scattered from the rotating wafer W are made to pass under the movable cup 213 and are introduced into the inner flow path 220 of the cup body 211. Also, for example, by lowering the movable cup 213 during development processing, the developing solution and the rinsing solution scattered from the rotating wafer W are made to pass over the upper side of the movable cup 213 and are introduced into the outer flow path 221 of the cup body 211. This allows the waste phosphoric acid solution and the waste developing solution to be collected separately without being mixed.

[0087] <Other Modifications> In the above example, the SoC film is used as the organic film, but other organic films may be used. In addition, the organic film is formed in the coating and developing treatment apparatus 2, but may be formed in a film forming apparatus that performs film formation by, for example, CVD or ALD outside the coating and developing treatment apparatus 2. In the above example, a SiC film is used as the silicon-containing inorganic film, but other silicon-containing organic films (e.g., siloxane-based films used as SiARC films) may also be used. Similarly to the organic films, the silicon-containing inorganic films may also be formed by a film forming apparatus that forms films by, for example, CVD or ALD outside the coating and developing apparatus 2.

[0088] Alternatively, the wet etching may be performed as follows. That is, before the phosphoric acid liquid is supplied, DIW, which is also used as a rinsing liquid, may be supplied to the wafer W on which a resist pattern has been formed, to form a puddle of DIW covering the resist pattern. Next, phosphoric acid liquid at room temperature may be supplied to the wafer W, and the DIW on the wafer W may be replaced with the phosphoric acid liquid, to form a puddle of phosphoric acid liquid. Thereafter, the puddle of phosphoric acid liquid may be heated to a predetermined temperature by a heater provided on the spin chuck 130, and the SiC film may be removed by the phosphoric acid liquid using the resist pattern as a mask. Then, a rinse liquid may be supplied to the wafer W to remove the phosphoric acid liquid from the wafer W, and then the wafer W may be dried.

[0089] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The above-described embodiments may be omitted, substituted, or modified in various forms without departing from the scope and spirit of the appended claims. For example, the components of the above-described embodiments may be combined in any manner without impairing the above-described effects. In addition to or in place of the above-described effects, the technology disclosed herein may provide other effects that are apparent to a person skilled in the art from the description of this specification.

[0090] 2 Coating and developing equipment 34, 34a Wet Etching Unit 41 Irradiation unit F2 SoC membrane F3 SiC film F5 Resist pattern F6 Resist pattern insoluble in phosphoric acid solution P phosphoric acid solution W wafer

Claims

1. a step of irradiating ultraviolet light onto a substrate on which an organic film, a silicon-containing inorganic film, and a resist pattern are laminated in this order from below, thereby making the resist pattern insoluble in a phosphoric acid solution; a step of supplying the phosphoric acid solution to the substrate after the insolubilizing step, and removing the silicon-containing inorganic film exposed from the resist pattern; after the removing step, performing an etching process on the substrate to transfer the resist pattern to the organic film.

2. 2. The substrate processing method according to claim 1, wherein the resist pattern is formed of a chemically amplified resist.

3. The substrate processing method according to claim 2 , wherein the chemically amplified resist is an ArF resist, a KrF resist or an EUV resist.

4. The amount of ultraviolet light irradiation is 2000 mJ / cm ２ The substrate processing method according to claim 1 .

5. The amount of ultraviolet light irradiation is 2000 mJ / cm ２ The substrate processing method according to claim 2 .

6. The amount of ultraviolet light irradiation is 2000 mJ / cm ２ The substrate processing method according to claim 3 .

7. 2. The substrate processing method according to claim 1, wherein the temperature of the phosphoric acid solution is 150[deg.] C. or higher.

8. 3. The substrate processing method according to claim 2, wherein the temperature of the phosphoric acid solution is 150[deg.] C. or higher.

9. 4. The substrate processing method according to claim 3, wherein the temperature of the phosphoric acid solution is 150[deg.] C. or higher.

10. 5. The substrate processing method according to claim 4, wherein the temperature of the phosphoric acid solution is 150[deg.] C. or higher.

11. a modifying section that irradiates ultraviolet light onto a substrate on which an organic film, a silicon-containing inorganic film, and a resist pattern are laminated in this order from below, thereby making the resist pattern insoluble in a phosphoric acid solution; a wet etching unit that supplies the phosphoric acid liquid to the substrate on which the resist pattern has been insolubilized, and removes the silicon-containing inorganic film exposed from the resist pattern.

12. The substrate processing apparatus according to claim 11 , wherein the resist pattern is formed of a chemically amplified resist.

13. The substrate processing apparatus according to claim 12, wherein the chemically amplified resist is an ArF resist, a KrF resist or an EUV resist.

14. The amount of ultraviolet light irradiation is 2000 mJ / cm ２ The substrate processing apparatus according to claim 11 .

15. The substrate processing apparatus according to claim 11, wherein the temperature of the phosphoric acid solution is 150° C. or higher.

16. a developing section which performs a developing process to form the resist pattern; The substrate processing apparatus according to claim 11 , wherein the wet etching section and the developing section are configured by the same module and share some of their constituent members.

17. a modification unit that irradiates ultraviolet light onto a substrate on which an organic film, a silicon-containing inorganic film, and a resist pattern are laminated in this order from below, thereby insolubilizing the resist pattern in a phosphoric acid solution, and a wet etching unit that supplies the phosphoric acid solution to the substrate on which the resist pattern has been insolubilized, thereby removing the silicon-containing inorganic film exposed from the resist pattern; an etching apparatus that performs an etching process on the substrate from which a portion of the silicon-containing inorganic film exposed under the resist pattern has been removed, thereby transferring the resist pattern to the organic film.

18. The substrate processing system according to claim 17 , wherein the resist pattern is formed of a chemically amplified resist.

19. The amount of ultraviolet light irradiation is 2000 mJ / cm ２ The substrate processing system according to claim 17 .

20. The substrate processing system of claim 17 , wherein the temperature of the phosphoric acid solution is 150° C. or higher.

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