Thin film transistor and method for manufacturing same

Abstract

To disclose a thin film transistor and a manufacturing method of the same.SOLUTION: A thin film transistor comprises: a metal layer formed on a gate insulation film; a metal oxide layer that is formed on the metal layer, and is formed so as to cover all of a front surface of the metal layer; a metal oxide semiconductor layer that is formed so as to cover all of the front surface of the metal oxide layer; and a source / drain electrode that is formed on the metal oxide semiconductor layer, and further comprises an oxygen-deficient layer inside the metal oxide semiconductor layer that is adjacent to the metal oxide semiconductor layer. The metal oxide semiconductor layer is made by crystallizing an amorphous metal oxide semiconductor layer by a heat treatment.THE MAIN FIGURE: Figure 1

Description

[Technical field]

[0001] The present invention relates to a thin film transistor applicable to electronic devices such as displays, memories, and circuits, and a method for manufacturing the same. [Background technology]

[0002] Early display devices were developed in the LCD industry as technology progressed based on amorphous silicon materials. Amorphous silicon materials have low charge mobility, so as display resolution increases, high charge mobility is required, and polycrystalline silicon materials were developed. However, polycrystalline silicon materials also have drawbacks such as complicated processes, low yields, and high process temperatures, so research on semiconductor materials using inorganic metal oxides has been conducted in recent years. Amorphous inorganic metal oxides are being developed and researched due to their advantages such as high transparency, low cost, possibility of large area, and excellent mobility. Nevertheless, more research is still needed due to limitations in operational stability at high voltages and mobility that is insufficient for next-generation high-resolution displays. To be used in next-generation high-resolution displays, semiconductor devices with high charge mobility, large area processability, and operational stability are required.

[0003] Recently, metal oxide semiconductors have been researched as a semiconductor material that can replace silicon materials, and some have been applied to mass production. However, conventional metal oxide thin film elements have been pointed out as having a disadvantage of low mobility compared to silicon thin film elements, despite their low cost and insulating properties. In the case of single crystal silicon, the mobility is about 300 cm 2 / Vs, for low temperature polysilicon, 100cm 2 / Vs, but for metal oxides, it is 10 to 20 cm 2 However, when a fast response is required, such as in a large-area or high-scan rate, ultra-high resolution display, since the mobility is low at a level of 1 / Vs, additional improvements are required. Summary of the Invention [Problem to be solved by the invention]

[0004] It is an object of the present invention to provide a thin film transistor including a crystalline metal oxide semiconductor with improved mobility, and a method for fabricating the same.

[0005] Another object of the present invention is to provide a core semiconductor manufacturing technology that can be applied to conventional metal oxide-based electronic devices such as photoelectric devices, memory devices, and sensors, including driving high-resolution large-area display devices, through the thin film transistors manufactured by the manufacturing method of the present invention. [Means for solving the problem]

[0006] A method for manufacturing a thin film transistor according to an embodiment of the present invention includes a first step of forming a gate insulating film on a substrate that also serves as a gate electrode; a second step of forming a metal layer on the gate insulating film; a third step of forming an amorphous metal oxide semiconductor layer to cover the entire surface of the metal layer to manufacture a structure; a fourth step of heat-treating the structure; and a fifth step of depositing source / drain electrode layers on the heat-treated structure, wherein during the fourth step, a metal oxide layer is formed between the amorphous metal oxide semiconductor layer and the metal layer, the amorphous metal oxide semiconductor layer is crystallized, and an oxygen-deficient region is formed in the amorphous metal oxide semiconductor layer adjacent to the metal layer or the metal oxide layer.

[0007] A method for manufacturing a thin film transistor according to an additional embodiment of the present invention includes a first step of forming a gate electrode on a substrate, and then forming a gate insulating film on the gate electrode; a second step of forming a metal layer on the gate insulating film; a third step of forming an amorphous metal oxide semiconductor layer to cover an entire surface of the metal layer to manufacture a structure; a fourth step of heat-treating the structure; and a fifth step of depositing source / drain electrode layers on the heat-treated structure, wherein during the fourth step, a metal oxide layer is formed between the amorphous metal oxide semiconductor layer and the metal layer, the amorphous metal oxide semiconductor layer is crystallized, and an oxygen-deficient region is formed in the amorphous metal oxide semiconductor layer adjacent to the metal layer or the metal oxide layer.

[0008] The metal layer is formed of any one metal selected from the group consisting of Al, Cr, Mo, Ag, Ta, and Ti, or an alloy of two or more of them. The metal oxide layer is an oxide layer of the metal that forms the metal layer. The amorphous metal oxide semiconductor is formed of any one material selected from the group consisting of ZTO, IZTO, IGZTO, ZnO, IGZO, IZO, ITO, GZO, GZTO, ISZO, and ISZTO.

[0009] The heat treatment is carried out at a temperature of 100 to 1000°C. The width of the metal layer (L bar ) and the width (L ch ) and the ratio (L bar / L ch ) is greater than or equal to 0.5 and less than 1.

[0010] A thin film transistor according to an embodiment of the present invention includes a substrate that also serves as a gate electrode; a gate insulating film formed on the substrate; a metal layer formed on the gate insulating film; a metal oxide layer formed on the metal layer and covering the entire surface of the metal layer; a metal oxide semiconductor layer formed to cover the entire surface of the metal oxide layer; and source / drain electrodes formed on the metal oxide semiconductor layer; and further includes an oxygen deficiency layer in the metal oxide semiconductor layer adjacent to the metal oxide layer.

[0011] According to a further embodiment of the present invention, there is provided a thin film transistor comprising: a substrate; a gate electrode formed on the substrate; a gate insulating film formed on the gate electrode; a metal layer formed on the gate insulating film; a metal oxide layer formed on the metal layer and covering an entire surface of the metal layer; a metal oxide semiconductor layer formed to cover an entire surface of the metal oxide layer; and source / drain electrodes formed on the metal oxide semiconductor layer; and further comprising an oxygen deficiency layer within the metal oxide semiconductor layer adjacent to the metal oxide layer. The metal oxide semiconductor layer is formed by crystallizing an amorphous metal oxide semiconductor layer through a heat treatment. Effect of the Invention

[0012] According to the present invention, it is possible to provide a device and a core process technology based on a high mobility crystalline metal oxide that can be applied to the realization of an ultra-high resolution, large area display. By realizing a next generation display through a high mobility crystalline metal oxide semiconductor, it is possible to provide technological competitiveness. In addition to displays, it is advantageous in that the electrical properties of various metal oxides can be utilized to easily apply the same to future electronic devices such as memories and circuits. [Brief description of the drawings]

[0013] [Figure 1] 1 is a flow chart of a method for manufacturing a thin film transistor according to the present invention; [Diagram 2]1 is a diagram illustrating a thin film transistor and a method for manufacturing the same according to the present invention. [Figure 3A] 1 illustrates a three-dimensional structure of a thin film transistor fabricated according to one embodiment of the present invention. [Figure 3B] 1 shows a cross-sectional structure and a micrograph of an actual device, where Lbar represents the width of the metal layer and Lch represents the distance between the source / drain electrodes (the length of the channel region). [Figure 4] 1 is a transmission electron microscopy (TEM) image showing a cross section of a thin film transistor manufactured according to an embodiment of the present invention. [Figure 5A] This shows TEM EDS (Energy Dispersive Spectroscopy). [Figure 5B] 1 is a diagram showing the results of analyzing elemental components of a thin film transistor manufactured according to an embodiment of the present invention through line scanning. [Figure 6A] 6A and 6B are diagrams showing the application of Al metal layers having widths (Lbar) of 0, 15, 30, and 45 μm to a thin film transistor device having a channel length (Lch) of 50 μm, respectively, in which FIG 6A shows the drain current as a function of gate voltage. [Figure 6B] 1 is a graph showing field-effect mobility. [Figure 7A] 7A to 7D are diagrams showing the application of Al metal layers having widths (Lbar) of 0, 15, 30, and 45 μm to a thin film transistor element having a channel length (Lch) of 50 μm, where FIG. 7A shows the field effect mobility. [Figure 7B] Indicates the on / off current ratio. [Figure 7C] Indicates the threshold voltage (Vth). [Figure 7D]It shows a steep subthreshold slope change below the threshold voltage. [Figure 8] 1 is a graph showing activation energy of a thin film transistor element according to the length of a metal layer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, the embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention can be modified in various ways and can have various forms, and specific examples are illustrated in the drawings and described in detail herein. However, it is not intended to limit the present invention to the specific disclosed forms, but it should be understood that the present invention includes all modifications, equivalents, and alternatives within the spirit and technical scope of the present invention. Similar reference numerals are used for similar components while describing each drawing.

[0015] The terms used in this application are merely used to describe specific embodiments and are not intended to limit the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "have" are intended to specify the presence of features, steps, operations, components, parts, or combinations thereof described in the specification, and should be understood not to preclude the presence or additional possibility of one or more other features, steps, operations, components, parts, or combinations thereof.

[0016] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by a person of ordinary skill in the art to which the present invention pertains. Terms as defined in commonly used dictionaries should be interpreted to have a meaning consistent with the meaning they have in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless expressly defined in this application.

[0017] In the present invention, the term "amorphous" refers to a state in which atoms in a substance do not have any particular periodicity and are arranged randomly. In the present invention, "crystallization" refers to a change from a state in which atoms are randomly arranged to a state in which atoms have a specific arrangement structure.

[0018] 1 and 2 are diagrams for explaining a thin film transistor of the present invention and a method for producing the same. Referring to FIGS. 1 and 2, a method for manufacturing a thin film transistor of the present invention includes a first step of forming a gate electrode on a substrate and forming a gate insulating film on the gate electrode, a second step of forming a metal layer on the gate insulating film, a third step of forming an amorphous metal oxide semiconductor layer to cover the entire surface of the metal layer to manufacture a structure, a fourth step of heat-treating the structure, and a fifth step of depositing source / drain electrode layers on the heat-treated structure.

[0019] In this case, the first step is usually performed as described above, but if the substrate itself also serves as the gate electrode (for example, as in FIG. 2, when p-type Si is used as both the substrate and the gate electrode), the first step may be performed immediately to form a gate insulating film on the substrate. Throughout the specification of the present invention, the first step may be applied to both cases where the substrate also serves as the gate electrode and cases where it does not, and this is described separately in the claims.

[0020] The substrate may include silicon (Si). However, it is not limited to silicon, and may include glass, polymer, etc. The substrate may be a p-type substrate containing p-type impurity ions or an n-type substrate containing n-type impurity ions. In the thin film transistor of an embodiment of the present invention, the substrate may be a p-type Si substrate.

[0021] The gate electrode may be made of any one metal selected from the group consisting of Al, Cr, Mo, Ta, and Ti, or an alloy of two or more of these metals, but is not limited thereto.

[0022] The gate insulating film may be made of at least one of SiO2, Si3N4, Al2O3, HfO2, and ZrO2. In one embodiment, the gate insulating film may be SiO2. The thickness of the gate insulating film may be about 1 to 1000 nm.

[0023] In the first step, the gate insulating film may be formed by a thermal oxidation method. It is very important to form a stable gate insulating film in the thin film transistor of the present invention. Therefore, in one embodiment of the present invention, a SiO2 gate insulating film may be formed on a substrate by the thermal oxidation method.

[0024] The metal layer may be formed of any one metal selected from the group consisting of Al, Cr, Mo, Al, Ag, Ta, and Ti. However, the present invention is not limited thereto. For example, in one embodiment, the metal layer may be Al. The thickness of the metal layer may be about 1 to 50 nm, and preferably, the thickness of the metal layer may be about 1 to 15 nm.

[0025] In one embodiment, the metal layer may be a patterned metal layer. The patterned metal layer can increase the integration density of thin film transistors. In addition, the width (L bar The characteristics of the thin film transistor of the present invention can be controlled by the above-mentioned method. This will be described in detail with reference to the following experimental examples.

[0026] In the second step, the metal layer may be formed by sputtering, E-beam evaporation, thermal evaporation, Laser Molecular Beam Epitaxy (L-MBE), Pulsed Laser Deposition (PLD), Metal-Organic Chemical Vapor Deposition (MOCVD), Hydride Vapor Phase Epitaxy (HVPE), or the like, preferably by thermal evaporation. After the metal layer is deposited by the above method, a patterning step may be additionally performed. For example, the patterning may be performed by photolithography.

[0027] The amorphous metal oxide semiconductor layer may be formed of any one material selected from ZTO, IZTO, IGZTO, ZnO, IGZO, IZO, ITO, GZO, GZTO, ISZO, and ISZTO. For example, the amorphous metal oxide semiconductor may be ZTO.

[0028] In the third step, the amorphous metal oxide semiconductor layer may be formed by a vacuum deposition method such as sputtering or atomic layer deposition (ALD), a spin coating, an inkjet method, or the like. In one embodiment, the amorphous metal oxide semiconductor layer may be formed by RF sputtering. The amorphous metal oxide semiconductor layer may be formed to cover the entire exposed surface of the metal layer, and if the metal layer is patterned, the amorphous metal oxide semiconductor layer may be formed in the same pattern as the metal layer. In this case, the patterning of the amorphous metal oxide semiconductor layer may be performed by photolithography.

[0029] In the fourth step, the heat treatment may be performed at a temperature of about 100 to 1000° C., preferably at a temperature of about 200 to 800° C., and more preferably at a temperature of about 400 to 600° C. The heat treatment time and method are not particularly limited in the present invention, and may be performed by an experimenter taking into consideration the desired purpose.

[0030] During the fourth step, the metal layer in contact with the amorphous metal oxide semiconductor layer may absorb oxygen from the amorphous metal oxide semiconductor layer to form a metal oxide layer at the interface. That is, the metal oxide layer is formed of a material in which the metal of the metal layer is oxidized. At this time, an oxygen-deficient region or an oxygen-deficient layer may be formed inside the amorphous metal oxide semiconductor layer adjacent to the metal layer or the metal oxide layer. At the same time as this process is performed, the amorphous metal oxide semiconductor layer may be crystallized.

[0031] In summary, in the present invention, after performing the fourth step, the metal layer and the amorphous metal oxide semiconductor layer structure formed on the metal layer can be changed to a structure including a metal layer, a metal oxide layer formed on the metal layer, and a crystallized crystalline metal oxide semiconductor layer formed on the metal oxide layer, and the crystalline metal oxide semiconductor layer may include an oxygen-deficient layer in a region adjacent to the metal oxide layer.

[0032] The source / drain electrodes may be formed of a metal, for example, any one metal selected from the group consisting of Al, Ag, Au, Cr, Mo, Al, Ag, Ta, and Ti.

[0033] In the fifth step, the source / drain electrode layer may be formed by a thermal evaporation method. The source / drain electrode layer may be formed on the crystalline metal oxide semiconductor layer so as not to cover the entire surface of the crystalline metal oxide semiconductor layer.

[0034] After the fifth step, the surface of the crystalline oxide semiconductor layer exposed by the source / drain electrode layer may be defined as a channel region (or a channel layer). ch ), that is, the characteristics of the thin film transistor of the present invention can be controlled by the distance between the source and drain electrodes.

[0035] In one embodiment, the width (L bar ) and the width (L ch ) and the ratio (L bar / L ch ) may be less than 1. bar / L ch The electrical characteristics of the thin film transistor change depending on the ratio. bar / L ch The closer to 1, the higher the mobility. However, if the lower metal layer and the source / drain electrodes above the channel are completely overlapped, the improvement in mobility characteristics may be reduced. bar / L ch The ratio may be 0.5 to 1 or less, or 0.8 or more and less than 1.

[0036] The thin film transistor of the present invention is manufactured by the manufacturing method of the present invention, and includes a substrate, a gate insulating film formed on the substrate, a metal layer formed on the gate insulating film, a metal oxide layer formed on the metal layer and covering an entire surface of the metal layer, a metal oxide semiconductor layer formed to cover an entire surface of the metal oxide layer, and source / drain electrodes formed on the metal oxide semiconductor layer, and further includes an oxygen deficiency layer in the metal oxide semiconductor layer adjacent to the metal oxide layer.

[0037] The thin film transistor of the present invention is characterized by forming a metal oxide layer, i.e., an insulator layer, between a metal layer and a metal oxide semiconductor layer, which can positively affect the additional charge accumulation and charge transport of the metal oxide semiconductor layer compared to the conventional transistor having a metal layer on top of the metal oxide semiconductor layer.

[0038] The oxygen-deficient layer can improve charge concentration and mobility, which can be confirmed by a change in activation energy (EA) of a transistor device after heat treatment, as will be described in detail in the following experimental examples.

[0039] The metal oxide semiconductor layer may be a crystalline metal oxide semiconductor layer, which is a crystalline metal oxide semiconductor layer obtained by crystallizing an amorphous metal oxide semiconductor layer by heat treatment.

[0040] Hereinafter, the thin film transistor and the manufacturing method thereof according to the present invention will be described in more detail with reference to specific examples and comparative examples. However, the embodiments of the present invention are merely some of the embodiments of the present invention, and the scope of the present invention is not limited to the following examples.

[0041] <Example> A SiO2 layer of about 200 nm thickness was formed on a p-type silicon substrate used as a substrate and an electrode, and this was used as a gate insulating film. An aluminum (Al) metal layer was formed on the SiO2 gate insulating film by thermal evaporation, and then patterned using photolithography. An amorphous zinc tin oxide (ZTO) metal oxide semiconductor layer was then formed on the patterned metal layer by RF sputtering. At this time, the Zn:Sn ratio of the ZTO target material was 7:3. After the metal oxide semiconductor layer was formed, it was patterned using photolithography. Then, it was heat-treated at a temperature of 450°C in air for 1 hour. A hot plate was used for the heat treatment. During the heat treatment, the Al layer in contact with the ZTO layer absorbed oxygen in the adjacent ZTO to form aluminum oxide (Al2O3) at the interface, and at the same time, the amorphous ZTO layer was crystallized. In addition, an oxygen-deficient layer was formed in the ZTO layer adjacent to the Al layer. Finally, source / drain electrodes were formed to manufacture a thin film transistor, and the source / drain electrodes were formed as Al electrodes by thermal deposition, followed by patterning using photolithography to manufacture a thin film transistor according to an embodiment of the present invention.

[0042] <Experimental Example> 1.Structural analysis FIG. 3A shows a three-dimensional structure of a thin film transistor manufactured according to an embodiment of the present invention, and FIG. 3B shows a cross-sectional structure and a microscope photograph of an actual device. bar is the width of the metal layer, and L ch indicates the distance between the source / drain electrodes (length of the channel region).

[0043] Referring to FIG. 3A, the thin film transistor of the present invention includes an oxygen-deficient layer (not shown) in the inner region of the ZTO layer adjacent to the Al layer, by forming aluminum oxide (Al2O3) between the Al layer and the ZTO layer through heat treatment. Referring to FIG. 3B, the thin film transistor of the present invention includes an L bar / L ch The electrical characteristics can be controlled by the ratio.bar / L ch The closer the ratio of L to 1, the higher the mobility of the thin film transistor can be. bar <L ch In the case of , it was shown that the improvement in the mobility characteristics of the thin film transistor is reduced.

[0044] 2. Cross-sectional analysis FIG. 4 is a transmission electron microscopy (TEM) image showing a cross section of a thin film transistor manufactured according to an embodiment of the present invention.

[0045] Referring to FIG. 4, it can be seen that an aluminum oxide (Al2O3) layer and a crystallized ZTO layer (Crystallized ZTO; c-ZTO) were formed in the portion where the Al layer and the ZTO layer were adjacent to each other.

[0046] 3.Elemental analysis FIG. 5A shows an energy dispersive spectroscopy (EDS) of a TEM, and FIG. 5B shows a result of analyzing elemental components of a thin film transistor manufactured according to an embodiment of the present invention through line scanning.

[0047] 5A and 5B, it can be seen that an oxygen-deficient layer exists in the crystallized ZTO layer (c-ZTO) adjacent to the aluminum oxide (Al2O3) layer. It is known that when an oxygen-deficient layer exists in a metal oxide semiconductor layer, the electron concentration can be increased and the mobility can be increased. Therefore, the present invention can provide high mobility characteristics by including an oxygen-deficient layer in a metal oxide semiconductor layer.

[0048] 4. Thin-film transistor characteristics Figure 6 shows the 50 μm channel length (L ch ) to thin-film transistor elements having widths (L bar6A shows the drain current as a function of gate voltage, and FIG. 6B shows the field-effect mobility.

[0049] Referring to FIG. 6A, L bar It is shown that the drain current increases when the size of L increases from 0 to 45 μm. Referring to FIG. 6B, the field effect mobility also increases. bar The larger the size of L bar If is 45μm, 100cm 2 The field-effect mobility was 1.0 V or more.

[0050] Figure 7 shows the 50 μm channel length (L ch ) were applied to thin film transistor elements having widths (L bar 7A shows the field effect mobility, FIG. 7B shows the on / off current ratio, FIG. 7C shows the threshold voltage (Vth), and FIG. 7D shows the abrupt change in subthreshold slope when an Al metal layer having a .DELTA..times ...

[0051] Referring to FIG. 7A, L bar As the magnitude of the Al metal layer increases, the field effect mobility tends to increase. On the other hand, referring to Figures 7B, 7C, and 7D, the on / off current ratio, threshold voltage, and sub-threshold voltage gradient characteristics are similar to those in the case without the Al metal layer.

[0052] 5. Activation Energy Analysis FIG. 8 is a graph showing activation energy of a thin film transistor device according to the length of a metal layer. 8, it was confirmed that the activation energy decreases depending on the length of the metal layer, and in particular, it was shown that the activation energy decreases as the length of the metal layer approaches the length of the channel. The decrease in activation energy can be explained by the presence of an oxygen deficiency layer or a crystallization layer.

[0053] Although the present invention has been described above with reference to preferred embodiments thereof, it should be understood that those skilled in the art can make various modifications and variations to the present invention without departing from the spirit and scope of the present invention as set forth in the claims.

Claims

1. A first step of forming a gate insulating film on a substrate which simultaneously serves as a gate electrode; a second step of forming a metal layer on the gate insulating film; a third step of forming an amorphous metal oxide semiconductor layer to cover the entire surface of the metal layer to produce a structure; a fourth step of heat treating the structure; and a fifth step of depositing a source / drain electrode layer on the heat treated structure; during the fourth step, a metal oxide layer is formed between the amorphous metal oxide semiconductor layer and the metal layer, the amorphous metal oxide semiconductor layer is crystallized, and an oxygen-deficient region is formed in the amorphous metal oxide semiconductor layer adjacent to the metal layer or the metal oxide layer.

2. A first step of forming a gate electrode on a substrate and then forming a gate insulating film on the gate electrode; a second step of forming a metal layer on the gate insulating film; a third step of forming an amorphous metal oxide semiconductor layer to cover the entire surface of the metal layer to produce a structure; a fourth step of heat treating the structure; and a fifth step of depositing a source / drain electrode layer on the heat treated structure; during the fourth step, a metal oxide layer is formed between the amorphous metal oxide semiconductor layer and the metal layer, the amorphous metal oxide semiconductor layer is crystallized, and an oxygen-deficient region is formed in the amorphous metal oxide semiconductor layer adjacent to the metal layer or the metal oxide layer.

3. 3. The method for manufacturing a thin film transistor according to claim 1, wherein the metal layer is formed of any one metal selected from the group consisting of Al, Cr, Mo, Ag, Ta, and Ti, or an alloy of two or more metals selected from the group consisting of Al, Cr, Mo, Ag, Ta, and Ti.

4. 4. The method for producing a thin film transistor according to claim 3, wherein the metal oxide layer is an oxide layer of a metal that forms the metal layer.

5. 3. The method of claim 1, wherein the amorphous metal oxide semiconductor is made of any one selected from the group consisting of ZTO, IZTO, IGZTO, ZnO, IGZO, IZO, ITO, GZO, GZTO, ISZO, and ISZTO.

6. 3. The method for manufacturing a thin film transistor according to claim 1, wherein the heat treatment is carried out at a temperature of 100 to 1000.degree.

7. The width of the metal layer (L ｂａｒ ) and the width (L ｃｈ ) and the ratio (L ｂａｒ / L ｃｈ 3. The method for producing a thin film transistor according to claim 1, wherein the ratio of the number of the first and second electrodes to the number of electrodes is 0.5 or more and less than 1.

8. A substrate simultaneously serving as a gate electrode; a gate insulating film formed on the substrate; a metal layer formed on the gate insulating film; a metal oxide layer formed on the metal layer so as to cover the entire surface of the metal layer; a metal oxide semiconductor layer formed so as to cover the entire surface of the metal oxide layer; and source / drain electrodes formed on the metal oxide semiconductor layer; The thin film transistor further comprises an oxygen-deficient layer within the metal oxide semiconductor layer adjacent to the metal oxide layer.

9. Substrate; a gate electrode formed on the substrate; a gate insulating film formed on the gate electrode; a metal layer formed on the gate insulating film; a metal oxide layer formed on the metal layer so as to cover the entire surface of the metal layer; a metal oxide semiconductor layer formed so as to cover the entire surface of the metal oxide layer; and source / drain electrodes formed on the metal oxide semiconductor layer; The thin film transistor further comprises an oxygen-deficient layer within the metal oxide semiconductor layer adjacent to the metal oxide layer.

10. 10. The thin film transistor of claim 9, wherein the metal oxide semiconductor layer is a crystalline metal oxide semiconductor layer.

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