Power Conversion Equipment
The power conversion device addresses capacitor voltage imbalance in modular multilevel converters by using an arm balance control system to independently manage capacitor voltages, enhancing stability and efficiency.
Patent Information
- Application Number
- JP2024553498
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2024-06-04
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2044-06-04
AI Technical Summary
Existing power conversion devices face challenges in balancing the capacitor voltages of the positive and negative arms in modular multilevel converters, leading to interference between arm balance control and alternating current control, which affects the stability and efficiency of power conversion.
A power conversion device with a control system that includes an arm balance control section to calculate current adjustment values for balancing capacitor voltages, separate from alternating current control, using current and voltage commands to manage capacitor voltages independently.
The solution effectively balances capacitor voltages, preventing overvoltage and improving operational stability, especially during system abnormalities, by minimizing interference between arm balance and alternating current control.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a power conversion device. [Background technology]
[0002] In recent years, modular multilevel converters (MMCs) have become known as high-voltage, large-capacity power conversion devices that are applied to high-voltage systems such as power grids. MMCs are composed of arms in which multiple unit converters called converter cells are cascaded. The converter cells include multiple switching elements and storage elements (e.g., capacitors).
[0003] In a three-phase MMC, an arm is provided for each phase, and each phase arm is composed of a positive arm and a negative arm. The connection point between the positive arm and the negative arm is the AC input / output terminal. Due to the voltage variation of the capacitors in each converter cell, the voltage of the capacitor in the positive arm and the voltage of the capacitor in the negative arm may become unbalanced. Therefore, it is necessary to control the capacitor voltage to suppress the imbalance.
[0004] The power conversion device of Patent No. 6227192 (Patent Document 1) includes an AC current control unit that calculates an AC control command that controls the AC current component flowing in each phase AC line, an arm balance control unit that calculates a first voltage adjustment value that balances the positive side capacitor voltage and the negative side capacitor voltage, and an AC side command calculation unit that calculates an AC voltage command by adjusting the AC control command using the first voltage adjustment value. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Patent No. 6227192 Summary of the Invention [Problem to be solved by the invention]
[0006] In Patent Document 1, it is considered to balance the voltage of the capacitor in the positive arm and the voltage of the capacitor in the negative arm to prevent overvoltage of the capacitor and to stably operate the power conversion device even when an abnormality occurs in the system. In the power conversion device according to Patent Document 1, an AC voltage command is generated by directly correcting an AC control command for controlling an AC current component using a first voltage adjustment value that balances the positive capacitor voltage and the negative capacitor voltage. In this case, there is a problem that the arm balance control and the AC current control interfere with each other, making it impossible to flow a current required for balancing the capacitor voltage, and thus deteriorating the balance controllability of the capacitor voltage.
[0007] An object in one aspect of the present disclosure is to provide a power conversion device capable of more appropriately balancing the capacitor voltage of the positive arm and the capacitor voltage of the negative arm in each converter cell. [Means for solving the problem]
[0008] According to an embodiment, there is provided a power conversion device that performs power conversion between an AC system and a DC circuit. The power conversion device includes a power converter including a plurality of leg circuits respectively corresponding to a plurality of phases of the AC system, and a control device that controls the power converter. The leg circuits include a positive arm and a negative arm connected in series. A connection point of the positive arm and the negative arm is connected to an AC line of a corresponding phase of the AC system. Both ends of the positive arm and the negative arm connected in series are connected to a DC circuit. Each of the positive arm and the negative arm has a plurality of converter cells connected in series. Each of the plurality of converter cells has a plurality of switching elements and a capacitor connected to the plurality of switching elements. The control device includes an arm balance control unit that calculates a current adjustment value for balancing a positive side capacitor voltage indicating the voltage of the capacitor in the positive side arm and a negative side capacitor voltage indicating the voltage of the capacitor in the negative side arm, an AC current control unit that generates an AC voltage command value for an AC voltage to be output to the AC line by adjusting a current command value of an AC current flowing through the AC line using the current adjustment value, and a command calculation unit that calculates a positive side arm voltage command value for the positive side arm and a negative side arm voltage command value for the negative side arm based on the AC voltage command value and a DC voltage command value for a DC voltage output to the DC circuit. Effect of the Invention
[0009] According to the present disclosure, in a power conversion device, it is possible to more appropriately balance the capacitor voltage of the positive arm and the capacitor voltage of the negative arm in each converter cell. [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 is a diagram illustrating a configuration example of a power conversion device. [Diagram 2] FIG. 2 is a circuit diagram illustrating an example of a converter cell. [Diagram 3] FIG. 2 is a block diagram showing an example of a hardware configuration of a control device. [Figure 4] FIG. 2 is a block diagram showing a functional configuration of a control device. [Diagram 5]FIG. 2 is a block diagram showing a functional configuration of an arm balance control unit. [Figure 6] 4 is a block diagram showing a functional configuration of an AC current control unit; FIG. [Figure 7] FIG. 13 is a block diagram showing a functional configuration of an arm balance control unit according to a modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] Hereinafter, the present embodiment will be described with reference to the drawings. In the following description, the same components are denoted by the same reference numerals. Their names and functions are also the same. Therefore, detailed description thereof will not be repeated.
[0012] <Overall composition> Fig. 1 is a diagram showing a configuration example of a power conversion device. Referring to Fig. 1, a power conversion device 100 performs power conversion between an AC system 14 and a DC circuit 15. The DC circuit 15 is, for example, a DC power system including a DC transmission network or the like, or a DC terminal of another power conversion device. The DC circuit 15 may be configured to include a power storage device connected to the DC terminal of the power converter 7. The power storage device includes, for example, an electric double layer capacitor or a storage battery such as a lithium ion battery.
[0013] The power conversion device 100 includes a self-excited power converter 7 and a control device 20 that controls the power converter 7. Typically, the power converter 7 is configured by a double-star modular multilevel converter including a plurality of converter cells (corresponding to the "cells" in FIG. 1) 10 connected in series with each other. A "converter cell" is also called a "sub module" or a "unit converter."
[0014] The power converter 7 is connected to the DC circuit 15 and is a power converter that performs power conversion between the DC circuit 15 and the AC system 14. Specifically, the power converter 7 converts the DC power output from the DC circuit 15 into AC power, and outputs the AC power to the AC system 14 via the transformer 13. The power converter 7 also converts the AC power from the AC system 14 into DC power, and outputs the DC power to the DC circuit 15.
[0015] In the example of FIG. 1, the power converter 7 includes a plurality of leg circuits 4u, 4v, and 4w corresponding to the U-phase, V-phase, and W-phase of the AC system 14, respectively. Specifically, the power converter 7 includes a plurality of leg circuits 4u, 4v, and 4w (hereinafter, collectively referred to as "leg circuits 4" when referring to any one of them) connected in parallel with each other between a positive DC terminal (i.e., a high-potential DC terminal) Np and a negative DC terminal (i.e., a low-potential DC terminal) Nn. The leg circuits 4 are connected between the AC system 14 and the DC circuit 15, and perform power conversion between the two circuits. The leg circuits 4 of each phase are connected in parallel between the positive DC bus 2 and the negative DC bus 3.
[0016] The AC terminals Nu, Nv, and Nw provided in the leg circuits 4u, 4v, and 4w, respectively, are connected to an AC system 14 via a transformer 13. The AC system 14 is, for example, a three-phase AC power system including an AC power source. DC terminals (i.e., a positive DC terminal Np and a negative DC terminal Nn) provided in common to each leg circuit 4 are connected to a DC circuit 15.
[0017] Instead of using the transformer 13 in Fig. 1, the leg circuits 4u, 4v, 4w may be configured to be connected to the AC system 14 via an interconnection reactor. Furthermore, instead of the AC terminals Nu, Nv, Nw, the leg circuits 4u, 4v, 4w may each be provided with a primary winding, and the leg circuits 4u, 4v, 4w may be AC-connected to the transformer 13 or the interconnection reactor via a secondary winding magnetically coupled to the primary winding. In this case, the primary winding may be the reactors 9a, 9b described below. That is, the leg circuit 4 is electrically (i.e., DC- or AC-connected) to the AC system 14 via a connection part provided in each leg circuit 4u, 4v, 4w, such as the AC terminals Nu, Nv, Nw or the above-mentioned primary winding.
[0018] The leg circuit 4u includes a positive arm 5u from the positive DC terminal Np to the AC terminal Nu, and a negative arm 6u from the negative DC terminal Nn to the AC terminal Nu. A connection point between the positive arm 5u and the negative arm 6u is connected to the transformer 13 as the AC terminal Nu. The positive DC terminal Np and the negative DC terminal Nn are connected to the DC circuit 15. The leg circuit 4v includes a positive arm 5v and a negative arm 6v, and the leg circuit 4w includes a positive arm 5w and a negative arm 6w. The positive arms 5u, 5v, and 5w are also collectively referred to as the "positive arm 5," and the negative arms 6u, 6v, and 6w are also collectively referred to as the "negative arm 6."
[0019] Thus, the leg circuit 4 is composed of the positive side arm 5 and the negative side arm 6 connected in series. The connection points of the positive side arm 5 and the negative side arm 6 (e.g., AC terminals Nu, Nv, Nw) are connected to AC lines of corresponding phases of the AC system 14. Both ends of the positive side arm 5 and the negative side arm 6 connected in series (i.e., the positive DC terminal Np and the negative DC terminal Nn) are connected to the DC circuit 15. Since the leg circuits 4v, 4w have the same configuration as the leg circuit 4u, the leg circuit 4u will be described below as a representative example.
[0020] In the leg circuit 4u, the positive arm 5u includes a plurality of converter cells 10 connected in series with each other and a reactor 9a. The plurality of converter cells 10 and the reactor 9a are connected in series with each other. The negative arm 6u includes a plurality of converter cells 10 connected in cascade with each other and a reactor 9b. The plurality of converter cells 10 and the reactor 9b are connected in series with each other.
[0021] The reactor 9a may be inserted at any position in the positive arm 5u, and the reactor 9b may be inserted at any position in the negative arm 6u. There may be a plurality of reactors 9a and 9b. The inductance values of the reactors may be different from each other. Furthermore, only the reactor 9a in the positive arm 5u or only the reactor 9b in the negative arm 6u may be provided.
[0022] The power conversion device 100 has various detectors (not shown) (for example, an AC voltage detector, an AC current detector, a DC voltage detector, an arm current detector, etc.). These detectors measure electrical quantities (i.e., current, voltage) used to control the power converter 7. Signals detected by these detectors are input to the control device 20.
[0023] Specifically, the AC voltage detector detects AC voltages Vsu, Vsv, Vsw (hereinafter also collectively referred to as "AC voltage Vs") of each phase of the AC system 14. The AC current detector detects AC currents Isu, Isv, Isw (hereinafter also collectively referred to as "AC current Is") flowing through each phase AC line of the AC system 14. The DC voltage detector detects the DC voltage Vdc of the DC circuit 15. Note that the neutral point voltage Vsn of the power converter 7 may be calculated using the DC voltage Vdc of the DC circuit 15, or may be detected by a neutral point voltage detector.
[0024] Each arm current detector provided in the leg circuit 4u detects a positive arm current Iup flowing in the positive arm 5u and a negative arm current Iun flowing in the negative arm 6u. Each arm current detector provided in the leg circuit 4v detects a positive arm current Ivp and a negative arm current Ivn, respectively. Each arm current detector provided in the leg circuit 4w detects a positive arm current Iwp and a negative arm current Iwn, respectively. Hereinafter, the positive arm currents Iup, Ivp, Iwp are also collectively referred to as "positive arm current Ip," and the negative arm currents Iun, Ivn, Iwn are also collectively referred to as "negative arm current In."
[0025] <Converter cell configuration> Fig. 2 is a circuit diagram showing an example of a converter cell. The converter cell 10 shown in Fig. 2(a) has a circuit configuration called a half-bridge configuration. This converter cell 10 includes a series body formed by connecting two switching elements 31p and 31n in series, a capacitor 32 as a power storage element, and a voltage detector 33. The series body and the capacitor 32 are connected in parallel. The voltage detector 33 detects a voltage Vc, which is the voltage across the capacitor 32.
[0026] The converter cell 10 shown in Fig. 2(b) has a circuit configuration called a full-bridge configuration. This converter cell 10 includes a first series body formed by connecting two switching elements 31p1 and 31n1 in series, a second series body formed by connecting two switching elements 31p2 and 31n2 in series, a capacitor 32, and a voltage detector 33. The first series body, the second series body, and the capacitor 32 are connected in parallel. The voltage detector 33 detects a voltage Vc.
[0027] The two switching elements 31p and 31n in Fig. 2(a) and the four switching elements 31p1, 31n1, 31p2, and 31n2 in Fig. 2(b) are configured by connecting a free wheel diode in anti-parallel to a semiconductor switching element such as an IGBT, a GCT thyristor, or a MOSFET (Metal Oxide Semiconductor Field-Effect Transistor). In Fig. 2(a) and Fig. 2(b), a film capacitor or the like is mainly used as the capacitor 32.
[0028] In the following description, switching elements 31p, 31n, 31p1, 31n1, 31p2, and 31n2 are also collectively referred to as switching element 31. Furthermore, the on / off of the semiconductor switching element in switching element 31 is simply described as "on / off of switching element 31."
[0029] 2(a), both terminals of switching element 31n are input / output terminals P1, P2. The voltage across capacitor 32 and zero voltage are output by the switching operations of switching elements 31p and 31n. For example, when switching element 31p is on and switching element 31n is off, the voltage across capacitor 32 is output. When switching element 31p is off and switching element 31n is on, zero voltage is output.
[0030] Next, referring to Fig. 2(b), the midpoint between the switching elements 31p1 and 31n1 and the midpoint between the switching elements 31p2 and 31n2 are defined as input / output terminals P1 and P2 of the converter cell 10, respectively. The converter cell 10 shown in Fig. 2(b) outputs a positive voltage or a zero voltage by turning on the switching element 31n2, turning off the switching element 31p2, and alternately turning on the switching elements 31p1 and 31n1. The converter cell 10 shown in Fig. 2(b) can also output a zero voltage or a negative voltage by turning off the switching element 31n2, turning on the switching element 31p2, and alternately turning on the switching elements 31p1 and 31n1.
[0031] In the following description, an example will be described in which the converter cell 10 is configured as a half-bridge cell shown in Fig. 2(a) and uses a semiconductor switching element and a capacitor as a storage element. However, the converter cell 10 may also be configured as a full-bridge cell shown in Fig. 2(b). Also, a converter cell other than the above-described configuration, for example, a converter cell using a circuit configuration also called a 1.5 half-bridge configuration in which the switching element 31p2 in Fig. 2(b) is replaced with only a diode, may also be used.
[0032] <Control device hardware configuration> FIG. 3 is a block diagram showing an example of a hardware configuration of a control device. The control device 20 in FIG. 3 is configured based on a computer. Referring to FIG. 3, the control device 20 includes one or more input converters 70, one or more sample-and-hold circuits (S / H circuits) 71, a multiplexer (MUX: multiplexer) 72, and an A / D converter 73. Furthermore, the control device 20 includes one or more CPUs (Central Processing Units) 74, a RAM (Random Access Memory) 75, and a ROM (Read Only Memory) 76. Furthermore, the control device 20 includes one or more input / output interfaces 77, an auxiliary storage device 78, and a bus 79 that connects the above-mentioned components to each other.
[0033] The input converter 70 includes an auxiliary transformer for each input channel. Each auxiliary transformer converts the detection signals from the various detectors provided in the power conversion device 100 into signals at voltage levels suitable for subsequent signal processing.
[0034] A sample-and-hold circuit 71 is provided for each input converter 70. The sample-and-hold circuit 71 samples and holds a signal representing an electrical quantity received from the corresponding input converter 70 at a specified sampling frequency.
[0035] The multiplexer 72 sequentially selects the signals held in the multiple sample-and-hold circuits 71. The A / D converter 73 converts the signal selected by the multiplexer 72 into a digital value. Note that by providing multiple A / D converters 73, A / D conversion may be performed in parallel on detection signals of multiple input channels.
[0036] The CPU 74 controls the entire control device 20 and executes arithmetic processing according to a program. The RAM 75 as a volatile memory and the ROM 76 as a non-volatile memory are used as the main memory of the CPU 74. The ROM 76 stores programs and setting values for signal processing. The auxiliary storage device 78 is a non-volatile memory with a larger capacity than the ROM 76, and stores programs and data on detected values of electrical quantity. The input / output interface 77 is an interface circuit for communication between the CPU 74 and an external device.
[0037] At least a part of the control device 20 may be configured using circuits such as FPGA and ASIC, etc. Alternatively, at least a part of the control device 20 may be configured using analog circuits.
[0038] <Control device functional configuration> Since the power converter 7 outputs DC and AC, the control device 20 needs to control both the DC side and the AC side. Furthermore, a circulating current flows in the power converter 1, circulating between the positive side arm 5 and the negative side arm 6 without contributing to either the AC side output or the DC side output. Therefore, the control device 20 controls the circulating current in addition to controlling the DC side and the AC side.
[0039] Fig. 4 is a block diagram showing a functional configuration of the control device. Referring to Fig. 4, the control device 20 includes a voltage command generating unit 21 and a PWM control unit 22. The configurations of the voltage command generating unit 21 and the PWM control unit 22 are realized by, for example, a processing circuit. The processing circuit may be dedicated hardware, or may be a CPU 74 that executes a program stored in an internal memory of the control device 20. When the processing circuit is dedicated hardware, the processing circuit is configured by, for example, an FPGA, an ASIC, or a combination of these.
[0040] The voltage command generating unit 21 generates a positive arm voltage command value Vpref for the positive arm 5 of each phase and a negative arm voltage command value Vnref for the negative arm 6 of each phase based on the input information of various voltages and currents. Specifically, the voltage command generating unit 21 includes an arm balance control unit 24, an AC current control unit 25, a neutral point voltage control unit 26, a circulating current control unit 27, and a command calculation unit 28.
[0041] The arm balance control unit 24 receives inputs of a positive-side capacitor voltage Vcp indicating the voltage of the capacitor 32 in the positive-side arm 5, a negative-side capacitor voltage Vcn indicating the voltage of the capacitor 32 in the negative-side arm 6, and a DC current Idc. Typically, the average value of the voltages Vc of all the capacitors 32 in the positive-side arm 5 is used as the positive-side capacitor voltage Vcp, and the average value of the voltages Vc of all the capacitors 32 in the negative-side arm 6 is used as the negative-side capacitor voltage Vcn.
[0042] However, the positive-side capacitor voltage Vcp may be the maximum value, minimum value, or median value of the voltages Vc of all the capacitors 32 in the positive-side arm 5. Also, the positive-side capacitor voltage Vcp may be the voltage value of the capacitor 32 of any converter cell 10 in the positive-side arm 5. Similarly, the negative-side capacitor voltage Vcn may be the maximum value, minimum value, or median value of the voltages Vc of all the capacitors 32 in the negative-side arm 6. Also, the negative-side capacitor voltage Vcn may be the voltage value of the capacitor 32 of any converter cell 10 in the negative-side arm 6.
[0043] The arm balance control unit 24 calculates a current adjustment value Iad for balancing the positive side capacitor voltage Vcp and the negative side capacitor voltage Vcn (i.e., suppressing voltage variations). The arm balance control unit 24 also calculates a voltage adjustment value ΔVnp for adjusting the neutral point voltage Vnp based on the positive side capacitor voltage Vcp, the negative side capacitor voltage Vcn, and the DC current Idc. A detailed configuration of the arm balance control unit 24 will be described later.
[0044] The AC current control unit 25 receives inputs of the AC current Is flowing through the AC line of the AC system 14 and a current command value Isref for the AC current Is. The AC current control unit 25 adjusts the current command value Isref using the current adjustment value Iad to generate an AC voltage command value Vsref for the AC voltage Vs to be output to the AC line. Specifically, the AC current control unit 25 generates the AC voltage command value Vsref so that the AC current Is follows the current command value Isref adjusted using the current adjustment value Iad. A detailed configuration of the AC current control unit 25 will be described later.
[0045] The neutral point voltage control unit 26 receives inputs of the neutral point voltage Vnp of the power converter 7 and the voltage adjustment value ΔVnp calculated by the arm balance control unit 24. The neutral point voltage control unit 26 generates a neutral point voltage command value Vnpref for controlling the neutral point voltage Vnp based on the neutral point voltage Vnp and the voltage adjustment value ΔVnp. Typically, the neutral point voltage control unit 26 generates the sum of the neutral point voltage Vnp and the voltage adjustment value ΔVnp as the neutral point voltage command value Vnpref.
[0046] The circulating current control unit 27 generates a circulating control command value Vzref for controlling the circulating current Iz that does not flow in the DC circuit 15 but circulates within the power converter 7 (specifically, between the leg circuits 4 of each phase). Specifically, the circulating current control unit 27 generates the circulating control command value Vzref so that the circulating current Iz follows a specified circulating current command value Izref (e.g., 0). The circulating current control unit 27 can be configured as, for example, a proportional controller, a PI controller, a PID controller, or another controller used for feedback control.
[0047] The command calculation unit 28 receives inputs of the AC voltage command value Vsref, the DC voltage command value Vdcref of the DC voltage Vdc output to the DC circuit 15, the neutral point voltage command value Vnpref, and the circulation control command value Vzref. The DC voltage command value Vdcref may be a preset value, or may be a value calculated by known DC output control.
[0048] The command calculation unit 28 distributes the voltage components by subtracting the voltage drops due to the inductance components in the positive side arm 5 and the negative side arm 6 from the voltages shared by the positive side arm 5 and the negative side arm 6, respectively, based on the AC voltage command value Vsref, the DC voltage command value Vdcref, the neutral point voltage command value Vnpref, and the circulation control command value Vzref. In this way, the command calculation unit 28 calculates a positive side arm voltage command value Vpref for the positive side arm 5 of each phase, and a negative side arm voltage command value Vnref for the negative side arm 6 of each phase. For example, the positive side arm voltage command value Vpref is expressed as "Vdcref-Vsref+Vzref-Vnpref". The negative side arm voltage command value Vnref is expressed as "Vdcref+Vsref+Vzref+Vnpref".
[0049] The positive arm voltage command value Vpref and the negative arm voltage command value Vnref of each phase generated by the voltage command generating unit 21 become output voltage commands that control the DC voltage Vdc of the DC circuit 15 to the DC voltage command value Vdcref, the AC voltage Vs to the AC voltage command value Vsref, the neutral point voltage Vnp to the neutral point voltage command value Vnpref, and the circulating current Iz to the circulating control command value Vzref.
[0050] The PWM control unit 22 generates a gate signal GP that PWM controls each converter cell 10 in the positive arm 5 and the negative arm 6 of each phase based on the positive arm voltage command value Vpref and the negative arm voltage command value Vnref of each phase. The switching element 31 in each converter cell 10 is driven and controlled by the gate signal GP, and the output voltage of the power converter 7 is controlled to a desired value.
[0051] <Arm balance control unit configuration> 5 is a block diagram showing a functional configuration of the arm balance control unit 24. Referring to FIG. 5, the arm balance control unit 24 includes a current adjustment value calculation unit 50 and a neutral point adjustment value calculation unit 51.
[0052] The current adjustment value calculation unit 50 has a configuration for calculating the current adjustment value Iad (i.e., the current adjustment values Iadu, Iadv, and Iadw) for each of the U, V, and W phases. Specifically, the current adjustment value calculation unit 50 includes subtractors 55u to 55w (hereinafter also collectively referred to as "subtractors 55"), filters 56u to 56w (hereinafter also collectively referred to as "filters 56"), a calculator 57, subtractors 58u to 58w (hereinafter also collectively referred to as "subtractors 58"), compensators 62u to 62w (hereinafter also collectively referred to as "compensators 62"), limiters 63u to 63w (hereinafter also collectively referred to as "limiters 63"), and a coordinate conversion unit 64. The calculation method of the current adjustment value Iad is common to each phase.
[0053] The subtractor 55 calculates the deviation ΔVcpn between the positive side capacitor voltage Vcp and the negative side capacitor voltage Vcn. Specifically, the subtractor 55u calculates the deviation ΔVcpnu between the positive side capacitor voltage Vcpu of the U phase and the negative side capacitor voltage Vcnu of the U phase (i.e., ΔVcpnu=Vcpu-Vcnu). The subtractor 55v calculates the deviation ΔVcpnv between the positive side capacitor voltage Vcpv of the V phase and the negative side capacitor voltage Vcnv of the V phase. The subtractor 55w calculates the deviation ΔVcpnw between the positive side capacitor voltage Vcpw of the W phase and the negative side capacitor voltage Vcnw of the W phase.
[0054] The filter 56 filters the deviation ΔVcpn and outputs the deviation ΔVcpn_f. Specifically, the filter 56u outputs the deviation ΔVcpnu_f obtained by removing a specified frequency component from the deviation ΔVcpnu. Similarly, the filters 56v and 56w output the deviations ΔVcpnv_f and ΔVcpnw_f, respectively, that have been similarly filtered. This is because ΔVcpn, which is the voltage difference between the positive-side capacitor voltage Vcp and the negative-side capacitor voltage Vcn, contains specified frequency components that are not to be controlled (for example, a fundamental frequency component, a frequency component twice the fundamental frequency, etc.).
[0055] Each filter 56 may be, for example, a band-stop filter that removes a specified frequency, such as a fundamental wave frequency and a frequency twice the fundamental wave frequency, and may be a filter that passes the frequency band to be controlled.
[0056] A calculator 57 calculates a common component ΔVcz of the deviation ΔVcpn_f of each phase by multiplying the sum of the deviations ΔVcpnu_f, ΔVcpnv_f, ΔVcpnw_f of each phase (hereinafter collectively referred to as "deviation ΔVcpn_f") by 1 / 3. In other words, the common component ΔVcz is the average value of the deviations ΔVcpn_f of each phase.
[0057] The subtractor 58 outputs a subtraction value ΔVcg obtained by subtracting the average value ΔVcz from the deviation ΔVcpn_f. Specifically, the subtractor 58u calculates a subtraction value ΔVcgu obtained by subtracting the average value ΔVcz from the deviation ΔVcpnu_f. The subtractor 58v calculates a subtraction value ΔVcgv obtained by subtracting the average value ΔVcz from the deviation ΔVcpnv_f. The subtractor 58w calculates a subtraction value ΔVcgw obtained by subtracting the average value ΔVcz from the deviation ΔVcpnw_f. The reason for removing the common component ΔVcz from the deviation ΔVcpn_f of each phase in this manner is to separately control the common component ΔVcz. Details will be described later.
[0058] The compensator 62u calculates the current adjustment value Iadu so that the subtraction value ΔVcgu becomes zero. Similarly, the compensator 62v calculates the current adjustment value Iadv so that the subtraction value ΔVcgv becomes zero. The compensator 62w calculates the current adjustment value Iadw so that the subtraction value ΔVcgw becomes zero. In this way, the compensator 62 outputs the current adjustment value Iad so that the subtraction value ΔVcg obtained by subtracting the common component ΔVcz from the deviation ΔVcpn_f obtained by filtering the deviation ΔVcpn between the positive-side capacitor voltage Vcp and the negative-side capacitor voltage Vcn becomes zero. The compensator 62 can be configured as, for example, a proportional controller, a PI controller, a PID controller, or another controller used in feedback control.
[0059] Since the current indicated by the current adjustment value Iad flows from the power converter 7 to the transformer 13, if the current becomes large, there is a possibility that the transformer 13 will become saturated. Therefore, the limiter 63 limits the current adjustment value Iad using a specified limit value.
[0060] Specifically, the limiter 63 outputs a value obtained by limiting the current adjustment value Iad within the current range R (for example, within a range between the lower limit value Imin and the upper limit value Imax) as the current adjustment value Iadx. The limiters 63u, 63v, and 63w output current adjustment values Iadxu, Iadxv, and Iadxw which are values obtained by limiting the current adjustment values Iadu, Iadv, and Iadw, respectively. Typically, the upper limit value Imax and the lower limit value Imin are set to the upper limit and lower limit values of the amount of current permitted by the transformer 13, respectively.
[0061] In the above, the limiter 63 is configured to limit the current adjustment value within the upper and lower limits of the amount of current allowed in the transformer 13. However, the limiter 63 may be configured to pass a current based on the current adjustment value for only a short period of time in order to prevent magnetic saturation of the transformer 13.
[0062] The coordinate conversion unit 64 performs three-phase / two-phase conversion on the current adjustment values Iadxu, Iadxv, and Iadxw using a phase θ synchronized with the AC voltage Vs of the AC system 14 to calculate a d-axis component Id_ad and a q-axis component Iq_ad of the current adjustment value. The d-axis component Id_ad and the q-axis component Iq_ad correspond to a reactive current component and an active current component of the current adjustment value, respectively. Therefore, hereinafter, they are also referred to as the reactive current adjustment value Id_ad and the active current adjustment value Iq_ad. For example, the reactive current adjustment value Id_ad and the active current adjustment value Iq_ad are calculated using the following formula (1). The phase θ is detected from the AC voltages Vsu, Vsv, and Vsw of each phase.
[0063]
number
[0064] As described above, the current adjustment value calculation unit 50 calculates the current adjustment values (that is, the reactive current adjustment value and the active current adjustment value) required to balance the positive side capacitor voltage Vcp and the negative side capacitor voltage Vcn.
[0065] Next, a description will be given of the functional configuration of the neutral point adjustment value calculation unit 51. The neutral point adjustment value calculation unit 51 includes a polarity determination unit 61, a compensator 62z, and a multiplier 66.
[0066] The polarity determining unit 61 determines the polarity H indicating the direction of the zero-phase current in the positive side arm 5 and the negative side arm 6 from the DC current Idc.
[0067] The compensator 62z outputs a calculated value that makes the common component ΔVcz zero. The multiplier 66 multiplies the calculated value by the polarity H, and calculates the multiplied value as the voltage adjustment value ΔVnp. Note that the DC current Idc output from the power converter 7 may be detected by a DC current detector (not shown), or may be calculated by using each arm current.
[0068] By adjusting the neutral point voltage Vsn using the voltage adjustment value ΔVnp calculated by the neutral point adjustment value calculation unit 51, the voltage balance between the positive side capacitor voltage Vcp and the negative side capacitor voltage Vcn of each phase can be controlled collectively.
[0069] Since the polarity for adjusting the neutral point voltage Vsn depends on the polarity of the zero-phase current (i.e., the polarity H of the DC current Idc), the voltage adjustment value ΔVsn is the multiplication value of the calculation value in which the common component ΔVcz is compensated for by the compensator 62z and the polarity H of the DC current Idc. In this way, in order to control the separate adjustment of the neutral point voltage Vsn using the voltage adjustment value ΔVnp, the common component ΔVcz is subtracted from the deviation ΔVcpn_f in the subtractor 58.
[0070] According to the above, the arm balance control unit 24 calculates the deviation ΔVcpn between the positive-side capacitor voltage Vcp and the negative-side capacitor voltage Vcn for each of a plurality of phases (e.g., U phase, V phase, W phase), and calculates the current adjustment value Iad so that the subtraction value obtained by subtracting the average value (e.g., common component ΔVcz) of the deviation ΔVcpn of each phase from the deviation ΔVcpn becomes small (e.g., the subtraction value ΔVcg becomes zero). The arm balance control unit 24 limits the calculated current adjustment value Iad using a specified limit value (e.g., upper limit value Imax and lower limit value Imin).
[0071] In another aspect, the arm balance control unit 24 calculates the voltage adjustment value ΔVnp based on the positive side capacitor voltage Vcp, the negative side capacitor voltage Vcn, and polarity information (e.g., polarity H) of the zero-phase current in the positive side arm 5 and the negative side arm 6. More specifically, the arm balance control unit 24 determines the polarity of the DC current Idc flowing through the power converter 7 as the polarity information, and calculates the voltage adjustment value ΔVnp by multiplying the average value of the deviation ΔVcpn of each phase by the polarity information.
[0072] <Configuration of AC current control section> 6 is a block diagram showing the functional configuration of the AC control unit 25. Referring to FIG. 6, the AC control unit 25 includes a coordinate conversion unit 81, adders 82d and 82q, subtractors 83d and 83q, compensators 84d and 84q, and a coordinate conversion unit 85.
[0073] The coordinate conversion unit 81 converts the AC currents Isu, Isv, and Isw into three-phase / two-phase values using a phase θ synchronized with the AC voltage Vs, and calculates a reactive current Id corresponding to the d-axis component of the AC current Is and an active current Iq corresponding to the q-axis component of the AC current Is. For example, the reactive current Id and the active current Iq are calculated using the following equation (2).
[0074]
number
[0075] The adder 82d calculates a new reactive current command value Idxref by adding the reactive current command value Idref and the reactive current adjustment value Id_ad. The subtractor 83d calculates a deviation ΔId between the reactive current command value Idxref and the reactive current Id (i.e., ΔId=Idxref-Id). The adder 82q calculates a new active current command value Iqxref by adding the active current command value Iqref and the active current adjustment value Iq_ad. The subtractor 83q calculates a deviation ΔIq between the active current command value Iqxref and the active current Iq (i.e., ΔIq=Iqxref-Iq).
[0076] The compensator 84d generates a d-axis voltage command value Vdref for the AC voltage Vs so that the deviation ΔId becomes zero. The compensator 84q generates a q-axis voltage command value Vqref for the AC voltage Vs so that the deviation ΔIq becomes zero. The compensators 84d and 84q may be configured as, for example, a proportional controller, a PI controller, a PID controller, or other controllers used for feedback control.
[0077] A coordinate conversion unit 85 performs two-phase / three-phase conversion on the d-axis voltage command value Vdref and the q-axis voltage command value Vqref using the phase θ to generate three-phase AC voltage command values Vsuref, Vsvref, and Vswref of the AC current Is.
[0078] In this way, the AC current control unit 25 generates AC voltage command values Vsuref, Vsvref, and Vswref so that the active current Iq follows the new active current command value Iqxref adjusted using the active current adjustment value Iq_ad, and so that the reactive current Id follows the new reactive current command value Idxref adjusted using the reactive current adjustment value Id_ad.
[0079] The above-mentioned PWM control unit 22 calculates an output voltage command value for each converter cell 10 based on the AC voltage command values Vsuref, Vsvref, and Vswref of each phase, performs PWM control based on the output voltage command value, and generates a gate signal GP that controls the on / off driving of the switching elements of each converter cell 10.
[0080] <Modification> Fig. 7 is a block diagram showing a functional configuration of an arm balance control unit according to a modified example. Referring to Fig. 7, the configuration of an arm balance control unit 24A corresponds to a configuration in which the neutral point adjustment value calculation unit 51 in the arm balance control unit 24 in Fig. 4 is replaced with a neutral point adjustment value calculation unit 51A.
[0081] Specifically, the neutral point adjustment value calculation unit 51 was configured to determine the polarity H of the zero-phase current in the positive arm 5 and the negative arm 6 from the DC current Idc, but the neutral point adjustment value calculation unit 51A is configured to determine the polarity information (e.g., polarity H) of the zero-phase current in the positive arm 5 and the negative arm 6 from the active power P rather than the DC current Idc.
[0082] The neutral point adjustment value calculation unit 51A includes a polarity determination unit 61A, a compensator 62z, and a multiplier 66. The polarity determination unit 61A determines a polarity H indicating the direction of the zero-phase current in the positive side arm 5 and the negative side arm 6 from the active power P. The multiplier 66 multiplies the calculated value by the polarity H, and calculates the multiplied value as a voltage adjustment value ΔVnp. The active power P may be the active power output to the AC system 14, or may be the active power output to the DC circuit 15. The active power P is calculated based on the AC current Is and the AC voltage Vs, or the DC current Idc and the DC voltage Vdc.
[0083] As described above, the arm balance control unit 24A according to the modified example determines the polarity of the active power P output from the power converter 7 as polarity information.
[0084] <Advantages> According to this embodiment, a current adjustment value for suppressing the imbalance between the positive side capacitor voltage Vcp and the negative side capacitor voltage Vcn is calculated based on the arm balance control, and the AC current control is executed according to the AC current command value corrected using the current adjustment value. Therefore, it is possible to prevent interference between the arm balance control and the AC current control, and it is possible to appropriately balance the positive side arm voltage and the negative side arm voltage of the converter cell 10. This makes it possible to improve the operation continuity of the power conversion device 100 during a system accident or the like.
[0085] In addition, since the current adjustment value is calculated for each phase, even if the voltage balance between the positive side capacitor voltage and the negative side capacitor voltage differs for each phase, control corresponding to the state of each phase is possible, thereby improving the accuracy of the arm balance control.
[0086] Furthermore, by adjusting the neutral point voltage Vnp of the power converter 7 using the voltage adjustment value ΔVnp, the voltage balance of the capacitors between the positive arm 5 and the negative arm 6 of each phase can be easily controlled collectively.
[0087] Other embodiments. (1) In the above embodiment, the arm balance control unit 24 includes the current adjustment value calculation unit 50 and the neutral point adjustment value calculation unit 51, but the present invention is not limited to this configuration. The arm balance control unit 24 may include only the current adjustment value calculation unit 50. In this case, the neutral point voltage control unit 26 calculates the neutral point voltage command value Vnpref based only on the detected neutral point voltage Vnp without using the voltage adjustment value ΔVnp.
[0088] (2) The configurations exemplified as the above-mentioned embodiments are examples of the configurations of the present disclosure, and may be combined with other known technologies, or may be modified, such as by omitting some parts, without departing from the scope of the present disclosure. In addition, the above-mentioned embodiments may be implemented by appropriately adopting the processes and configurations described in other embodiments.
[0089] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the scope and meaning equivalent to the claims. [Explanation of symbols]
[0090] 2 positive DC bus, 3 negative DC bus, 4u~4w leg circuit, 5u~5w positive arm, 6u~6w negative arm, 7 power converter, 9a, 9b reactor, 10 converter cell, 13 transformer, 14 AC system, 15 DC circuit, 20 control device, 21 voltage command generator, 22 PWM controller, 24, 24A arm balance controller, 25 AC current controller, 26 neutral point voltage controller, 27 circulating current controller, 28 command calculator, 31n, 31p switching element, 32 capacitor, 33 voltage detector, 50 current adjustment value calculator, 51, 51A neutral point adjustment value calculator, 61, 61A polarity determination unit, 70 input converter, 71 sample hold circuit, 72 multiplexer, 73 A / D converter, 75 RAM, 76 ROM, 77 Input / output interfaces, 78 auxiliary memory devices, 79 buses, 100 power conversion devices.
Claims
1. A power conversion device that performs power conversion between an AC system and a DC circuit, a power converter including a plurality of leg circuits respectively corresponding to a plurality of phases of the AC system; A control device for controlling the power converter, the leg circuit includes a positive arm and a negative arm connected in series, a connection point of the positive arm and the negative arm is connected to an AC line of a corresponding phase of the AC system, and both ends of the positive arm and the negative arm connected in series are connected to the DC circuit; Each of the positive arm and the negative arm has a plurality of converter cells connected in series, and each of the plurality of converter cells has a plurality of switching elements and a capacitor connected to the plurality of switching elements, The control device includes: an arm balance control unit that calculates a current adjustment value for balancing a positive-side capacitor voltage indicating a voltage of the capacitor in the positive-side arm and a negative-side capacitor voltage indicating a voltage of the capacitor in the negative-side arm; an AC current control unit that generates an AC voltage command value of an AC voltage to be output to the AC line by adjusting a current command value of the AC current flowing through the AC line using the current adjustment value; a command calculation unit that calculates a positive arm voltage command value for the positive arm and a negative arm voltage command value for the negative arm based on the AC voltage command value and a DC voltage command value of a DC voltage output to the DC circuit.
2. The power conversion device according to claim 1 , wherein the AC current control unit generates the AC voltage command value such that the AC current of the AC line follows the current command value adjusted using the current adjustment value.
3. 3. The power conversion device according to claim 1, wherein the arm balance control unit calculates a deviation between the positive side capacitor voltage and the negative side capacitor voltage for each of the plurality of phases, and calculates the current adjustment value such that a subtraction value obtained by subtracting an average value of the deviations for each phase from the deviation becomes small.
4. The power conversion device according to claim 3 , wherein the arm balance control unit limits the calculated current adjustment value by using a specified limit value.
5. The control device further includes a neutral point voltage control unit that outputs a neutral point voltage command value for controlling a neutral point voltage of the power converter, the arm balance control unit calculates a voltage adjustment value for adjusting the neutral point voltage based on the positive side capacitor voltage and the negative side capacitor voltage, The neutral point voltage control unit generates the neutral point voltage command value based on the neutral point voltage and the voltage adjustment value, 3. The power conversion device according to claim 1, wherein the command calculation unit calculates the positive arm voltage command value and the negative arm voltage command value based on the AC voltage command value, the DC voltage command value, and further based on the neutral point voltage command value.
6. 6. The power conversion device according to claim 5, wherein the arm balance control unit calculates the voltage adjustment value based on the positive side capacitor voltage, the negative side capacitor voltage, and polarity information of zero-phase currents in the positive side arm and the negative side arm.
7. The arm balance control unit is determining, as the polarity information, a polarity of a direct current flowing through the power converter or a polarity of an active power output from the power converter; 7. The power conversion device according to claim 6, wherein the voltage adjustment value is calculated by calculating a deviation between the positive side capacitor voltage and the negative side capacitor voltage for each of the plurality of phases, and multiplying an average value of the deviation for each phase by the polarity information.
8. the control device further includes a circulating current control unit that generates a circulating control command value for controlling a circulating current circulating between the plurality of leg circuits; 6. The power conversion device according to claim 5, wherein the command calculation unit calculates the positive arm voltage command value and the negative arm voltage command value based on the AC voltage command value, the DC voltage command value, the neutral point voltage command value, and further the circulation control command value.
Citation Information
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