Printed Wiring Boards
The printed wiring board addresses power supply challenges by using plated leads to maintain low electrical resistance, ensuring effective voltage delivery and wiring formation on the base film surface.
Patent Information
- Application Number
- JP2023531862
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2021-06-28
- Filing Date
- 2022-06-22
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2042-06-22
AI Technical Summary
Existing printed wiring board technologies face challenges in providing effective power supply during the formation of wiring due to unclear methods for supplying power during the second electrolytic plating process.
The printed wiring board incorporates a configuration with plated leads connected to the wiring, allowing for improved power supply by ensuring sufficient voltage is delivered to the seed layer and electrolytic plating layers, even at positions far from the power supply terminal, thereby maintaining low electrical resistance values.
This configuration ensures reliable power supply and reduces electrical resistance, enhancing the formation of wiring on the base film surface.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a printed wiring board. This application claims priority based on Japanese Patent Application No. 2021-106970, filed on June 28, 2021. All contents of the Japanese patent application are incorporated herein by reference. [Background technology]
[0002] For example, JP 2016-9854 A (Patent Document 1) describes a printed wiring board. The printed wiring board described in Patent Document 1 has a base film and wiring arranged on a main surface of the base film. The wiring has a seed layer arranged on the main surface of the base film, a core body arranged on the seed layer, and a shrink layer covering the core body. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2016-9854 A Summary of the Invention
[0004] The printed wiring board of the present disclosure comprises a base film having a main surface, wiring disposed on the main surface, and at least one plated lead disposed on the main surface and connected to the wiring. [Brief description of the drawings]
[0005] [Figure 1] FIG. 1 is a plan view of a printed wiring board 100. FIG. [Diagram 2] FIG. 2 is a bottom view of the printed wiring board 100. FIG. [Diagram 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. [Figure 4] FIG. 4 is a process diagram showing a method for manufacturing printed wiring board 100. [Diagram 5] FIG. 5 is a cross-sectional view of the base film 10 after the seed layer forming step S21. [Figure 6] FIG. 6 is a cross-sectional view of the base film 10 after the resist formation step S22. [Figure 7] FIG. 7 is a cross-sectional view of the base film 10 after the first electrolytic plating step S23. [Figure 8] FIG. 8 is a cross-sectional view of the base film 10 after the resist removal step S24. [Figure 9] FIG. 9 is a cross-sectional view of the base film 10 after the seed layer removal step S25. [Figure 10] FIG. 10 is a plan view of the printed wiring board 200. As shown in FIG. [Figure 11] FIG. 11 is a bottom view of the printed wiring board 200. FIG. [Figure 12] FIG. 12 is a cross-sectional view taken along line XII-XII in FIG. [Figure 13] FIG. 13 is a plan view of base film 10 after seed layer removal step S25 in the method for manufacturing printed wiring board 200. As shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0006] [Problem that this disclosure aims to solve] In forming wiring for a printed wiring board described in Patent Document 1, first, a seed layer is formed on the main surface of a base film. Second, a resist having openings is formed on the seed layer. Third, an electric current is passed through the seed layer, thereby performing electrolytic plating (first electrolytic plating) on the seed layer exposed from the openings in the resist. This forms a core body. Third, the seed layer between the resist and the core body is removed, and then an electric current is passed through the core body, thereby performing electrolytic plating (second electrolytic plating) so as to cover the core body. This forms a shrink layer.
[0007] However, Patent Document 1 does not clarify how to supply power to the core when performing the second electrolytic plating.
[0008] The present disclosure provides a printed wiring board that allows good power supply when forming wiring on a main surface of a base film.
[0009] [Effects of this disclosure] According to the printed wiring board of the present disclosure, good power supply is possible when forming wiring on the main surface of the base film.
[0010] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure will be listed and described.
[0011] (1) A printed wiring board according to an embodiment comprises a base film having a main surface, wiring disposed on the main surface, and at least one plated lead disposed on the main surface and connected to the wiring.
[0012] According to the printed wiring board of (1) above, good power supply is possible when forming wiring on the main surface of the base film.
[0013] (2) In the printed wiring board of (1) above, at least one plating lead may include a first plating lead connected to the wiring at a first position and a second plating lead connected to the wiring at a second position. The electrical resistance of the wiring between the first position and the second position may be 2 Ω or less.
[0014] According to the printed wiring board of (2) above, better power supply is possible when forming wiring on the main surface of the base film.
[0015] (3) In the printed wiring board of (2) above, the main surface may be a first main surface and a second main surface that is the opposite surface of the first main surface. The wiring may have a first wiring and a second wiring arranged on the first main surface, and a third wiring arranged on the second main surface. At least one plating lead may further include a third plating lead connected to the wiring at a third position. The first wiring may include a first end and a second end that is an end opposite to the first end. The second wiring may include a third end and a fourth end that is an end opposite to the third end. The third wiring may include a fifth end and a sixth end that is an end opposite to the fifth end. The first end and the third end may be the first position and the third position, respectively. The second position may be a portion of the third wiring that is between the fifth end and the sixth end. The second end may be electrically connected to the fifth end. The fourth end may be electrically connected to the sixth end. The electrical resistance of the wiring between the second position and the third position may be 2 Ω or less.
[0016] According to the printed wiring board of (3) above, better power supply is possible when forming wiring on the main surface of the base film.
[0017] (4) In the printed wiring board of (3) above, the first wiring may include a first coil formed by winding the first wiring in a spiral shape. The second wiring may include a second coil formed by winding the second wiring in a spiral shape. The third wiring may include a third coil and a fourth coil formed by winding the third wiring in a spiral shape. The first coil and the second coil may overlap with the third coil and the fourth coil, respectively, in the thickness direction of the base film. The second position may be between the third coil and the fourth coil.
[0018] (5) The printed wiring board of (1) above may further include a bypass lead. The bypass lead may have a first portion electrically connected to one end of the wiring and a second portion electrically connected to the other end of the wiring. The first portion and the second portion may be separated from each other.
[0019] According to the printed wiring board of (5) above, multiple portions of the wiring on the main surface of the base film are connected in parallel by the bypass leads, thereby reducing the electrical resistance of the wiring, enabling better power supply when forming the wiring.
[0020] (6) In the printed wiring board of (5) above, the main surface may be a first main surface and a second main surface that is an opposite surface of the first main surface. The wiring may have a first wiring and a second wiring arranged on the first main surface, and a third wiring arranged on the second main surface. The first wiring may include a first end and a second end that is an end opposite to the first end. The second wiring may include a third end and a fourth end that is an end opposite to the third end. The third wiring may include a fifth end and a sixth end that is an end opposite to the fifth end. The first end may be electrically connected to the fifth end. The second end may be electrically connected to the first portion. The third end may be electrically connected to the sixth end. The fourth end may be electrically connected to the second portion.
[0021] (7) In the printed wiring board of (6) above, the first wiring may include a first coil formed by winding the first wiring in a spiral shape. The third wiring may include a second coil formed by winding the third wiring in a spiral shape. The first coil may overlap with the second coil in the thickness direction of the base film. The second end, the third end, and the fourth end may be located inside the first coil in a plan view. The sixth end may be located inside the second coil in a plan view.
[0022] (8) In the printed wiring boards of (1) to (7) above, the wiring and at least one plating lead may have a seed layer disposed on a main surface, a first electrolytic plating layer disposed on the seed layer, and a second electrolytic plating layer covering the seed layer and the first electrolytic plating layer.
[0023] [Details of the embodiment of the present disclosure] Next, details of the embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and redundant description will not be repeated.
[0024] (First embodiment) A printed wiring board according to a first embodiment (hereinafter referred to as "printed wiring board 100") will be described.
[0025] <Configuration of Printed Wiring Board 100> The configuration of the printed wiring board 100 will be described below.
[0026] Fig. 1 is a plan view of the printed wiring board 100. Fig. 2 is a bottom view of the printed wiring board 100. Fig. 3 is a cross-sectional view taken along line III-III in Fig. 1. As shown in Figs. 1, 2, and 3, the printed wiring board 100 has a base film 10, a first wiring 20, a second wiring 30, a third wiring 40, and at least one plated lead 50.
[0027] The base film 10 is made of a flexible insulating material. That is, the printed wiring board 100 is a flexible printed wiring board. Specific examples of materials constituting the base film 10 include polyimide, polyethylene terephthalate, and fluororesin.
[0028] The base film 10 has a first main surface 10a and a second main surface 10b. The second main surface 10b is the surface opposite to the first main surface 10a. The direction from the first main surface 10a to the second main surface 10b is sometimes referred to as the thickness direction of the base film 10.
[0029] The first wiring 20, the second wiring 30, and the third wiring 40 are wirings disposed on the main surface of the base film 10. More specifically, the first wiring 20 and the second wiring 30 are disposed on the first main surface 10a. The third wiring 40 is disposed on the second main surface 10b.
[0030] The first wiring 20 has a first end 20a and a second end 20b. The second end 20b is the end opposite to the first end 20a. The first wiring 20 has a terminal 21 and a land 22. The terminal 21 is at the first end 20a. The land 22 is at the second end 20b. The first wiring 20 has a first coil 23. The first coil 23 is formed by winding the first wiring 20 in a spiral shape on the first main surface 10a. The second end 20b is located inside the first coil 23 in a plan view (seen from a direction perpendicular to the first main surface 10a).
[0031] The second wiring 30 has a third end 30a and a fourth end 30b. The fourth end 30b is the end opposite to the third end 30a. The second wiring 30 has a terminal 31 and a land 32. The terminal 31 is at the third end 30a. The land 32 is at the fourth end 30b. The second wiring 30 has a second coil 33. The second coil 33 is formed by winding the second wiring 30 in a spiral shape on the first main surface 10a. The fourth end 30b is located inside the second coil 33 in a plan view (seen from a direction perpendicular to the first main surface 10a).
[0032] The third wiring 40 has a fifth end 40a and a sixth end 40b. The sixth end 40b is the end opposite to the fifth end 40a. The third wiring 40 has a land 41 and a land 42. The land 41 is located at the fifth end 40a. The land 42 is located at the sixth end 40b.
[0033] Through holes 10c and 10d are formed in the base film 10. The through holes 10c and 10d penetrate the base film 10 in the thickness direction. The through holes 10c are located at positions overlapping the lands 22 and 41. The through holes 10d are located at positions overlapping the lands 32 and 42.
[0034] The land 22 and the land 41 are electrically connected by a conductor (not shown) formed on the inner wall surface of the through hole 10c. The land 32 and the land 42 are electrically connected by a conductor (not shown) formed on the inner wall surface of the through hole 10d. As a result, the first wiring 20, the second wiring 30, and the third wiring 40 are integrated as wiring arranged on the main surface of the base film 10.
[0035] The third wiring 40 has a third coil 43 and a fourth coil 44. The third coil 43 is formed by winding the third wiring 40 in a spiral shape on the second main surface 10b. The fourth coil 44 is formed by winding the third wiring 40 in a spiral shape on the second main surface 10b. The third coil 43 and the fourth coil 44 overlap with the first coil 23 and the second coil 33, respectively, in the thickness direction of the base film 10.
[0036] The plating leads 50 are connected to wiring arranged on the main surface of the base film 10. In the printed wiring board 100, the number of plating leads 50 is three. These three plating leads 50 are referred to as a first plating lead 50a, a second plating lead 50b, and a third plating lead 50c.
[0037] The first plating lead 50a is connected at a first position P1 to a wiring arranged on the main surface of the base film 10. More specifically, the first plating lead 50a is connected to the first end 20a (terminal 21). In other words, the first position P1 is the first end 20a.
[0038] The second plating lead 50b is connected to the wiring arranged on the main surface of the base film 10 at a second position P2. More specifically, the second plating lead 50b is connected to the portion of the third wiring 40 located at the fifth end 40a and the sixth end 40b. That is, the second position P2 is the portion of the third wiring 40 located at the fifth end 40a and the sixth end 40b.
[0039] The third plating lead 50c is connected to a wiring arranged on the main surface of the base film 10 at a third position P3. More specifically, the third plating lead 50c is connected to the third end 30a (terminal 31). In other words, the third position P3 is the third end 30a.
[0040] The first plating lead 50a, the second plating lead 50b and the third plating lead 50c extend to reach the ends of the base film 10.
[0041] The first position P1 and the second position P2 are determined so that the electrical resistance value of the wiring (first wiring 20 and third wiring 40) between the first position P1 and the second position P2 is 2Ω or less. The second position P2 and the third position P3 are determined so that the electrical resistance value of the wiring (second wiring 30 and third wiring 40) between the second position P2 and the third position P3 is 2Ω or less. The electrical resistance value of the wiring between the first end 20a and the third end 30a is, for example, 2Ω or more. The electrical resistance value of the wiring is measured by contacting a tester probe to the measurement point.
[0042] The first wiring 20 has a seed layer 24, a first electrolytically plated layer 25, and a second electrolytically plated layer .
[0043] The seed layer 24 is disposed on the main surface (first main surface 10a) of the base film 10. The seed layer 24 has, for example, a first layer and a second layer. The first layer of the seed layer 24 is disposed on the main surface (first main surface 10a) of the base film 10. The second layer of the seed layer 24 is disposed on the first layer of the seed layer 24. The first layer of the seed layer 24 is, for example, a sputtered layer (a layer formed by sputtering) of a nickel-chromium alloy. The second layer of the seed layer 24 is an electroless plating layer (a layer formed by electroless plating) of copper.
[0044] The first electrolytic plating layer 25 is a layer formed by electrolytic plating. The first electrolytic plating layer 25 is formed of copper. The first electrolytic plating layer 25 is disposed on the seed layer 24. The second electrolytic plating layer 26 is a layer formed by electrolytic plating. The second electrolytic plating layer 26 is formed of copper. The second electrolytic plating layer 26 covers the seed layer 24 and the first electrolytic plating layer 25. More specifically, the second electrolytic plating layer 26 is disposed on the side surfaces of the seed layer 24 and the first electrolytic plating layer 25 and on the upper surface of the first electrolytic plating layer 25.
[0045] The third wiring 40 has a structure (seed layer 24, first electrolytic plating layer 25, and second electrolytic plating layer 26) similar to that of the first wiring 20. Although not shown, the second wiring 30 and plating lead 50 also have a structure similar to that of the first wiring 20.
[0046] <Method of Manufacturing Printed Wiring Board 100> A method for manufacturing the printed wiring board 100 will now be described.
[0047] Fig. 4 is a process diagram showing a method for manufacturing printed wiring board 100. As shown in Fig. 4, the method for manufacturing printed wiring board 100 includes a preparation step S1 and a wiring formation step S2. The wiring formation step S2 is performed after the preparation step S1.
[0048] In the preparation step S1, a base film 10 is prepared. The wiring (the first wiring 20, the second wiring 30, and the third wiring 40) and the plating leads 50 are not formed on the main surface of the base film 10 prepared in the preparation step S1.
[0049] In the wiring formation process S2, the first wiring 20, the second wiring 30, the third wiring 40, and the plating lead 50 are formed. The wiring formation process S2 is performed using a semi-additive method.
[0050] More specifically, the wiring formation process S2 includes a seed layer formation process S21, a resist formation process S22, a first electrolytic plating process S23, a resist removal process S24, a seed layer removal process S25, and a second electrolytic plating process S26.
[0051] The resist forming step S22 is performed after the seed layer forming step S21, and the first electrolytic plating step S23 is performed after the resist forming step S22. The resist removing step S24 is performed after the first electrolytic plating step S23, and the seed layer removing step S25 is performed after the resist removing step S24. The second electrolytic plating step S26 is performed after the seed layer removing step S25.
[0052] Fig. 5 is a cross-sectional view of the base film 10 after the seed layer formation step S21. As shown in Fig. 5, in the seed layer formation step S21, a seed layer 24 is formed on the main surfaces (the first main surface 10a and the second main surface 10b) of the base film 10. The seed layer 24 is formed by sputtering and electroless plating.
[0053] Fig. 6 is a cross-sectional view of the base film 10 after the resist formation step S22. As shown in Fig. 6, in the resist formation step S22, a resist 60 is formed on the seed layer 24. The resist 60 is formed by applying a photosensitive organic material onto the seed layer 24, and exposing and developing the applied photosensitive organic material to pattern it. The resist 60 has an opening.
[0054] Fig. 7 is a cross-sectional view of the base film 10 after the first electrolytic plating step S23. As shown in Fig. 7, in the first electrolytic plating step S23, a first electrolytic plating layer 25 is formed on the seed layer 24 exposed from the openings in the resist 60. The first electrolytic plating layer 25 is formed by passing a current through the seed layer 24 to perform electrolytic plating on the seed layer 24 exposed from the openings in the resist 60.
[0055] Fig. 8 is a cross-sectional view of the base film 10 after the resist removal step S24. As shown in Fig. 8, in the resist removal step S24, the resist 60 is removed by peeling it off from on the seed layer 24. Fig. 9 is a cross-sectional view of the base film 10 after the seed layer removal step S25. As shown in Fig. 9, the seed layer 24 exposed between the first electrolytic plating layer 25 is removed by etching. The etching is, for example, wet etching.
[0056] In the second electrolytic plating step S26, a second electrolytic plated layer 26 is formed. The second electrolytic plated layer 26 is formed by passing a current through the seed layer 24 and the first electrolytic plated layer 25 to perform electrolytic plating. The current is passed through the seed layer 24 and the first electrolytic plated layer 25 of the plating leads 50 (the first plating lead 50a, the second plating lead 50b, and the third plating lead 50c).
[0057] The seed layer 24 and the first electrolytic plating layer 25 of the plating lead 50 extend to the power supply terminal at the end of the base film 10 before it is singulated. After the second electrolytic plating step S26 is performed, the base film 10 is cut and singulated. Therefore, the plating lead 50 extends to reach the end of the base film 10 after it is singulated.
[0058] <Effects of the printed wiring board 100> The effects of the printed wiring board 100 will be described below.
[0059] The voltage applied to seed layer 24 and first electrolytic plated layer 25 in second electrolytic plating step S26 decreases with increasing distance from the power supply terminal. Therefore, second electrolytic plated layer 26 is less likely to be formed at positions farther from the power supply terminal. That is, at positions farther from the power supply terminal, the cross-sectional areas of the wiring (first wiring 20, second wiring 30, and third wiring 40) arranged on the main surface of base film 10 become smaller, which may result in an increase in electrical resistance.
[0060] However, in the printed wiring board 100, power is supplied to the seed layer 24 and first electrolytic plating layer 25 of the wiring (first wiring 20, second wiring 30, and third wiring 40) arranged on the main surface of the base film 10 via the seed layer 24 and first electrolytic plating layer 25 of the plating leads 50 (first plating lead 50a, second plating lead 50b, and third plating lead 50c).
[0061] Therefore, even at a position away from the power supply position, a sufficient voltage can be supplied to seed layer 24 and first electrolytic plated layer 25. As a result, printed wiring board 100 can ensure the thickness (cross-sectional area of the wiring) of second electrolytic plated layer 26, and furthermore, can suppress an increase in the electrical resistance of the wiring disposed on the main surface of base film 10.
[0062] In the above, an example has been described in which wiring is arranged on both the first major surface 10a and the second major surface 10b, but the same effect can be achieved even if wiring is arranged on only one of the first major surface 10a and the second major surface 10b.
[0063] Second embodiment A printed wiring board according to a second embodiment (hereinafter, referred to as "printed wiring board 200") will be described below. Differences from printed wiring board 100 will be mainly described here, and overlapping descriptions will not be repeated.
[0064] <Configuration of Printed Wiring Board 200> The configuration of the printed wiring board 200 will be described below.
[0065] Fig. 10 is a plan view of printed wiring board 200. Fig. 11 is a bottom view of printed wiring board 200. Fig. 12 is a cross-sectional view taken along line XII-XII in Fig. 10. As shown in Figs. 10, 11, and 12, printed wiring board 200 has base film 10 and plated leads 50.
[0066] The printed wiring board 200 has a first wiring 70, a second wiring 80, and a third wiring 90 instead of the first wiring 20, the second wiring 30, and the third wiring 40 as wirings arranged on the main surface of the base film 10. The printed wiring board 200 further has a bypass lead 51. The first wiring 70, the second wiring 80, the third wiring 90, and the bypass lead 51 have a seed layer 24, a first electrolytic plating layer 25, and a second electrolytic plating layer 26.
[0067] The first wiring 70 is disposed on the first main surface 10a. The first wiring 70 has a first end 70a and a second end 70b. The second end 70b is the end opposite to the first end 70a. The first wiring 70 has a land 71. The land 71 is at the first end 70a. The first wiring 70 has a first coil 72. The first coil 72 is formed by winding the first wiring 70 in a spiral shape on the first main surface 10a. The second end 70b is located inside the first coil 72 in a plan view.
[0068] The second wiring 80 is disposed on the first main surface 10a. The second wiring 80 has a third end 80a and a fourth end 80b. The fourth end 80b is the end opposite the third end 80a. The second wiring 80 has a land 81. The land 81 is located at the third end 80a. The second wiring 80 (the third end 80a and the fourth end 80b) is located inside the first coil 72 in a plan view.
[0069] The third wiring 90 is disposed on the second principal surface 10b. The third wiring 90 has a fifth end 90a and a sixth end 90b. The sixth end 90b is the end opposite to the fifth end 90a. The third wiring 90 has a land 91 and a land 92. The land 91 is at the fifth end 90a. The land 92 is at the sixth end 90b. The third wiring 90 has a second coil 93. The second coil 93 is formed by winding the third wiring 90 in a spiral shape on the second principal surface 10b. The second coil 93 overlaps with the first coil 72 in the thickness direction of the base film 10. The sixth end 90b is inside the second coil 93 in a plan view.
[0070] Through holes 10e and 10f are formed in the base film 10. The through holes 10e and 10f penetrate the base film 10 in the thickness direction. The through hole 10e is located at a position overlapping the land 71 and the land 91 in a plan view. The through hole 10f is located at a position overlapping the land 81 and the land 92 in a plan view.
[0071] The lands 71 and 91 are electrically connected by a conductor (not shown) formed on the inner wall surface of the through hole 10e. The lands 81 and 92 are electrically connected by a conductor (not shown) formed on the inner wall surface of the through hole 10f. As a result, the first wiring 70, the second wiring 80, and the third wiring 90 are integrated as wiring arranged on the main surface of the base film 10.
[0072] The plating lead 50 is connected to the first wiring 70. More specifically, the plating lead 50 is connected to, for example, the first end 70a.
[0073] The bypass lead 51 is disposed on the first main surface 10a. The bypass lead 51 has a first portion 51a and a second portion 51b. The first portion 51a is electrically connected to the second end 70b, and the second portion 51b is electrically connected to the fourth end 80b. The first portion 51a and the second portion 51b are separated from each other. That is, the second end 70b side of the first wiring 70 and the fourth end 80b side of the second wiring 80 are not electrically connected.
[0074] Although not shown, the second end 70b and the fourth end 80b are electrically connected to terminals disposed on a main surface of a printed wiring board other than the printed wiring board 200.
[0075] <Method of Manufacturing Printed Wiring Board 200> A method for manufacturing the printed wiring board 200 will now be described.
[0076] The method for manufacturing the printed wiring board 200 includes a preparation step S1 and a wiring formation step S2. In the wiring formation step S2 in the method for manufacturing the printed wiring board 200, the first wiring 70, the second wiring 80, the third wiring 90, the plating lead 50, and the bypass lead 51 are formed.
[0077] Fig. 13 is a plan view of the base film 10 after the seed layer removal step S25 in the method for manufacturing the printed wiring board 200. As shown in Fig. 13, in the method for manufacturing the printed wiring board 200, the seed layer 24 and the first electrolytic plating layer 25 of the bypass leads 51 are not divided after the seed layer removal step S25. Therefore, in the method for manufacturing the printed wiring board 200, the second electrolytic plating step S26 is performed to form the bypass leads 51 that are not divided into the first portion 51a and the second portion 51b. The bypass leads 51 formed without being divided are divided into the first portion 51a and the second portion 51b after the second electrolytic plating step S26 is performed.
[0078] <Effects of the printed wiring board 200> The effects of the printed wiring board 200 will be described below.
[0079] As described above, in the method for manufacturing the printed wiring board 200, the bypass lead 51 is not divided after the seed layer removal step S25. Therefore, in the method for manufacturing the printed wiring board 200, the first wiring 70, the second wiring 80, and the third wiring 90 are connected in parallel after the seed layer removal step S25. As a result, the electrical resistance value between the first end 70a and the second end 70b when the second electrolytic plating formation step is performed is reduced.
[0080] In this way, sufficient voltage can be supplied to seed layer 24 and first electrolytic plating layer 25 even at a position away from the power supply position, so that printed wiring board 200 can ensure the thickness (cross-sectional area of the wiring) of second electrolytic plating layer 26, and ultimately suppress an increase in the electrical resistance value of the wiring arranged on the main surface of base film 10.
[0081] The embodiments disclosed herein are illustrative in all respects and should not be considered as limiting. The scope of the present invention is defined by the claims, not the above-described embodiments, and is intended to include all modifications within the scope and meaning equivalent to the claims. [Explanation of symbols]
[0082] 10 base film, 10a first main surface, 10b second main surface, 10c, 10d, 10e, 10f through hole, 20 first wiring, 20a first end, 20b second end, 21 terminal, 22 land, 23 first coil, 24 seed layer, 25 first electrolytic plating layer, 26 second electrolytic plating layer, 30 second wiring, 30a third end, 30b fourth end, 31 terminal, 32 land, 33 second coil, 40 third wiring, 40a fifth end, 40b sixth end, 41 land, 42 land, 43 third coil, 44 fourth coil, 50 plating lead, 50a first plating lead, 50b second plating lead, 50c third plating lead, 51 bypass lead, 51a first portion, 51b second portion, 60 resist, 70 first wiring, 70a First end, 70b second end, 71 land, 72 second coil, 80 second wiring, 80a third end, 80b fourth end, 81 land, 90 third wiring, 90a fifth end, 90b sixth end, 91, 92 land, 93 second coil, 100, 200 printed wiring board, P1 first position, P2 second position, P3 third position, S1 preparation step, S2 wiring formation step, S21 seed layer formation step, S22 resist formation step, S23 first electrolytic plating step, S24 resist removal step, S25 seed layer removal step, S26 second electrolytic plating step.
Claims
1. A base film having a main surface; Wiring disposed on the main surface; at least one plating lead disposed on the main surface and connected to the wiring; the at least one plating lead includes a first plating lead connected to the wiring at a first location and a second plating lead connected to the wiring at a second location; the electrical resistance of the wiring between the first position and the second position is 2Ω or less; The main surface is a first main surface and a second main surface that is an opposite surface of the first main surface, the wiring includes a first wiring and a second wiring disposed on the first main surface, and a third wiring disposed on the second main surface; the at least one plating lead further includes a third plating lead connected to the wiring at a third location; the first wiring includes a first end and a second end that is an end opposite to the first end, the second wiring includes a third end and a fourth end that is an end opposite to the third end, the third wiring includes a fifth end and a sixth end that is an end opposite to the fifth end, the first end and the third end are in the first position and the third position, the second position is a portion of the third wiring between the fifth end and the sixth end, the second end is electrically connected to the fifth end; the fourth end is electrically connected to the sixth end, A printed wiring board, wherein the electrical resistance of the wiring between the second position and the third position is 2 Ω or less.
2. the first wiring includes a first coil configured by winding the first wiring in a spiral shape, the second wiring includes a second coil configured by winding the second wiring in a spiral shape, the third wiring includes a third coil and a fourth coil formed by winding the third wiring in a spiral shape, the first coil and the second coil overlap with the third coil and the fourth coil, respectively, in a thickness direction of the base film; The printed wiring board of claim 1 , wherein the second position is between the third coil and the fourth coil.
3. A base film having a main surface; Wiring disposed on the main surface; at least one plating lead disposed on the main surface and connected to the wiring; Further comprising a bypass lead; the bypass lead has a first portion electrically connected to one end of the wiring and a second portion electrically connected to the other end of the wiring; the first portion and the second portion are separated from each other; The main surface is a first main surface and a second main surface that is an opposite surface of the first main surface, the wiring includes a first wiring and a second wiring disposed on the first main surface, and a third wiring disposed on the second main surface; the first wiring includes a first end and a second end that is an end opposite to the first end, the second wiring includes a third end and a fourth end that is an end opposite to the third end, the third wiring includes a fifth end and a sixth end that is an end opposite to the fifth end, the first end is electrically connected to the fifth end; the second end is electrically connected to the first portion; the third end is electrically connected to the sixth end, The fourth end is electrically connected to the second portion.
4. the first wiring includes a first coil configured by winding the first wiring in a spiral shape, the third wiring includes a second coil configured by winding the third wiring in a spiral shape, the first coil overlaps with the second coil in a thickness direction of the base film, the second end, the third end, and the fourth end are located inside the first coil in a plan view, The printed wiring board according to claim 3 , wherein the sixth end is located inside the second coil in a plan view.
5. 5. The printed wiring board according to claim 1, wherein the wiring and the at least one plating lead have a seed layer disposed on the main surface, a first electrolytic plating layer disposed on the seed layer, and a second electrolytic plating layer covering the seed layer and the first electrolytic plating layer.
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