Substrate for high frequency device and method for manufacturing same

Abstract

To provide a substrate for a high-frequency device with excellent high-frequency characteristics, and a manufacturing method for the same.SOLUTION: In a substrate for a high-frequency device, a nitride semiconductor film is formed on an SOI substrate. The SOI substrate is a TRSOI substrate in which a trap-rich layer formed on a base substrate and an SOI layer formed of a silicon single-crystal are bonded together through an oxide film. The SOI layer has a resistivity of 1 kΩ cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a substrate for a high frequency device and a method for manufacturing the same. [Background technology]

[0002] Nitride semiconductors, such as GaN, are expected to be the next generation semiconductor material that will overcome the limitations of silicon as a material. In recent years, high frequency devices have been manufactured by epitaxially growing nitride semiconductors on silicon single crystal substrates. However, high frequency devices suffer from degradation of characteristics due to the substrate, loss due to the substrate, and degradation of second and third harmonic characteristics.

[0003] Substrates for high-frequency devices generally use high-resistivity substrates, and epitaxial growth of GaN layers, etc. is performed to fabricate high-frequency devices. A high-resistivity substrate is used to prevent signals from flowing from the epitaxial layer to the underlying Si substrate. In addition, when stacking a nitride semiconductor epitaxial layer on a high-resistivity silicon substrate, the nitride semiconductor epitaxial layer is stacked by devising a buffer layer as a stress relaxation layer.

[0004] As described in Patent Documents 1 and 2, TR substrates with a TR (trap rich) layer are generally used as substrates for high-frequency devices, and frequency characteristics are improved by using a high resistivity substrate. Patent Document 1 and other documents describe a substrate that is made up of a TR layer, a dielectric layer (buried oxide film), and a semiconductor layer on a high resistivity base substrate. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 7098851 [Patent Document 2] Patent Publication No. 2022-70890 Summary of the Invention [Problem to be solved by the invention]

[0006] High-frequency devices using conventional TR substrates have limitations in terms of improving second harmonic (2HD) signals. To further improve high-frequency characteristics, a GaN on TRSOI substrate, which combines a TRSOI substrate with a GaN layer that has excellent high-frequency characteristics, is considered promising. However, even in the case of a GaN on TRSOI substrate in which a GaN layer is laminated on a TRSOI substrate, the second harmonic characteristics are sometimes not improved due to the influence of the characteristics (resistivity and oxygen concentration) of the Si substrate.

[0007] The present invention has been made to solve the above problems, and an object of the present invention is to provide a substrate for a high frequency device having excellent high frequency characteristics and a method for manufacturing the same. [Means for solving the problem]

[0008] In order to achieve the above object, the present invention provides a substrate for a high frequency device, comprising a nitride semiconductor film formed on an SOI substrate, The SOI substrate is a TRSOI substrate in which a trap rich layer formed on a base substrate and an SOI layer made of single crystal silicon are bonded via an oxide film, The SOI layer has a resistivity of 1 kΩ·cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less.

[0009] If the substrate on which the nitride semiconductor film is formed is a TRSOI substrate, and the SOI layer of the TRSOI substrate has a high resistivity of 1 kΩ·cm or more and an oxygen concentration within the above-mentioned range, the substrate can be used as a high-frequency device substrate with excellent high-frequency characteristics. For example, while the limit of 2HD for conventional products (such as TR substrates) was approximately -91 dBm, the present invention can further reduce 2HD and exhibit even better harmonic characteristics. Furthermore, since the SOI layer has the above crystal plane orientation, the nitride semiconductor film on the SOI layer is well formed.

[0010] In this case, the SOI layer can have an oxygen concentration of 5.2 ppma or less, and can have even more excellent high frequency characteristics. Furthermore, the SOI layer can have an oxygen concentration of 0.5 ppma or less, and the high frequency characteristics can be made even more excellent.

[0011] The base substrate may be a CZ silicon single crystal substrate having a (100) crystal plane orientation. Base substrates with a (100) crystal plane orientation produced by the CZ method tend to have good production yields and are inexpensive and of high quality, which in turn makes them inexpensive and high-precision substrates for high-frequency devices.

[0012] The base substrate may have a resistivity of 1 kΩ·cm or more. If the base substrate has a high resistivity of 1 kΩ·cm or more, the high frequency characteristics can be improved.

[0013] The present invention also provides a method for manufacturing a high-frequency device substrate having a nitride semiconductor film formed on an SOI substrate, comprising the steps of: A step of preparing a TRSOI substrate as the SOI substrate, in which a trap rich layer formed on a base substrate and a bond substrate made of silicon single crystal are bonded to each other via an oxide film, and the bond substrate is thinned to form an SOI layer; forming the nitride semiconductor film on the SOI layer; The present invention provides a method for producing a substrate for a high frequency device, characterized in that the bond substrate has a resistivity of 1 kΩ·cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less.

[0014] According to such a manufacturing method of the present invention, it is possible to manufacture a substrate for a high frequency device having excellent high frequency characteristics (for example, second harmonic characteristics, etc.), and it is also possible to form a nitride semiconductor film satisfactorily.

[0015] In this case, the bond substrate can have an oxygen concentration of 5.2 ppma or less, and it is possible to obtain a substrate with even more excellent high frequency characteristics. Furthermore, the bond substrate can have an oxygen concentration of 0.5 ppma or less, which makes it possible to obtain a substrate with even more excellent high frequency characteristics.

[0016] The base substrate may be a CZ silicon single crystal substrate having a (100) crystal plane orientation. It is possible to prepare a high-quality base substrate with a (100) crystal plane orientation at low cost.

[0017] The base substrate may have a resistivity of 1 kΩ·cm or more. In this way, it is possible to obtain a product with better high frequency characteristics. Effect of the Invention

[0018] According to the substrate for a high frequency device and the manufacturing method thereof of the present invention, it is possible to obtain a substrate for a high frequency device having excellent high frequency characteristics such as 2HD. [Brief description of the drawings]

[0019] [Figure 1] FIG. 1 is a schematic explanatory diagram showing an example of a substrate for a high frequency device according to the present invention. [Diagram 2] 1A to 1C are process diagrams illustrating an example of a method for producing a high frequency device substrate according to the present invention. [Diagram 3] FIG. 1 is a schematic structural diagram showing an example of a composite in which a CPW electrode is formed on a high-frequency device substrate. [Figure 4] FIG. 2 is a schematic plan view of a CPW electrode. [Diagram 5] 1 is a graph showing measurement results of harmonic characteristics (2HD) of Examples 1-3 and Comparative Examples 1-3. BEST MODE FOR CARRYING OUT THEINVENTION

[0020] Hereinafter, an embodiment of the present invention will be described with reference to the drawings, but the present invention is not limited thereto. First, as described above, the present invention relates to a substrate for a high frequency device having an SOI structure, and in particular to a substrate for a high frequency device having a support substrate (base substrate) that resists the formation of an inversion layer in a region close to the oxide film (i.e., buried oxide film: BOX film) of the SOI structure.

[0021] Highly resistive semiconductor substrates (e.g., silicon wafers) are prone to the formation of highly conductive charge inversion and charge accumulation layers at the interface between the BOX film and the supporting substrate, which reduce the effective resistivity of the substrate, cause parasitic power losses, and introduce device nonlinearities when the device is operated at RF frequencies.

[0022] Methods have been developed to trap charges in any induced inversion (or accumulation) layer so that the high resistivity of the substrate is maintained even in regions very close to the surface. It is known that the provision of a charge trapping layer (CTL) between a high resistivity supporting substrate and a buried oxide layer improves the performance of RF devices fabricated with SOI substrates. Several methods have been proposed to form such a highly trapping interfacial layer. For example, one method for forming a semiconductor-on-insulator (e.g., silicon-on-insulator, or SOI) with a charge trapping layer for RF device applications is based on depositing an undoped polycrystalline silicon film on a highly resistive silicon substrate and forming a stack of an oxide layer and an overlying silicon layer. The polycrystalline silicon layer acts as a defect-rich layer between the silicon substrate and the buried oxide layer.

[0023] Academic studies have shown that a polysilicon layer between the oxide and substrate improves device isolation, reduces transmission line losses, and reduces harmonic distortion. See, for example, the following publications: ·H.S.Gamble,et al.“Low-loss CPW lines on surface stabilized high resistivity silicon, ”Microwave Guided Wave Lett., 9(10), pp.395-397, 1999 ·D.Lederer, R.Lobet and J.-P.Raskin, “Enhanced high resistivity SOI wafers for RF applications, ”IEEE Intl. SOI Conf., pp.46-47, 2004 ·D.Lederer and J.-P.Raskin, “New substrate passivation method dedicated to high resistivity SOI wafer fabrication with increased substrate resistivity, ”IEEE Electron Device Letters, vol.26, no.11, pp.805-807, 2005 ·D.Lederer, B.Aspar,C .Laghae and J.-P.Raskin, “Performance of RF passive structures and SOI MOSFETs transferred on a passivated HR SOI substrate, ”IEEE International SOI Conference, pp.29-30, 2006 ·Daniel C.Kerretal. “Identification of RF harmonic distortion on Si substrates and its reduction using a trap-rich layer”, Silicon Monolithic Integrated Circuits in RF Systems, 2008. SiRF 2008(IEEE Topical Meeting), pp.151-154, 2008

[0024] Conventionally, attempts have been made to improve high frequency characteristics by using TR substrates as disclosed in Patent Document 1 and the like as substrates for high frequency devices, but there have been limitations to the improvement (for example, −91 dBm at 2HD). Under these circumstances, the inventors conducted intensive research and found that in a substrate for high-frequency devices such as GaN on TRSOI (TRSOI substrate + nitride semiconductor film), the improvement of the high-frequency characteristics described above depends on the oxygen concentration in the SOI layer.The inventors then found that if the oxygen concentration of the SOI layer (high resistivity [1 kΩ·cm or more], crystal plane orientation (111)) is 14.8 ppma or less, the device will have better high-frequency characteristics, and completed the present invention.

[0025] The substrate for a high frequency device of the present invention will be described. An example of the substrate for a high frequency device of the present invention is shown in Fig. 1. The substrate for a high frequency device 1 of the present invention has an SOI substrate 2 and a nitride semiconductor film 3 on the SOI substrate 2. The SOI substrate 2 has a structure in which a trap rich layer 5 (TR layer), an oxide film 6 (buried oxide film (BOX film)), and an SOI layer 7 (silicon single crystal layer) are laminated in this order on a base substrate 4.

[0026] Each part will be described in detail below. The SOI substrate 2 is a TRSOI substrate in which a TR layer 5 formed on a base substrate 4 and an SOI layer 7 are bonded via an oxide film 6. For example, the structure consisting of the base substrate 4 and the TR layer 5 and a bond substrate which will become the SOI layer 7, on one or both surfaces of which an oxide film 6 is formed, are bonded together, and the bond substrate is thinned, thereby obtaining the above-mentioned TRSOI substrate structure.

[0027] The base substrate 4 can be, for example, a silicon substrate, and in particular, a silicon single crystal substrate with a (100) crystal plane orientation produced by the CZ method, because it is easy to prepare a low-cost, high-quality substrate. The resistivity of the base substrate 4 is not particularly limited, and a low resistivity base substrate with a large breaking load may be used to easily control warpage. Increasing the dopant concentration increases the strength of the base substrate, and warpage can be suppressed. On the other hand, a substrate with a high resistivity, for example, 1 kΩ·cm or more, can be used, in which case a substrate for a high frequency device with better high frequency characteristics can be obtained. The resistivity can be preferably 3 kΩ·cm or more, and more preferably 5 kΩ·cm or more, which is more advantageous in terms of high frequency characteristics. The upper limit of this resistivity is not particularly limited, and the higher the value, the more the high frequency characteristics can be improved, and it can be, for example, 50 kΩ·cm.

[0028] The TR layer 5 is a layer that has the effect of trapping electric charges due to defects in the layer, and any layer having this function can be used, for example, a non-doped polysilicon layer or a damaged layer formed on the surface of the base substrate by ion implantation. The oxide film 6 can be, for example, a silicon oxide film formed by thermal oxidation.

[0029] The SOI layer 7 has a resistivity of 1 kΩ·cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less. The high resistivity of 1 kΩ·cm or more improves the high frequency characteristics of the high frequency device substrate 1. It can be preferably 3 kΩ·cm or more, and more preferably 5 kΩ·cm or more, which is more advantageous in terms of high frequency characteristics. There is no particular upper limit to this resistivity, and the higher the value, the more the high frequency characteristics can be improved, but it can be set to, for example, 150 kΩ·cm. Furthermore, since the crystal plane orientation is (111), a good nitride semiconductor film can be suitably formed on the SOI layer 7 .

[0030] As described above, the present inventors have found that high frequency characteristics depend on the oxygen concentration in the SOI layer 7, and that if the oxygen concentration is 14.8 ppma or less, high frequency characteristics superior to those of conventional products can be obtained. For example, regarding the second harmonic (2HD), the conventional product had a limit of improvement at about -91 dBm, but in the present invention, it is possible to further improve it, for example, reduce it to about -95 dBm and improve it. And if the oxygen concentration is 5.2 ppma or less, it can be improved to about -105 dBm, and if it is 0.5 ppma or less, it can be improved to about -115 dBm or more. Note that the lower the oxygen concentration, the more preferable it is in terms of improving the high-frequency characteristics, and a lower limit cannot be set. In the present specification, the value of the oxygen concentration in the present invention (and the value of the oxygen concentration in the conventional products of each comparative example described later) is based on the JEIDA-61-2000 standard.

[0031] The nitride semiconductor film 3 is not particularly limited, and a nitride semiconductor corresponding to the purpose can be adopted. For example, GaN, AlN, AlGaN, and combinations thereof can be mentioned.

[0032] With the substrate 1 for high-frequency devices of the present invention as described above, it is superior to the conventional product in terms of high-frequency characteristics.

[0033] Next, a method for manufacturing a substrate for a high-frequency device of the present invention, which can manufacture the substrate 1 for a high-frequency device in FIG. 1, will be described. FIG. 2 is an example of the flow of the manufacturing method of the present invention. It includes a step of preparing a TRSOI substrate and a step of forming a nitride semiconductor film.

[0034] Hereinafter, each step will be described in detail while showing specific examples. <Preparation of TRSOI Substrate> First, a base substrate is prepared, and a TR layer is formed thereon. For example, a base substrate (Si substrate) with a diameter of 150 mm and high resistivity (1 to 50 kΩ cm) is prepared. In particular, the crystal axis orientation is aligned by the Czochralski method. <100> A silicon single crystal ingot is grown and sliced ​​by a wire saw to prepare a silicon single crystal substrate with a (100) crystal plane orientation (base substrate: (100) just substrate). Note that, although the base substrate will be described here using a (100) just substrate as an example, it may also have an off-axis orientation. A poly-Si layer that will become a trap rich layer (TR layer) is grown on the base substrate thus prepared by low pressure CVD to a thickness of 100 nm to 3 μm. As an example of the growth conditions, the temperature in the reaction tube of the vapor phase growth apparatus is set to, for example, 590°C or higher, and, for example, monosilane (SiH4) gas and phosphine (PH3) gas are introduced into the reaction tube, and the reaction tube can be grown while maintaining a predetermined degree of vacuum. Alternatively, there is a method in which an amorphous silicon film is formed at a temperature of 580°C or lower using disilane (Si2H6) gas, and this thin film is annealed at a temperature of, for example, about 600 to 1000°C to polysiliconize it. As mentioned above, the TR layer is a layer that has the effect of trapping electric charges due to defects in the layer, and any layer that has this function is acceptable, and is not limited to polysilicon. For example, it can be a damaged layer formed by ion implantation in a Si crystal. For example, the above-mentioned damaged layer can be formed on the surface of a base substrate.

[0035] Next, a bond substrate made of silicon single crystal is prepared, and the base substrate and the bond substrate are bonded via an oxide film to obtain a bonded substrate. The bond substrate in the bonded substrate is then thinned to form an SOI layer (fabrication of a TRSOI substrate). First, a bond substrate is prepared. It can be, for example, a CZ single crystal substrate or an FZ single crystal substrate. It will later become an SOI layer, and a nitride semiconductor film will be laminated on top of it, so a substrate with a (111) crystal plane orientation is prepared. For example, the manufacturing conditions of the ingot in the CZ method or FZ method can be appropriately adjusted to obtain a substrate with a crystal axis orientation of 111. <111> All that is needed is to grow an ingot and slice it (bond substrate: (111) just substrate). The bond substrate may have an off-angle, but it is particularly preferable to have an off-angle within ±1 degree. In this case, the nitride semiconductor film formed thereon can be more reliably uniform and of high quality. In this case, the dopant concentration is appropriately adjusted to achieve high resistivity (1 kΩ·cm or higher). Furthermore, the oxygen concentration in the crystal is controlled to 14.8 ppma or less. In the case of the CZ method, the oxygen concentration in the ingot can be adjusted by adjusting the rotation speed of the crucible in the CZ pulling device, and more preferably, it can be adjusted to 5.2 ppma or less. In addition, in the case of the FZ method, it is easy to prepare even a low oxygen concentration of 0.5 ppma or less. By lowering the oxygen concentration of the bond substrate (SOI layer), the high frequency characteristics can be further improved and 2HD can be further reduced.

[0036] Then, for example, a 200 nm oxide film (to become the BOX film) is formed on the polysilicon layer formed on the base substrate, and is bonded (joined) to the above-mentioned (111) bond substrate (1 to 150 kΩ·cm, preferably 3 kΩ·cm or more, more preferably 5 kΩ·cm or more) to become the SOI layer, and then the bond substrate is thinned to form the SOI layer. The thickness of the SOI layer can be, for example, 100 nm. The oxide film can be formed so that the thickness of the oxide film between the base single crystal substrate and the bond single crystal substrate is, for example, 2 nm to 470 nm. Naturally, the thickness of the oxide film after the two substrates are bonded can be 2 nm to 470 nm. The oxide film may be formed on the polysilicon layer formed on the base substrate, or on the bond substrate, or on both. The conditions (atmosphere, temperature, time, etc.) of the heat treatment (bonding heat treatment) are not particularly limited as long as the base substrate and the bond substrate can be bonded to each other. The temperature of this bonding heat treatment can be, for example, 400° C. to 1200° C. in a nitrogen atmosphere for 1 to 12 hours. The method for thinning the bond substrate can be, for example, an ion implantation delamination method. An ion implantation layer is formed in advance on the bond substrate, and the bonded substrate may be delaminated at the ion implantation layer by delamination heat treatment or mechanically delaminated at the ion implantation layer after bonding.

[0037] <Formation of nitride semiconductor film> After the TRSOI substrate is prepared as described above, a nitride semiconductor film is formed on the SOI layer. For example, an AlN initial layer is stacked on a TRSOI substrate, followed by an AlGaN layer, a GaN layer, an SLs layer (a superlattice layer of AlGaN / GaN or AlN / GaN), and a GaN layer on top of that, for a total thickness of 1.8 μm. These layers can be formed by epitaxial growth using the MOCVD method. Thermal donors due to oxygen in the substrate are unlikely to be formed. The epitaxial growth temperature is about 1200 to 1050, and a thermal history of at least 4 hours is added, so it is thought that thermal donors would not be formed, and the cooling is close to rapid cooling.

[0038] The values ​​of the film thickness, resistivity, process temperature, and the like of each part, other than the resistivity (1 kΩ cm or more), crystal plane orientation (111), and oxygen concentration (14.8 ppma or less) in the SOI layer, given in the above description of the process, are merely examples, and the present invention is not limited to these values.

[0039] According to the manufacturing method of the present invention as described above, it is possible to manufacture a high frequency device substrate 1 having improved high frequency characteristics compared to the conventional substrate, and it is possible to obtain a substrate having a 2HD further reduced to less than -91 dBm. EXAMPLES

[0040] The present invention will be described in more detail below with reference to examples and comparative examples, but the present invention is not limited to these examples. Example 1 A high frequency device substrate 1 (TRSOI substrate + nitride semiconductor film) shown in FIG. 1 was manufactured according to the flow shown in FIG. Base substrate 4: CZSi single crystal substrate, (100) plane is the main surface, 8 kΩ cm TR layer 5: Polysilicon layer, thickness 1.8 μm Oxide film 6 (BOX film): thickness 200 nm SOI layer 7 (bond substrate): CZSi single crystal, (111) plane is the main surface, 5 kΩ·cm, oxygen concentration 14.8 ppma, thickness 100 nm Nitride semiconductor film 3: An AlN initial layer, an AlGaN layer, and a buffer layer consisting of a GaN / AlN SLs structure are laminated, and a GaN layer is laminated on top of that, resulting in a total thickness of 1.8 μm.

[0041] The manufacturing conditions for the TR layer, the oxide film, the SOI layer, and the nitride semiconductor film are as follows. TR layer: A polysilicon layer was formed on a base substrate as a trap rich layer (charge trapping layer) at 1050° C., and then the surface was polished to a thickness of 1.8 μm. Oxide film: Formed by thermally oxidizing the bond substrate. SOI layer: Hydrogen was injected from the top surface of the bond substrate (the side that bonds with the base substrate) to form a microbubble layer (ion-implanted layer) inside the bond substrate. The bond substrate with the microbubble layer was attached to the surface of the polysilicon layer of the base substrate that had been formed earlier. Next, a heat treatment was performed to split the bond substrate using the microbubble layer as the peeling interface, forming a thin bond layer that remained on the oxide film, i.e., an SOI layer. Next, the SOI layer was touch-polished to obtain an SOI layer with a thickness of 100 nm. Nitride semiconductor: The growth temperatures for each layer are as follows: initial layer AlN is 1050 to 1200°C, AlGaN layer is 1150 to 1050°C, SLs structure is 1100 to 1000°C, and GaN is 1000 to 900°C.

[0042] An RF electrode was formed on the above-mentioned high frequency device substrate, and the characteristics were evaluated. Specifically, a CPW (Co-Planar Waveguide) Al electrode (thickness 1 μm, length 2199 μm) was formed on the high frequency device substrate 1 by a photolithography process, and then heat treatment was performed. In this manner, a composite 20 shown in FIG. 3 (structural diagram) and FIG. 4 (plan view) was obtained. The composite 20 included a high-frequency device substrate 1 and a CPW electrode 10 formed on the surface of the nitride semiconductor film 3 thereof. The CPW electrode 10 included a central electrode 11 having a length L (FIG. 4) of 2199 μm and a width of 15 μm, and a peripheral electrode 12. The thickness of the central electrode 11 and the peripheral electrode 12 was 1 μm.

[0043] Using the CPW electrode 10, the harmonic characteristics (2HD) were obtained as the RF characteristics of the high frequency device substrate 1. The measurement conditions were as follows: the shape of the CPW electrode 10, the fundamental frequency (H1) f0 = 0.9 GHz, and the output P out =15 dBm was set in Example 1 and in each of the examples and comparative examples described below. In the first embodiment, the result was −95 dBm.

[0044] Example 2 A high frequency device substrate and a CPW electrode were fabricated in the same manner as in Example 1, except that the oxygen concentration in the SOI layer was 5.2 ppma, and the harmonic characteristics (2HD) were obtained. The result was -104.8dBm.

[0045] Example 3 A high frequency device substrate and a CPW electrode were fabricated in the same manner as in Example 1, except that the oxygen concentration of the SOI layer was 0.3 ppma (the bond substrate was an FZSi single crystal), and the harmonic characteristics (2HD) were obtained. The result was -114.2dBm.

[0046] Comparative Example 1 A high-frequency device substrate and a CPW electrode were fabricated in the same manner as in Example 1, except that the resistivity of the base substrate was 5 kΩ·cm and the oxygen concentration of the SOI layer was 17.1 ppma, and the harmonic characteristics (2HD) were obtained. The result was -89.9dBm.

[0047] Comparative Example 2 A GaN-on-Si structure was manufactured. Specifically, a buffer layer such as an SLs structure was laminated as a nitride semiconductor film on a Si substrate (FZSi single crystal substrate, (111) plane was the main surface, 5 kΩ cm, oxygen concentration 0.5 ppma) in the same manner as in Example 1, and a GaN layer was laminated on top of that. The total thickness was 1.8 μm. Although this Comparative Example 2 has a nitride semiconductor film, it differs from each of the Examples, which are the products of the present invention, in that the nitride semiconductor film is formed on a Si substrate, not on a TRSOI substrate. A CPW electrode was fabricated in the same manner as in Example 1, and the harmonic characteristics (2HD) were obtained. The result was -84dBm.

[0048] Comparative Example 3 To evaluate the high-frequency characteristics of the TR substrate, the SOI layer was removed from the TRSOI substrate to produce a TR substrate with an oxide film. Specifically, the TRSOI substrate was produced by forming a 1.8 μm-thick polysilicon layer on the Si substrate ((100) plane is the main surface, 5 kΩ cm, oxygen concentration 13.1 ppma) of the base substrate, forming a 200 nm-thick oxide film and a micro-bubble layer on the Si substrate of the bond substrate, attaching the oxide film side of the bond substrate to the surface of the polysilicon layer of the base substrate, performing a heat treatment, splitting the bond substrate using the micro-bubble layer as the peeling interface to form an SOI layer, and thinning the SOI layer by touch polishing to obtain a TRSOI substrate. The SOI layer was then peeled off to obtain a TR substrate with an oxide film. A CPW electrode was fabricated on the oxide film of this TR substrate with oxide film in the same manner as in Example 1, and harmonic characteristics (2HD) were obtained. The result was -91dBm. Comparative Example 3 differs from each of the Examples, which are products of the present invention, in that it does not have the SOI layer 7 and the nitride semiconductor film, which are present in the products of the present invention.

[0049] The measurement results of the harmonic characteristics (2HD) of Examples 1-3 and Comparative Examples 1-3 are shown in Figure 5. Among Comparative Examples 1-3, Comparative Example 3 was able to reduce 2HD the most, but only to -91 dBm. In contrast, in Examples 1-3 in which the present invention was implemented, all of the reductions exceeded -91 dBm, which was extremely good.

[0050] Example 4 A high frequency device substrate and a CPW electrode were fabricated in the same manner as in Example 1, except that the oxygen concentration of the SOI layer was 0.5 ppma (the bond substrate was an FZSi single crystal), and the harmonic characteristics (2HD) were obtained. The result was -112.4dBm.

[0051] Example 5 A high frequency device substrate and a CPW electrode were fabricated in the same manner as in Example 1, except that the resistivity of the SOI layer was 1 kΩ·cm, and the harmonic characteristics (2HD) were obtained. The result was -94dBm.

[0052] Comparative Example 4 A high frequency device substrate and a CPW electrode were fabricated in the same manner as in Example 1, except that the oxygen concentration in the SOI layer was 17.1 ppma, and the harmonic characteristics (2HD) were obtained. The result was -89.6dBm.

[0053] In Examples 4 and 5, the noise level was reduced to more than -91 dBm for 2HD. On the other hand, in Comparative Example 4, the noise level did not reach the -91 dBm of Comparative Example 3.

[0054] The present specification includes the following aspects. [1]: A substrate for a high frequency device in which a nitride semiconductor film is formed on an SOI substrate, The SOI substrate is a TRSOI substrate in which a trap rich layer formed on a base substrate and an SOI layer made of single crystal silicon are bonded via an oxide film, The SOI layer is a substrate for a high frequency device having a resistivity of 1 kΩ·cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less. [2]: The high frequency device substrate according to [1] above, wherein the SOI layer has an oxygen concentration of 5.2 ppma or less. [3]: The high frequency device substrate according to [1] above, wherein the SOI layer has an oxygen concentration of 0.5 ppma or less. [4]: The high frequency device substrate according to any one of [1] to [3] above, wherein the base substrate is a CZ silicon single crystal substrate having a (100) crystal plane orientation. [5]: A substrate for a high frequency device according to any one of [1] to [4] above, wherein the base substrate has a resistivity of 1 kΩ·cm or more. [6]: A method for manufacturing a high-frequency device substrate having a nitride semiconductor film formed on an SOI substrate, comprising the steps of: A step of preparing a TRSOI substrate as the SOI substrate, in which a trap rich layer formed on a base substrate and a bond substrate made of silicon single crystal are bonded to each other via an oxide film, and the bond substrate is thinned to form an SOI layer; forming the nitride semiconductor film on the SOI layer; The method for manufacturing a high frequency device substrate uses a bond substrate having a resistivity of 1 kΩ·cm or more, a crystal plane orientation of (111), and an oxygen concentration of 14.8 ppma or less. [7]: The method for manufacturing a high frequency device substrate according to [6] above, wherein the bond substrate has an oxygen concentration of 5.2 ppma or less. [8]: The method for manufacturing a high frequency device substrate according to [6] above, wherein the bond substrate has an oxygen concentration of 0.5 ppma or less. [9]: The method for producing a high frequency device substrate according to any one of [6] to [8] above, wherein the base substrate is a CZ silicon single crystal substrate having a (100) crystal plane orientation.

[10] : The method for manufacturing a high frequency device substrate according to any one of [6] to [9] above, wherein the base substrate has a resistivity of 1 kΩ·cm or more.

[0055] The present invention is not limited to the above-described embodiment. The above-described embodiment is merely an example, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and exhibits similar effects is included in the technical scope of the present invention. [Explanation of symbols]

[0056] 1...high frequency device substrate of the present invention, 2...SOI substrate, 3...nitride semiconductor film 4...base substrate, 5...trap rich layer (TR layer), 6...oxide film, 7...SOI layer, 10...CPW electrode, 11...center electrode, 12...peripheral electrode, 20...Complex.

Claims

1. A high frequency device substrate having a nitride semiconductor film formed on an SOI substrate, The SOI substrate is a TRSOI substrate in which a trap rich layer formed on a base substrate, which is a CZ silicon single crystal substrate, and an SOI layer made of silicon single crystal are bonded via an oxide film, The SOI layer has a resistivity of 1 kΩ·cm or more, a crystal plane orientation of (111), and an oxygen concentration of 0.5 ppma or less [JEIDA].

2. 2. The high frequency device substrate according to claim 1, wherein the base substrate is a CZ silicon single crystal substrate having a (100) crystal plane orientation.

3. 3. The high frequency device substrate according to claim 1, wherein the base substrate has a resistivity of 1 kΩ·cm or more.

4. A method for manufacturing a high frequency device substrate having a nitride semiconductor film formed on an SOI substrate, comprising the steps of: As the SOI substrate, a trap rich layer formed on a base substrate, which is a CZ silicon single crystal substrate, and a bond substrate made of silicon single crystal are bonded via an oxide film to obtain a bond substrate, and the bond substrate is thinned to form an SOI layer, thereby preparing a TRSOI substrate; forming the nitride semiconductor film on the SOI layer; A method for manufacturing a substrate for a high frequency device, comprising using, as the bond substrate, one having a resistivity of 1 kΩ·cm or more, a crystal plane orientation of (111), and an oxygen concentration of 0.5 ppma or less [JEIDA].

5. 5. The method for manufacturing a high frequency device substrate according to claim 4, wherein a CZ silicon single crystal substrate having a (100) crystal plane orientation is used as the base substrate.

6. 6. The method for manufacturing a high frequency device substrate according to claim 4, wherein the base substrate has a resistivity of 1 kΩ·cm or more.

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