Substrate for mounting electronic elements, electronic device, and electronic module

The non-overlapping conductor layer design with tapered ends and specific materials enhances the stability and conductivity of thinner electronic device mounting substrates, addressing unevenness and strength issues.

JP7610654B2Active Publication Date: 2025-01-08KYOCERA CORP
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Patent Information

Application Number
JP2023107470
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2019-05-29
Filing Date
2023-06-29
Publication Date
2025-01-08
Estimated Expiration
2040-05-28

AI Technical Summary

Technical Problem

Existing electronic device mounting substrates face issues with unevenness and reduced strength due to overlapping clearances in multiple layers, which occur when insulating layers become thinner, leading to potential cracks and decreased conductivity.

Method used

The substrate design includes a first and second conductor layer with non-overlapping clearance portions and peripheral parts that taper in thickness, using materials like tungsten, molybdenum, manganese, palladium, or copper alloys, and a frame structure to enhance stability.

Benefits of technology

This design reduces surface irregularities and strengthens the substrate, improving manufacturing yield and reducing the risk of cracks while maintaining conductivity.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

To reduce a thickness of an electronic device.SOLUTION: An electronic element mounting substrate 1 includes: a first layer 2a; a second layer 2b at a lower surface of the first layer; and a third layer 2c at the lower surface of the second layer, and includes a substrate 2 onto which an electronic element 10 is mounted. The substrate includes a via conductor 5 penetrated from the first layer to the third layer. The substrate includes each of conductive layers 6 and 7 that is positioned in each of interlayers, and is connected to the via conductor. The conductive layer includes: a land part surrounding the via conductor; a clearance part surrounding the land part; and peripheral parts 6b and 7b that are electrically insulated from the land part via the clearance part while surrounding the clearance part. A first land part 6a includes a first part positioned so as to be overlapped with a second land part 7a. A first clearance part 6c includes a second part positioned without being overlapped with a second clearance part 7c. In a cross-sectional view of a vertical direction, each of a first peripheral part 6b and a second peripheral part 7b includes an end part of which a thickness becomes thinner as far from the via conductor.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present disclosure relates to an electronic element mounting substrate on which electronic elements and the like are mounted, an electronic device, and an electronic module. [Background technology]

[0002] A substrate for mounting electronic elements is known, which includes an insulating layer and a wiring layer and has a through conductor. In addition, an electronic device using such a substrate for mounting electronic elements is known to have a structure in which a lid is mounted on the upper surface from a recess. (See JP 2017-183337 A.)

[0003] In recent years, electronic devices are required to be thinner. Therefore, each insulating layer of the electronic device mounting substrate used in the electronic device is also required to be thinner. In order to increase the conductivity of the through conductor of the electronic device mounting substrate, a land pattern is provided on the surface and / or the bottom surface of each insulating layer. This land pattern may have a clearance to improve insulation from a pattern connected to another potential on the same layer. In this case, the multiple through conductors are positioned so that they overlap in part or in whole when viewed from above, and this clearance overlaps in part or in whole when viewed from above. When this clearance overlaps in multiple layers, there is a concern that unevenness will occur on the surface of the electronic device mounting substrate or a space will be created around the edge of the clearance inside the electronic device mounting substrate, causing a decrease in the strength of the electronic device mounting substrate or the occurrence of cracks. Summary of the Invention

[0004] A substrate for mounting electronic devices according to one embodiment of the present disclosure includes a substrate having a first layer, a second layer located on a lower surface of the first layer, and a third layer located on the lower surface of the second layer, and on which an electronic device is mounted, a via conductor penetrating in a vertical direction from the first layer to the third layer, a first conductor layer located between the first layer and the second layer and connected to the via conductor in a planar perspective, and a second conductor layer located between the second layer and the third layer and connected to the via conductor in a planar perspective, the first conductor layer having a first land portion surrounding the via conductor and connected to the via conductor, a first clearance portion surrounding the first land portion, and a second clearance portion surrounding the first clearance portion and connecting the first land portion to the first clearance portion through the first clearance portion. the second conductor layer has, in a planar perspective, a second land portion surrounding the via conductor and connected to the via conductor, a second clearance portion surrounding the second land portion, and a second peripheral portion surrounding the second clearance portion and electrically insulated from the second land portion via the second clearance portion, the first land portion has a first portion positioned overlapping the second land portion in a planar perspective, and the first clearance portion has a second portion positioned not overlapping the second clearance portion in a planar perspective, and in a vertical cross-sectional view, the first peripheral portion and the second peripheral portion each have an end portion whose thickness decreases with increasing distance from the via conductor, The first conductor layer and the second conductor layer contain tungsten, molybdenum, manganese, palladium, or copper, or an alloy containing at least one metal material selected from these, and do not contain silver.

[0005] An electronic device according to one aspect of the present disclosure includes the above-described electronic device mounting substrate, and an electronic device mounted on the electronic device mounting substrate.

[0006] An electronic module according to one embodiment of the present disclosure includes the above-mentioned electronic device and a housing positioned to surround the electronic device. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1(a) is a top view showing the appearance of an electronic device mounting substrate and an electronic device according to a first embodiment of the present disclosure, and FIG. 1(b) is a vertical cross-sectional view corresponding to line X1-X1 in FIG. 1(a). [Diagram 2] FIG. 2(a) is a top view showing the appearance of an electronic module according to another aspect of the first embodiment of the present disclosure, and FIG. 2(b) is a longitudinal sectional view corresponding to line X2-X2 in FIG. 2(a). [Diagram 3] FIG. 3(a) is an enlarged vertical cross-sectional view of a main portion A of an electronic device mounting substrate according to another aspect of the first embodiment of the present disclosure. [Figure 4] FIG. 4 is an enlarged vertical cross-sectional view of a main part A of an electronic device mounting board according to another aspect of the first embodiment of the present disclosure. [Diagram 5] FIG. 5 is an enlarged vertical cross-sectional view of a main portion A of an electronic device mounting board according to another aspect of the first embodiment of the present disclosure. [Figure 6] FIG. 6 is an enlarged vertical cross-sectional view of a main part A of an electronic device mounting board according to another aspect of the first embodiment of the present disclosure. [Figure 7] FIG. 7 is an enlarged vertical cross-sectional view of a main portion A of an electronic device mounting board according to another aspect of the first embodiment of the present disclosure. [Figure 8] FIG. 8(a) is an enlarged plan view of a main portion A of an electronic device mounting substrate according to another aspect of the first embodiment of the present disclosure, and FIG. 8(b) is a longitudinal cross-sectional view corresponding to line X8-X8 in FIG. 8(a). [Figure 9] FIG. 9(a) is an enlarged plan view of a main portion A of an electronic device mounting substrate according to another aspect of the first embodiment of the present disclosure, and FIG. 9(b) is a longitudinal cross-sectional view corresponding to line X9-X9 in FIG. 9(a). [Figure 10] FIG. 10 is an enlarged vertical cross-sectional view of a main portion A of an electronic device mounting board according to a second embodiment of the present disclosure. [Figure 11] FIG. 11 is an enlarged vertical cross-sectional view of a main portion A of an electronic device mounting board according to a third embodiment of the present disclosure. [Figure 12] FIG. 12 is an enlarged vertical cross-sectional view of a main portion A of an electronic device mounting board according to a fourth embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] <Configuration of electronic element mounting substrate and electronic device> Hereinafter, some exemplary embodiments of the present disclosure will be described with reference to the drawings. In the following description, an electronic device is defined as a configuration in which an electronic device is mounted on an electronic device mounting substrate. Also, an electronic module is defined as a configuration having a housing or member disposed on the upper surface side of the electronic device mounting substrate or surrounding the electronic device. Although any direction of the electronic device mounting substrate, the electronic device, and the electronic module may be defined as upward or downward, for convenience, an orthogonal coordinate system xyz is defined, and the positive side of the z direction is defined as upward.

[0009] (First embodiment) An electronic device mounting substrate 1 according to a first embodiment of the present disclosure and an electronic device 21 including the same will be described with reference to Fig. 1 to Fig. 9. Fig. 1 shows a top view and a cross-sectional view of the electronic device 21, and Fig. 2 shows a top view and a cross-sectional view of an electronic module 31. Figs. 3 to 7 show enlarged vertical cross-sectional views of a main part A of the electronic device mounting substrate 1. Figs. 8 and 9 show enlarged plan views and enlarged cross-sectional views of the main part A of the electronic device mounting substrate 1.

[0010] The electronic device mounting substrate 1 has a first layer 2a, a second layer 2b located on the lower surface of the first layer 2a, and a third layer 2c located on the lower surface of the second layer 2a, and has a substrate 2 on which an electronic device 10 is mounted. The substrate 2 has a via conductor 5 that continuously passes through the first layer 2a, the second layer 2b, and the third layer 2c in the up-down direction. The substrate 2 has a first conductor layer 6 that is located between the first layer 2a and the second layer 2b and is connected to the via conductor 5 in a planar perspective. The substrate 2 has a second conductor layer 7 that is located between the second layer 2b and the third layer 2c and is connected to the via conductor 5 in a planar perspective. The first conductor layer 6 has, in planar perspective, a first land portion 6a surrounding the via conductor 5, a first clearance portion 6c surrounding the first land portion 6a, and a first peripheral portion 6b surrounding the first clearance portion 6c and electrically insulated from the first land portion 6a through the first clearance portion 6c. The second conductor layer 7 has, in planar perspective, a second land portion 7a surrounding the via conductor 5, a second clearance portion 7c surrounding the second land portion 7a, and a second peripheral portion 7b surrounding the second clearance portion 7c and electrically insulated from the second land portion 7a through the second clearance portion 7c. The first land portion 6a of the substrate 2 has a first portion 6e positioned so as to overlap with the second land portion 7a. Also, in planar perspective, the first clearance portion 6c has a second portion 6f positioned so as not to overlap with the second clearance portion 7c. In other words, the first clearance portion 6a and the second clearance portion 7a have different sizes and / or shapes in a planar perspective view. The first peripheral portion 6b and the second peripheral portion 6b of the substrate 2 have ends (first end 6d, second end 7d) whose thicknesses decrease with increasing distance from the via conductor 5 in a cross-sectional view in the vertical direction of the substrate 2, i.e., in the z-direction.

[0011] The electronic element mounting substrate 1 has a first layer 2a, a second layer 2b located on the lower surface of the first layer 2a, and a third layer 2c located on the lower surface of the second layer 2a, and also has a substrate 2 on which an electronic element 10 is mounted. The substrate 2a has a mounting area on its upper surface on which the electronic element 10 is mounted. The mounting area is an area on which at least one electronic element 10 is mounted, and can be appropriately determined, for example, inside or above the outermost periphery of an electrode pad 3 described later. In addition, the components mounted in the mounting area are not limited to electronic elements 10, and may be, for example, electronic components, and the number of electronic elements 10 and / or electronic components is not specified.

[0012] Examples of electrically insulating ceramics used as a material for the insulating layer forming the substrate 2 include aluminum oxide sintered body, mullite sintered body, silicon carbide sintered body, aluminum nitride sintered body, silicon nitride sintered body, glass ceramic sintered body, etc. Examples of resins used as a material for the insulating layer forming the substrate 2 include thermoplastic resin, epoxy resin, polyimide resin, acrylic resin, phenolic resin, fluorine resin, etc. Examples of fluorine resins include tetrafluoroethylene resin.

[0013] The substrate 2 may be formed of five insulating layers as shown in Fig. 1, or may be formed of four or less insulating layers, or six or more insulating layers. When the insulating layers are four or less, the thickness of the substrate 1 for mounting electronic devices can be reduced. When the insulating layers are six or more, the rigidity of the substrate 1 for mounting electronic devices can be increased.

[0014] For example, the size of one side of the outermost periphery of the electronic device mounting substrate 1 is 0.3 mm to 10 cm, and when the electronic device mounting substrate 1 has a quadrangular shape in a plan view, it may be a square or a rectangle. Furthermore, for example, the thickness of the electronic device mounting substrate 1 is 0.2 mm or more.

[0015] The substrate 2 has via conductors 5 that vertically penetrate the first layer 2a, the second layer 2b, and the third layer 2c in succession. The substrate 2 has a first conductor layer 6 that is located between the first layer 2a and the second layer 2b and is connected to the via conductors 5 in a planar view. The substrate 2 has a second conductor layer 7 that is located between the second layer 2b and the third layer 2c and is connected to the via conductors 5 in a planar view.

[0016] Furthermore, electrodes for connecting an external circuit may be provided on the upper surface, side surface, or lower surface of the base 2 of the electronic device mounting board 1. The electrodes for connecting an external circuit may electrically connect the base 2 and the external circuit board, or the electronic device 21 and the external circuit board.

[0017] Furthermore, in addition to the electrode pads 3 and / or the electrodes for connecting an external circuit, electrodes formed between insulating layers, internal wiring conductors, and through conductors other than the via conductors 5 for vertically connecting the internal wiring conductors to each other may be provided on the upper or lower surface of the base 2. These electrodes, internal wiring conductors, or through conductors may be exposed on the surface of the substrate 2. The electrode pads 3 and / or the electrodes for connecting an external circuit may be electrically connected to each other by these electrodes, internal wiring conductors, or through conductors.

[0018] When the base 2 is made of an electrically insulating ceramic, the electrode pad 3, the via conductor 5, the first conductor layer 6, the second conductor layer 7, the electrode for connecting an external circuit, the electrode, the internal wiring conductor and / or the through conductor include tungsten (W), molybdenum (Mo), manganese (Mn), palladium (Pd), silver (Ag) or copper (Cu), or an alloy containing at least one or more metal materials selected from these. They may also be made of only copper (Cu). When the base 2 is made of a resin, the electrode pad 3, the via conductor 5, the first conductor layer 6, the second conductor layer 7, the electrode for connecting an external circuit, the internal wiring conductor and / or the through conductor include copper (Cu), gold (Au), aluminum (Al), nickel (Ni), molybdenum (Mo), palladium (Pd) or titanium (Ti), or an alloy containing at least one or more metal materials selected from these.

[0019] A plating layer may be further provided on the exposed surfaces of the electrode pad 3, the via conductor 5, the electrode for connecting an external circuit, the electrode, the internal wiring conductor and / or the through conductor. This configuration can protect the exposed surfaces of the electrode for connecting an external circuit, the conductor layer and the through conductor to reduce oxidation. This configuration can also provide a good electrical connection between the electrode pad 3 and the electronic element 10 via the electronic element connection member 13 such as wire bonding. The plating layer may be, for example, a Ni plating layer having a thickness of 0.5 μm to 10 μm, or the Ni plating layer and a gold (Au) plating layer having a thickness of 0.5 μm to 3 μm may be sequentially deposited.

[0020] In plan view, the first conductor layer 6 has a first land portion 6a surrounding the via conductor 5, a first clearance portion 6c surrounding the first land portion 6a and electrically insulated from the first clearance portion 6c, and a first peripheral portion 6b surrounding the first clearance portion 6c. Here, the first land portion 6a and the first peripheral portion 6b of the first conductor layer 6 may be the same signal or different signals. Also, the first peripheral portion 6b may be, for example, a wide solid pattern or a thin linear signal pattern.

[0021] In a planar perspective view, the second conductor layer 7 has a second land portion 7a surrounding the via conductor 5, a second clearance portion 7c surrounding the second land portion 7a, and a second peripheral portion 7b surrounding the second clearance portion 7c and electrically insulated from the second land portion 7a via the second clearance portion. Here, the second land portion 7a and the second peripheral portion 7b of the second conductor layer 6 may be the same signal or different signals. Also, the second peripheral portion 7b may be, for example, a wide solid pattern or a thin linear signal pattern.

[0022] Moreover, the first conductor layer 6 and the second conductor layer 7 may be the same signal or different signals.

[0023] In the substrate 2, the first land portion 6a has a first portion 6e where the first land portion 6a overlaps with the second land portion 7a in a planar perspective, and the first clearance portion 6a has a second portion 6f where the first clearance portion 6a does not overlap with the second clearance portion 7a in a planar perspective. The first peripheral portion 6b and the second peripheral portion 7b of the substrate 2 each have an end portion (a first end portion 6d, a second end portion 7d) whose thickness decreases with increasing distance from the via conductor 5 in a vertical cross-sectional view.

[0024] In recent years, electronic devices are required to be thin. Therefore, each insulating layer of the electronic device mounting substrate used in the electronic device is also required to be thin. In order to increase the conductivity of the through conductor of the electronic device mounting substrate, a land pattern is provided on the surface or / and underside of each insulating layer. This land pattern may have a clearance to improve insulation from a pattern connected to another potential of the same layer. In this case, when the multiple through conductors are positioned so that they overlap in part or all in a top view, the clearance may overlap in part or all in a top view. When each insulating layer of the electronic device mounting substrate is thinned, the clearance may overlap in multiple layers in a top view, causing unevenness on the surface of the electronic device mounting substrate. Or, a space may be formed around the edge of the clearance inside the electronic device mounting substrate. There was concern that this would cause a decrease in the strength of the electronic device mounting substrate or the occurrence of cracks.

[0025] In contrast, in the electronic device mounting board 1 of this embodiment, the first clearance portion 6a has a second portion 6f that is positioned without overlapping with the second clearance portion 7a in a planar perspective view, which makes it possible to reduce the occurrence of unevenness on the surface of the electronic device mounting board 1 due to overlapping of clearances of multiple layers.

[0026] In general, in a substrate for mounting electronic devices, the thickness of a wiring layer provided between each insulating layer is absorbed by the deformation of each insulating layer, and the periphery of the wiring layer is covered with an insulating layer. However, when the insulating layers become thinner due to the thinning of the substrate for mounting electronic devices, a space may be generated between the wiring layer and the insulating layer, and there has been concern that the strength of the substrate for mounting electronic devices may be reduced due to the occurrence of this space and the overlapping of multiple layers in a planar perspective view.

[0027] In contrast, in the electronic device mounting board 1 of this embodiment, the first end 6d of the first peripheral portion 6b and the second end 7d of the second peripheral portion 7b of the board 2 become thinner as they move away from the via conductor 5 in a vertical cross-sectional view. That is, each peripheral portion has an end (first end 6d, second end 7d) whose thickness becomes thinner as it moves away from the via conductor 5. In particular, both ends of the first peripheral portion 6b and the second peripheral portion 7b may be curved and lenticular in cross-sectional view, with the thickness becoming thinner toward the end. That is, the first end 6d and the second end 7d may be lenticular in cross-sectional view. As a result, even if each insulating layer of the electronic device mounting board 1 becomes thinner, each insulating layer is easily deformed along the end of the first conductor layer 6 and the second conductor layer 7 because the ends of the first peripheral portion 6b and the second peripheral portion 7b are curved. Therefore, it is possible to reduce the generation of a space between the wiring layer and the insulating layer, and it is possible to reduce the decrease in strength of the electronic device mounting board.

[0028] The substrate 2 may have a frame on its upper surface. The frame may be made of the same material as the substrate 2 or a different material. The substrate 2 and the frame may be joined with a bonding material, or may be bonded by simultaneous sintering when the substrate 2 and the frame are made of insulating ceramics. The frame may have a step with an electrode pad 3 thereon, and in this case, the substrate 2 and the frame may be electrically connected.

[0029] As in the example shown in Figs. 1 to 6, the substrate 2 may further have curved portions on the upper and lower surfaces of the outer ends of the first land portion 6a and the second land portion 7a, that is, the ends located in a direction away from the via conductor 5. With this structure, even if each insulating layer of the electronic device mounting substrate 1 becomes thin, the curved ends of the first land portion 6a and the second land portion 7a make it easier for each insulating layer to deform along the ends of the first conductor layer 6 and the second conductor layer 7. This makes it possible to reduce the generation of a space between the wiring layer and the insulating layer, and to reduce the decrease in strength of the electronic device mounting substrate.

[0030] As shown in the example of FIG. 1 to FIG. 6, the outer ends of the first peripheral portion 6b and the second peripheral portion 7b, that is, the ends located in the direction away from the via conductor 5, may be curved in a vertical cross-sectional view. That is, the upper and lower surfaces of the first end portion 6d and the second end portion 7d may have curved portions. As a result, even if each insulating layer of the electronic device mounting board 1 becomes thin, the curved outer ends of the first peripheral portion 6b and the second peripheral portion 7b make it easier for each insulating layer to deform along the outer ends of the first conductor layer 6 and the second conductor layer 7. This makes it possible to reduce the generation of a space between the wiring layer and the insulating layer, and to reduce the decrease in strength of the electronic device mounting board. Furthermore, for example, when each outer end is located near the outer periphery of the board 2, the outer ends of the first peripheral portion 6a and the second peripheral portion 7b are curved up and down, making it easier for each insulating layer to deform along the outer ends of the first conductor layer 6 and the second conductor layer 7. This makes it possible to reduce the occurrence of poor adhesion between insulating layers on the outer periphery of substrate 2 during the manufacturing process.

[0031] 3 to 6 are enlarged cross-sectional views of a main portion A of this embodiment.

[0032] In the example shown in FIG. 3, the second clearance portion 7c of the electronic device mounting board 1 overlaps with the first peripheral portion 6b in planar perspective. This makes it possible to reduce overlap between the first clearance portion 6a and the second clearance portion 7b in planar perspective. Therefore, it is possible to reduce the occurrence of unevenness on the surface of the electronic device mounting board 1. In addition, since the second clearance portion 7c overlaps with the first peripheral portion 6b in planar perspective, it is possible to reinforce the second clearance portion 7c. Therefore, it is possible to reduce the decrease in strength of the electronic device mounting board. In this case, the second clearance portion 7c and the first peripheral portion 6b may overlap entirely in planar perspective, or may only partially overlap. In particular, since the second clearance portion 7c and the first peripheral portion 6b overlap entirely in planar perspective, it is possible to further improve the effect of reinforcement.

[0033] In the example shown in FIG. 4, the first clearance 6c of the electronic device mounting board 1 overlaps with the second peripheral portion 7b in planar perspective. This makes it possible to reduce overlap between the first clearance 6c and the second clearance 7c in planar perspective. Therefore, it is possible to reduce the occurrence of unevenness on the surface of the electronic device mounting board 1. In addition, the first clearance 6c overlaps with the second peripheral portion 7b in planar perspective, making it possible to reinforce the first clearance 6C portion. Therefore, it is possible to reduce the decrease in strength of the electronic device mounting board. In this case, the first clearance 6c and the second peripheral portion 7b may overlap entirely in planar perspective, or may only partially overlap. In particular, the first clearance 6c and the second peripheral portion 7b overlap entirely in planar perspective, making it possible to further improve the effect of reinforcement.

[0034] In addition, the first conductor layer 6 and / or the second conductor layer 7 may be located such that the first peripheral portion 6b and / or the second peripheral portion 7b surrounds the periphery of the first land portion 6a and / or the second land portion 7a as in the example shown in FIG. 3, or may be located only in a part near the first land portion 6a and / or the second land portion 7b as in the example shown in FIG. 4. In either case, the effect of this embodiment can be achieved. In addition, as in the example shown in FIG. 4, the first peripheral portion 6b and / or the second peripheral portion 7b are not located on the first land portion 6a and / or the second land portion 7a side from the outer edge of the substrate 2, so that when the substrate 2 is made of insulating ceramics, pressure is applied uniformly to the outer periphery of the substrate 2 during the lamination process, and therefore poor adhesion between insulating layers during the manufacturing process can be reduced at the outer edge of the substrate 2.

[0035] In the example shown in FIG. 5, the electronic device mounting board 1 has another conductor layer 9 between the first conductor layer 6 and the second conductor layer 7 in a cross-sectional view. Even in such a case, it is possible to reduce the overlap between the first clearance portion 6c and the second clearance portion 7c in a planar perspective view. In addition, by positioning the other conductor layer 9 between the first conductor layer 6 and the second conductor layer 7, even if the first clearance portion 6c and the second clearance portion 7c have a part that overlaps in a planar perspective view, it is possible to reduce the occurrence of unevenness on the surface of the electronic device mounting board 1, or to reduce the occurrence of a decrease in strength or cracks in the electronic device mounting board 1 due to the occurrence of a space around the edge of the clearance inside the electronic device mounting board 1. In addition, it is possible to reinforce the first clearance portion 6c and the second clearance portion 7c with the other conductor layer 9, and it is possible to reduce the decrease in strength of the electronic device mounting board.

[0036] In the example shown in FIG. 6, the first clearance 6c of the electronic device mounting board 1 is positioned so as to overlap with the second land 7a in plan view. Even in such a case, the effect of the present embodiment can be achieved. In addition, since the first clearance 6c overlaps with the second land 7a in plan view, the first clearance 6c can be reinforced. Therefore, it is possible to reduce the decrease in strength of the electronic device mounting board. In this case, the first clearance 6c and the second land 7a may be entirely overlapped in plan view, or may be only partially overlapped. In particular, since the first clearance 6c and the first land 7a are entirely overlapped in plan view, the effect of reinforcement can be further improved.

[0037] In the example shown in FIG. 7, the second clearance portion 7c of the electronic device mounting board 1 is positioned so as to overlap with the first land portion 6a in planar perspective. Even in such a case, the effect of the present embodiment can be achieved. In addition, since the second clearance portion 7c overlaps with the first land portion 6a in planar perspective, it is possible to reinforce the second clearance portion 7c. Therefore, it is possible to reduce the decrease in strength of the electronic device mounting board. In this case, the second clearance portion 7c and the first land portion 6a may entirely overlap with each other in planar perspective, or may only partially overlap with each other. In particular, since the second clearance portion 7c and the second land portion 6a entirely overlap with each other in planar perspective, it is possible to further improve the effect of reinforcement.

[0038] 8 and 9 show an enlarged plan view and an enlarged cross-sectional view of a main part A of this embodiment. Here, Fig. 8(a) and Fig. 9(a) are views when viewed from the first conductor layer 6.

[0039] In the example shown in FIG. 8, the first land portion 6a and the second land portion 7a have the same shape in plan view, but their sizes are different. For example, when the first land portion 6a and the second land portion 7a are circular in plan view, the diameters of the first land portion 6a and the second land portion 7a are different. Also, when the first clearance portion 6c and the second clearance portion 7c are circular in plan view, the diameters of the second land portion 6a and the first land portion 7a are different. In this case, the size of the outer edge of the first clearance portion 6c in plan view is a first diameter r1, and the size of the outer edge of the second clearance portion 7c in plan view is a second diameter r2. The first diameter r1 may be larger or smaller than the second diameter r2. The second diameter r2 may be different from the first diameter r1. 9, the first land portion 6a and the second land portion 7a have different shapes in planar perspective. In either case, it is possible to reduce the first clearance portion 6c and the second clearance portion 7c from directly overlapping each other in planar perspective. This makes it possible to reduce the occurrence of unevenness on the surface of the electronic device mounting board 1 due to the first clearance portion 6c and the second clearance portion 7c overlapping each other in planar perspective.

[0040] In the example shown in FIG. 9, the first land portion 6a is circular, and the second land portion 7a is rectangular. This makes it possible to reduce the first land portion 6a and the second land portion 7a from becoming exactly the same shape even if a manufacturing error or the like occurs and the shape is slightly deformed. Therefore, the effect of this embodiment can be achieved even if a manufacturing error occurs. In addition, since it is possible to reduce the same shape due to a manufacturing error or the like, it is possible to make the first land portion 6a and the second land portion 7b approximately the same size. Therefore, it is possible to miniaturize the electronic element mounting board 1. Here, the combination of the first land portion 6a and the second land portion 7a is a circle and a rectangle, but it may also be a circle and a triangle, a triangle and a rectangle, or a polygonal shape with a different shape.

[0041] <Configuration of electronic device> 1 shows an example of an electronic device 21. The electronic device 21 includes an electronic device mounting board 1 and an electronic device 10 mounted on the upper surface of the electronic device mounting board 1.

[0042] The electronic device 21 has an electronic element mounting substrate 1 and an electronic element 10 mounted in a mounting area of ​​a substrate 2 of the electronic element mounting substrate 1. Examples of the electronic element 10 include an imaging element such as a CCD (Charge Coupled Device) type or a CMOS (Complementary Metal Oxide Semiconductor) type, a light emitting element such as an LED (Light Emitting Diode), an element having a sensor function such as pressure, air pressure, acceleration, or a gyro, or an integrated circuit. The electronic element 10 may be disposed on the upper surface of the substrate 2 via an adhesive. For example, a silver epoxy or a thermosetting resin is used as the adhesive.

[0043] The electronic element 10 and the electronic element mounting board 1 may be electrically connected by an electronic element connecting member 13, for example.

[0044] The electronic device 21 may have a lid 12 that covers the electronic element 10 and is joined to the top surface of the electronic element mounting substrate 1.

[0045] For example, when the electronic element 10 is an imaging element such as a CMOS or a CCD, or a light emitting element such as an LED, the lid is made of a highly transparent material such as a glass material. For example, when the electronic element 10 is an integrated circuit, the lid may be made of a metal material, a ceramic material, or an organic material.

[0046] The lid may be joined to the electronic device mounting board 1 via a lid connecting member 14. Examples of materials constituting the lid connecting member 14 include a thermosetting resin, a low melting point glass, or a brazing material made of a metal component.

[0047] 1 to 3, it is possible to reduce the unevenness and / or strength of the surface of the electronic device mounting substrate 1. This makes it possible to improve the manufacturing yield of the electronic device 21.

[0048] <Electronic module configuration> 2 shows an example of an electronic module 31. The electronic module 31 includes an electronic device 21 and a housing 32 located on the upper surface of the electronic device 21.

[0049] The electronic element mounting substrate 1 and the electronic device 21 of this embodiment may constitute an electronic module 31 having the electronic device 21 and a housing 32 located on the upper surface of the electronic device 21 or on the electronic device 21. For the sake of explanation, an imaging module will be taken as an example in the following example. Here, the housing 32 located on the upper surface of the electronic device 21 includes, for example, a case where the electronic device 21 itself is covered with the housing 32, since a part of the housing 32 is located on the electronic device 21, in this configuration.

[0050] The electronic module 31 may have a housing 32 (lens holder, etc.). The housing 32 can improve airtightness or reduce the stress from outside the electronic device 21 being directly applied to the electronic device 21. The housing 32 is made of, for example, a resin or metal material. When the housing 32 is a lens holder, the housing 32 may incorporate one or more lenses made of resin, liquid, glass, crystal, etc. The housing 32 may also be equipped with a drive device or the like for driving it up, down, left, and right, and may be electrically connected to pads, etc. located on the surface of the electronic device mounting board 1 via a bonding material such as solder.

[0051] The housing 32 may have an opening in at least one side in four directions or on the bottom side when viewed from above. An external circuit board may be inserted through the opening of the housing 32 and electrically connected to the electronic device mounting board 1. After the external circuit board is electrically connected to the electronic device mounting board 1, the opening of the housing 32 may be sealed with a sealant such as resin to make the inside of the electronic module 31 airtight.

[0052] <Method of manufacturing electronic element mounting substrate and electronic device> Next, an example of a method for manufacturing the electronic element mounting substrate 1 and the electronic device 21 of this embodiment will be described. Note that the example of the manufacturing method shown below is a method for manufacturing the base 2 using a multi-piece wiring board.

[0053] (1) First, a ceramic green sheet is formed to form the substrate 2. For example, when obtaining the substrate 2 which is an aluminum oxide (Al2O3) sintered body, a powder of silica (SiO2), magnesia (MgO), calcia (CaO), or the like is added as a sintering aid to Al2O3 powder, and further a suitable binder, solvent, and plasticizer are added, and then the mixture is kneaded to form a slurry. After that, a ceramic green sheet for multiple pieces is obtained by a molding method such as a doctor blade method or a calendar roll method.

[0054] When the base 2 is made of, for example, resin, it can be formed by molding using a mold capable of forming it into a predetermined shape, such as by transfer molding, injection molding, or by pressing with a mold or the like. The base 2 may also be a base material made of glass fiber impregnated with a resin, such as glass epoxy resin. In this case, the base material 2 can be formed by impregnating a base material made of glass fiber with a precursor of the epoxy resin and thermally curing the epoxy resin precursor at a predetermined temperature.

[0055] (2) Next, the above-mentioned green sheet is processed using a mold, etc. Here, if the base 2 has a notch or the like, the notch or the like may be formed in a predetermined position of the green sheet that becomes the base 2 in the same manner.

[0056] (3) Next, the ceramic green sheets that will become the insulating layers of the base 2 are stacked and pressed together. In this way, the green sheets that will become the insulating layers are stacked to produce a ceramic green sheet laminate that will become the base 2 (electronic device mounting substrate 1). At this time, the portions that will become the cutouts etc. may be formed appropriately using a mold or the like.

[0057] (4) Next, a metal paste is applied or filled by screen printing or the like to the ceramic green sheets or ceramic green sheet laminate in the areas that will become the electrode pads 3, the electrodes for connecting an external circuit, the internal wiring conductors, and the internal through conductors. The metal paste may be applied or filled before the process of laminating the ceramic green sheets. This metal paste is prepared by adding an appropriate solvent and binder to metal powder made of the above-mentioned metal material, and kneading the mixture to adjust the viscosity to an appropriate level. The metal paste may contain glass or ceramics to increase the bonding strength with the base 2.

[0058] When the base 2 is made of resin, the electrode pads 3, the electrodes for connecting to an external circuit, the internal wiring conductors and the through conductors can be produced by sputtering, vapor deposition, etc. Alternatively, they may be produced by forming a metal film on the surface and then using a plating method.

[0059] In this step, the first conductor layer 6 and the second conductor layer 7 may be produced by the method described above.

[0060] (5) Next, dividing grooves are provided at predetermined positions on the green sheet using a die, punching, laser, or the like. The dividing grooves can be formed by cutting into a size smaller than the thickness of the multi-cavity wiring board using a slicing device after firing, but they may also be formed by pressing a cutter blade against the ceramic green sheet laminate for the multi-cavity wiring board, or by cutting into a size smaller than the thickness of the ceramic green sheet laminate using a slicing device. In this process, the multiple holes 6 may be formed by pressing with a die, for example.

[0061] (6) Next, the ceramic green sheet laminate is fired at a temperature of about 1500°C to 1800°C to obtain a multi-piece wiring board in which a plurality of substrates 2 (substrates 1 for mounting electronic devices) are arranged. Note that, in this process, the metal paste described above is fired simultaneously with the ceramic green sheets that will become the substrates 2 (substrates 1 for mounting electronic devices), and becomes the electrode pads 3, electrodes for connecting external circuits, internal wiring conductors, and through conductors.

[0062] (7) Next, the multi-cavity wiring board obtained by firing is divided into a plurality of bases 2 (electronic device mounting substrates 1). In this division, a division groove is formed in the multi-cavity wiring board in the step (5) along the outer edge of the base 2 (electronic device mounting substrate 1), and the multi-cavity wiring board is broken along the division groove to divide it. There is also a method in which the step (5) is not performed and the base 2 (electronic device mounting substrate 1) is cut along the outer edge by a slicing method or the like. Note that before or after dividing the multi-cavity wiring board described above into a plurality of bases 2 (electronic device mounting substrates 1), plating may be applied to the electrode pads 3, external connection pads, and exposed wiring conductors by electrolytic or electroless plating.

[0063] (8) Next, the electronic element 10 is mounted on the electronic element mounting substrate 1. The electronic element 10 is electrically joined to the electronic element mounting substrate 1 by the electronic element connecting member 13. At this time, an adhesive or the like may be provided on the electronic element 10 or the electronic element mounting substrate 1 to fix it to the electronic element mounting substrate 1.

[0064] By producing an electronic element mounting substrate 1 according to the above steps (1) to (7) and mounting an electronic element 10 thereon, an electronic device 21 can be produced. The order of the steps (1) to (8) above is not specified as long as the order is suitable for processing. Also, it is possible to produce the electronic device 21 by using a process other than the above steps, for example, a 3D printer.

[0065] Second embodiment Next, an electronic device mounting board 1 according to a second embodiment of the present disclosure will be described with reference to FIG.

[0066] The electronic device mounting substrate 1 in this embodiment differs from the electronic device mounting substrate 1 in the first embodiment in that another insulating layer 2d is provided between the first conductor layer 6 and the second conductor layer 7, and the first clearance portion 6c and the second clearance portion 7c do not overlap in a planar perspective view.

[0067] In the example shown in FIG. 10, the substrate 2 of the electronic device mounting substrate 1 has another insulating layer 2d between the first layer 2a and the second layer 2b, and the second conductor layer 7 is located between the other insulating layer 2d and the second layer 2b. In other words, another insulating layer 2d is further added between the first conductor layer 6 and the second conductor layer 7. Even in such a case, the first conductor layer 6 and the second conductor layer 7 have a portion where the first clearance portion 6a and the second clearance portion 7a do not overlap in a planar perspective view, and the first peripheral portion 6b and the second peripheral portion 6b of the substrate 2 are thinner toward the ends, so that it is possible to reduce the occurrence of unevenness on the surface of the electronic device mounting substrate 1. In addition, it is possible to reduce the occurrence of a space between the wiring layer and the insulating layer, and it is possible to reduce the decrease in strength of the electronic device mounting substrate. Furthermore, by further providing another insulating layer 2d between the first conductor layer 6 and the second conductor layer 7, it is possible to further reduce the occurrence of spaces between the wiring layer and the insulating layer, thereby making it possible to reduce the decrease in strength of the electronic device mounting board.

[0068] In the example shown in FIG. 10, the first clearance portion 6c and the second clearance portion 7c of the electronic device mounting substrate 1 are positioned apart from each other in a planar perspective. Even in such a case (not overlapping), the effect of this embodiment can be achieved. In addition, it is possible to further reduce the decrease in strength of the substrate 2 and the occurrence of surface irregularities due to the first clearance portion 6c and the second clearance portion 7c being positioned apart from each other. In this case, the first clearance portion 6c and the second clearance portion 7c may be positioned at a distance from each other, or their edges may be positioned overlapping each other in a planar perspective. By positioning the first clearance portion 6c and the second clearance portion 7c at a distance from each other, it is possible to reduce the amount of overlap between the first clearance portion 6c and the second clearance portion 7c even in the event of a process error or the like, and therefore it is possible to reduce the decrease in strength of the substrate 2. Furthermore, the edges of the first clearance portion 6c and the second clearance portion 7c overlap in a plan view, which makes it possible to reduce the size of the electronic device mounting board 1 while still achieving the effects of this embodiment.

[0069] (Third embodiment) Next, an electronic device mounting board 1 according to a third embodiment of the present disclosure will be described with reference to FIG.

[0070] The electronic device mounting substrate 1 in this embodiment differs from the electronic device mounting substrate 1 in the first embodiment in that the substrate 2 has a third conductor layer 8, and the first clearance portion 6c, the second clearance portion 7c and the third clearance portion 8c are positioned apart in a plan view.

[0071] 11, the substrate 2 has a third conductor layer 8, and the first clearance portion 6c, the second clearance portion 7c, and the third clearance portion 8c are located apart in a planar perspective view. Here, like the first conductor layer 6 and the second conductor layer 7, the third conductor layer 8 has a third land portion 8a surrounding the via conductor 5, a third clearance portion 8c surrounding the third land portion 8a and electrically insulated from it, and a third peripheral portion 8b surrounding the third clearance portion 8c. Even in such a case, since the first clearance portion 6c, the second clearance portion 7c, and the third clearance portion 8c do not overlap, it is possible to reduce the occurrence of unevenness on the surface of the electronic device mounting board 1. Moreover, in the example shown in FIG. 11, each clearance portion overlaps with the land portion of each conductor layer in a plan view. This allows each clearance portion to be reinforced by each land portion. Therefore, it is possible to reduce the decrease in strength of the electronic device mounting board.

[0072] In the example shown in FIG. 11, the third peripheral portion 8b and the third land portion 8a of the third conductor layer 8 may have an end portion that becomes thinner toward the end, that is, as it moves away from the via conductor 5. This end portion may have a curved portion. With this structure, even if each insulating layer of the electronic device mounting board 1 becomes thinner, the end portions of the third peripheral portion 8b and the third land portion 8a become thinner, and further, by drawing a curved portion, each insulating layer becomes easier to deform along the end portion with the third conductor layer 8. Therefore, it is possible to reduce the generation of a space between the wiring layer and the insulating layer, and it is possible to reduce the decrease in strength of the electronic device mounting board.

[0073] In planar perspective of the first conductor layer 6 and the second conductor layer 7, the first clearance portion 6a has a second portion 6f positioned without overlapping with the second clearance portion 7a, that is, the first clearance portion 6a has a size and / or shape different from that of the second clearance portion 7a, and the first peripheral portion 6b and the second peripheral portion 6b of the substrate 2 have ends that are thinner as they move away from the via conductors 5, thereby making it possible to reduce the occurrence of irregularities on the surface of the electronic device mounting substrate 1. It is also possible to reduce the occurrence of spaces between the wiring layer and the insulating layer, making it possible to reduce the decrease in strength of the electronic device mounting substrate.

[0074] The third conductor layer 8 can be formed from the same material and by the same manufacturing method as the first conductor layer 6 and the second conductor layer 8 described above.

[0075] (Fourth embodiment) Next, an electronic device mounting board 1 according to a fourth embodiment of the present disclosure will be described with reference to FIG.

[0076] The electronic device mounting substrate 1 in this embodiment differs from the electronic device mounting substrate 1 in the first embodiment in that, in cross-sectional view, another conductor layer 9 is provided between the first conductor layer 6 and the second conductor layer 7, some of which are linear patterns.

[0077] 12, the electronic device mounting board 1 has another conductor layer 9 between the first conductor layer 6 and the second conductor layer 7 in a cross-sectional view, some of which have a linear pattern. Even in such a case, the effect of this embodiment can be achieved.

[0078] In this case, the linear pattern may be located at a position overlapping the first clearance portion 6c and / or the second clearance portion 7c in a planar perspective view. This allows the other conductor layer 9, which is a linear pattern, to be located so as to fill the first clearance portion 6c and / or the second clearance portion 7c, thereby making it possible to further reduce the occurrence of unevenness on the surface of the electronic device mounting board 1.

[0079] A substrate for mounting electronic elements according to one embodiment of the present disclosure includes a substrate, a via conductor, a first conductor layer, and a second conductor layer. The substrate includes a first layer, a second layer located on the lower surface of the first layer, and a third layer located on the lower surface of the second layer, and an electronic element is mounted on the substrate. The via conductor penetrates from the first layer to the third layer in the vertical direction. The first conductor layer is located between the first layer and the second layer, and is connected to the via conductor in a planar perspective. The second conductor layer is located between the second layer and the third layer, and is connected to the via conductor in a planar perspective. The first conductor layer includes a first land portion surrounding the via conductor and connected to the via conductor in a planar perspective, a first clearance portion surrounding the first land portion, and a first peripheral portion surrounding the first clearance portion and electrically insulated from the first land portion via the first clearance portion. The second conductor layer has, in a planar perspective, a second land portion surrounding the via conductor and connected to the via conductor, a second clearance portion surrounding the second land portion, and a second peripheral portion surrounding the second clearance portion and electrically insulated from the second land portion via the second clearance portion. In a planar perspective, the first land portion has a first portion positioned so as to overlap with the second land portion, and in a planar perspective, the first clearance portion has a second portion positioned so as not to overlap with the second clearance portion. In a vertical cross-sectional view, the first peripheral portion and the second peripheral portion each have an end portion whose thickness decreases with increasing distance from the via conductor.

[0080] The present disclosure is not limited to the above-mentioned embodiment examples, and various modifications such as numerical values ​​are possible. For example, in the examples shown in the figures, the shape of the electrode pad 3 is rectangular when viewed from above, but it may be circular or other polygonal shapes. The arrangement, number, shape, and mounting method of the electronic elements of the electrode pad 3 in this embodiment are not specified. The various combinations of the characteristic parts in this embodiment are not limited to the above-mentioned embodiment examples. Also, combinations of the respective embodiments are possible. [Explanation of symbols]

[0081] 1. Substrate for mounting electronic elements 2...Base 2a...1st layer 2b...Second layer 2c...Third layer 2d...Other layers 3. Electrode pad 5. Via conductor 6: First conductor layer 6a...First land section 6b...First peripheral part 6c...First clearance section 6d...1st end 6e...Part 1 6f...Second part 7...Second conductor layer 7a...Second land section 7b Second peripheral part 7c Second clearance section 7d...Second end 8. Third conductor layer 8a 3rd Land Section 8b Third peripheral part 8c...Third clearance section 9. Other conductor layers 10. Electronic elements 12 Lid 13. Electronic element connection member 14 Lid body connecting member 21...electronic equipment 31 Electronic Module 32... Enclosure r1: First diameter r2...2nd diameter

Claims

1. a substrate having a first layer, a second layer located on a lower surface of the first layer, and a third layer located on a lower surface of the second layer, the substrate having an electronic device mounted thereon; a via conductor extending vertically from the first layer to the third layer; a first conductor layer located between the first layer and the second layer and connected to the via conductor in a planar perspective; a second conductor layer located between the second layer and the third layer and connected to the via conductor in a planar perspective; the first conductor layer has, in a planar perspective view, a first land portion surrounding the via conductor and connected to the via conductor, a first clearance portion surrounding the first land portion, and a first peripheral portion surrounding the first clearance portion and electrically insulated from the first land portion via the first clearance portion; the second conductor layer has, in a planar perspective view, a second land portion surrounding the via conductor and connected to the via conductor, a second clearance portion surrounding the second land portion, and a second peripheral portion surrounding the second clearance portion and electrically insulated from the second land portion via the second clearance portion, In a planar perspective view, the first land portion has a first portion positioned so as to overlap the second land portion, In a planar perspective view, the first clearance portion is located without overlapping with the second clearance portion, When viewed in a cross-sectional view in a vertical direction, the first peripheral portion and the second peripheral portion each have an end portion whose thickness decreases with increasing distance from the via conductor, The first conductor layer and the second conductor layer contain tungsten, molybdenum, manganese, palladium, or copper, or an alloy containing at least one metal material selected from these, and do not contain silver.

2. The electronic device mounting board according to claim 1 , wherein in a plan view, the first clearance portion entirely overlaps the second peripheral portion.

3. The electronic device mounting board according to claim 1 , wherein in a plan view, the second clearance portion entirely overlaps the first peripheral portion.

4. A substrate for mounting electronic elements as described in claim 1 or 3, wherein, in a planar perspective view, a portion of the first peripheral portion overlaps with the second land portion.

5. A substrate for mounting electronic elements as described in claim 1 or 2, wherein, in a planar perspective view, a portion of the first land portion overlaps with the second peripheral portion.

6. A substrate for mounting electronic elements as described in any one of claims 1 to 5, wherein, in a planar perspective, the outer edge of the first clearance portion is circular having a first diameter, and the outer edge of the second clearance portion is circular having a second diameter different from the first diameter.

7. 6. The electronic device mounting board according to claim 1, wherein in a plan view, the distance from an outer edge of the first clearance portion to an outer edge of the second clearance portion is not constant.

8. 8. The electronic device mounting board according to claim 1, wherein in a vertical cross-sectional view, outer ends of the first peripheral portion and the second peripheral portion are curved.

9. An electronic element mounting substrate according to any one of claims 1 to 8, An electronic element mounted on the electronic element mounting substrate; An electronic device comprising:

10. An electronic device according to claim 9; and a housing positioned surrounding the electronic device.

Citation Information

Patent Citations

  • Multilayer interconnection circuit substrate and manufacture thereof

    JP1991284896A

  • Ceramic multilayer circuit board and manufacture thereof

    JP1994085457A

  • Ceramic multilayer substrate and manufacturing method thereof

    JP1995273455A

  • Semiconductor device

    JP1998154773A

  • Electronic element mounting substrate, electronic device, and electronic module

    JP2019079987A