Accelerated test program, accelerated test method, and accelerated test device
The acceleration test program and device address the issue of non-linked application failures during high-speed testing by accelerating linked applications while controlling non-linked applications to operate at normal speeds, ensuring reliable test outcomes.
Patent Information
- Application Number
- JP2021105308
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-06-25
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2041-06-25
AI Technical Summary
Existing acceleration tests fail to effectively prevent the occurrence of disorders in non-linked applications during high-speed testing, which are not typically encountered in normal operation.
An acceleration test program and device that selectively accelerates the operation of linked applications while controlling non-linked applications to operate at normal speed, thereby preventing the occurrence of failures during the test.
The solution enables effective acceleration testing by suppressing failures in non-linked applications, ensuring the reliability of the test results by maintaining normal operation speeds for these applications.
Smart Images

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Abstract
Description
[Technical field]
[0001] The present invention relates to an accelerated test program, an accelerated test method, and an accelerated test device. [Background technology]
[0002] Faults that occur during application execution include those caused by resource exhaustion that only appears after months or years of continuous operation. To reproduce this type of fault in the same environment as actual operation, long-term testing is required. For this reason, it is difficult to detect faults caused by continuous operation in the limited time available, such as before product shipment.
[0003] A method is known in which an accelerated test is performed by setting a short interval for a timer interrupt that keeps time for the OS (Operating System) to run the application at high speed and shorten the test time required to detect a fault (see, for example, Patent Document 1).A method is also known in which an accelerated test is performed by setting the OS's clock function to an accelerated state, avoiding periods when the application load is high, to prevent faults that do not occur in normal operation from occurring due to the acceleration of the clock function (see, for example, Patent Document 2).
[0004] A method is known for preventing the occurrence of faults that do not occur during normal operation by measuring the time spent waiting for a response from a peripheral device that operates asynchronously with a timer interrupt using a timer interrupt period that is longer than the timer interrupt period during accelerated testing (see, for example, Patent Document 3). [Prior art documents] [Patent documents]
[0005] [Patent Document 1] JP 2004-38350 A [Patent Document 2] JP 2015-114675 A [Patent Document 3] JP 2012-194909 A Summary of the Invention [Problem to be solved by the invention]
[0006] Applications that operate together with a test target application that is the subject of accelerated testing include cooperative applications that operate in cooperation with the test target application and non-cooperative applications that do not cooperate with the test target application. In order to prevent a failure that does not occur in normal mode from occurring due to accelerated testing, a method for controlling the operation of not only the test target application and cooperative applications but also non-cooperative applications has not been proposed.
[0007] In one aspect, the present invention aims to perform accelerated testing while suppressing the occurrence of failures by controlling the operation of not only cooperating applications that cooperate with the application under test, but also non-cooperating applications that do not cooperate with the application under test. [Means for solving the problem]
[0008] According to one aspect, the acceleration test program is an acceleration test program that accelerates the operation of an application to perform an acceleration test, and selects a cooperative application that operates in cooperation with a test target application that is a test target, determines an acceleration rate of the operation during an acceleration mode in which the operation of the application is accelerated from a normal mode based on the acceleration rate, and disables acceleration of the operation of a non-cooperative application that does not cooperate with the test target application while accelerating the operation of the test target application and the cooperative application. The processing is executed by a computer. Effect of the Invention
[0009] By controlling the operation of not only cooperating applications that cooperate with the application under test, but also non-cooperating applications that do not cooperate with the application under test, it is possible to perform accelerated testing while suppressing the occurrence of failures. [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 is a block diagram showing an example of an acceleration test device according to an embodiment. [Diagram 2] 2 is a timing diagram showing an example of the operation of the acceleration test device of FIG. 1. [Diagram 3] FIG. 13 is a block diagram showing an example of an accelerated testing device according to another embodiment. [Figure 4] FIG. 4 is an explanatory diagram showing an example of software allocation in the acceleration test device of FIG. [Diagram 5] FIG. 5 is a diagram showing an example of the management table of FIG. 4. [Figure 6] FIG. 4 is a functional block diagram showing the functions of the kernel in FIG. [Figure 7] 4 is a flow chart showing an example of the operation of an acceleration test performed by the acceleration test device of FIG. 3. [Figure 8] FIG. 8 is a flowchart showing an example of the operation of step S10 in FIG. 7. [Figure 9] FIG. 8 is a flowchart showing an example of the operation of step S20 in FIG. 7. [Figure 10] FIG. 8 is a flowchart showing an example of the operation of step S30 in FIG. 7. [Figure 11] FIG. 8 is a flowchart showing an example of the operation of step S40 in FIG. 7. [Figure 12] FIG. 8 is a flowchart showing an example of the operation of step S50 in FIG. 7. [Figure 13] 4 is a timing diagram showing an example of the operation of an acceleration test by the acceleration test device of FIG. 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] Hereinafter, embodiments will be described with reference to the drawings.
[0012] Fig. 1 shows an example of an acceleration test device in one embodiment. The acceleration test device 1 shown in Fig. 1 includes an application selection unit 2, an acceleration mode setting unit 3, an acceleration test implementation unit 4, and a storage unit 5. For example, the acceleration test device 1 may be an information processing device such as a server, or may be a test device dedicated to acceleration tests.
[0013] When the acceleration test device 1 is an information processing device, the application selection unit 2, the acceleration mode setting unit 3, and the acceleration test implementation unit 4 may be realized by an acceleration test program executed by a processor mounted on the information processing device. The processor mounted on the information processing device is an example of a computer. The acceleration test implementation unit 4 may be included in the processor mounted on the information processing device. In addition, the application selection unit 2, the acceleration mode setting unit 3, and the acceleration test implementation unit 4 may be realized by hardware mounted on the information processing device or a dedicated test device, or may be realized by linking hardware and software.
[0014] For example, the storage unit 5 stores a plurality of applications 6a, 6b, 6c, ... in an executable state. The application 6a is a test target application that is a test target of the accelerated test. The application 6b is a cooperating application that operates in cooperation with the test target application 6a. The application 6c is a non-cooperating application that operates without cooperating with the test target application 6a. In the following, when the test target application 6a, the cooperating application 6b, and the non-cooperating application 6c are described without distinction, they are simply referred to as application 6.
[0015] The acceleration test device 1 has a function of performing an acceleration test for accelerating the operation of an application 6. The application selection unit 2 selects, from among a plurality of applications 6, a cooperative application 6b that operates in cooperation with the test target application 6a. For example, the application selection unit 2 operates another application 6 together with the test target application 6a, and selects an application 6 that shares a memory area with the test target application 6a as the cooperative application 6b. The non-cooperative application 6c is an application 6 that is neither the test target application 6a nor the cooperative application 6b, and does not share a memory area with the test target application 6a. Note that there may be a plurality of cooperative applications 6b and a plurality of non-cooperative applications 6c.
[0016] The acceleration mode setting unit 3 sets an acceleration rate of the acceleration mode that accelerates the operation of the application 6 in the acceleration test more than in the normal mode. For example, the acceleration mode setting unit 3 may set an acceleration rate of the operation of the application 6 in the acceleration mode by making the interval of a timer interrupt that the OS uses to trigger a time update shorter than the interval of the timer interrupt in the normal mode.
[0017] The timer interrupt interval during the accelerated mode may be set according to the test time available for the accelerated test. In this case, the timer interrupt interval is set shorter as the test time available for the accelerated test is shorter, and longer as the test time available for the accelerated test is longer.
[0018] During the test period in which the acceleration test is performed, the acceleration test implementation unit 4 operates the test target application 6a and the associated application 6b at an acceleration rate of the acceleration mode set by the acceleration mode setting unit 3 while the test target application 6a is operating. In addition, the acceleration test implementation unit 4 operates the non-associated application 6c at an acceleration rate slower than that of the acceleration mode while the test target application 6a is operating.
[0019] For example, the acceleration test execution unit 4 reduces the CPU usage rate of a CPU (Central Processing Unit) that executes the non-linked application 6c, thereby slowing down the progress of the operation of the non-linked application 6c. Note that the acceleration test execution unit 4 does not reduce the CPU usage rate of a CPU that executes the test target application 6a and the linking application 6b. The CPU is an example of a processing unit that executes the application 6.
[0020] Under the control of the acceleration test execution unit 4, when the test target application 6a is not running during the acceleration test, the cooperating application 6b and the non-cooperating application 6c run in normal mode. When the test target application 6a is running during the acceleration test, the cooperating application 6b runs together with the test target application 6a at an acceleration rate in the acceleration mode. When the test target application 6a is running during the acceleration test, the non-cooperating application 6c runs slower than the acceleration rate in the acceleration mode.
[0021] Therefore, in the acceleration test, all applications 6 operating during the operation of the test target application 6a can be operated in the acceleration mode, while only the non-linked application 6c can be operated at a low speed. For example, the operation speed of the non-linked application 6c during the acceleration mode is set to the same operation speed as in the normal mode. Therefore, the operation of the non-linked application 6c can be prevented from being accelerated, and a failure that does not occur in normal operation can be prevented from occurring during the execution of the non-linked application 6c. For example, the normal operation is an operation when an information processing device having the function of the acceleration test device 1 executes various applications and functions as a system having a predetermined function.
[0022] In addition, during the acceleration mode, the operation of the coordinating application 6b is accelerated together with the operation of the test target application 6a, so that the accelerated test can be performed while the test target application 6a and the coordinating application 6b are normally coordinated. Therefore, it is possible to prevent the occurrence of a failure that does not occur in normal operation during the execution of the test target application 6a and the coordinating application 6b. In this way, in the accelerated test, it is possible to control the operation of not only the test target application 6a and the coordinating application 6b, but also the non-coordinating application 6c.
[0023] Fig. 2 shows an example of the operation of the acceleration test device 1 in Fig. 1. The application selection unit 2 has already selected the cooperative application 6b during a selection period (not shown) that is carried out before the test period shown in Fig. 2. The non-cooperative application 6c is an application 6 that was not selected as the cooperative application 6b during the selection period.
[0024] During a test period in which an accelerated test of the test target application 6a is performed, the acceleration mode setting unit 3 sets the operation mode to a normal mode in which the operation is not accelerated and sets the operation speed of the application 6 to the normal speed during a period in which the test target application 6a is not operating. For example, the acceleration mode setting unit 3 sets the interval of a timer interrupt used by the OS to the normal state. During the normal mode, the acceleration test performing unit 4 does not perform an acceleration test. In other words, during the normal mode, the acceleration test performing unit 4 does not slow down the acceleration rate of the non-cooperative application 6c. Therefore, during the normal mode, the cooperative application 6b and the non-cooperative application 6c operate at the same speed as in the normal state.
[0025] The accelerated mode setting unit 3 sets the test mode to the accelerated mode while the test target application 6a is operating during the test period, and accelerates the operation of each application 6. For example, the accelerated mode setting unit 3 sets the interval of a timer interrupt used by the OS to be shorter than that in the normal state.
[0026] During the acceleration mode, the acceleration test implementation unit 4 makes the operation speed of the non-cooperative application 6c slower than the operation speeds of the test target application 6a and the cooperative application 6b in the acceleration mode. That is, the acceleration test implementation unit 4 disables the acceleration of the non-cooperative application 6c during the acceleration mode. For example, the acceleration test implementation unit 4 slows down the operation speed of the non-cooperative application 6c by reducing the CPU utilization rate of the CPU that executes the non-cooperative application 6c from the normal utilization rate (e.g., 100%).
[0027] In this way, the acceleration test device 1 can accelerate the operations of the test target application 6a, the cooperating application 6b, and the non-cooperating application 6c while slowing down the progress of the operation of the non-cooperating application 6c. In other words, the acceleration test device 1 can operate each application 6 in the accelerated mode while operating only the non-cooperating application 6c at a speed equivalent to that in the normal mode.
[0028] When the test target application 6a stops operating, the acceleration mode setting unit 3 sets the operating mode in the acceleration test to normal mode and sets the operation of each application 6 to normal speed. When the test target application 6a stops operating, the acceleration test execution unit 4 stops the execution of the acceleration test. In other words, the acceleration test execution unit 4 sets the operating speed of the non-linked application 6c to the normal state. For example, the acceleration test execution unit 4 returns the CPU utilization rate of the CPU executing the non-linked application 6c to the normal utilization rate (for example, 100%).
[0029] As described above, in this embodiment, the acceleration test device 1 accelerates the operation of all applications 6 during the acceleration mode in which the acceleration test of the test target application 6a is performed, and disables the acceleration of only the non-linked application 6c. This allows the acceleration test device 1 to operate the non-linked application 6c at the same speed as in the normal mode during the acceleration mode. Therefore, during the acceleration test, it is possible to prevent the occurrence of a failure that does not occur in normal operation due to the execution of the non-linked application 6c whose operation has been accelerated.
[0030] In addition, since the operation of the cooperative application 6b is accelerated together with the operation of the test target application 6a, the accelerated test can be performed while the test target application 6a and the cooperative application 6b are normally coordinated. Therefore, it is possible to prevent a failure that does not occur in normal operation from occurring during the accelerated test due to a failure in the coordination between the test target application 6a and the cooperative application 6b during the accelerated mode. As a result, it is possible to perform an accelerated test of the test target application 6a of interest while preventing a failure that does not occur in normal operation from occurring during the accelerated test.
[0031] FIG. 3 shows an example of an accelerated test device in another embodiment. Elements similar to those used in the above-mentioned embodiment are given the same names, and detailed description is omitted. The accelerated test device 100 shown in FIG. 3 is, for example, an information processing device such as a server capable of executing various applications. In other words, the information processing device is provided with the function of the accelerated test device 100 that performs an accelerated test of the functions of the information processing device. The accelerated test device 100 has at least one CPU 10, a memory 20, and a storage device 30. Although not particularly limited, the CPU 10, the memory 20, and the storage device 30 are connected to each other via a bus BUS.
[0032] The CPU 10 has a plurality of CPU cores 11a, 11b, 11c, 11d, 11e, 11f, .... In the following description, when the CPU cores 11a, 11b, 11c, 11d, 11e, and 11f are not to be distinguished from one another, they are also referred to as CPU cores 11. The acceleration test device 100 may have a processor other than the CPU 10. The CPU core 11 is an example of a processing unit that executes an application.
[0033] For example, the memory 20 is a dynamic random access memory (DRAM) or the like, and is allocated with a plurality of memory areas 21a, 21b, 21c, 21d, 21e, 21f, .... In the following, when the memory areas 21a, 21b, 21c, 21d, 21e, and 21f are not to be distinguished from one another, they are also referred to as memory area 21.
[0034] For example, the storage device 30 is a hard disk drive (HDD) or a solid state drive (SSD). The storage device 30 holds an OS including a normal mode kernel 31a and an accelerated mode kernel 31b, an application monitoring program 32, a test target application 33a, a cooperative application 33b, and a non-cooperative application 33c. The normal mode kernel 31a, the accelerated mode kernel 31b, and the application monitoring program 32 are examples of an accelerated test program.
[0035] In the following description, when there is no distinction between the normal mode kernel 31a and the accelerated mode kernel 31b, they are also referred to as the kernel 31. When there is no distinction between the test target application 33a, the cooperative application 33b, and the non-cooperative application 33c, they are also referred to as the application 33.
[0036] Each kernel 31, application monitoring program 32, and each application 33 are transferred to one of the memory areas 21 and executed by one of the CPU cores 11. Although not particularly limited, the OS may be the Linux OS, and the normal mode kernel 31a and the accelerated mode kernel 31b may be the Linux kernel (Linux is a registered trademark). The number of cooperative applications 33b and the number of non-cooperative applications 33c may be two or more.
[0037] Fig. 4 shows an example of software allocation in the acceleration test device of Fig. 3. In the example shown in Fig. 4, the normal mode kernel 31a is transferred to the memory area 21a and executed by the CPU core 11a. The accelerated mode kernel 31b is transferred to the memory area 21b and executed by the CPU core 11b. The application monitoring program 32 is transferred to the memory area 21c and executed by the CPU core 11c. The application monitoring program 32 monitors the application 33 by using the management table TBL allocated to the memory area 21c.
[0038] The test target application 33a is transferred to the memory area 21d and executed by the CPU core 11d. The cooperative application 33b is transferred to the memory area 21e and executed by the CPU core 11e. The non-cooperative application 33c is transferred to the memory area 21f and executed by the CPU core 11f.
[0039] 5 shows an example of the management table TBL in FIG. 4. The management table TBL has areas for holding application information for identifying an application, a shared memory address assigned to a shared memory used by the application, and a flag indicating whether the shared memory is shared with the test target application 33a. That is, the management table TBL holds a shared memory address and a flag for each application 33. For example, the shared memory is a memory space managed by the kernel 31. The shared memory may be allocated to at least one of the memory areas 21 of the memory 20 in FIG. 3.
[0040] For example, each application 33 can use a shared memory to communicate between the applications 33 (i.e., between processes). The application monitoring program 32 can detect a cooperating application 33b that operates in cooperation with a test target application 33a by utilizing the fact that inter-process communication is performed via a shared memory.
[0041] The application information stored in the management table TBL may be a process ID (Identification) for identifying a process executing the application 33. Whether the application 33 is a cooperative application 33b or a non-cooperative application 33c is determined by the value of a flag. For example, in an application 33 other than the test target application 33a, a flag="1" indicates a cooperative application 33b, and a flag="0" indicates a non-cooperative application 33c.
[0042] The shared memory address may store the top address of the memory area 21, or may store the value of a predetermined number of upper bits of the address indicating the memory area 21. The flag is initialized to "0" before a selection period of the accelerated test described later. Then, during the selection period, the flag corresponding to the application 33 detected to share the memory area 21 with the test target application 33a is set to "1."
[0043] Fig. 6 shows the functions of the kernel 31 in Fig. 3. The kernel 31 has a time management unit 311, a process management unit 312, a memory management unit 313, a file management unit 314, and a device management unit 315. The time management unit 311 has an accelerated mode setting unit 311a and an accelerated test implementation unit 311b. The process management unit 312 has a CPU fixing unit 312a and a CPU release unit 312b. The memory management unit 313 has an application selection unit 313a and the management table TBL shown in Fig. 5.
[0044] The acceleration mode setting unit 311a calculates an acceleration coefficient n that indicates the degree of acceleration of the operation of each application 33 during the acceleration mode. Then, the acceleration mode setting unit 311a determines the degree of acceleration during the acceleration mode of each application 33 according to the calculated acceleration coefficient n.
[0045] The acceleration test implementation unit 311b accelerates each application 33 at the acceleration rate set by the acceleration mode setting unit 311a during the acceleration mode in which the test target application 33a operates. In addition, while accelerating the operations of the test target application 33a and the cooperating application 33b, the acceleration test implementation unit 311b disables acceleration of the operation of the non-cooperating application 33c.
[0046] For example, the acceleration test implementation unit 311b disables the acceleration of the operation of the unlinked application 6c by lowering the CPU utilization rate of the CPU core 11 that executes the unlinked application 33c from the normal utilization rate. When the kernel 31 is a Linux kernel, the acceleration test implementation unit 311b changes the utilization rate of the CPU core 11 using the cpulimit function. For example, the test target application 33a and the linked application 33b are set to the normal CPU utilization rate during the acceleration mode. Although not particularly limited, the normal CPU utilization rate may be 100% or 80%.
[0047] The CPU fixing unit 312a prevents the switching of the CPU core 11 that executes the test target application 33a and the cooperative application 33b during the test period in which the accelerated test is performed. That is, the CPU fixing unit 312a fixes the CPU core 11 that executes the test target application 33a and the cooperative application 33b. At the end of the test period, the CPU release unit 312b releases the inhibition of switching of the CPU core 11 set by the CPU fixing unit 312a. That is, the CPU release unit 312b releases the fixation of the CPU core 11.
[0048] The application selection unit 313a selects a cooperative application 33b from the applications 33 other than the test target application 33a based on the access state of the shared memory by each application 33 during a selection period before the test period. The file management unit 314 manages files handled by the acceleration test apparatus 100. The device management unit 315 controls devices mounted on the acceleration test apparatus 100 and manages input / output.
[0049] Fig. 7 shows an example of the operation of an acceleration test by the acceleration test device of Fig. 3. The operation shown in Fig. 7 is performed by the CPU core 11 executing the kernel 31 and the application monitoring program 32. That is, Fig. 7 shows an example of an acceleration test program and an example of an acceleration test method realized by executing the acceleration test program. The CPU core 11 is an example of a computer.
[0050] First, in step S10, the acceleration mode setting unit 311a in Fig. 6 determines the acceleration rate at which the operation of the application 33 is accelerated during the acceleration mode. An example of step S10 is described in Fig. 8. Next, in step S20, the application selection unit 313a in Fig. 6 selects a cooperating application 33b that cooperates with the test target application 33a. An example of step S20 is described in Fig. 9.
[0051] 6 fixes the CPU core 11 to suppress switching of the CPU core 11 that executes the test target application 33a and the cooperative application 33b. An example of step S30 is described with reference to FIG.
[0052] Next, in step S40, the acceleration test execution unit 311b in Fig. 6 disables the acceleration of the operation of the non-cooperative application 33c during the acceleration mode in which the test target application 33a operates, and executes the acceleration test. The acceleration rate of the operation of the cooperative application 33b is set to the same as the acceleration rate of the operation of the test target application 33a during the acceleration mode. An example of step S40 is described in Fig. 11.
[0053] Next, in step S50, the CPU release unit 312b in Fig. 6 releases the lock of the CPU core 11 locked in step S10 at the end of the test period, and ends the accelerated test shown in Fig. 7. An example of step S50 is described in Fig. 12.
[0054] Fig. 8 shows an example of the operation of step S10 in Fig. 7. The operation shown in Fig. 8 is performed before the start of a test period of the accelerated test. First, in step S11, the accelerated mode setting unit 311a calculates an acceleration coefficient n from, for example, a ratio T1 / T2 between a test time T1 required for the accelerated test when the operation is not accelerated and a test time T2 that can be secured for the accelerated test.
[0055] For example, if the test time T1 without acceleration is 2400 hours and the available test time T2 is 24 hours, the acceleration factor n is 100. Acceleration factor n = 100 indicates that the test time can be reduced to 1 / 100 compared to when the test is not accelerated. Note that the test times T1 and T2 are input in advance into the accelerated test equipment 100 via an input device such as a mouse or keyboard by the user who will be performing the accelerated test.
[0056] Next, in step S12, the acceleration mode setting unit 311a determines the acceleration rate of the progress of the operation in the acceleration mode based on the acceleration coefficient n calculated in step S11, and ends the operation shown in Fig. 8. By calculating the acceleration coefficient n from the ratio T1 / T2 of the test time T1 and the test time T2, and determining the acceleration rate of the operation based on the acceleration coefficient n, it is possible to perform an accelerated test equivalent to the test time T1 within a limited time, such as before the shipment of a product.
[0057] For example, the acceleration mode setting unit 311a sets the interval of the timer interrupt used by the OS to be shorter than the interval of the timer interrupt during normal operation according to the acceleration factor n. The interval of the timer interrupt during the acceleration mode is set by dividing the interval of the timer interrupt during normal operation by the acceleration factor n. For example, when the acceleration factor n=100, the interval of the timer interrupt during the acceleration mode is set to 1 / 100 of the interval of the timer interrupt during normal operation. The acceleration rate at this time is 100 times that of normal operation.
[0058] Fig. 9 shows an example of the operation of step S20 in Fig. 7. The operation shown in Fig. 9 is performed during a selection period before the start of the test period of the accelerated test. First, in step S21, the application selection unit 313a starts selecting a cooperative application 33b based on the start of operation of the application 33 including the test target application 33a. The application selection unit 313a detects a shared memory accessed by the test target application 33a, and registers the application information and the shared memory address in the management table TBL.
[0059] Next, in step S22, the application selection unit 313a registers the application information and the shared memory address in the management table TBL every time the application 33 accesses the shared memory. If the registered shared memory address overlaps with the shared memory address of the test target application 33a, the application selection unit 313a sets a flag in the management table TBL. The application 33 with the flag set in the management table TBL is treated as the cooperative application 33b thereafter.
[0060] In this way, by detecting the application 33 that accessed the same shared memory as the test target application 33a during the selection period before the accelerated test, it is possible to select the cooperating application 33b that operates in cooperation with the test target application 33a. Also, by sequentially setting the flags of the applications 33 that accessed the same shared memory as the test target application 33a, it is possible to register the cooperating applications 33b in the management table TBL regardless of the number of cooperating applications 33b. Furthermore, as will be described later, the accelerated test implementation unit 311b can easily recognize the non-cooperating applications 33c by referring to the management table TBL.
[0061] Next, in step S23, if the test target application 33a is in operation, the application selection unit 313a returns the process to step S22, and if the test target application 33a has finished operating, the application selection unit 313a moves the process to step S24. In step S24, the application selection unit 313a selects the application 33 whose flag is set in the management table TBL as the cooperative application 33b, and ends the operation shown in FIG.
[0062] Fig. 10 shows an example of the operation of step S30 in Fig. 7. First, in step S31, the CPU fixing unit 312a prevents the CPU core 11 that executes the test target application 33a from being switched. That is, the CPU fixing unit 312a fixes the CPU core 11 that executes the test target application 33a.
[0063] Next, in step S32, the CPU fixing unit 312a prevents the CPU core 11 executing the cooperative application 33b from being switched. That is, the CPU fixing unit 312a fixes the CPU core 11 executing the cooperative application 33b. Then, the CPU fixing unit 312a ends the operation shown in Fig. 10. Note that, as a result of the processing of steps S31 and S32, the CPU core 11 executing the non-cooperative application 33c is set to a state in which the CPU core 11 can be switched depending on the load status of the CPU core 11. That is, the CPU core 11 executing the non-cooperative application 33c is permitted to be switched.
[0064] Fixing the CPU core 11 can prevent the CPU core 11 that executes the test target application 33a and the cooperative application 33b from switching to a CPU core 11 with a limited CPU usage rate during the acceleration mode. This can prevent a problem in which the operations of the test target application 33a and the cooperative application 33b are not accelerated during the acceleration mode.
[0065] Furthermore, if one of the CPU cores 11 that executes the test target application 33a and the cooperative application 33b is switched to a CPU core 11 with a limited CPU usage rate, the cooperative operation may fail. If the cooperative operation is not continued, a failure that would not occur in normal operation may occur. By preventing the switching of the CPU core 11, it is possible to prevent the cooperation between the test target application 33a and the cooperative application 33b from failing. As a result, it is possible to perform the accelerated test without causing a failure that would not occur in normal operation.
[0066] On the other hand, since the switching of the CPU core 11 that executes the unlinked application 33c is not inhibited, there is a possibility that the CPU core 11 may be switched during the test period. However, since the CPU usage rate of the CPU core 11 before and after the switching is limited to 1 / n, there is no effect on the operation of the unlinked application 33c.
[0067] Fig. 11 shows an example of the operation of step S40 in Fig. 7. First, in step S41, the accelerated test implementation unit 311b waits for the test target application 33a to start operating. When the test target application 33a starts operating, the accelerated test implementation unit 311b shifts the process to step S42.
[0068] In step S42, the acceleration test implementation unit 311b refers to the management table TBL and limits the CPU usage of all CPU cores 11, except for the CPU core 11 that executes the test target application 33a and the cooperative application 33b, to 1 / n. Here, n is the acceleration coefficient n calculated in step S11 of FIG. 8. As a result, the CPU usage of the CPU core 11 that executes the non-cooperative application 33c is set to 1 / n. Note that the acceleration test implementation unit 311b may also refer to the management table TBL and limit the CPU usage of the CPU core 11 that executes an application 33 other than the test target application 33a whose flag is reset to "0" to 1 / n.
[0069] Next, in step S43, the acceleration test implementation unit 311b starts an acceleration mode in which the acceleration rate is n times. In the acceleration mode, the operation of the application 33 is accelerated according to the acceleration rate set in step S12 of Fig. 8. For example, the acceleration test implementation unit 311b accelerates the operation of the application 33 by 100 times by setting the interval of timer interrupts by the OS to 1 / n compared to the normal state. However, since the CPU usage rate of the non-cooperative application 33c is limited to 1 / n in step S42, the operation speed becomes equivalent to the normal operation.
[0070] Next, in step S44, the accelerated test implementation unit 311b waits for the operation of the test target application 33a to end. When the operation of the test target application 33a ends, the accelerated test implementation unit 311b shifts the process to step S45. In step S45, the accelerated test implementation unit 311b releases the restriction (1 / n) on the CPU usage rate of the CPU core 11 that executes the non-cooperative application 33c, and ends the operation shown in FIG.
[0071] Fig. 12 shows an example of the operation of step S50 in Fig. 7. First, in step S51, the CPU release unit 312b releases the inhibition of switching of the CPU core 11 that executes the test target application 33a. That is, the CPU release unit 312b releases the fixation of the CPU core 11 that executes the test target application 33a.
[0072] Next, in step S52, the CPU release unit 312b releases the inhibition of switching of the CPU core 11 that executes the cooperative application 33b. That is, the CPU release unit 312b releases the fixation of the CPU core 11 that executes the cooperative application 33b. Then, the CPU release unit 312b ends the operation shown in FIG.
[0073] Fig. 13 shows an example of the operation of the acceleration test of the acceleration test apparatus 100 of Fig. 3. For example, the test target application 33a is an FC (Fibre Channel) driver, the cooperative application 33b is FC firmware, and the non-cooperative application 33c is a mouse driver connected to the acceleration test apparatus 100. That is, in Fig. 13, an acceleration test is performed on a driver of an FC card mounted on an information processing device to which the functions of the acceleration test apparatus 100 are added. Note that examples of the test target application 33a, the cooperative application 33b, and the non-cooperative application 33c are not limited to those shown in Fig. 13.
[0074] The acceleration test includes a selection period and a test period. In the selection period, steps S10, S20, and S30 in Fig. 7 are performed, and in the test period, steps S40 and S50 in Fig. 7 are performed. Note that the process of determining the degree of acceleration in step S10 in Fig. 7 may be performed before the selection period.
[0075] During the selection period, the kernel 31 monitors the shared memory accessed by each application 33, and detects a cooperative application 33b that operates in cooperation with the test target application 33a. Before switching from the selection period to the test period, the CPU fixing unit 312a fixes the CPU core 11 by suppressing switching of the CPU core 11.
[0076] The test period starts after the cooperating application 33b is selected in the selection period. During the test period, the operation mode is set to the accelerated mode while the test target application 33a is operating, and the operation of each application 33 is accelerated by n times. Furthermore, in the accelerated mode, the CPU usage rate of the non-cooperating application 33c is limited to 1 / n, thereby disabling the n-times acceleration.
[0077] During the test period, while the test target application 33a is not running, each application 33 runs in a normal mode in which the operation is not accelerated. In this way, the acceleration test device 100 can make the operation speed of the non-linked application 33c equivalent to the operation speed in the normal mode during the test period. At the end of the test period, the CPU release unit 312b releases the lock on the CPU core 11 by releasing the inhibition of switching of the CPU core 11.
[0078] For example, the FC driver has an RDP (Read Diagnostics Parameter) function and transmits information about an FC card connected to an information processing device having the functions of the acceleration test device 100 to the FC switch at a predetermined time interval. The FC driver has a queue that holds the FC card information each time the FC card information is transmitted. The FC driver then releases the FC card information from the queue once transmission has been completed. For example, the transmission interval for FC card information is assumed to be one hour, and the maximum number of FC card information pieces that can be stored in the queue is assumed to be 1024.
[0079] If the FC driver has a fault that prevents the release of the queue, the fault will occur when the queue overflows after 1025 hours. If an accelerated test is not performed, it will take 1025 hours (42.7 days) to detect a fault caused by a queue overflow. In contrast, in this embodiment, for example, by setting the acceleration factor n to 43, it becomes possible to detect a fault caused by a queue overflow in an accelerated mode period of about 24 hours.
[0080] In the accelerated test, the FC firmware that operates in cooperation with the FC driver is accelerated together with the FC driver during the accelerated mode. Therefore, the accelerated test can be performed with the FC driver and the FC firmware operating in cooperation with each other normally.
[0081] Furthermore, when an input device such as a mouse or a keyboard is connected to the information processing device to which the function of the acceleration test device 100 is added, one of the CPU cores 11 executes a mouse driver or a keyboard driver as an application that operates at a low speed. For example, the driver that operates at a low speed operates as a non-cooperative application 33c that does not cooperate with the FC driver.
[0082] Drivers that operate at low speeds may not operate normally when their operation is accelerated by an acceleration test. In this embodiment, the CPU core 11 that executes drivers that operate at low speeds, which are non-cooperative applications 33c, limits the CPU usage rate to 1 / n during acceleration mode. This allows drivers that operate at low speeds to operate normally during the acceleration test. As a result, in the acceleration test, the FC driver, the FC firmware that cooperates with the FC driver, and the mouse driver that does not cooperate with the FC driver can operate normally, and the occurrence of a failure that does not occur in normal operation can be suppressed.
[0083] As described above, this embodiment can also provide the same effects as the above-mentioned embodiment. For example, by controlling the operation of not only the cooperating application 33b that cooperates with the test target application 33a but also the non-cooperating application 33c that does not cooperate with the test target application 33a, it is possible to perform an accelerated test while suppressing the occurrence of failures.
[0084] Furthermore, in this embodiment, an application 33 that has accessed the same shared memory as the application 33a to be tested can be selected as a cooperative application 33b that operates in cooperation with the application 33a to be tested. Also, by sequentially setting the flags of the applications 33 that have accessed the same shared memory as the application 33a to be tested, the cooperative applications 33b can be registered in the management table TBL regardless of the number of cooperative applications 33b.
[0085] Fixing the CPU core 11 can prevent the CPU core 11 that executes the test target application 33a and the cooperative application 33b from switching to a CPU core 11 with a limited CPU usage rate during the acceleration mode. This can prevent a problem in which the operations of the test target application 33a and the cooperative application 33b are not accelerated during the acceleration mode.
[0086] The acceleration mode setting unit 311a calculates an acceleration coefficient n from the ratio T1 / T2 between the test time T1 required for the accelerated test when the operation is not accelerated and the test time T2 that can be secured for the accelerated test, and determines the degree of acceleration of the operation based on the acceleration coefficient n. This makes it possible to perform an accelerated test equivalent to the test time T1 when no acceleration is required within a limited time, such as before the shipment of a product.
[0087] The features and advantages of the embodiments will be apparent from the above detailed description. It is intended that the claims cover the features and advantages of the embodiments as described above without departing from the spirit and scope of the claims. In addition, any improvements and modifications can be easily made by a person having ordinary skill in the art. Therefore, it is not intended to limit the scope of the inventive embodiments to the above, and appropriate improvements and equivalents within the scope of the embodiments disclosed can be used. [Explanation of symbols]
[0088] 1 Acceleration test equipment 2 Application Selection Section 3 Acceleration mode setting section 4. Acceleration Testing Division 5 Storage section 6a Tested Applications 6b Collaborative Applications 6c Unlinked Applications 10 CPU 11a, 11b, 11c CPU cores 11d, 11e, 11f CPU cores 20 Memory 21a, 21b, 21c Memory Areas 21d, 21e, 21f Memory Areas 30 Storage device 31a normal mode kernel 31b Acceleration mode kernel 32 Application Monitoring Programs 33a Tested Applications 33b Collaborative Applications 33c Unlinked Applications 100 Acceleration Test Equipment 311 Time Management Department 311a Acceleration mode setting section 311b Acceleration Testing Division 312 Process Management Department 312a CPU fixing part 312b CPU release section 313 Memory Management Unit 313a Application Selection Division 314 File Management Section 315 Device Management Department BUS TBL Management Table
Claims
1. An acceleration test program for performing an acceleration test by accelerating the operation of an application, Select a collaborative application that works in conjunction with the test target application, Determine the degree of acceleration of the application during acceleration mode, which speeds up the application's operation more than in normal mode, While accelerating the operations of the test target application and the cooperative application based on the acceleration rate, acceleration of the operations of a non-cooperative application that does not cooperate with the test target application is disabled. An accelerated test program that runs processing on a computer.
2. During a selection period for selecting the cooperative application, a plurality of applications are operated, and an application that shares a memory area with the test target application is selected as the cooperative application. The accelerated testing program according to claim 1 .
3. an address assigned to the memory area and a flag indicating whether the memory area is shared with the test target application are stored in a management table for each application; A flag is set for an application that has accessed a memory area used by the test target application during the selection period, and the application for which the flag is set is recognized as the cooperative application. The accelerated test program according to claim 2 .
4. A processing unit that executes an application can be switched according to a load status of the processing unit; permitting switching of a processing unit that executes the non-cooperative application; Suppressing switching of a processing unit that executes the application to be tested and the cooperative application. The accelerated test program according to any one of claims 1 to 3.
5. Calculate an acceleration coefficient from the ratio of the test time required for the accelerated test when the operation is not accelerated to the test time available for the accelerated test; The degree of acceleration of the operation during the acceleration mode is determined according to the calculated acceleration coefficient. The accelerated test program according to any one of claims 1 to 4.
6. An acceleration test method for performing an acceleration test by accelerating an operation of an application, comprising: Select a collaborative application that works in conjunction with the test target application, Determine the degree of acceleration of the application during acceleration mode, which speeds up the application's operation more than in normal mode, While accelerating the operations of the test target application and the cooperative application based on the acceleration rate, acceleration of the operations of a non-cooperative application that does not cooperate with the test target application is disabled. An accelerated testing method in which processing is performed by a computer.
7. An acceleration test device for performing an acceleration test by accelerating the operation of an application, an application selection unit that selects a cooperative application that operates in cooperation with a test target application that is a test target; an acceleration mode setting unit that determines an acceleration rate of an operation of the application in the acceleration mode; an acceleration test execution unit that disables acceleration of an operation of a non-cooperative application that does not cooperate with the application to be tested while accelerating the operations of the application to be tested and the cooperative application based on the acceleration rate; An acceleration test device having:
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