Power conversion device and power conversion system

Abstract

To provide a power converter capable of reducing waveform distortion.SOLUTION: A power converter includes: an input terminal; a switching section including a first switching element provided at a path connecting a first connection terminal with a first node, a second switching element provided at a path connecting the first node with a second connection terminal, a third switching element provided at a path connecting the first connection terminal with a second node, and a fourth switching element provided at a path connecting the second node with the second connection terminal; an output terminal; a low pass filter; and a control section. The control section creates a first effective voltage command value which is a command value of an effective voltage value of an AC output voltage in the output terminal, generates a second effective voltage command value by limiting the first effective voltage command value with a prescribed value and controls an operation of the switching section on the basis of the second effective voltage command value and the effective voltage value.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a power conversion device and a power conversion system that convert electric power. [Background technology]

[0002] Among power conversion devices, there are those that convert DC power into AC power. For example, Patent Document 1 discloses a power conversion device that controls switching operations based on instantaneous values ​​of various voltages and currents. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2017 / 138103 Summary of the Invention [Problem to be solved by the invention]

[0004] In a power conversion device, it is desirable that the waveform of the AC output voltage be a sine wave with low waveform distortion not only during normal operation but also during an overload in which the output power is greater than the input power.

[0005] It is desirable to provide a power conversion device and a power conversion system that can reduce waveform distortion of an AC output voltage. [Means for solving the problem]

[0006] The power conversion device of the present invention includes an input terminal, a switching unit, an output terminal, and a low-pass filter. Ta and, and a control unit. The input terminal has a first connection terminal and a second connection terminal. The switching unit has a first switching element provided on a path connecting the first connection terminal and the first node, a second switching element provided on a path connecting the first node and the second connection terminal, a third switching element provided on a path connecting the first connection terminal and the second node, and a fourth switching element provided on a path connecting the second node and the second connection terminal. The low pass filter is provided on the paths connecting the first node and the second node and the output terminal. The control unit controls the operation of the switching unit. The control unit includes: Based on the preset effective voltage value of the AC output voltage at the output terminal, A first effective voltage command value, which is a command value for the effective voltage value of the AC output voltage at the output terminal, is generated, a second effective voltage command value is generated by limiting the first effective voltage command value to a predetermined value, and the operation of the switching unit is controlled based on the second effective voltage command value and the effective voltage value. The control unit normalizes the first effective voltage command value, the second effective voltage command value, and the effective voltage value using the inter-terminal voltages of the first connection terminal and the second connection terminal, and controls the operation of the switching unit using the normalized first effective voltage command value, the normalized second effective voltage command value, and the normalized effective voltage value.

[0007] A power conversion system according to the present invention includes the above-described power conversion device and a DC power source. The DC power source is connected to an input terminal of the power conversion device. Effect of the Invention

[0008] According to the power conversion device and power conversion system of the present invention, a first effective voltage command value, which is a command value for the effective voltage value of the AC output voltage at the output terminal, is generated, a second effective voltage command value is generated by limiting the first effective voltage command value to a predetermined value, and the operation of the switching unit is controlled based on the second effective voltage command value and the effective voltage value, thereby making it possible to reduce waveform distortion of the AC output voltage. [Brief description of the drawings]

[0009] [Figure 1] 1 is a circuit diagram illustrating an example of a configuration of a power conversion device according to an embodiment of the present invention. [Diagram 2] 2 is a timing waveform diagram illustrating an example of an operation of the power conversion device illustrated in FIG. 1. [Diagram 3] 2 is a block diagram illustrating an example of the configuration of a control unit illustrated in FIG. 1. [Figure 4] 2 is a waveform diagram illustrating an example of an operation of the power conversion device illustrated in FIG. 1. [Diagram 5] 2 is an equivalent circuit diagram illustrating an example of a load device illustrated in FIG. 1. [Figure 6] 1. FIG. 4 is another waveform diagram illustrating an example of an operation of the power conversion device shown in FIG. [Figure 7] 1. FIG. 4 is another waveform diagram illustrating an example of an operation of the power conversion device shown in FIG. [Figure 8] 4 is a block diagram illustrating an example of the configuration of a gate signal generating unit illustrated in FIG. 3. [Figure 9] 8 is a waveform diagram illustrating an example of an operation of the gate signal generating unit illustrated in FIG. 7. [Figure 10] 2 is a timing waveform diagram illustrating an example of an operation of the power conversion device illustrated in FIG. 1. [Figure 11] 11 is another timing waveform diagram illustrating an example of an operation of the power conversion device according to the reference example. FIG. [Figure 12] 1. FIG. 4 is another timing waveform diagram illustrating an example of an operation of the power conversion device shown in FIG. [Figure 13] 13 is another timing waveform diagram illustrating an example of an operation of a power conversion device according to another reference example. FIG. [Figure 14] 1. FIG. 4 is another timing waveform diagram illustrating an example of an operation of the power conversion device shown in FIG. [Figure 15] 1. FIG. 4 is another timing waveform diagram illustrating an example of an operation of the power conversion device shown in FIG. [Figure 16] FIG. 11 is a circuit diagram illustrating a configuration example of a power conversion device according to a modified example. [Figure 17] FIG. 13 is a circuit diagram illustrating a configuration example of a power conversion device according to another modified example. [Figure 18] FIG. 13 is a circuit diagram illustrating a configuration example of a power conversion device according to another modified example. [Figure 19] 19 is a block diagram illustrating a configuration example of a gate signal generating unit in the power conversion device illustrated in FIG. 18. [Figure 20]FIG. 13 is a block diagram illustrating a configuration example of a control unit according to a modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[0011] [Configuration example] FIG. 1 shows an example of a configuration of a power conversion device (power conversion device 1) according to an embodiment of the present invention. The power conversion device 1 is a single-phase two-wire inverter. The power conversion device 1 includes input terminals T11 and T12 and output terminals T21 and T22. A DC power supply PDC is connected to the input terminals T11 and T12. The DC power supply PDC may be, for example, a DC power supply device. The DC power supply device may have, for example, a battery and a DC / DC converter, and the DC / DC converter may convert DC power supplied from the battery and supply the converted DC power to the power conversion device 1. The output terminals T21 and T22 are connected to a load device LOAD.

[0012] The power conversion device 1 includes a voltage sensor 21, an input capacitor 22, a switching unit 23, a current sensor 24, a low-pass filter 25, a voltage sensor 28, switches 29U and 29W, and a control unit 30.

[0013] The voltage sensor 21 is configured to detect the DC bus voltage Vdc. One end of the voltage sensor 21 is connected to a voltage line L1 led to an input terminal T11, and the other end is connected to a reference voltage line L2 led to an input terminal T12. The voltage sensor 21 detects the voltage on the voltage line L1 based on the voltage on the reference voltage line L2 as the DC bus voltage Vdc. The voltage sensor 21 supplies the detection result of the DC bus voltage Vdc to the control unit 30.

[0014] One end of the input capacitor 22 is connected to the voltage line L1, and the other end is connected to the reference voltage line L2. The input capacitor 22 has a capacitance Cdc. The input capacitor 22 may be, for example, an electrolytic capacitor.

[0015] The switching unit 23 is configured to perform switching operations based on the gate signals S1 to S4, respectively. The switching unit 23 has transistors SW1 to SW4. The transistors SW1 to SW4 are switching elements that perform switching operations based on the gate signals S1 to S4, respectively. Each of the transistors SW1 to SW4 is configured using, for example, an insulated gate bipolar transistor (IGBT). Each of the transistors SW1 to SW4 has a freewheeling diode. The anode of the freewheeling diode of the transistor SW1 is connected to the emitter of the transistor SW1, and the cathode is connected to the collector of the transistor SW1. The same is true for the transistors SW2 to SW4. Note that in this example, an insulated gate bipolar transistor is used, but any switching element may be used.

[0016] The transistor SW1 is provided in a path connecting the voltage line L1 and the node N1, and is configured to connect the node N1 to the voltage line L1 when the transistor SW1 is in an ON state. The collector of the transistor SW1 is connected to the voltage line L1, a gate signal S1 is supplied to the gate, and the emitter is connected to the node N1. The transistor SW2 is provided in a path connecting the node N1 and the reference voltage line L2, and is configured to connect the node N1 to the reference voltage line L2 when the transistor SW2 is in an ON state. The collector of the transistor SW2 is connected to the node N1, a gate signal S2 is supplied to the gate, and the emitter is connected to the reference voltage line L2. The node N1 is a connection point between the emitter of the transistor SW1 and the collector of the transistor SW2.

[0017] The transistor SW3 is provided in a path connecting the voltage line L1 and the node N2, and is configured to connect the node N2 to the voltage line L1 when it is turned on. The collector of the transistor SW3 is connected to the voltage line L1, the gate is supplied with a gate signal S3, and the emitter is connected to the node N2. The transistor SW4 is provided in a path connecting the node N2 and the reference voltage line L2, and is configured to connect the node N2 to the reference voltage line L2 when it is turned on. The collector of the transistor SW4 is connected to the node N1, the gate is supplied with a gate signal S4, and the emitter is connected to the reference voltage line L2. The node N2 is a connection point between the emitter of the transistor SW3 and the collector of the transistor SW4.

[0018] The current sensor 24 is provided in a path connecting the node N1 and the low-pass filter 25, and is configured to detect a current i_u flowing in this path. One end of the current sensor 24 is connected to the node N1, and the other end is connected to one end of the AC reactor 26. The current sensor 24 detects the current i_u so that it is positive when it flows from the node N1 toward the low-pass filter 25. The current sensor 24 supplies the detection result of the current i_u to the control unit 30.

[0019] The low-pass filter 25 is configured to remove high-frequency components contained in the signal generated by the switching operations of the transistors SW1 to SW4. The low-pass filter 25 has an AC reactor 26 and a capacitor 27.

[0020] The AC reactor 26 is provided in a path connecting the node N1 and the output terminal T21, with one end connected to the other end of the current sensor 24 and the other end connected to the voltage line UL. The AC reactor 26 has an inductance Linv and an internal resistance Rinv.

[0021] The capacitor 27 is configured using, for example, an AC film capacitor. One end of the capacitor 27 is connected to the voltage line UL, and the other end is connected to the voltage line WL led to the node N2. The capacitor 27 has a capacitance Cinv, a parasitic inductance Lc, and a parasitic resistance Rc. The parasitic inductance Lc is an equivalent series inductance (ESL), and the parasitic resistance Rc is an equivalent series resistance (ESR).

[0022] The voltage sensor 28 is configured to detect the AC output voltage e_inv output from the power conversion device 1. One end of the voltage sensor 28 is connected to the voltage line UL, and the other end is connected to the voltage line WL. The voltage sensor 28 detects the voltage on the voltage line UL based on the voltage on the voltage line WL as the AC output voltage e_inv. The voltage sensor 28 supplies the detection result of the AC output voltage e_inv to the control unit 30.

[0023] The switch 29U is configured to connect the voltage line UL to the load device LOAD by being turned on. One end of the switch 29U is connected to the voltage line UL, and the other end is connected to the output terminal T21. The switch 29U is turned on and off based on a switch control signal Ssd.

[0024] The switch 29W is configured to connect the voltage line WL to the load device LOAD by being turned on. One end of the switch 29W is connected to the voltage line WL, and the other end is connected to the output terminal T22. The switch 29W is turned on and off based on a switch control signal Ssd.

[0025] The output terminals T21 and T22 are connected to a load device LOAD. The load device LOAD includes a load having an impedance Zload, one end of which is connected to the output terminal T21 and the other end of which is connected to the output terminal T22.

[0026] The control unit 30 is configured to control the operation of the power conversion device 1. The control unit 30 is configured using, for example, one or more microcontrollers. The control unit 30 generates gate signals S1 to S4 by performing arithmetic processing based on the AC output voltage e_inv, the current i_u, and the DC bus voltage Vdc. As a result, the control unit 30 performs constant voltage amplitude control so that the voltage amplitude of the AC output voltage e_inv becomes a predetermined amplitude.

[0027] FIG. 2 shows an example of the power conversion operation in the power conversion device 1, where (A) shows the duty ratio d_u of the transistors SW1 and SW2 which are U-phase switching elements, (B) shows the waveform of the carrier signal CR, and (C) to (F) show the waveforms of the gate signals S1 to S4. In this example, when the gate signal S1 is at a high level, the transistor SW1 is in an on state, and when the gate signal S1 is at a low level, the transistor SW1 is in an off state. The same is true for the gate signals S2 to S4. The frequency fsd is the frequency of the AC output voltage e_inv, and the time Tsd is the time corresponding to the period of the AC output voltage e_inv. The time Ts is the time corresponding to the switching period of the transistors SW1 and SW2. Note that in FIG. 2, the period of the time Ts is drawn longer than the time Tsd for convenience of explanation, but for example, the time Ts can be set to 50 μsec. (=1 / 20 kHz), and the time Tsd can be set to 16.7 msec. (=1 / 60 Hz).

[0028] The control unit 30 generates a duty ratio d_u and a carrier signal CR as described later (FIGS. 2(A) and (B)). Then, the control unit 30 generates gate signals S1 and S2, which are PWM (Pulse Width Modulation) signals, based on the duty ratio d_u and the carrier signal CR (FIGS. 2(C) and (D)). The control unit 30 also generates gate signals S3 and S4, whose duty ratio is about 50% (FIGS. 2(E) and (F)). The transistors SW1 to SW4 are turned on and off based on these gate signals S1 to S4, respectively. The low-pass filter 25 removes high-frequency components contained in the AC pulse voltage generated by the switching operation of the transistors SW1 to SW4. In this way, the power conversion device 1 generates an AC output voltage e_inv.

[0029] Before describing the operation of the control unit 30, the operation of the power conversion device 1 will be formulated as follows. The voltage v_u at the node N1 and the voltage v_w at the node N2 of the switching unit 23 are expressed by the following equation EQ1.

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[0030] 3 shows an example of the configuration of the control unit 30. The control unit 30 has a command value generating unit 31, effective value calculating units 32 and 33, a load current estimating unit 34, an effective value calculating unit 35, a DC component calculating unit 36, a limiter 37, an AC voltage control unit 38, an AC current control unit 39, limiters 41 and 42, a DC component control unit 43, an adder 44, a multiplier 45, a gate block signal generating unit 46, a carrier signal generating unit 47, and a gate signal generating unit 50.

[0031] The control unit 30 has an AD conversion circuit that samples the AC output voltage e_inv, the current i_u, and the DC bus voltage Vdc at a sampling period corresponding to the sampling frequency fs. In this example, the sampling frequency fs is 20 kHz. In this example, the sampling period (1 / fs) is the same as the time Ts shown in FIG. 2. The control unit 30 then performs arithmetic processing based on these digital values. Hereinafter, the AC output voltage e_inv, the current i_u, and the DC bus voltage Vdc will be appropriately used to represent the AD converted digital values.

[0032] The command value generating unit 31 is configured to generate an effective voltage command value X_inv* which is a command value for the effective voltage value of the AC output voltage e_inv, and a DC component command value X_invdc* which is a command value for the DC component value of the AC output voltage e_inv. Specifically, the command value generating unit 31 first generates an effective voltage command value E_inv* which is a voltage command value for the effective voltage value of the AC output voltage e_inv, and a DC component command value E_invdc* which is a voltage command value for the DC component value of the AC output voltage e_inv. The effective voltage command value E_inv* and the DC component command value E_invdc* are expressed in units of voltage. As shown in the following equation EQ4, the command value generating unit 31 generates an effective voltage command value X_inv* by normalizing the generated effective voltage command value E_inv* by the DC bus voltage Vdc, and generates a DC component command value X_invdc* by normalizing the generated DC component command value E_invdc* by the DC bus voltage Vdc.

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[0033] The effective value calculation unit 32 is configured to calculate an effective voltage value X_inv by calculating the effective value of the AC output voltage e_inv based on the detected AC output voltage e_inv. The effective voltage value X_inv is calculated using, for example, the following equation EQ5.

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[0034] The first equation of the equation EQ5 is an equation that calculates the effective voltage value E_inv by time-integrating the square of the AC output voltage e_inv. That is, this first equation is an equation of the continuous time system. In this example, the control unit 30 samples the AC output voltage e_inv at a sampling period corresponding to the sampling frequency fs, as described above. Therefore, the first equation of the continuous time system is converted into the second equation of the discrete time system. The second equation of the equation EQ5 is converted into the third equation by using the moving average method. In the route on the right side of the equation EQ5, the value (1 / M·(E_inv[kM])^2) relating to the oldest instantaneous value is subtracted from the square of the effective voltage value obtained last time ((E_inv[k-1])^2), and the value (1 / M·(E_inv[k])^2) relating to the latest instantaneous value is added. The effective value calculation unit 32 can calculate the effective voltage value E_inv based on the sampled AC output voltage e_inv using the third equation. The effective value calculation unit 32 then calculates the effective voltage value X_inv by normalizing the calculated effective voltage value E_inv by the DC bus voltage Vdc using the fourth equation.

[0035] The effective value calculation unit 33 is configured to calculate an effective current value X_u by calculating an effective value of the detected current i_u based on the current i_u. The effective current value X_u is calculated using, for example, the following equation EQ7.

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[0036] The first equation of the equation EQ7 is an equation for calculating the effective current value I_u by time-integrating the square of the current i_u. As with the equation EQ5, the first equation in the continuous time system is converted into the second equation in the discrete time system. Then, the second equation of the equation EQ7 is converted into the third equation by using the moving average method. The effective value calculation unit 33 can calculate the effective current value I_u by using the third equation based on the sampled current i_u. Then, the effective value calculation unit 33 is configured to calculate the effective current value X_u by normalizing the calculated effective current value I_u by the DC bus voltage Vdc by using the fourth equation.

[0037] The load current estimator 34 is configured to estimate the load current i_load based on the detected AC output voltage e_inv and the detected current i_u using equation EQ3.

[0038] The effective value calculation unit 35 is configured to calculate the effective load current value X_load by calculating the effective value of the load current i_load based on the estimated load current i_load. The effective load current value X_load is calculated using, for example, the following equation EQ8.

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[0039] The first equation of the equation EQ8 is an equation for calculating the effective load current value I_load by time-integrating the square of the load current i_load. As with the equation EQ5, the first equation in the continuous time system is converted to the second equation in the discrete time system. The second equation of the equation EQ8 is then converted to the third equation by using a moving average method. The effective value calculation unit 35 can calculate the effective load current value I_load using the third equation based on the sampled load current i_load. The effective value calculation unit 35 then calculates the effective load current value X_load by normalizing the calculated effective load current value I_load by the DC bus voltage Vdc using the fourth equation.

[0040] The DC component calculation unit 36 ​​is configured to calculate a DC component value X_invdc by calculating an average value of the AC output voltage e_inv based on the detected AC output voltage e_inv. The DC component value X_invdc is calculated using, for example, the following equation EQ9.

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[0041] The first equation of the equation EQ9 is an equation for calculating the DC component value E_invdc by integrating the AC output voltage e_inv over time. That is, this first equation is an equation in a continuous time system. In this example, as described above, the control unit 30 samples the AC output voltage e_inv at a sampling period corresponding to the sampling frequency fs. Therefore, the first equation in the continuous time system is converted into the second equation in the discrete time system. The DC component calculation unit 36 ​​can calculate the DC component value E_invdc using this second equation based on the sampled AC output voltage e_inv. Then, the DC component calculation unit 36 ​​is configured to calculate the DC component value X_invdc by normalizing the calculated DC component value E_invdc by the DC bus voltage Vdc using the third equation.

[0042] The limiter 37 is configured to generate the effective voltage command value X_invlim* by limiting the effective voltage command value X_inv* to a predetermined value. Specifically, the limiter 37 limits the effective voltage command value X_inv* based on the following equation EQ11.

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[0043] This limiter 37 may operate, for example, in an overload state in which the output power of the power conversion device 1 is greater than the input power of the power conversion device 1. That is, in such a case, the DC power supply PDC in the previous stage of the power conversion device 1 cannot supply sufficient power to the power conversion device 1. For example, when such a situation occurs transiently, the power conversion device 1 supplies power to the load device LOAD by effectively utilizing the power stored in the input capacitor 22. In this case, the power conversion device 1 operates the switching unit 23 at the maximum value of the pulse width of the PWM signal. In other words, the power conversion device 1 supplies power to the load device LOAD by operating at the maximum possible duty ratio.

[0044] The AC voltage control unit 38 is configured to generate an effective current command value X_u*, which is a command value for the effective current value X_u, by controlling the effective voltage value X_inv based on the effective voltage command value X_invlim* and the effective voltage value X_inv so that the effective voltage value X_inv becomes equal to the effective voltage command value X_invlim*.

[0045] The AC current control unit 39 is configured to generate an output current command value X_L* by controlling the effective current value X_u based on the effective current command value X_u* and the effective current values ​​X_u and X_load so that the effective current value X_u becomes equal to the effective current command value X_u*.

[0046] The limiter 41 is configured to generate an effective voltage value X_invlim by limiting the effective voltage value X_inv to a predetermined value. Specifically, like the limiter 37, the limiter 41 limits the effective voltage value X_inv based on the following equation EQ13.

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[0047] The limiter 42 is configured to generate the DC component value X_invdclim by limiting the DC component value X_invdc with a value corresponding to the effective voltage command value X_invlim*. Specifically, the limiter 42 limits the DC component value X_invdc based on the following equation EQ14.

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[0048] Like the limiters 37 and 41, the limiter 42 can operate, for example, during an overload when the output power of the power conversion device 1 is greater than the input power of the power conversion device 1. In this case, as described above, the power conversion device 1 supplies power to the load device LOAD by effectively utilizing the power stored in the input capacitor 22. The limiter 37 generates the effective voltage command value X_invlim* by limiting the effective voltage command value X_inv* at a predetermined value, and the limiter 41 generates the effective voltage value X_invlim by limiting the effective voltage value X_inv at a predetermined value. During such an overload, the command value generator 31 sets the DC component command value X_invdc* to "0" as shown in the following equation EQ15.

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[0049] The DC component control unit 43 is configured to generate the DC component command value X_dc* by controlling the DC component value X_invdclim based on the DC component command value X_invdc* and the DC component value X_invdclim so that the DC component value X_invdclim becomes equal to the DC component command value X_invdc*.

[0050] In the power conversion device 1, by providing the DC component control unit 43, for example, it is possible to suppress a malfunction when the load device LOAD has a half-wave rectification load. That is, when power is supplied to a half-wave rectification load, as shown in FIG. 4, the load current i_load flows in half the period of the cycle period of the AC output voltage e_inv, and the load current i_load does not flow in the remaining half of the period. Since the load current i_load is unbalanced in this way, the peak value e_a of the AC output voltage e_inv in the period when the load current i_load flows is lower than the peak value e_a of the AC output voltage e_inv in the period when the load current i_load does not flow. When such an AC output voltage e_inv is supplied to a plurality of load devices, it may affect the operation of the other load devices. Even when power is supplied to a half-wave rectification load in this way, the DC component control unit 43 adjusts the DC component of the AC output voltage e_inv, so that the peak value e_a and the peak value e_b can be equal to each other. As a result, even when the power conversion device 1 supplies the AC output voltage e_inv to a plurality of load devices, it is possible to prevent the operation of the other load devices from being affected.

[0051] In recent years, general household load devices are designed to withstand fluctuations in the commercial grid voltage. Therefore, the power conversion device 1 can supply power to such general household load devices. Since the power conversion device 1 adjusts the DC component of the AC output voltage e_inv in this way, the general household load devices can operate without any problems.

[0052] The adder 44 (FIG. 3) is configured to generate a signal D_u* by adding together the output current command value X_L*, the DC component command value X_dc*, and the effective voltage value X_invlim.

[0053] The multiplier 45 generates the signal d_inv* by multiplying the signal D_u* by the value of “Sin(θsd)”, where θsd is the phase angle of the AC output voltage e_inv.

[0054] The gate block signal generating unit 46 is configured to generate the gate block signals Gu and Gw. The gate block signal generating unit 46 is configured to set the gate block signal Gu to a low level when the absolute value |i_u| of the detected current i_u reaches a predetermined threshold value Ith.

[0055] In the power conversion device 1, when such an instantaneous overcurrent occurs, the gate block signal Gu is set to a low level, thereby turning off the transistors SW1 and SW2 in the switching unit 23 for a predetermined time. As a result, the transistors SW1 to SW4 can be protected in the power conversion device 1. An example in which the load device LOAD has a nonlinear load will be described below.

[0056] FIG. 5 shows an example of an equivalent circuit of the load device LOAD when the load device LOAD has a nonlinear load. The load device LOAD has input terminals T31 and T32, diodes D1 to D4, a capacitor 101, and a resistive element 102. The input terminals T31 and T32 are connected to the output terminals T21 and T22 of the power conversion device 1, respectively. The anode of the diode D1 is connected to the input terminal T31, and the cathode is connected to the voltage line L31. The anode of the diode D2 is connected to the reference voltage line L32, and the cathode is connected to the input terminal T31. The anode of the diode D3 is connected to the input terminal T32, and the cathode is connected to the voltage line L31. The anode of the diode D4 is connected to the reference voltage line L32, and the cathode is connected to the input terminal T32. One end of the capacitor 101 is connected to the voltage line L31, and the cathode is connected to the reference voltage line L32. One end of the resistive element 102 is connected to the voltage line L31, and the other end is connected to the reference voltage line L32.

[0057] Fig. 6 shows an example of waveforms of the AC output voltage e_inv and the load current i_load of the power conversion device 1 when power is supplied to a load device LOAD having a nonlinear load. When the power conversion device 1 supplies power to a load device LOAD as shown in Fig. 5, an inrush current occurs due to charging and discharging of the capacitor 101. When such an instantaneous overcurrent occurs, the power conversion device 1 sets the gate block signal Gu to a low level to turn off the transistors SW1 and SW2 in the switching unit 23 for a predetermined short time. As a result, the power conversion device 1 can protect the transistors SW1 to SW4.

[0058] 7 shows an example of the operation of the gate block signal generating unit 46. When the absolute value |i_u| of the current i_u reaches a predetermined threshold Ith, the gate block signal generating unit 46 sets the gate block signal Gu to a low level for a predetermined time Toff. This time Toff is expressed by the following equation EQ16.

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[0059] In this way, in the power conversion device 1, in addition to the control based on the effective value of the AC output voltage e_inv, the effective value of the current i_u, and the effective value of the load current i_load, the control is performed to turn off the transistors SW1 and SW2 for a short time when an instantaneous overcurrent occurs. For example, it is difficult to perform control against an instantaneous overcurrent as disclosed in the present disclosure in addition to the control based on the instantaneous values ​​of various voltages and the instantaneous times of various currents as described in Patent Document 1. That is, in such control based on instantaneous values, since synchronous operation is performed in the switching period, the sampling period, and the control period, turning off the transistors SW1 and SW2 for a short time in this way may cause a disturbance in the feedback control and cause the control loop to become unstable. Since the power conversion device 1 performs control based on the effective values, even if the transistors SW1 and SW2 are turned off for a short time in this way, the instantaneous disturbance is alleviated, so that the effect on the feedback control can be reduced.

[0060] The carrier signal generator 47 (FIG. 3) is configured to generate the carrier signal CR shown in FIG.

[0061] The gate signal generating section 50 is configured to generate gate signals S1 to S4 based on the signal d_inv*, the carrier signal CR, and the gate block signals Gu and Gw.

[0062] 8 shows an example of the configuration of the gate signal generating section 50. The gate signal generating section 50 includes a comparing section 51, an adding section 52, a PWM signal generating section 53, and a signal generating section .

[0063] The comparison unit 51 is configured to generate the duty ratio d_w by comparing the value of "Sin(θsd)" with "0". When the value of Sin(θsd) is greater than "0" (Sin(θsd)>0), the comparison unit 51 sets the duty ratio d_w to "0", and when the value of Sin(θsd) is less than "0" (Sin(θsd)<0), the comparison unit 51 sets the duty ratio d_w to "1". In this way, the comparison unit 51 generates the duty ratio d_w that transitions between "1" and "0" at the zero-cross timing of Sin(θsd).

[0064] The adder 52 is configured to generate the duty ratio d_u by adding the signal d_inv* supplied from the multiplier 45 (FIG. 3) and the duty ratio d_w.

[0065] The PWM signal generating unit 53 is configured to generate the gate signals S1 and S2 shown in Fig. 2C and 2D based on the duty ratio d_u and the carrier signal CR. When the gate block signal Gu is at a high level, the PWM signal generating unit 53 generates the gate signals S1 and S2, which are PWM signals, based on the duty ratio d_u, and when the gate block signal Gu is at a low level, generates the gate signals S1 and S2 at a low level. When generating the gate signals S1 and S2 based on the duty ratio d_u, the PWM signal generating unit 53 provides a period having a predetermined time (dead time Td) during which both the gate signals S1 and S2 are at a low level between a period during which the gate signal S1 is at a high level and a period during which the gate signal S2 is at a high level, based on information about the dead time Td.

[0066] The signal generating unit 54 is configured to generate the gate signals S3 and S4 shown in Fig. 2E and 2F based on the duty ratio d_w. When the gate block signal Gw is at a high level, the signal generating unit 54 generates the gate signals S3 and S4 based on the duty ratio d_w, and when the gate block signal Gw is at a low level, the signal generating unit 54 generates the gate signals S3 and S4 at a low level. When generating the gate signals S3 and S4 based on the duty ratio d_w, the signal generating unit 54 provides a period having a predetermined time (dead time Td) during which both the gate signals S3 and S4 are at a low level between a period during which the gate signal S3 is at a high level and a period during which the gate signal S4 is at a high level, based on information about the dead time Td.

[0067] FIG. 9 shows an example of the operation of the gate signal generating unit 50, where (A) shows the waveform of the signal d_inv*, (B) shows the waveform of the duty ratio d_w, and (C) shows the waveform of the duty ratio d_u. The comparing unit 51 generates the duty ratio d_w by comparing the value of "Sin(θsd)" with "0" (FIG. 9(B)). The adding unit 52 generates the duty ratio d_u by adding the signal d_inv* and the duty ratio d_w supplied from the multiplying unit 45 (FIG. 9(C)). The PWM signal generating unit 53 generates the gate signals S1 and S2 (FIG. 2(C) and (D)) based on the duty ratio d_u (FIG. 2(A)) and the carrier signal CR (FIG. 2(B)). The signal generating unit 54 generates the gate signals S3 and S4 (FIG. 2(E) and (F)) based on the duty ratio d_w.

[0068] Here, the switching unit 23 corresponds to a specific example of a "switching unit" in the present disclosure. The transistors SW1 to SW4 correspond to specific examples of "first to fourth switching elements" in the present disclosure. The input terminals T11 and T12 correspond to an "input terminal" in the present disclosure. The input terminal T11 corresponds to a specific example of a "first connection terminal" in the present disclosure. The input terminal T12 corresponds to a specific example of a "second connection terminal" in the present disclosure. The node N1 corresponds to a specific example of a "first node" in the present disclosure. The node N2 corresponds to a specific example of a "second node" in the present disclosure. The output terminals T21 and T22 correspond to an "output terminal" in the present disclosure. The low-pass filter 25 corresponds to a "low-pass filter" in the present disclosure. The control unit 30 corresponds to a "control unit" in the present disclosure.

[0069] The duty ratio d_u corresponds to a "duty ratio" in the present disclosure. The AC output voltage e_inv corresponds to a specific example of an "AC output voltage" in the present disclosure. The effective voltage value X_inv corresponds to a specific example of an "effective voltage value" in the present disclosure. The effective voltage command value X_inv* corresponds to a specific example of a "first effective voltage command value" in the present disclosure. The effective voltage command value X_invlim* corresponds to a specific example of a "second effective voltage command value" in the present disclosure. The DC component command value X_invdc* corresponds to a specific example of a "DC component command value" in the present disclosure. The DC component value X_invdc corresponds to a specific example of a "first DC component value" in the present disclosure. The DC component value X_invdclim corresponds to a specific example of a "second DC component value" in the present disclosure. The load current i_load corresponds to a specific example of a "load current" in the present disclosure. The effective load current value X_load corresponds to a specific but not limitative example of "effective load current value" in the disclosure.

[0070] [Actions and Actions] Next, the operation and function of the power conversion device 1 of the present embodiment will be described.

[0071] (Overview of overall operation) First, an overview of the overall operation of the power conversion device 1 will be described with reference to Figs. 1 and 2. When performing independent operation, the power conversion device 1 turns on the switches 29U and 29W. This connects the load device LOAD to the power conversion device 1. The control unit 30 generates gate signals S1 to S4 by performing arithmetic processing based on the AC output voltage e_inv, the current i_u, and the DC bus voltage Vdc. The transistors SW1 to SW4 are turned on and off based on the gate signals S1 to S4, respectively. The control unit 30 performs constant voltage amplitude control so that the voltage amplitude of the AC output voltage e_inv becomes a predetermined amplitude.

[0072] (Details of operation) The control unit 30 samples the AC output voltage e_inv, the current i_u, and the DC bus voltage Vdc at a sampling period (e.g., 50 μsec (=1 / 20 kHz)) according to the sampling frequency fs and performs AD conversion to obtain digital values ​​indicating the AC output voltage e_inv, the current i_u, and the DC bus voltage Vdc, respectively. Then, the control unit 30 performs arithmetic processing based on these digital values.

[0073] The command value generating unit 31 (FIG. 3) generates an effective voltage command value X_inv* which is a command value for the effective voltage value of the AC output voltage e_inv, and a DC component command value X_invdc* which is a command value for the DC component value of the AC output voltage e_inv. The effective value calculating unit 32 calculates the effective voltage value X_inv by calculating the effective value of the AC output voltage e_inv based on the detected AC output voltage e_inv. The effective value calculating unit 33 calculates the effective current value X_u by calculating the effective value of the detected current i_u based on the detected current i_u. The load current estimating unit 34 estimates the load current i_load based on the detected AC output voltage e_inv and the detected current i_u. The effective value calculating unit 35 calculates the effective load current value X_load by calculating the effective value of the load current i_load based on the estimated load current i_load. The DC component calculation unit 36 ​​calculates the DC component value X_invdc by calculating the average value of the AC output voltage e_inv based on the detected AC output voltage e_inv. The limiter 37 generates the effective voltage command value X_invlim* by limiting the effective voltage command value X_inv* to a predetermined value. The AC voltage control unit 38 generates the effective current command value X_u*, which is a command value of the effective current value X_u, by controlling the effective voltage value X_inv based on the effective voltage command value X_invlim* and the effective voltage value X_inv so that the effective voltage value X_inv becomes equal to the effective voltage command value X_invlim*. The AC current control unit 39 generates the output current command value X_L* by controlling the effective current value X_u based on the effective current command value X_u* and the effective current values ​​X_u,X_load so that the effective current value X_u becomes equal to the effective current command value X_u*. The limiter 41 generates an effective voltage value X_invlim by limiting the effective voltage value X_inv to a predetermined value. The limiter 42 generates a DC component value X_invdclim by limiting the DC component value X_invdc to a value according to the effective voltage command value X_invlim*.The DC component control unit 43 generates a DC component command value X_dc* by controlling the DC component value X_invdclim based on the DC component command value X_invdc* and the DC component value X_invdclim so that the DC component value X_invdclim becomes equal to the DC component command value X_invdc*. The adder 44 generates a signal D_u* by adding the output current command value X_L*, the DC component command value X_dc*, and the effective voltage value X_inv. The multiplier 45 generates a signal d_inv* by multiplying the signal D_u* by the value of "Sin(θsd)". The gate block signal generator 46 generates gate block signals Gu, Gw. The carrier signal generator 47 generates a carrier signal CR. The gate signal generator 50 generates gate signals S1 to S4 based on the signal d_inv*, the carrier signal CR, and the gate block signals Gu, Gw.

[0074] The operation and function of the power conversion device 1 will be described below using some simulation results.

[0075] 10 shows an example of an operation of the power conversion device 1 when a load suddenly changes. In this example, at a timing t11, the load device LOAD is connected to the power conversion device 1, and the load current i_load starts to flow. At this time, the AC output voltage e_inv is not affected by the load suddenly changes and maintains an AC voltage of a nearly constant amplitude.

[0076] In the power conversion device 1, the effective voltage value X_inv, the effective current value X_u, and the effective load current value X_load are calculated by calculating moving average values ​​using the third equation of the equations EQ5, EQ7, and EQ8. This enables the power conversion device 1 to respond in a short time to a sudden load change and stabilize the AC output voltage e_inv.

[0077] That is, for example, if the effective voltage value X_inv, the effective current value X_u, and the effective load current value X_load are calculated for each time Tsd (FIG. 2) without calculating the moving average value, the AC output voltage e_inv may be affected by a sudden load change as shown in FIG. 11. In this example, at timing t12, the load device LOAD is connected to the power conversion device, and the load current i_load starts to flow. After this timing t12, the AC output voltage e_inv is slightly disturbed, and stabilizes after a time of about two periods of the AC output voltage e_inv has passed. In this way, if the moving average value is not used, the response time to a sudden load change may be long.

[0078] On the other hand, the power conversion device 1 calculates the effective voltage value X_inv, the effective current value X_u, and the effective load current value X_load by calculating moving average values, thereby enabling the power conversion device 1 to shorten the response time to a sudden load change.

[0079] Fig. 12 shows an example of the operation of the power conversion device 1 when the load device LOAD has a half-wave rectification load, where (A) shows the waveform of the load current i_load, (B) shows the waveform of the AC output voltage e_inv, and (C) shows the waveform of the absolute value |e_inv| of the AC output voltage e_inv. Since the load device LOAD has a half-wave rectification load, as shown in Fig. 12(A), the load current i_load flows in half the period of the cycle period of the AC output voltage e_inv, and the load current i_load does not flow in the remaining half. Even in this case, the positive peak value and the negative peak value of the AC output voltage e_inv can be made almost the same, as shown in Figs. 12(B) and (C).

[0080] The power conversion device 1 is provided with a DC component control unit 43 to adjust the DC component of the AC output voltage e_inv. As a result, even when the load device LOAD has a half-wave rectifier load, the power conversion device 1 adjusts the DC component of the AC output voltage e_inv, so that the positive peak value and the negative peak value of the AC output voltage e_inv can be made substantially the same.

[0081] That is, for example, if the DC component control unit 43 is not provided, the positive peak value and the negative peak value of the AC output voltage e_inv will be shifted as shown in Fig. 13. In this example, the peak value of the AC output voltage e_inv during the period when the load current i_load flows is lower than the peak value of the AC output voltage e_inv during the period when the load current i_load does not flow. In this case, when such an AC output voltage e_inv is supplied to multiple load devices, it may affect the other load devices.

[0082] On the other hand, since the power conversion device 1 is provided with the DC component control unit 43, the DC component of the AC output voltage e_inv is adjusted. This makes it possible to make the positive peak value and the negative peak value of the AC output voltage e_inv approximately the same. As a result, even when the AC output voltage e_inv is supplied to a plurality of load devices, the power conversion device 1 can prevent the operation of the other load devices from being affected.

[0083] FIG. 14 shows an example of an operation of the power conversion device 1 during an overload in which the output power of the power conversion device 1 is greater than the input power of the power conversion device 1, where (A) shows the waveform of the AC output voltage e_inv, (B) shows the waveform of the load current i_load, and (C) shows the waveform of the DC bus voltage Vdc. In this example, the load device LOAD is connected to the power conversion device 1 at timing t13. As a result, the power conversion device 1 attempts to supply power to the load device LOAD based on the power supplied from the DC power source PDC in the previous stage of the power conversion device 1. However, in this example, the response of this DC power source PDC is slow, and the DC power source PDC cannot immediately supply power to the power conversion device 1. In this case, the power supply capacity of the DC power source PDC is transiently insufficient, so the power conversion device 1 supplies power to the load device LOAD by effectively utilizing the power stored in the input capacitor 22. As a result, the DC bus voltage Vdc transiently drops (FIG. 14(C)). At this time, the power conversion device 1 operates the switching unit 23 with the maximum pulse width of the PWM signal. In other words, the power conversion device 1 supplies power to the load device LOAD by operating with the maximum possible duty ratio. During such an overload, the amplitude of the AC output voltage e_inv becomes small, but the waveform maintains a sine wave (FIG. 14(A)). Then, when the DC power supply PDC responds, the DC power supply PDC supplies power to the power conversion device 1, and the DC bus voltage Vdc gradually returns to its original voltage. In response to this, the AC output voltage e_inv also gradually returns to its original amplitude.

[0084] FIG. 15 shows an example of an operation of the power conversion device 1 in the case where the load device LOAD has a nonlinear load, where (A) shows the waveform of the AC output voltage e_inv and (B) shows the waveform of the load current i_load. In this example, the load device LOAD is connected to the power conversion device 1 at timing t14. As a result, as shown in FIG. 15(B), an instantaneous overcurrent may occur in the load current i_load due to charging and discharging of the capacitor 101 (FIG. 6) of the load device LOAD. When the absolute value |i_u| of the current i_u reaches a predetermined threshold value Ith (75 A in this example), the power conversion device 1 turns off the transistors SW1 and SW2 in the switching unit 23 for a predetermined short time by setting the gate block signal Gu to a low level. This suppresses the output current, so that the load current i_load does not become a large current instantaneously. In this way, the power conversion device 1 protects the transistors SW1 to SW4. As the charging of the capacitor 101 of the load device LOAD progresses, the instantaneous overcurrent decreases, and the amplitude of the AC output voltage e_inv gradually returns to its original amplitude.

[0085] 15A is similar to the waveform of the system voltage when the commercial system voltage supplies power to a nonlinear load. Therefore, even if the power conversion device 1 supplies such an AC output voltage e_inv to a general household load device, the load device can operate without any problem.

[0086] In this way, the power conversion device 1 generates a first effective voltage command value (effective voltage command value X_inv*) which is a command value for the effective voltage value of the AC output voltage e_inv at the output terminals T21 and T22, generates a second effective voltage command value (effective voltage command value X_invlim*) by limiting this first effective voltage command value at a predetermined value, and controls the operation of the switching unit 23 based on the second effective voltage command value (effective voltage command value X_invlim*) and the effective voltage value X_inv. Specifically, the power conversion device 1 calculates the duty ratio d_u based on the second effective voltage command value (effective voltage command value X_invlim*) and the effective voltage value X_inv, and controls the operation of the switching unit 23 based on the duty ratio d_u. As a result, the power conversion device 1 can maintain the waveform of the AC output voltage e_inv as a sine wave not only during normal operation but also during overload when the output power is greater than the input power.

[0087] That is, for example, as described in Patent Document 1, when the operation of the switching unit is controlled based on the instantaneous values ​​of various voltages and the instantaneous times of various currents, there may be a method of cutting the peak value of the output current during an overload. However, in this case, the peak value of the output current is cut, and the peak value of the output voltage is also cut, so that the waveform of the AC output voltage e_inv approaches a square wave, and the waveform distortion increases. In the load device LOAD supplied with such an AC output voltage e_inv, there is a possibility that a malfunction may occur.

[0088] On the other hand, in the power conversion device 1, the second effective voltage command value (effective voltage command value X_invlim*) is generated by limiting the first effective voltage command value to a predetermined value, and the duty ratio d_u is calculated based on the second effective voltage command value (effective voltage command value X_invlim*) and the effective voltage value X_inv. This makes it possible to maintain the waveform of the AC output voltage e_inv as a sine wave as shown in FIG. 14 not only during normal operation but also during overload. As a result, in the power conversion device 1, it is possible to reduce waveform distortion of the AC output voltage.

[0089] In the power conversion device 1, the effective voltage value X_inv is calculated by calculating a moving average value based on the AC output voltage e_inv. This makes it possible to shorten the response time to a sudden load change compared to the case where the effective voltage value X_inv is calculated at each time Ts without calculating a moving average value, as shown in Figs. 10 and 11.

[0090] In the power conversion device 1, a second DC component value (DC component value X_invdclim) is generated by limiting the first DC component value (DC component value X_invdc), which is the DC component value of the AC output voltage e_inv, to a value corresponding to the second effective voltage command value (effective voltage command value X_invlim*), and a DC component command value X_invdc*, which is a command value for the DC component value of the AC output voltage e_inv, is generated, and the operation of the switching unit 23 is controlled based on the second effective voltage command value (effective voltage command value X_invlim*) and the effective voltage value X_inv, the DC component command value X_invdc* and the second DC component value (DC component value X_invdclim). As a result, for example, when the load device LOAD has a half-wave rectifier load, the power conversion device 1 can adjust the DC component of the AC output voltage e_inv to make the positive peak value and the negative peak value of the AC output voltage e_inv approximately the same as shown in Fig. 12. Therefore, even when the AC output voltage e_inv is supplied to a plurality of load devices, the power conversion device 1 can prevent the operation of the other load devices from being affected by the DC component of the AC output voltage e_inv.

[0091] Furthermore, in the power conversion device 1, when the current flowing between the node N1 and the low-pass filter reaches a predetermined threshold value Ith, the operation of the switching unit 23 is controlled so that the switching unit 23 does not output a current for a predetermined time period (time Toff). As a result, for example, when the load device LOAD has a nonlinear load, as shown in FIG. 15, the load current i_load can be suppressed while continuing operation, and the transistors SW1 to SW4 can be protected.

[0092] That is, for example, the power conversion device may be configured to stop operation when an instantaneous overcurrent occurs. However, in this case, if the load device LOAD has a nonlinear load, instantaneous overcurrent may occur repeatedly, and the power conversion device may repeatedly stop and restart operation, making it impossible to continue operation.

[0093] On the other hand, in the power conversion device 1, when the current i_u flowing between the switching unit 23 and the low-pass filter 25 reaches a predetermined threshold value Ith, the operation of the switching unit 23 is controlled so that the switching unit 23 does not output a current for a predetermined time period (time Toff). This allows the power conversion device 1 to perform continuous operation even when the load device LOAD has a nonlinear load.

[0094] [effect] As described above, in the present embodiment, a first effective voltage command value, which is a command value for the effective voltage value of the AC output voltage at the output terminal, is generated, this first effective voltage command value is limited to a predetermined value to generate a second effective voltage command value, and the operation of the switching unit is controlled based on the second effective voltage command value and the effective voltage value, thereby making it possible to reduce waveform distortion of the AC output voltage.

[0095] In this embodiment, the effective voltage value is calculated by calculating a moving average value based on the AC output voltage, so that the response time to a sudden change in load can be shortened.

[0096] In this embodiment, a second DC component value is generated by limiting a first DC component value, which is a DC component value of the AC output voltage, to a value corresponding to a second effective voltage command value, a DC component command value, which is a command value for the DC component value of the AC output voltage, is generated, and the operation of the switching unit is controlled based on the second effective voltage command value and effective voltage value, and the DC component command value and second DC component value.Therefore, even when the AC output voltage is supplied to a plurality of load devices, it is possible to prevent the operation of the other load devices from being affected.

[0097] In this embodiment, when the current flowing between the switching unit and the low-pass filter reaches a predetermined threshold value, the operation of the switching unit is controlled so that the switching unit does not output current for a predetermined period of time, thereby protecting the transistor.

[0098] [Variation 1] In the above embodiment, the parameter a in the formula EQ6 is set to "0.5". As a result, the effective value calculation unit 32 calculates the effective voltage value X_inv by calculating a moving average value based on the AC output voltage e_inv during the time (time Tsd / 2) of the half cycle of the AC output voltage e_inv. Similarly, the effective value calculation unit 33 calculates the effective current value X_u by calculating a moving average value based on the current i_u during the time (time Tsd / 2) of the half cycle of the AC output voltage e_inv. The effective value calculation unit 35 calculates the effective load current value X_load by calculating a moving average value based on the load current i_load during the time (time Tsd / 2) of the half cycle of the AC output voltage e_inv. However, this is not limited to this. Instead of this, for example, the parameter a may be set to "1". As a result, the effective value calculation unit 32 can calculate the effective voltage value X_inv by calculating a moving average value based on the AC output voltage e_inv during a time period (time Tsd) for one cycle of the AC output voltage e_inv, the effective value calculation unit 33 can calculate the effective current value X_u by calculating a moving average value based on the current i_u during a time period (time Tsd) for one cycle of the AC output voltage e_inv, and the effective value calculation unit 35 can calculate the effective load current value X_load by calculating a moving average value based on the load current i_load during a time period (time Tsd) for one cycle of the AC output voltage e_inv.

[0099] [Variation 2] In the above embodiment, the effective voltage value X_inv, the effective current value X_u, and the effective load current value X_load are calculated by calculating the moving average value using the third equation of the equations EQ5, EQ7, and EQ8, but the present invention is not limited to this. Instead of this, for example, the effective voltage value X_inv, the effective current value X_u, and the effective load current value X_load may be calculated, for example, for each half-cycle time (time Tsd / 2) of the AC output voltage e_inv, using the second equation of the equations EQ5, EQ7, and EQ8, without calculating the moving average value. Also, for example, the effective voltage value X_inv, the effective current value X_u, and the effective load current value X_load may be calculated, for example, for each one-cycle time (time Tsd) of the AC output voltage e_inv, using the second equation of the equations EQ5, EQ7, and EQ8, without calculating the moving average value.

[0100] [Variation 3] In the above embodiment, the limiter 42 limits the DC component value X_invdc to a value corresponding to the effective voltage command value X_invlim* based on the equation EQ14, but the present invention is not limited to this. Instead, for example, the limiter 42 may limit the DC component value X_invdc to a value corresponding to the effective voltage command value X_inv* based on the following equation EQ17.

number

[0101] [Variation 4] In the above embodiment, as shown in Fig. 1, the current sensor 24 is provided in the path connecting the node N1 and the low-pass filter 25, but the present invention is not limited to this. Instead of this, for example, as in the power conversion device 1A shown in Fig. 16, a current sensor 24A may be provided in the path connecting the node N2 and the low-pass filter 25. This power conversion device 1A includes the current sensor 24A and a control unit 30A.

[0102] The current sensor 24A is provided in a path connecting the node N2 and the low-pass filter 25, and is configured to detect a current i_w flowing in this path. One end of the current sensor 24A is connected to the node N2, and the other end is connected to the other end of the capacitor 27. The current sensor 24A detects the current i_w so that it is positive when it flows from the low-pass filter 25 toward the node N2. The current sensor 24A supplies the detection result of the current i_w to the control unit 30A.

[0103] The control unit 30A generates the gate signals S1 to S4 by performing arithmetic processing based on the AC output voltage e_inv, the current i_w, and the DC bus voltage Vdc. The control unit 30A performs various arithmetic operations using equations in which the current i_u in each equation according to the above embodiment is replaced with the current i_w.

[0104] 17, a current sensor 24 may be provided in a path connecting node N1 and low-pass filter 25, and a current sensor 24A may be provided in a path connecting node N2 and low-pass filter 25. This power conversion device 1B includes current sensors 24, 24A, and a control unit 30B.

[0105] The control unit 30B generates the gate signals S1 to S4 by performing calculations based on the AC output voltage e_inv, the currents i_u and i_w, and the DC bus voltage Vdc. The control unit 30B performs various calculations using equations in which the current i_u in each equation according to the above embodiment is replaced with an average value of the current i_u and the current i_w.

[0106] [Variation 5] In the above embodiment, the transistors SW1 and SW2 are subjected to PWM control, but the present invention is not limited to this, and instead, the transistors SW3 and SW4 may be subjected to PWM control as well. A power conversion device 1C according to this modification will be described in detail below.

[0107] 18 shows an example of a configuration of a power conversion device 1C. The power conversion device 1C includes a low-pass filter 25C and a control unit 30C.

[0108] The low-pass filter 25C has AC reactors 26 and 66 and a capacitor 27. The AC reactor 66 is provided in a path connecting the node N2 and the output terminal T22, with one end connected to the node N2 and the other end connected to the voltage line WL. Like the AC reactor 26, the AC reactor 66 has an inductance Linv and an internal resistance Rinv.

[0109] The control unit 30C generates gate signals S1 to S4 by performing arithmetic processing based on the AC output voltage e_inv, the current i_u, and the DC bus voltage Vdc. The control unit 30C includes a gate signal generating unit 50C, similar to the control unit 30 (FIG. 3) according to the above embodiment.

[0110] 19 shows an example of the configuration of the gate signal generating section 50 C. The gate signal generating section 50 C has a multiplication section 62 and PWM signal generating sections 53 and 63.

[0111] The multiplication unit 62 is configured to generate a duty ratio d_w by multiplying the signal Finv by the signal d_inv*. The signal Finv can take the value "1" or "-1." When the signal Finv is "1," the power conversion device 1C performs a bipolar PWM operation. When the signal Finv is "-1," the power conversion device 1C performs a unipolar PWM operation.

[0112] The PWM signal generating unit 53 is configured to use the signal d_inv* as a duty ratio d_u, and to generate the gate signals S1, S2 based on the duty ratio d_u and the carrier signal CR.

[0113] The PWM signal generating unit 63 is configured to generate the gate signals S3 and S4 based on the duty ratio d_w and the carrier signal CR.

[0114] [Variation 6] In the above embodiment, as shown in Fig. 3, the DC component control unit 43 is provided to adjust the DC component of the AC output voltage e_inv, but this is not limited to this, and instead, for example, the DC component of the AC output voltage e_inv may not be adjusted. The power conversion device according to this modification will be described in detail below. This power conversion device includes a control unit 30D.

[0115] 20 shows an example of the configuration of the control unit 30D. The control unit 30D includes a command value generating unit 31D, effective value calculating units 32 and 33, a load current estimating unit 34, an effective value calculating unit 35, a limiter 37, an AC voltage control unit 38, an AC current control unit 39, a limiter 41, an adder 44D, a multiplier 45, a gate block signal generating unit 46, a carrier signal generating unit 47, and a gate signal generating unit 50. That is, the control unit 30D is obtained by removing the limiter 42 and the DC component control unit 43 from the control unit 30 (FIG. 3) according to the above embodiment, changing the command value generating unit 31 to the command value generating unit 31D, and changing the adder 44 to the adder 44D.

[0116] The command value generating unit 31D is configured to generate an effective voltage command value X_inv* that is a command value for the effective voltage value of the AC output voltage e_inv. The adding unit 44D is configured to generate a signal D_u* by adding the output current command value X_L* and the effective voltage value X_invlim.

[0117] Such a power conversion device is used, for example, when supplying power only to a load device LOAD having a predetermined characteristic or a predetermined use. Such a power conversion device can be applied, for example, to an uninterruptible power supply for a personal computer that supplies power to the personal computer. The DC component of the AC output voltage e_inv can be made not to affect the operation of such a load device LOAD. Specifically, the DC component of the AC output voltage e_inv can be made to fall within ±1% of the rated output voltage, for example.

[0118] Although the present invention has been described above by way of the embodiments and modifications, the present invention is not limited to these embodiments and can be modified in various ways.

[0119] For example, the value of the period (time Tsd) of the AC output voltage e_inv, the value of the switching period (time Ts) of the transistors SW1 and SW2, and the value of the sampling frequency fs are merely examples and may be changed as appropriate. [Explanation of symbols]

[0120] 1, 1A, 1B, 1C...power conversion device, 21...voltage sensor, 22...input capacitor, 23...switching unit, 24, 24A...current sensor, 25, 25C...low-pass filter, 26...AC reactor, 27...capacitor, 28...voltage sensor, 29U, 29W...switch, 30, 30A, 30B, 30C, 30D...control unit, 31, 31D...command value generation unit, 32, 33, 35...effective value calculation unit, 34...load current estimation unit, 36...DC component calculation unit, 37, 41, 42...limiter, 38...AC voltage control unit, 39...AC current control unit, 43...DC component control unit, 44, 44D...addition unit, 45...multiplication unit, 46...gate block signal generation unit, 47...carrier signal generation unit, 50, 50C...gate signal generation unit, 51...comparison unit, 52...addition unit, 53, 63...PWM signal generation unit, 54...signal generation unit, 62... Multiplication section, 66...AC reactor, CR...carrier signal, d_u, d_w...duty ratio, e_inv...AC output voltage, i_load...load current, i_u, i_w...current, Gu, Gw...gate block signal, LOAD...load device, L1...voltage line, L2...reference voltage line, N1, N2...node, PDC...DC power supply, Ssd...switch control signal, SW1 to SW4...transistor, S1 to S4...gate signal, Td...dead time, T11,T12...input terminal, T21,T22...output terminal, UL,WL...voltage line, Vdc...DC bus voltage, X_inv,X_invlim...effective voltage value, X_invdc,X_invdclim...DC component value, Xinvdc*...DC component command value, X_inv*,X_invlim*...effective voltage command value, X_load...effective load current value, X_u...effective current value.

Claims

1. an input terminal having a first connection terminal and a second connection terminal; a switching unit including a first switching element provided on a path connecting the first connection terminal and a first node, a second switching element provided on a path connecting the first node and the second connection terminal, a third switching element provided on a path connecting the first connection terminal and the second node, and a fourth switching element provided on a path connecting the second node and the second connection terminal; An output terminal; a low-pass filter provided on a path connecting the first node and the second node to the output terminal; A control unit that controls an operation of the switching unit; Equipped with The control unit is generating a first effective voltage command value which is a command value for an effective voltage value of the AC output voltage at the output terminal based on a preset setting value for an effective voltage value of the AC output voltage at the output terminal, generating a second effective voltage command value by limiting the first effective voltage command value to a predetermined value, and controlling an operation of the switching unit based on the second effective voltage command value and the effective voltage value; The first effective voltage command value, the second effective voltage command value, and the effective voltage value are normalized using a terminal-to-terminal voltage between the first connection terminal and the second connection terminal, and an operation of the switching unit is controlled using the normalized first effective voltage command value, the normalized second effective voltage command value, and the normalized effective voltage value. Power conversion equipment.

2. The control unit calculates a duty ratio based on the second effective voltage command value and the effective voltage value, and controls an operation of the switching unit based on the duty ratio. The power conversion device according to claim 1 .

3. The control unit calculates the effective voltage value by calculating a moving average value based on the AC output voltage. The power conversion device according to claim 1 or 2.

4. The control unit calculates the effective voltage value based on the AC output voltage during a period corresponding to a half cycle of the AC output voltage. The power conversion device according to any one of claims 1 to 3.

5. The control unit calculates the effective voltage value based on the AC output voltage during one cycle of the AC output voltage. The power conversion device according to any one of claims 1 to 3.

6. The control unit generates a second DC component value by limiting a first DC component value, which is a DC component value of the AC output voltage, with a value corresponding to the second effective voltage command value, generates a DC component command value, which is a command value for the DC component value, and controls an operation of the switching unit based on the second effective voltage command value and the effective voltage value, and on the DC component command value and the second DC component value. The power conversion device according to any one of claims 1 to 5.

7. The control unit estimates a load current flowing through the output terminal based on a current flowing between the switching unit and the low-pass filter and the AC output voltage, and controls an operation of the switching unit based on the second effective voltage command value and the effective voltage value, the DC component command value and the second DC component value, and the estimated effective current value of the load current. The power converter according to claim 6.

8. The control unit controls an operation of the switching unit so that the switching unit does not output a current for a predetermined time period when a current flowing between the switching unit and the low-pass filter reaches a predetermined threshold value. The power conversion device according to any one of claims 1 to 7.

9. The power conversion device according to any one of claims 1 to 8, a DC power supply connected to the input terminal of the power conversion device; Equipped with Power conversion systems.

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