Laminated Structure

Abstract

This laminated structure comprises a substrate and a gallium nitride film disposed on the substrate. The arithmetic mean roughness (Ra) of the substrate surface is less than 0.33 nm. Alternatively, the laminated structure comprises: a substrate; an alignment layer which is disposed on the substrate and which has a c-axis orientation or a (111) orientation of a face-centered cubic structure; and a gallium nitride film disposed on the alignment layer. The arithmetic mean roughness (Ra) of the substrate surface is less than 0.33 nm. Alternatively, the laminated structure comprises: a substrate; a protective layer disposed on the substrate; an alignment layer which is disposed on the protective layer and which has a c-axis orientation or a (111) orientation of a face-centered cubic structure; and a gallium nitride film disposed on the alignment layer. The arithmetic mean roughness (Ra) of the substrate surface is less than 0.33.

Description

[Technical field]

[0001] One embodiment of the present invention relates to a layered structure including a gallium nitride film formed on a substrate. [Background technology]

[0002] Gallium nitride (GaN) is a direct transition semiconductor with a large band gap. Taking advantage of this characteristic of gallium nitride, light-emitting diodes (LEDs) using gallium nitride have already been put to practical use. Gallium nitride also has the characteristic of high electron saturation mobility and high breakdown voltage. In recent years, the characteristics of gallium nitride have been utilized to develop transistors for use in high-frequency power devices. The gallium nitride film of light-emitting diodes or transistors is generally formed on a sapphire substrate at high temperatures of 800°C to 1000°C using MOCVD (Metal Organic Chemical Vapor Deposition) or HVPE (Hydride Vapor Phase Epitaxy).

[0003] In recent years, the development of so-called micro LED display devices or mini LED display devices, which are next-generation display devices that incorporate tiny light-emitting diode chips in the pixels of a circuit board, has been progressing. The micro LED display devices or mini LED display devices have high efficiency, high brightness, and high reliability. Such micro LED display devices or mini LED display devices are manufactured by transferring LED chips to a backplane on which transistors using oxide semiconductors or low-temperature polysilicon or the like are formed (see, for example, Patent Document 1). In addition, a method of forming a transistor containing gallium nitride and a light-emitting diode on the same substrate has also been considered (see, for example, Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] U.S. Patent No. 8,791,474 [Patent Document 2] US Patent Application Publication No. 2020 / 0075664 Summary of the Invention [Problem to be solved by the invention]

[0005] As mentioned above, gallium nitride films are generally formed on sapphire substrates at high temperatures. Large-area substrates such as amorphous glass substrates have low heat resistance, and gallium nitride films formed at low temperatures have low crystallinity. There is also the problem that it is difficult to provide a large-area backplane.

[0006] In view of the above problems, one object of one embodiment of the present invention is to provide a layered structure in which a highly crystalline gallium nitride film is formed on a substrate that can be made large in area. [Means for solving the problem]

[0007] A laminated structure according to one embodiment of the present invention includes a substrate and a gallium nitride film on the substrate, and the arithmetic mean roughness (Ra) of the surface of the substrate is less than 0.33 nm.

[0008] A laminated structure according to one embodiment of the present invention includes a substrate, an orientation layer having a c-axis orientation or a (111) orientation of a face-centered cubic structure on the substrate, and a gallium nitride film on the orientation layer, and the arithmetic mean roughness (Ra) of the surface of the substrate is less than 0.33 nm.

[0009] A laminated structure according to one embodiment of the present invention includes a substrate, a protective layer on the substrate, an orientation layer having a c-axis orientation or a face-centered cubic (111) orientation on the protective layer, and a gallium nitride film on the orientation layer, and the arithmetic mean roughness (Ra) of the surface of the substrate is less than 0.33 nm. [Brief description of the drawings]

[0010] [Figure 1] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Diagram 2] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Diagram 3] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Figure 4] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Diagram 5] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Figure 6] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Figure 7] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Figure 8] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Figure 9] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Figure 10] 1 is a schematic diagram showing a configuration of a laminated structure according to one embodiment of the present invention. [Figure 11] 1 is a schematic diagram showing the configuration of a light-emitting element using a laminated structure according to one embodiment of the present invention. [Figure 12] 1 is a schematic diagram showing the configuration of a semiconductor device using a stacked structure according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that each embodiment is merely an example, and those that a person skilled in the art can easily come up with by appropriately modifying the invention while keeping the gist of the invention are naturally included in the scope of the present invention. In addition, in order to make the explanation clearer, the width, thickness, shape, etc. of each part may be shown diagrammatically compared to the actual embodiment. However, the illustrated shapes are merely examples and do not limit the interpretation of the present invention.

[0012] In this specification, unless otherwise specified, expressions such as "α includes A, B, or C," "α includes any one of A, B, and C," and "α includes one selected from the group consisting of A, B, and C" do not exclude cases where α includes multiple combinations of A to C. Furthermore, these expressions do not exclude cases where α includes other elements.

[0013] In this specification, for convenience of explanation, the terms "above" or "upper" or "lower" or "lower" are used for explanation, but in principle, the substrate on which the structure is formed is used as the reference, and the direction from the substrate to the structure is referred to as "above" or "upper". Conversely, the direction from the structure to the substrate is referred to as "lower" or "lower". Therefore, in the expression "structure on substrate", the surface of the structure facing the substrate is the lower surface of the structure, and the surface on the opposite side is the upper surface of the structure. In addition, in the expression "structure on substrate", the upper and lower relationship between the substrate and the structure is merely described, and other members may be disposed between the substrate and the structure. Furthermore, the terms "above" or "upper" or "lower" or "lower" refer to the order of stacking in a structure in which multiple layers are stacked, and do not necessarily have to be in a positional relationship of overlapping in a planar view.

[0014] In this specification, the letters "first," "second," or "third" attached to each component are convenient labels used to distinguish each component, and have no other meaning unless otherwise specified.

[0015] In this specification and drawings, the same reference numerals are used to collectively represent multiple identical or similar components, and lowercase or uppercase alphabets may be added to each of these components to distinguish them from one another. In addition, hyphens and natural numbers may be used to distinguish between multiple parts of one component.

[0016] The following embodiments can be combined with each other as long as no technical contradiction occurs.

[0017] First Embodiment 1 is a schematic diagram showing the configuration of a laminated structure according to one embodiment of the present invention. The laminated structure 10 includes a substrate 100 and a gallium nitride film 200. The gallium nitride film 200 is formed on the substrate 100 by sputtering.

[0018] The substrate 100 is a support substrate for the gallium nitride film 200. Since the gallium nitride film 200 of the laminated structure 10 is formed by sputtering, the substrate 100 only needs to have a heat resistance of, for example, about 600°C. Therefore, for example, an amorphous glass substrate can be used as the substrate 100. In addition, a resin substrate such as a polyimide substrate, an acrylic substrate, a siloxane substrate, or a fluororesin substrate can also be used as the substrate 100. Note that the amorphous glass substrate or the resin substrate is a substrate that can be made large in area. In addition, a polycrystalline substrate can also be used as the substrate 100. Since the polycrystalline substrate is larger than the sapphire substrate used in the normal deposition of the gallium nitride film, it can be used as a backplane like the glass substrate or the resin substrate.

[0019] The crystal growth of the gallium nitride film 200 on the substrate 100 such as amorphous glass is affected by the surface state of the substrate 100. In particular, the unevenness of the surface of the substrate 100 causes random crystal nuclei to be generated. As a result, the crystal growth of gallium nitride occurs in random directions, and adjacent crystals interfere with each other, hindering the crystal growth. Therefore, it is preferable that the substrate 100 has a smooth surface with few unevenness. For example, the arithmetic mean roughness (Ra) of the surface of the substrate 100 is preferably smaller than 0.33 nm. In addition, the root mean square roughness (Rq) of the surface of the substrate 100 is preferably smaller than 0.39 nm. When the surface roughness of the substrate 100 satisfies the above conditions, the crystallinity of the gallium nitride film 200 can be improved even if the substrate 100 is an amorphous glass substrate. In other words, the gallium nitride film 200 having the c-axis orientation (the orientation with the (0001) plane as the surface) can be formed on the substrate 100.

[0020] Here, the formation of the gallium nitride film 200 by sputtering will be described.

[0021] The substrate 100 is placed in a vacuum chamber facing the gallium nitride target. The composition ratio of gallium nitride in the gallium nitride target is preferably 0.7 to 2, both inclusive, of gallium to nitrogen. Nitrogen can be supplied to the vacuum chamber separately from the sputtering gas (argon, krypton, etc.). In this case, the composition ratio of gallium nitride in the gallium nitride target is preferably higher in gallium than in nitrogen. For example, nitrogen can be supplied using a nitrogen radical supply source. The sputtering power supply may be any of a DC power supply, an RF power supply, and a pulsed DC power supply.

[0022] The substrate 100 in the vacuum chamber may be heated. For example, the substrate 100 can be heated to 400° C. or higher and lower than 600° C. This substrate temperature can be applied to an amorphous glass substrate, which has low heat resistance. This substrate temperature is also lower than the film formation temperature in MOCVD or HVPE.

[0023] After the vacuum chamber is sufficiently evacuated, a sputtering gas is supplied. A voltage is applied between the substrate 100 and the gallium nitride target at a predetermined pressure to generate plasma, and the gallium nitride film 200 is formed. Since the gallium nitride film 200 is formed on the substrate 100 with controlled surface roughness, the gallium nitride film 200 has a c-axis orientation.

[0024] The laminated structure 10 according to this embodiment includes a gallium nitride film 200 that is highly crystalline and has a c-axis orientation. The laminated structure 10 also includes a substrate 100 that can be made large in area. Therefore, by using the laminated structure 10, it is possible to increase the productivity of LEDs that include gallium nitride, or to manufacture a backplane on which a transistor that includes gallium nitride is formed.

[0025] <Second embodiment> 2 is a schematic diagram showing the configuration of a stacked structure 20 according to one embodiment of the present invention. The stacked structure 20 includes a substrate 100, an alignment layer 300, and a gallium nitride film 200. The alignment layer 300 is provided on the substrate 100. The gallium nitride film 200 is formed on the alignment layer 300 by sputtering. In the following, when the configuration of the stacked structure 20 is similar to that of the stacked structure 10, the description thereof may be omitted.

[0026] The orientation layer 300 can improve the crystallinity of the gallium nitride film 200. That is, the orientation layer 300 can further improve the c-axis orientation of the gallium nitride film 200. Even on a smooth substrate 100, the gallium nitride film 200 having a hexagonal close-packed structure has a c-axis orientation so as to minimize the surface energy, but by providing the orientation layer 300 on the substrate 100, the c-axis orientation of the gallium nitride film 200 can be controlled. Specifically, the c-axis orientation of the gallium nitride film 200 is controlled by the type of material of the orientation layer 300. The orientation layer 300 can be made of a material having a hexagonal close-packed structure, a face-centered cubic structure, or a structure equivalent thereto. Here, the structure equivalent to the hexagonal close-packed structure or the face-centered cubic structure includes a crystal structure in which the c-axis is not 90° with respect to the a-axis and the b-axis. Materials having a hexagonal close-packed structure or a structure equivalent thereto can be oriented in the (0001) direction, i.e., the c-axis direction, relative to the substrate 100 (hereinafter referred to as the (0001) orientation of the hexagonal close-packed structure or the c-axis orientation). Materials having a face-centered cubic structure or a structure equivalent thereto can be oriented in the (111) direction relative to the substrate 100 (hereinafter referred to as the (111) orientation of the face-centered cubic structure). When the orientation layer 300 has a c-axis orientation or a (111) orientation of the face-centered cubic structure, the gallium nitride film 200 also tends to be c-axis oriented. For example, titanium (Ti), titanium nitride (TiN), etc. can be used as the orientation layer 300. x ), titanium dioxide (TiO x), graphene, zinc oxide (ZnO), magnesium diboride (MgB2), aluminum (Al), aluminum nitride (AlN), aluminum oxide (Al2O3), silver (Ag), calcium (Ca), nickel (Ni), copper (Cu), strontium (Sr), rhodium (Rh), palladium (Pd), cerium (Ce), ytterbium (Yb), iridium (Ir), platinum (Pt), gold (Au), lead (Pb), actinium (Ac), thorium (Th), lithium niobate (LiNbO), BiLaTiO, SrFeO, SrFeO, BiFeO, BaFeO, ZnFeO, PMnN-PZT, or biological apatite (BAp) can be used. In particular, it is preferable to use titanium, graphene, zinc oxide, aluminum nitride, or aluminum oxide as the alignment layer 300. The thickness of the alignment layer 300 is, for example, 50 nm or more. The method for forming the alignment layer 300 is not limited to sputtering. The alignment layer 300 can be formed using any method (apparatus) such as CVD.

[0027] As described above, the crystallinity of the gallium nitride film 200 is affected by the surface condition of the non-film-formed surface. That is, in the stacked structure 20, the gallium nitride film 200 is affected by the surface condition of the alignment layer 300. Therefore, it is preferable that the alignment layer 300 has a smooth surface with few irregularities. For example, it is preferable that the arithmetic mean roughness (Ra) of the surface of the alignment layer 300 is smaller than 2.3 nm. In addition, it is preferable that the root-mean-square roughness (Rq) of the surface of the alignment layer 300 is smaller than 2.9 nm. When the surface roughness of the alignment layer 300 satisfies the above conditions, the gallium nitride film 200 having the c-axis orientation can be formed.

[0028] Since the alignment layer 300 is formed on the substrate 100, the crystallinity of the alignment layer 300 is affected to some extent by the surface roughness of the substrate 100. Therefore, in the laminated structure 20, the substrate 100 preferably has a smooth surface with few irregularities. For example, the arithmetic mean roughness (Ra) of the surface of the substrate 100 is preferably smaller than 0.33 nm. In addition, the root mean square roughness (Rq) of the surface of the substrate 100 is preferably smaller than 0.39 nm.

[0029] The stacked structure 20 according to this embodiment includes a gallium nitride film 200 that is highly crystalline and has a c-axis orientation. The stacked structure 20 also includes a substrate 100 that can be made large in area. Therefore, by using the stacked structure 20, it is possible to increase the productivity of LEDs that include gallium nitride, or to manufacture a backplane on which a transistor that includes gallium nitride is formed.

[0030] <Third embodiment> 3 is a schematic diagram showing the configuration of a stacked structure 30 according to one embodiment of the present invention. The stacked structure 30 includes a substrate 100, a protective layer 400, an alignment layer 300, and a gallium nitride film 200. The protective layer 400 is provided on the substrate 100. The alignment layer 300 is provided on the protective layer 400. The gallium nitride film 200 is formed on the alignment layer 300 by sputtering. In the following, when the configuration of the stacked structure 30 is the same as that of the stacked structure 10 or the stacked structure 20, the description thereof may be omitted.

[0031] The protective layer 400 can prevent the diffusion of impurities from the substrate 100. Therefore, the alignment layer 300 formed on the protective layer 400 has a small amount of impurities and has improved crystallinity. The protective layer 400 can be made of, for example, silicon oxide (SiO x ) or silicon nitride (SiN x The protective layer 400 may be a single film or a laminated film. For example, if the substrate 100 is an amorphous glass substrate, a laminated film of silicon nitride and silicon oxide (SiO x / SiN x If the substrate 100 is a resin substrate, a laminated film (SiO x / SiN x / SiO x ) can be used.

[0032] In the laminated structure 30, the alignment layer 300 is formed on the protective layer 400, and therefore the crystallinity of the alignment layer 300 is affected by the surface roughness of the protective layer 400. Therefore, in the laminated structure 30, it is preferable that the protective layer 400 has a smooth surface with few irregularities. For example, it is preferable that the arithmetic mean roughness (Ra) of the surface of the protective layer 400 is smaller than 0.51 nm. In addition, it is preferable that the root mean square roughness (Rq) of the surface of the protective layer 400 is smaller than 0.60 nm.

[0033] The laminated structure 30 according to this embodiment includes a gallium nitride film 200 that is highly crystalline and has a c-axis orientation. The laminated structure 30 also includes a substrate 100 that can be made large in area. Therefore, by using the laminated structure 20, it is possible to increase the productivity of LEDs that include gallium nitride, or to manufacture a backplane on which a transistor that includes gallium nitride is formed.

[0034] In the following, several modified examples of the laminated structure 30 according to this embodiment will be described.

[0035] <Variation 1> 4 is a schematic diagram showing the configuration of a stacked structure 30A according to one embodiment of the present invention. The stacked structure 30A includes a substrate 100, a protective layer 400, a first alignment layer 300A-1, a second alignment layer 300A-2, and a gallium nitride film 200. The first alignment layer 300A-1 is provided on the protective layer 400. The second alignment layer 300A-2 is provided on the first alignment layer 300A-1. The gallium nitride film 200 is provided on the second alignment layer 300A-2. That is, the second alignment layer 300A-2 is in contact with the gallium nitride film 200.

[0036] The first alignment layer 300A-1 and the second alignment layer 300A-2 are different in type of alignment layer. For example, the first alignment layer 300A-1 and the second alignment layer 300A-2 are an insulator and a conductor, respectively. The first alignment layer 300A-1 and the second alignment layer 300A-2 may be a conductor and an insulator, respectively. The first alignment layer 300A-1 and the second alignment layer 300A-2 may be a combination of the above-mentioned materials of the alignment layer 300. The combination of materials of the first alignment layer 300A-1 and the second alignment layer 300A-2 may be appropriately selected in consideration of the device in which the stacked structure 30A is used. Note that the second alignment layer 300A-2 in contact with the gallium nitride film 200 is preferably a material that can prevent the diffusion of impurities from the first alignment layer 300A-1 to the gallium nitride film 200. The material combination of the first alignment layer 300A-1 and the second alignment layer 300A-2 may be, for example, but not limited to, aluminum nitride and titanium, titanium nitride and titanium, or titanium oxide and titanium.

[0037] Depending on the device in which the laminated structure 30A is used, each of the first alignment layer 300A-1 and the second alignment layer 300A-2 may be a conductor. In addition, in this modification, the laminated structure 30A including two alignment layers has been described, but the laminated structure 30A may include three or more alignment layers.

[0038] <Variation 2> 5 is a schematic diagram showing a configuration of a stacked structure 30B according to one embodiment of the present invention. The stacked structure 30B includes a substrate 100, a protective layer 400, an alignment layer 300B, and a gallium nitride film 200. The alignment layer 300B is provided on the protective layer 400. The gallium nitride film 200 is provided on the alignment layer 300B.

[0039] The alignment layer 300B is patterned into a predetermined pattern. The alignment layer 300B can be patterned, for example, by photolithography. As shown in FIG. 5, the alignment layer 300B is patterned so that a part of the protective layer 400 is exposed. Therefore, the gallium nitride film 200 includes a region A in contact with the alignment layer 300B and a region B in contact with the protective layer 400. In the region A, the gallium nitride film 200 is formed on the alignment layer 300B, so that the crystals can grow while the c-axis orientation is controlled. On the other hand, in the region B, the gallium nitride film 200 is formed on the protective layer 400, so that the c-axis orientation is not controlled as compared with the region A. That is, the stacked structure 30B includes a region A with high crystallinity and a region B with low crystallinity. Therefore, in the stacked structure 30B, the alignment layer 300B is patterned to form the gallium nitride film 200 including regions with different crystallinity.

[0040] When the laminated structure 30B is used for a backplane, it is possible to provide a backplane in which the crystallinity of the gallium nitride film 200 is controlled.

[0041] <Modification 3> 6 is a schematic diagram showing the configuration of a laminated structure 30C according to one embodiment of the present invention. The laminated structure 30C includes a substrate 100, a protective layer 400, a first alignment layer 300C-1, a second alignment layer 300C-2, and a gallium nitride film 200. The first alignment layer 300C-1 is provided on the protective layer 400. The second alignment layer 300C-2 is provided on the first alignment layer 300C-1. The gallium nitride film 200 is provided on the second alignment layer 300C-2.

[0042] The second alignment layer 300C-2 is patterned into a predetermined pattern. The patterning of the second alignment layer 300C-2 can be performed, for example, by using photolithography. As shown in FIG. 6, the second alignment layer 300C-2 is patterned so that a part of the first alignment layer 300C-1 is exposed. Therefore, the gallium nitride film 200 includes a region C in contact with the first alignment layer 300C-1 and a region D in contact with the second alignment layer 300C-2. The deposition surface of the gallium nitride film 200 is different between the region C and the region D, so that the degree of crystal growth of the gallium nitride film 200 (for example, the proportion (degree of orientation) of the c-axis orientation) is different. Therefore, in the stacked structure 30C, the gallium nitride film 200 including regions with different crystallinity can be formed by patterning the second alignment layer 300C-2.

[0043] When the laminated structure 30C is used for a backplane, it is possible to provide a backplane in which the crystallinity of the gallium nitride film 200 is controlled.

[0044] <Modification 4> 7 is a schematic diagram showing the configuration of a stacked structure 30D according to one embodiment of the present invention. The stacked structure 30D includes a substrate 100, a protective layer 400, a first alignment layer 300D-1, a second alignment layer 300D-2, and a gallium nitride film 200. The first alignment layer 300D-1 is provided on the protective layer 400. The second alignment layer 300D-2 is provided on the first alignment layer 300D-1. The gallium nitride film 200 is provided on the second alignment layer 300D-2.

[0045] The first alignment layer 300D-1 is patterned into a predetermined pattern. The patterning of the first alignment layer 300D-1 can be performed, for example, by using photolithography. As shown in FIG. 7, the first alignment layer 300D-1 is patterned so that a part of the protective layer 400 is exposed. However, the exposed part of the protective layer 400 is covered by the second alignment layer 300D-2 together with the first alignment layer 300D-1. That is, the second alignment layer 300D-2 includes a region formed on the first alignment layer 300D-1 and a region formed on the protective layer 400. The degree of crystal growth is different in each region, and the second alignment layer 300D-2 includes regions with different c-axis orientation or surface roughness. The gallium nitride film 200 formed on the second alignment layer 300D-2 also includes regions with different crystallinity corresponding to the regions of the second alignment layer 300D-2. Therefore, in the stacked structure 30D, the gallium nitride film 200 including regions with different crystallinity can be formed by patterning the first alignment layer 300D-1.

[0046] When the laminated structure 30D is used as a backplane, it is possible to provide a backplane with controlled crystallinity of the gallium nitride film 200. In addition, by utilizing the concave-convex patterns of the first alignment layer 300D-1 and the second alignment layer 300D-2 as shown in Fig. 7, it is possible to control the light from the light-emitting element and improve the light extraction efficiency.

[0047] <Fourth embodiment> 8 is a schematic diagram showing the configuration of a stacked structure 40 according to one embodiment of the present invention. The stacked structure 30 includes a substrate 100, a protective layer 400, an orientation layer 300, a non-orientation layer 500, and a gallium nitride film 200. The orientation layer 300 is provided on the protective layer 400. The non-orientation layer 500 is provided on the orientation layer 300. The gallium nitride film 200 is formed on the non-orientation layer 500 by sputtering. In the following, when the configuration of the stacked structure 40 is the same as that of the stacked structure 10, the stacked structure 20, and the stacked structure 30, the description thereof may be omitted.

[0048] The non-oriented layer 500 can reduce the crystallinity of the gallium nitride film 200. That is, the gallium nitride film 200 formed on the non-oriented layer 500 has low crystallinity. For example, an amorphous material such as silicon oxide can be used as the non-oriented layer 500. By making the non-formation surface of the gallium nitride film 200 amorphous, the crystal growth of the gallium nitride film 200 can be inhibited.

[0049] The non-oriented layer 500 is patterned into a predetermined pattern. The non-oriented layer 500 can be patterned by, for example, photolithography. As shown in FIG. 8, the non-oriented layer 500 is patterned so that a part of the oriented layer 300 is exposed. Therefore, the gallium nitride film 200 includes a region E in contact with the oriented layer 300 and a region F in contact with the non-oriented layer 500. In the region E, crystal growth of the gallium nitride film 200 is promoted, and in the region F, crystal growth of the gallium nitride film 200 is inhibited. That is, the gallium nitride film 200 of the stacked structure 40 includes a region E with high crystallinity and a region F with low crystallinity. Therefore, in the stacked structure 40, the non-oriented layer 500 is provided and the non-oriented layer 500 is patterned to form the gallium nitride film 200 including regions with different crystallinity.

[0050] <Variation 5> 9 is a schematic diagram showing the configuration of a stacked structure 40E according to one embodiment of the present invention. The stacked structure 40E includes a substrate 100, a protective layer 400, an orientation layer 300E, a non-orientation layer 500, and a gallium nitride film 200. The orientation layer 300E is provided on the protective layer 400. The non-orientation layer 500 is provided on the orientation layer 300E. The gallium nitride film 200 is formed on the non-orientation layer 500 by sputtering.

[0051] In the laminated structure 40E, not only the non-oriented layer 500 but also the oriented layer 300E are patterned into a predetermined pattern. The patterning of the oriented layer 300E can be performed using, for example, photolithography. As shown in FIG. 9, the oriented layer 300E is patterned so that a part of the protective layer 400 is exposed. The exposed part of the protective layer 400 is covered by the non-oriented layer 500. In the laminated structure 40E, the gallium nitride film 200 also includes a region E in contact with the oriented layer 300 and a region F in contact with the non-oriented layer 500. That is, the gallium nitride film 200 of the laminated structure 40E also includes a region E with high crystallinity and a region F with low crystallinity. Therefore, in the laminated structure 40E, the gallium nitride film 200 including regions with different crystallinity can be formed.

[0052] <Variation 6> 10 is a schematic diagram showing a stacked structure 40F according to one embodiment of the present invention. The stacked structure 40F includes a substrate 100, a protective layer 400, a non-oriented layer 500F, an orientation layer 300F, and a gallium nitride film 200. The non-oriented layer 500F is provided on the protective layer 400. The orientation layer 300F is provided on the non-oriented layer 500F. The gallium nitride film 200 is formed on the orientation layer 300F by sputtering.

[0053] In the laminated structure 40F, the non-oriented layer 500F having a predetermined pattern is covered by the oriented layer 300F. That is, the oriented layer 300F includes a region formed on the non-oriented layer 500F and a region formed on the protective layer 400. The degree of crystal growth is different in each region, and the oriented layer 300F includes regions with different c-axis orientation or surface roughness. In addition, the gallium nitride film 200 formed on such an oriented layer 300F also includes regions with different crystallinity corresponding to each region of the oriented layer 300F. Therefore, in the laminated structure 40F, the gallium nitride film 200 including regions with different crystallinity can be formed by forming the oriented layer 300F so as to cover the patterned non-oriented layer 500F.

[0054] When the laminated structure 40F is used as a backplane, it is possible to provide a backplane with controlled crystallinity of the gallium nitride film 200. In addition, by utilizing the uneven pattern of the non-aligned layer 500F and the aligned layer 300F as shown in Fig. 10, it is possible to control the light from the light-emitting element and improve the light extraction efficiency.

[0055] <Fifth embodiment> FIG. 11 is a schematic diagram showing the configuration of a light-emitting device 1000 using a laminated structure 30 according to one embodiment of the present invention.

[0056] 11, the light emitting element 1000 includes a stacked structure 30, an n-type semiconductor layer 1040, a light emitting layer 1050, a p-type semiconductor layer 1060, an n-type electrode 1070, and a p-type electrode 1080. The light emitting element 1000 is a so-called LED (Light Emitting Diode), but is not limited to this.

[0057] The n-type semiconductor layer 1040 may be a silicon-doped gallium nitride film or the like. The light-emitting layer 1050 may be a laminate in which indium gallium nitride films and gallium nitride films are alternately stacked. The p-type semiconductor layer 1060 may be a magnesium-doped gallium nitride film or the like. The n-type electrode 1070 may be a metal such as indium. The p-type electrode 1080 may be a metal such as palladium or gold.

[0058] The manufacturing method of the light emitting device 1000 is as follows. A silicon-doped gallium nitride film is formed on the stacked structure 30. An indium gallium nitride film and a gallium nitride film are alternately formed on the silicon-doped gallium nitride film to form a stacked body. A magnesium-doped gallium nitride film is formed on the stacked body. Next, the magnesium-doped gallium film, the stacked body, and the silicon-doped gallium nitride film are etched using photolithography to form a p-type semiconductor layer 1060, a light emitting layer 1050, and an n-type semiconductor layer 1040. At this time, etching is performed so as to expose a part of the surface of the silicon-doped gallium nitride film. An n-type electrode 1070 and a p-type electrode 1080 are formed on the n-type semiconductor layer 1040 and the p-type semiconductor layer 1060, respectively.

[0059] The silicon-doped gallium nitride film, the indium gallium nitride film, and the magnesium-doped gallium nitride film can be formed using a sputtering ring. Also, the silicon-doped gallium nitride film, the indium gallium nitride film, and the magnesium-doped gallium nitride film can be continuously formed by connecting multiple vacuum chambers via a substrate transfer unit without breaking the vacuum.

[0060] As described above in this embodiment, the light-emitting element 1000 can be manufactured by utilizing the laminated structure 30. The laminated structure 30 includes the substrate 100 that can be made large in area, and the light-emitting element 1000 is manufactured using a large-area substrate, so that the manufacturing cost of the light-emitting element 1000 can be reduced.

[0061] Sixth Embodiment FIG. 12 is a schematic diagram showing the configuration of a semiconductor device 2000 using a stacked structure 30 according to one embodiment of the present invention.

[0062] 12, the semiconductor device 2000 includes a stacked structure 30, a first aluminum gallium nitride layer 2050, a second aluminum gallium nitride layer 2060, a third aluminum gallium nitride layer 2070, a source electrode 2080, a drain electrode 2090, a gate electrode 2100, a first insulating layer 2110, a second insulating layer 2120, and a shield electrode 2130. The semiconductor device 2000 is a so-called HEMT (High Electron Mobility Transistor), but is not limited to this.

[0063] The first aluminum gallium nitride layer 2050 may be an aluminum gallium nitride film. The second aluminum gallium nitride layer 2060 may be an aluminum gallium nitride film doped with silicon. The third aluminum gallium nitride layer 2070 may be an aluminum gallium nitride film. The source electrode 2080 and the drain electrode 2090 may be made of a metal such as titanium or aluminum. The gate electrode 2100 may be made of a metal such as nickel or gold. The first insulating layer 2110 may be made of a silicon nitride film. The second insulating layer 2120 may be made of a silicon oxide film. The shield electrode 2130 may be made of a laminated metal such as aluminum / titanium (Al / Ti).

[0064] The manufacturing method of the semiconductor device 2000 is as follows. A first aluminum gallium nitride layer 2050 is formed on the stacked structure 30. In addition, an aluminum gallium nitride film doped with silicon and an aluminum gallium nitride film are formed on the first aluminum gallium nitride layer 2050. Next, the aluminum gallium nitride film and the aluminum gallium nitride film doped with silicon are etched using photolithography to form a third aluminum gallium nitride layer 2070 and a second aluminum gallium nitride layer 2060. At this time, the etching is performed so as to expose a part of the surface of the aluminum gallium nitride film doped with silicon. A source electrode 2080 and a drain electrode 2090 are formed on the second aluminum gallium nitride layer 2060. In addition, a gate electrode 2100 is formed on the third aluminum gallium nitride layer 2070. A silicon nitride film and a silicon oxide film are deposited in this order to cover the source electrode 2080, the drain electrode 2090, and the gate electrode 2100, forming a first insulating layer 2110 and a second insulating layer 2120. A shield electrode 2130 is formed on the second insulating layer 2120.

[0065] Aluminum gallium nitride films and silicon-doped aluminum gallium nitride films can be deposited using a sputtering ring.

[0066] As described above in this embodiment, the semiconductor element 2000 can be fabricated by utilizing the laminated structure 30. Since the laminated structure 30 includes the substrate 100 that can be made large in area, it is possible to fabricate a large-area backplane on which the semiconductor elements 2000 are integrated.

[0067] The above-described embodiments of the present invention may be combined as appropriate as long as they are not mutually inconsistent. Furthermore, those in which a person skilled in the art appropriately adds or removes components or modifies designs, or adds or omits steps or modifies conditions, based on the embodiments, are also included in the scope of the present invention as long as they include the gist of the present invention.

[0068] Even if there are other effects and advantages different from those brought about by the respective embodiments described above, those which are clear from the description in this specification or which can be easily predicted by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0069] 10, 20, 30, 30A, 30B, 30C, 30D, 40, 40E, 40F: laminated structure, 100: substrate, 200: gallium nitride film, 300, 300B, 300E, 300F: alignment layer, 300A-1, 300C-1, 300D-1: first alignment layer, 300A-2, 300C-2, 300D-2: second alignment layer, 400: protective layer, 500, 500F: non-alignment layer, 1000: light-emitting element, 1040: n-type semiconductor layer, 1050: light-emitting layer, 1060: p-type semiconductor layer, 1070: n-type electrode, 1080: p-type electrode, 2000: semiconductor element, 2050: first aluminum gallium nitride layer, 2060: second aluminum gallium nitride layer, 2070: third aluminum gallium nitride layer, 2080: source electrode, 2090: drain electrode, 2100: gate electrode, 2110: first insulating layer, 2120: second insulating layer, 2130: shield electrode

Claims

1. A substrate; an orientation layer having a c-axis orientation or a (111) orientation of a face-centered cubic structure on the substrate; a gallium nitride film on the alignment layer; the alignment layer comprises a first alignment layer and a second alignment layer; At least one of the first alignment layer and the second alignment layer is patterned into a predetermined pattern; The substrate has a surface having an arithmetic mean roughness (Ra) of less than 0.33 nm.

2. A substrate; a protective layer on the substrate; an orientation layer having a c-axis orientation or a (111) orientation of a face-centered cubic structure on the protective layer; a gallium nitride film on the alignment layer; the alignment layer comprises a first alignment layer and a second alignment layer; At least one of the first alignment layer and the second alignment layer is patterned into a predetermined pattern; The substrate has a surface having an arithmetic mean roughness (Ra) of less than 0.33 nm.

3. The laminate structure according to claim 2 , wherein the protective layer has a surface with an arithmetic mean roughness (Ra) of less than 0.51 nm.

4. The laminated structure of claim 3 , wherein the protective layer comprises silicon nitride or silicon oxide.

5. The laminated structure according to claim 1 , further comprising a non-oriented layer patterned into a predetermined pattern between the substrate and the gallium nitride film.

6. The laminated structure according to claim 5 , wherein the non-orientation layer is provided on the orientation layer.

7. The laminated structure according to claim 5 , wherein the non-orientation layer is provided below the orientation layer.

8. The laminated structure according to any one of claims 1 to 7, wherein the alignment layer contains titanium, titanium nitride, titanium oxide, graphene, zinc oxide, magnesium diboride, aluminum, aluminum nitride, aluminum oxide, silver, calcium, nickel, copper, strontium, rhodium, palladium, cerium, ytterbium, iridium, platinum, gold, lead, actinium, thorium, lithium niobate, BiLaTiO, SrFeO, BiFeO, BaFeO, PMnN-PZT, or biological apatite.

9. The laminate structure of claim 1 , wherein each of the first and second alignment layers is a conductor.

10. the first alignment layer is a conductor; The laminated structure of claim 1 , wherein the second alignment layer is an insulator.

11. The laminate structure of claim 10 , wherein the gallium nitride film is in contact with a first alignment layer.

12. The laminate structure of claim 10 , wherein the gallium nitride film is in contact with a second alignment layer.

13. The laminate structure according to claim 1 , wherein the root mean square roughness (Rq) of the surface of the substrate is less than 0.39 nm.

14. The laminated structure according to claim 1 , wherein the substrate is an amorphous glass substrate.

15. The laminated structure according to claim 1 , wherein the substrate is a resin substrate.

16. The laminated structure according to claim 1 , wherein the substrate is a polycrystalline substrate.

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