Silicon wafer and its manufacturing method

Abstract

To provide a silicon wafer suitable for IGBT applications, having high resistance, small resistance fluctuation, and capable of suppressing the occurrence of slip, and a manufacturing method for the silicon wafer.SOLUTION: In the oxygen concentration profile of a silicon wafer in the thickness direction, there exists a high oxygen concentration region where the oxygen concentration is higher than that of silicon wafers (ASTM F121,1979) by more than 1.5×1017atoms / cm3 only on the surface layer of the back surface. The average oxygen concentration in a region from the topmost surface to 10 μm in the thickness direction on the backside of the silicon wafer is 4.0×1017atoms / cm3 or more and 15.0×1017atoms / cm3 or less.SELECTED DRAWING: Figure 8

Description

[Technical field]

[0001] The present invention relates to a silicon wafer and a manufacturing method thereof. [Background technology]

[0002] In recent years, thyristors, bipolar transistors, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), insulated gate bipolar transistors (IGBTs), and other switching devices for power applications have been actively developed. Among these, IGBTs combine the high speed characteristics of MOSFETs with the low saturation voltage characteristics of bipolar transistors, and are attracting attention for applications that require large capacity, high voltage resistance, and high speed switching, such as power supplies for the drive motors of hybrid and electric vehicles.

[0003] An IGBT is a gate voltage-driven switching device (also called a "vertical IGBT") that has a gate electrode and an emitter electrode formed on the front side of a silicon wafer and a collector electrode formed on the back side, and the switching current flows through the entire silicon wafer between the emitter on the front side and the collector on the back side. Therefore, if crystal defects exist inside the silicon wafer, the device characteristics deteriorate, so it is important that the silicon wafer is free of crystal defects from the front side to the back side of the wafer.

[0004] It is also important that the resistivity of the silicon wafer is high and consistent across the entire wafer. In this regard, if the oxygen concentration of the silicon wafer is high, oxygen atoms act as oxygen donors, causing the resistivity of the silicon wafer to fluctuate. Therefore, it is also important that the oxygen concentration of the silicon wafer is low.

[0005] For this reason, as described in Patent Document 1, it has been proposed to obtain silicon wafers with uniform resistivity by irradiating a silicon ingot with a low interstitial oxygen concentration formed by the Czochralski method with a neutron beam to dope it with phosphorus, slicing the wafers, and then annealing the wafers in an oxidizing atmosphere.

[0006] Furthermore, Patent Document 2 proposes a method for producing a silicon single crystal ingot, in which the amount of n-type dopant evaporated from a silicon melt is controlled when the silicon single crystal ingot is pulled up, thereby producing an n-type high-resistance silicon single crystal ingot with uniform resistivity in the pulling length direction.

[0007] Incidentally, it is known that slip is likely to occur when low-oxygen silicon wafers are used to reduce resistance fluctuation. If slip occurs on the backside of the silicon wafer, it will have a significant impact on device yields due to current leakage and positional deviation in the photolithography process. It is believed that the lower the oxygen concentration of the silicon wafer, the smaller the critical resolved shear stress of the silicon wafer, making it more likely for slip to occur. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] JP 2012-134517 A [Patent Document 2] International Publication No. 2018 / 159108 Summary of the Invention [Problem to be solved by the invention]

[0009] As described above, various methods have been used to manufacture silicon wafers with high resistivity and little resistance variation suitable for IGBT applications. However, with conventional technologies that use silicon wafers with low oxygen concentrations, it has been difficult to prevent the occurrence of slip while maintaining high resistivity and suppressing resistance variation.

[0010] Therefore, an object of the present invention is to provide a silicon wafer suitable for use in IGBTs, which has high resistance, small resistance fluctuation, and is capable of suppressing the occurrence of slip, and a method for manufacturing the silicon wafer. [Means for solving the problem]

[0011] In order to solve the above problem, the present inventors have made intensive studies. First, the higher the oxygen concentration of the silicon wafer, the higher the critical resolved shear stress, and the less likely slips will occur. However, since slips occur from contact scratches on the wafer surface, the present inventors predicted that only the oxygen concentration in the wafer surface layer, rather than the oxygen concentration in the entire wafer, affects slip occurrence. Then, since slip occurrence is a problem on the back side where the silicon wafer is supported during IGBT device manufacturing, the present inventors came up with the idea of ​​forming a high oxygen concentration region only on the back surface layer. Therefore, the present inventors came up with the idea of ​​heat-treating a silicon wafer with a low oxygen concentration in an oxygen atmosphere to once increase the oxygen concentration only on the front surface and the back surface layer of the silicon wafer, and then removing only the high oxygen concentration region on the front surface side to obtain a silicon wafer with a high oxygen concentration region remaining on the back surface side.

[0012] With such a silicon wafer, the resistance variation can be suppressed while maintaining a high resistance across the entire wafer, and furthermore, the occurrence of slip can be suppressed in the device manufacturing process.

[0013] <1> In the oxygen concentration profile in the thickness direction of the silicon wafer, the oxygen concentration is 1.5×10 higher than the oxygen concentration of the silicon wafer (ASTM F121, 1979). 17atoms / cm 3 or more exists only in the surface layer of the back surface, and the average oxygen concentration in the region from the outermost surface of the back surface of the silicon wafer to 10 μm in the thickness direction is 4.0×10 17 atoms / cm 3 Above 15.0×10 17 atoms / cm 3 Below is a silicon wafer.

[0014] <2> The average oxygen concentration in the region from the top surface of the silicon wafer to 10 μm in the thickness direction is 4.0 × 10 17 atoms / cm 3 Below is the <1> 2. The silicon wafer according to claim 1 .

[0015] <3> The thickness of the high oxygen concentration region is 10 μm or more and 30 μm or less. <1> or <2> 2. The silicon wafer according to claim 1 .

[0016] <4> The oxygen concentration of the silicon wafer is 4.0×10 17 atoms / cm 3 Below is the <1> ~ <3> 13. The silicon wafer according to claim 12.

[0017] <5> The resistivity of the silicon wafer is 30 Ω cm or more and 10,000 Ω cm or less. <1> ~ <4> 13. The silicon wafer according to claim 12.

[0018] <6> The silicon wafer is free of dislocation clusters and COPs; <1> ~ <5> 13. The silicon wafer according to claim 12.

[0019] <7> The method includes a high-oxygen concentration layer forming step of forming a high-oxygen concentration layer on each of the surface layers on the front surface side and the back surface side of the pre-polished silicon wafer by heat treating the pre-polished silicon wafer in an oxygen-containing gas atmosphere, and a high-oxygen concentration layer removing step of removing the high-oxygen concentration layer on the front surface side of the pre-polished silicon wafer after the high-oxygen concentration layer forming step, wherein the high-oxygen concentration layer formed in the high-oxygen concentration layer forming step has an oxygen concentration that is 1.5×10 higher than the oxygen concentration (ASTM F121, 1979) of the pre-polished silicon wafer in an oxygen concentration profile in the thickness direction of the pre-polished silicon wafer. 17 atoms / cm 3 or more, and the average oxygen concentration in the region from the outermost surface of the back surface of the silicon wafer to 10 μm in the thickness direction after the high oxygen concentration layer removal process is 4.0×10 17 atoms / cm 3 Above 15.0×10 17 atoms / cm 3 The method for producing a silicon wafer is as follows.

[0020] <8> The high oxygen concentration layer formed in the high oxygen concentration layer forming step is formed in each region of the front surface and the back surface of the unpolished silicon wafer, the region being 20 μm or less in the thickness direction from the outermost surface. <7> 2. A method for producing a silicon wafer according to claim 1 .

[0022] < 9 > The oxygen concentration of the silicon wafer before polishing is 4.0×10 17 atoms / cm 3 Below is the <7> or <8> 13. The method for producing a silicon wafer according to claim 12.

[0023] < 10 The high oxygen concentration layer removal step includes a double-sided polishing step of simultaneously polishing the front and back surfaces of the unpolished silicon wafer using a double-sided polishing machine, <7> ~< 9 10. The method for producing a silicon wafer according to any one of claims 1 to 9.

[0024] < 11In the double-side polishing step, the double-side polishing process is performed under conditions in which the polishing rate on the front side is faster than the polishing rate on the back side. 10 A method for producing a silicon wafer according to the above.

[0025] < 12 > Prior to the double-side polishing step, an oxide film is formed only on the back side. 10 > or < 11 A method for producing a silicon wafer according to the above. Effect of the Invention

[0026] According to the present invention, it is possible to provide a silicon wafer suitable for use in IGBTs, which has high resistance, small resistance fluctuation, and is capable of suppressing the occurrence of slip, and a method for manufacturing the silicon wafer. [Brief description of the drawings]

[0027] [Figure 1] FIG. 1 is a schematic diagram showing an oxygen concentration profile in the thickness direction of a silicon wafer having an oxygen concentration of 0.1×10 17 atoms / cm 3 or less after heat treatment. [Diagram 2] FIG. 1 is a schematic diagram showing an oxygen concentration profile in the thickness direction of a silicon wafer having an oxygen concentration of 4.0×10 atoms / cm after heat treatment. [Diagram 3] FIG. 1 is a schematic diagram showing an oxygen concentration profile in the thickness direction of a silicon wafer having an oxygen concentration of 10.0×10 atoms / cm after heat treatment. [Figure 4] FIG. 1 is a diagram showing an example of an observation view of slip length on a silicon wafer surface by X-ray topography observation. [Diagram 5] FIG. 13 is a diagram showing the relationship between the average oxygen concentration in each thickness direction of a silicon wafer and the slip length in a pre-confirmation experiment. [Figure 6] 1A to 1C are schematic cross-sectional views illustrating a method for manufacturing a silicon wafer according to an embodiment of the present invention. [Figure 7]1A is a schematic cross-sectional view of a silicon wafer after heat treatment, and FIG. 1B is a schematic diagram showing an oxygen concentration profile in the thickness direction. [Figure 8] 1A is a schematic cross-sectional view of a silicon wafer after SMP processing, and FIG. 1B is a schematic diagram showing an oxygen concentration profile in the thickness direction. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Prior to the description of the embodiments, the following preliminary experiment was carried out in order to confirm the relationship between the oxygen concentration profile in the thickness direction of a silicon wafer and the occurrence of slips.

[0029] (Preliminary experiment) In order to confirm the relationship between the oxygen concentration profile in silicon wafers and the occurrence of slip, a silicon wafer with a diameter of 200 mm and an initial oxygen concentration (ASTM F121, 1979) of 0.1×10 17 atoms / cm 3 Below, 4.0 x 10 17 atoms / cm 3 and 10.0 x 10 17 atoms / cm 3Three types of silicon wafers (for convenience, referred to as "low oxygen wafers," "medium oxygen wafers," and "high oxygen wafers" in this preliminary experiment) were prepared. The "oxygen concentration of silicon wafers" here is a value measured using Fourier transform infrared spectroscopy (FTIR) in accordance with ASTM F121-1979. In order to change the oxygen concentration in the surface layer of these silicon wafers, heat treatment (for convenience, referred to as "pre-annealing" in this preliminary experiment to distinguish it from the heat treatment simulating the device process during IGBT manufacturing) was performed in an RTA furnace and a horizontal furnace. The pre-annealing conditions in the RTA furnace were a heat treatment sequence in which the temperature was raised to 1250°C in 10 seconds, heat treatment was performed at that temperature for 30 seconds, and the temperature was lowered to room temperature in 10 seconds. The pre-annealing conditions in the horizontal furnace were a heat treatment sequence in which the silicon wafers were placed in a furnace maintained at 1150°C, heat treatment was performed for 30 minutes, and removal at that temperature. 1 to 3 are graphs that show schematic results of measurement, using secondary ion mass spectrometry (SIMS), of oxygen concentration profiles in the thickness direction of the surface layer of each of low-oxygen wafers, medium-oxygen wafers, and high-oxygen wafers after heat treatment.

[0030] In order to simulate a general heat treatment for IGBT device manufacturing, these pre-annealed silicon wafers were heat-treated at 1100°C in a vertical furnace, and the slip length from the contact scratches with the boat supporting the silicon wafer was examined. The maximum oxygen concentration, the average oxygen concentration in the region up to 5 μm and 10 μm in the wafer surface layer, and the slip length observed in the silicon wafer for each heat treatment are shown in Table 1. Here, the "maximum oxygen concentration" is the maximum value in the oxygen concentration profile in the thickness direction of the silicon wafer measured by SIMS. Also, the "average oxygen concentration in the region up to 5 μm and 10 μm in the wafer surface layer" is the average value in the oxygen concentration profile in the thickness direction of the silicon wafer measured by SIMS, specifically, the value obtained by dividing the integral value of the oxygen concentration profile up to 5 μm or 10 μm in the depth direction by the width of 5 μm or 10 μm. The slip length was measured from an X-ray topography image. An example of the slip length is shown in Figure 4. Figure 5 shows the relationship between the average oxygen concentration in the region 5 μm and 10 μm from the outermost surface of a silicon wafer (meaning the "outermost surface" as a surface; hereafter, the main surface on which the wafer is fabricated will be referred to as the "top surface" and the opposite surface will be referred to as the "rear surface") in the thickness direction, as well as the maximum oxygen concentration in the silicon wafer, and the measured slip length. The coefficient of determination R, which indicates the degree of correlation, 2 is highest in the average value of the surface layer 10 μm deep, and R 2 =0.9477.

[0031] [Table 1]

[0032] From these experimental results, regardless of the initial oxygen concentration of the silicon wafer, if the oxygen concentration is increased only in the surface layer of the silicon wafer by heat treatment, the slip resistance of the silicon wafer can be improved. In particular, if the average oxygen concentration in the region from the outermost surface to 10 μm in the thickness direction is high, the slip resistance can be sufficiently increased. Therefore, if the average oxygen concentration in the region from the outermost surface to 10 μm in the thickness direction on the back side of the silicon wafer is increased, the occurrence of slip caused by scratches can be suppressed. Then, by heat treating a silicon wafer with a low oxygen concentration in an oxygen atmosphere, the oxygen concentration only in the surface layer of the front and back sides of the silicon wafer is once increased, and then only the high oxygen concentration region on the front side is removed and the high oxygen concentration region on the back side is left, the resistance of the entire wafer can be high and the resistance fluctuation can be suppressed, and furthermore, the occurrence of slip on the back side of the wafer, which is a concern in the IGBT device manufacturing process, can be suppressed.

[0033] (Silicon wafer manufacturing method) Based on the above preliminary experiment results, the embodiment of the method for manufacturing a silicon wafer according to the present embodiment will be described in detail below with reference to the drawings. In principle, the same reference numerals are given to the same components with the last two digits, and duplicated descriptions will be omitted. In addition, in order to simplify the drawings, the thicknesses of the components are shown in Figs. 6 to 8 exaggerated from the actual thickness ratio. The method for manufacturing a silicon wafer according to the present invention includes a high oxygen concentration layer forming step of forming a high oxygen concentration layer on each of the surface layers on the front and back sides of the pre-polished silicon wafer 110 by heat treating the pre-polished silicon wafer 110 in an oxygen-containing gas atmosphere, and a high oxygen concentration layer removing step of removing the high oxygen concentration layer on the front side of the pre-polished silicon wafer 110 after the high oxygen concentration layer forming step. The high oxygen concentration layer formed in the high oxygen concentration layer forming step has an oxygen concentration 1.5 x 10 higher than the oxygen concentration (ASTM F121, 1979) of the pre-polished silicon wafer 110 in an oxygen concentration profile in the thickness direction of the pre-polished silicon wafer 110. 17 atoms / cm 3or more, and the average oxygen concentration in the region from the top surface of the back surface of the silicon wafer to 10 μm in the thickness direction after the high oxygen concentration layer removal process is 4.0 × 10 17 atoms / cm 3 Above 15.0×10 17 atoms / cm 3 The present invention is characterized in that: Hereinafter, each configuration and each step of the present invention will be described in detail for each embodiment.

[0034] In the method for producing a silicon wafer according to this embodiment, a heat treatment is applied to the silicon wafer, and finally, a high oxygen concentration region is formed only on the back surface of the silicon wafer. In one embodiment shown in FIG. 6 as an example, a front surface side high oxygen concentration layer 112 and a back surface side high oxygen concentration layer 113 are first formed by heat treatment on each surface layer of the front surface and back surface of the unpolished silicon wafer 110. Then, both the front surface and back surface of the unpolished silicon wafer 110 are double-sided polished (DSP) using a double-sided polishing machine. At this time, at least the back surface side high oxygen concentration layer 113 is polished so as to leave a part. Then, a single-sided polishing process is performed to adjust the surface roughness of the front surface outermost surface 110a of the low oxygen concentration region. Hereinafter, the details of each step in the first embodiment will be described in order.

[0035] <Unpolished silicon wafer> As the unpolished silicon wafer 110 used in the manufacture of the silicon wafer according to the present invention, a single crystal silicon wafer cut from a silicon single crystal can be used. The single crystal silicon wafer can be one obtained by slicing a single crystal silicon ingot grown by the Czochralski method (CZ method) or the floating zone melting method (FZ method) with a wire saw or the like. Here, when the silicon wafer is used for a vertical device, if there is a defect in any region in the vertical direction of the device formation region, a leakage current occurs through the defect, which affects the device characteristics. Therefore, from the viewpoint of obtaining better device characteristics, it is preferable that the unpolished silicon wafer 110 is a silicon wafer that does not include dislocation clusters and vacancy agglomeration defects (COP: Crystal Originated Particle).

[0036] Here, in this specification, the term "silicon wafer not containing COP" refers to a silicon wafer in which no COP is detected by the observation evaluation described below. That is, first, a silicon wafer cut from a single crystal silicon ingot grown by the CZ method is subjected to SC-1 cleaning (i.e., cleaning with a mixed solution of ammonia water, hydrogen peroxide water, and ultrapure water in a ratio of 1:1:15), and the surface of the silicon wafer after cleaning is observed and evaluated using a surface defect inspection device: Surfscan SP-2 manufactured by KLA-Tencor, to identify light point defects (LPDs) estimated to be surface pits. At this time, the observation mode is set to oblique mode (oblique incidence mode), and the estimation of the surface pits is performed based on the detection size ratio of the wide-narrow channel. The LPDs thus identified are evaluated as to whether they are COPs or not using an atomic force microscope (AFM). A silicon wafer in which no COP is observed by this observation evaluation is defined as a "silicon wafer not containing COPs".

[0037] On the other hand, dislocation clusters are large (approximately 10 μm) defects (dislocation loops) formed as agglomerates of excess interstitial silicon. The presence or absence of dislocation clusters can be easily confirmed at the visual level by performing etching processes such as secco etching or by making them visible through Cu decoration.

[0038] <High oxygen concentration layer formation process> The high oxygen concentration layer forming step is a step of heat treating the pre-polished silicon wafer 110 in an oxygen atmosphere to form a high oxygen concentration layer in the surface layer of each of the front and back surfaces of the pre-polished silicon wafer 110. The heat treatment in this step can be performed using a general heating device, such as a rapid temperature increase and decrease heat treatment device such as RTA (Rapid Thermal Annealing) and RTO (Rapid Thermal Oxidation), or a batch-type heat treatment device (vertical heat treatment device, horizontal heat treatment device). Here, the flow rate of oxygen gas supplied into the furnace of the heat treatment device is preferably 20 L / min or more, more preferably 40 L / min or more. The furnace may also contain other inert gas. The heat treatment temperature is preferably 1000°C or more and 1350°C or less, more preferably 1100°C or more and 1300°C or less. The heat treatment time may be set appropriately depending on the furnace to be used, and for example, the heat treatment time is preferably 10 seconds or more and 30 seconds or less in an RTA furnace, and 10 minutes or more and 3 hours or less in a batch-type heat treatment device. In addition, the high oxygen concentration layers formed on each surface in the high oxygen concentration layer forming step are preferably formed in each region up to 20 μm in the thickness direction from the outermost surface on the front surface and back surface of the silicon wafer.

[0039] In the high oxygen concentration layer forming step, as shown in Fig. 7, oxygen in the furnace diffuses inward into the surface layer portions of the front and back surfaces of the unpolished silicon wafer 110, forming a front surface side high oxygen concentration layer 112 and a back surface side high oxygen concentration layer 113 in the surface layer portions of each surface. The higher the heat treatment temperature and the longer the heat treatment time, the higher the oxygen concentration in the surface layer portions of the unpolished silicon wafer 110, and oxygen is diffused to the outermost surface of the unpolished silicon wafer 110. By heat treating the unpolished silicon wafer 110, the oxygen concentration in the oxygen concentration profile in the thickness direction of the unpolished silicon wafer 110 becomes 1.5 x 10 higher than the oxygen concentration of the unpolished silicon wafer 110 (ASTM F121, 1979). 17 atoms / cm 3 A high oxygen concentration layer having a region higher than 1000 nm is formed. FIG. 7 shows a schematic diagram of a silicon wafer on which a front surface side high oxygen concentration layer 112 and a back surface side high oxygen concentration layer 113 are formed, together with a schematic conceptual diagram of the oxygen concentration profile in the thickness direction of the silicon wafer on which each high oxygen concentration layer is formed. As shown in FIG. 7, the concentration profile of oxygen diffused inwardly into the silicon wafer has peaks in the surface layer portions of both the front and back surfaces. The oxygen concentration (ASTM F121, 1979) of silicon wafer 110 before grinding is 4.0×10 17 atoms / cm 3 or less, and when the unpolished silicon wafer 110 before the heat treatment has a high oxygen concentration, oxygen diffusion during the heat treatment is small, as in the example shown in FIG.

[0040] <High oxygen concentration layer removal process> In the grinding and polishing of the silicon wafer surface, it is common to perform double-sided polishing (DSP) on the front and back surfaces of the silicon wafer, and then perform single-sided polishing (SMP) on the front surface of the silicon wafer. By performing double-sided polishing, it is possible to remove processing distortion remaining on the front and back surfaces of the silicon wafer and ensure a specified flatness, and by performing single-sided polishing only on the front surface, it is possible to achieve a specified surface roughness on the front surface of the silicon wafer. However, if double-sided polishing is performed so that the amount of polishing removed is the same on the front and back surfaces, a high oxygen concentration layer will remain on the front surface of the silicon wafer used as the device active layer, which will not meet the oxygen concentration standard and cannot be used as a product. Therefore, in this embodiment, in the high oxygen concentration layer removal step, in order to remove only the high oxygen concentration layer 112 on the front surface side out of the high oxygen concentration layer 112 on the front surface side and the high oxygen concentration layer 113 on the back surface side formed in the high oxygen concentration layer formation step, it is preferable to set conditions in the double-sided polishing step such that the polishing speed on the front surface side of the silicon wafer is faster than the polishing amount on the back surface side of the silicon wafer. For this purpose, for example, the use conditions can be changed between the upper polishing platen and the lower polishing platen. Specifically, the type of polishing pad can be such that a fixed abrasive pad with abrasive grains embedded therein is adopted only for the upper polishing pad, or a combination of a urethane pad and a nonwoven fabric / suede can be appropriately used on the upper and lower polishing pads. In addition, such an object can be achieved by providing a difference in pressure or rotation speed between the upper and lower polishing platens. In addition, even if the polishing speed is the same, a protective film such as an oxide film may be formed only on the back surface side before the double-sided polishing step so that the polishing amount on the back surface side of the silicon wafer is substantially reduced. By performing the treatment under these conditions, it is possible to completely remove the high oxygen concentration layer 112 on the front surface side of the silicon wafer, and to leave the high oxygen concentration region 114 on the back surface side. Note that the removal of the high oxygen concentration layer 112 on the front surface side in the high oxygen concentration layer removal step may be performed by any method other than polishing, such as etching, and is not limited to polishing.

[0041] In this way, by removing only the high oxygen concentration layer on the front surface while leaving a high oxygen concentration region on the back surface side, it is possible to produce a silicon wafer that is suitable for IGBT applications, has high resistance, small resistance fluctuation, and can suppress the occurrence of slip.

[0042] Next, a silicon wafer that can be obtained by the embodiment of the manufacturing method described above will be specifically described.

[0043] (Silicon wafer) In the silicon wafer according to the present invention, the oxygen concentration profile in the thickness direction of the silicon wafer is 1.5×10 lower than the oxygen concentration of the silicon wafer (ASTM F121, 1979). 17 atoms / cm 3 or higher exists only in the surface layer of the back surface, and the average oxygen concentration in the region from the top surface of the back surface of the silicon wafer to 10 μm in the thickness direction is 4.0 × 10 17 atoms / cm 3 Above 15.0×10 17 atoms / cm 3 The silicon wafer is as follows. Each component will be described in detail below. Since the proportion of the high oxygen concentration region in the back surface layer portion is small with respect to the entire silicon wafer, the oxygen concentration of the entire silicon wafer may be considered to be substantially the same as the initial oxygen concentration of the silicon wafer before heat treatment or the like is performed.

[0044] <Oxygen concentration in silicon wafers> The oxygen concentration of the silicon wafer is 1.5×10 higher than the oxygen concentration of the silicon wafer (ASTM F121, 1979) only in the back surface layer of the silicon wafer. 17 atoms / cm 3It is preferable that the silicon wafer has a high oxygen concentration region having a thickness of 10 μm or more and 30 μm or less. Such a high oxygen concentration region is not formed in the surface layer of the front surface. Here, the surface layer of the silicon wafer refers to a region less than 50 μm from the outermost surface of each of the front surface and the back surface of the silicon wafer. As described above, the oxygen concentration of the silicon wafer is almost unchanged before and after the high oxygen concentration layer forming process and the polishing process in the manufacture of the silicon wafer, so that the oxygen concentration of the silicon wafer can be the value measured as the initial oxygen concentration of the silicon wafer. Here, the initial oxygen concentration refers to the oxygen concentration measured by FT-IR. In addition, when the oxygen concentration is measured in the wafer thickness direction by SIMS, the average value of the measured oxygen concentration is shown.

[0045] Here, the oxygen concentration in the back surface layer is 4.0×10 17 atoms / cm 3 Above 15.0×10 17 atoms / cm 3 As described below, the occurrence of slips can be suppressed by providing a high oxygen concentration layer in the surface layer portion of the back surface of the silicon wafer.

[0046] In addition, the average oxygen concentration in the area from the outermost surface to 10 μm in the thickness direction on the front surface is 4.0 × 10 17 atoms / cm 3 Since the oxygen concentration on the front surface of the silicon wafer is low, the resistance fluctuation is small, and the silicon wafer can be used as a suitable silicon wafer for manufacturing IGBTs.

[0047] <Silicon wafer resistivity> The resistivity of the silicon wafer is preferably 30 Ω·cm or more and 10,000 Ω·cm or less. Here, the resistivity is measured by the four-probe method. Specifically, the resistivity can be measured by measuring the central part of the front surface of the silicon wafer by the four-probe method.

[0048] The advantages of the wafer according to the above embodiment will be described in more detail. As described above, a high oxygen concentration causes resistance fluctuations, so simply adopting a high wafer oxygen concentration to suppress the occurrence of slip is not suitable for IGBT applications. First, when the oxygen concentration is less than 0.1×10 across the entire thickness direction of the silicon wafer, 17 atoms / cm 3 Above 4.0×10 17 atoms / cm 3 Consider a low-oxygen-concentration silicon wafer that has been conventionally used for IGBT applications (hereinafter, for convenience, referred to as a "conventional low-oxygen-concentration wafer"). In addition, the oxygen concentration is 9.0×10 across the entire thickness direction of the silicon wafer. 17 atoms / cm 3 Above 15.0×10 17 atoms / cm 3 Consider the following high oxygen concentration silicon wafer (hereinafter, for convenience, referred to as "conventional high oxygen concentration wafer"). Furthermore, consider a silicon wafer obtained by subjecting a conventional low oxygen concentration wafer to heat treatment, in which the oxygen concentration in the surface layer of the silicon wafer is high on both sides (hereinafter, for convenience, referred to as "conventional annealed wafer"). For the conventional annealed wafer, refer again to the conceptual diagram of the oxygen concentration profile in FIG. 7.

[0049] For each of these conventional low-oxygen concentration wafers, conventional high-oxygen concentration wafers, and conventional annealed wafers, we will examine the slip resistance and resistance variation when they are subjected to a two-stage heat treatment at 1150°C and 450°C, which is assumed to be a common heat treatment in IGBT manufacturing.

[0050] In the case of the conventional annealed wafer, the oxygen concentration in the surface layer of the silicon wafer is high, so the slip length can be improved compared to the conventional low-oxygen concentration wafer. However, a high-oxygen concentration region is formed on the front surface side, which causes resistance fluctuations. The conventional high-oxygen concentration wafer, like the conventional annealed wafer, has a better slip length than the conventional low-oxygen concentration wafer, but resistance fluctuations are still unavoidable. The conventional low-oxygen concentration wafer can avoid resistance fluctuations, but slip generation is unavoidable. In contrast, the wafer according to the present invention described above has a high-oxygen concentration region on the back side, which suppresses slip generation, while there is no resistance fluctuation except in the back surface layer of the wafer, making it suitable for use in IGBT devices.

[0051] (High oxygen concentration layer removal test) - Improving the efficiency of the double-sided polishing process - In order to entirely remove only the high oxygen concentration layer on the front side of the high oxygen concentration layers formed on both sides in the high oxygen concentration layer forming step while leaving a high oxygen concentration region on the back side, it is necessary to make the polishing allowance of the single side polishing after the double side polishing step larger than usual. Therefore, if the polishing allowance on the front side is made larger than that on the back side in the double side polishing step, the high oxygen concentration layer can be efficiently removed in the double side polishing step. In the double side polishing step, the same polishing pad is usually used for the front and back sides, but a test was conducted to confirm whether it is possible to remove only the high oxygen concentration layer on the front side by the double side polishing step alone by using different polishing pads for the front and back sides.

[0052] The polishing speed of the polishing pad used to polish the wafer varies depending on the number of times it is used (i.e., the time of use). Therefore, an experiment was conducted to measure the ratio of the polishing speed of the front and back sides and the flatness at that time using polishing pads with different usage times on the front and back sides. The usage times of the polishing pads used were from level 1 to level 4 as defined in Table 2.

[0053] [Table 2]

[0054] The polishing ratio (a ratio of 1.00 or more means that the polishing amount on the front side is greater than that on the back side) comparing the polishing amount on the front and back sides after double-sided polishing and the evaluation results of the GBIR (Global Backside Ideal Range), which is an index of flatness, are shown in Table 3. In the table, the right-hand row shows the level of the polishing pad used on the front side, and the left-hand column shows the level of the polishing pad used on the back side.

[0055] [Table 3]

[0056] It was confirmed that when the polishing ratio was 1.25 or more, only the high oxygen concentration layer on the front side could be removed after double-sided polishing. When the ratio was small, the area with high oxygen concentration on the front side could not be removed, or the high oxygen concentration layer on the back side was also removed. The evaluation results under the conditions where only the high oxygen concentration layer on the front side could be removed are shown in bold and underlined.

[0057] GBIR is a value that indicates the difference between the maximum and minimum thickness within a wafer. Since silicon wafers are required to be of uniform thickness, it was evaluated as a specific index of thickness variation that indicates flatness. GBIR is preferably 0.1 or less, and values ​​that satisfy this condition are shown in bold and underlined.

[0058] From these results, when the usage time of the front side is level 2, it is better to use a polishing pad close to new with a slow polishing rate on the back side, or a polishing pad that has been used for a long time and has a slow polishing rate. Also, when the usage time of the front side is level 3, it was confirmed that by using a polishing pad close to new on the back side, it is possible to produce silicon wafers suitable for IGBT applications in which only the high oxygen concentration layer on the front side has been removed. Note that this result is merely one example when a specific polishing pad is used, and it is naturally understood that by appropriately combining the levels of usage time according to the type of polishing pad actually used, or by combining different types of polishing pads on the front and back sides, it is possible to obtain good flatness while making the polishing amount asymmetric on the front and back sides. [Industrial Applicability]

[0059] According to the present invention, it is possible to provide a silicon wafer suitable for use in IGBTs, which has little resistance variation and can suppress the occurrence of slip, and a method for manufacturing the same. [Explanation of symbols]

[0060] 110 Unpolished silicon wafer 110a Front surface 112 High oxygen concentration layer on the front side 113 High oxygen concentration layer on the back side 114 High oxygen concentration area on the back side

Claims

1. In the oxygen concentration profile in the thickness direction of the silicon wafer, the oxygen concentration is 1.5×10 lower than the oxygen concentration of the silicon wafer (ASTM F121, 1979). １７ atoms / cm ３ The high oxygen concentration region is present only in the surface layer of the back surface. The average oxygen concentration in the region from the top surface of the back surface of the silicon wafer to 10 μm in the thickness direction is 4.0×10 １７ atoms / cm ３ Above 15.0 x 10 １７ atoms / cm ３ is as follows: A silicon wafer, wherein the high oxygen concentration region has a thickness of 10 μm or more and 30 μm or less.

2. The average oxygen concentration in the region from the top surface of the silicon wafer to 10 μm in the thickness direction is 4.0 × 10 １７ atoms / cm ３以 The silicon wafer of claim 1 ,

3. The oxygen concentration of the silicon wafer is 4.0×10 １７ atoms / cm ３ 3. The silicon wafer according to claim 1, wherein:

4. The silicon wafer according to any one of claims 1 to 3, wherein the resistivity of the silicon wafer is 30 Ω cm or more and 10,000 Ω cm or less.

5. The silicon wafer according to any one of claims 1 to 4, wherein the silicon wafer is free of dislocation clusters and COPs.

6. a high oxygen concentration layer forming step of forming a high oxygen concentration layer on each of the front and back surface layers of the unpolished silicon wafer by heat treating the unpolished silicon wafer in an oxygen-containing gas atmosphere; a high oxygen concentration layer removal step of removing the high oxygen concentration layer on the front surface side of the unpolished silicon wafer after the high oxygen concentration layer formation step, The high oxygen concentration layer formed in the high oxygen concentration layer forming step has an oxygen concentration that is 1.5×10 higher than the oxygen concentration (ASTM F121, 1979) of the unpolished silicon wafer in an oxygen concentration profile in the thickness direction of the unpolished silicon wafer. １７ atoms / cm ３ or higher, The average oxygen concentration in the region from the top surface of the back surface of the silicon wafer to 10 μm in the thickness direction after the high oxygen concentration layer removal process is 4.0×10 １７ atoms / cm ３ Above 15.0 x 10 １７ atoms / cm ３ is as follows: a high oxygen concentration layer formed in the high oxygen concentration layer forming step in each region of the unpolished silicon wafer that is 20 μm or less in a thickness direction from the outermost surface of the front surface and the back surface.

7. The oxygen concentration of the silicon wafer before polishing is 4.0×10 １７ atoms / cm ３ The method for producing a silicon wafer according to claim 6, wherein:

8. 8. The method for producing a silicon wafer according to claim 6, wherein the high oxygen concentration layer removing step includes a double-sided polishing step of simultaneously polishing a front surface and a back surface of the unpolished silicon wafer using a double-sided polishing machine.

9. 9. The method for producing a silicon wafer according to claim 8, wherein in the double-side polishing step, double-side polishing is performed under conditions in which the polishing rate of the front surface side is faster than the polishing rate of the back surface side.

10. 10. The method for producing a silicon wafer according to claim 8, further comprising forming an oxide film only on the back surface side prior to the double-side polishing step.

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