Plasma processing equipment and RF system

Abstract

This plasma treatment device is provided with: a chamber; a substrate support section that is arranged within the chamber and comprises a lower electrode; an upper electrode arranged above the substrate support section; a first RF power source that is electrically connected to the upper electrode and is configured so as to generate a first RF signal, the first RF signal having a first power level between first states in a repeat period, and having a zero power level between second states, third states, and fourth states in the repeat period; a second RF power source that is electrically connected to the lower electrode and is configured so as to generate a second RF signal, the second RF signal having a zero power level between first states and second states, having a second power level between third states, and having a third power level between fourth states; and a DC power source that is electrically connected to the upper electrode and is configured so as to generate a DC signal.

Description

[Technical field]

[0001] The present disclosure relates to a plasma processing apparatus and an RF system. [Background technology]

[0002] As semiconductors become finer, etching processes with high aspect ratios are required. In response to this, a method called ALE (Atomic Layer Etching) has been proposed, which accelerates etching by repeating an etchant deposition step and an ion irradiation step. In ALE, the deposition step and the ion irradiation step are separated by switching the process gas used in each step. In addition, in order to prevent the generation of standing waves of multiple high-frequency powers supplied to the processing chamber of a plasma processing apparatus, it has been proposed to control the pulse waves of high-frequency powers for plasma generation and bias so that they have a predetermined phase difference (Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-157735 A Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a plasma processing apparatus and an RF system capable of performing etching that can achieve both improved selectivity, removability, and shape controllability, and a shortened processing time. [Means for solving the problem]

[0005] According to one aspect of the present disclosure, a plasma processing apparatus includes a chamber, a substrate support disposed within the chamber and including a lower electrode, an upper electrode disposed above the substrate support, a first RF power supply electrically connected to the upper electrode and configured to generate a first RF signal, the first RF signal having a first power level during a first state within a repeating period and having zero power levels during a second state, a third state, and a fourth state within the repeating period, a second RF power supply electrically connected to the lower electrode and configured to generate a second RF signal, the second RF signal having zero power level during the first state and the second state, a second power level during the third state, and a third power level during the fourth state, and a DC power supply electrically connected to the upper electrode and configured to generate a DC signal. Effect of the Invention

[0006] According to the present disclosure, etching can be performed that can improve the selectivity, removability, and shape controllability while shortening the processing time. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram illustrating an example of a plasma processing system according to an embodiment of the present disclosure. [Diagram 2] FIG. 2 is a diagram showing a schematic example of a structure of a substrate to be etched by the plasma processing apparatus according to this embodiment. [Diagram 3] FIG. 3 is a diagram showing an example of one cycle of an RF signal in this embodiment and a reference example. [Figure 4] FIG. 4 is a diagram showing an example of one cycle of an RF signal in this embodiment and a reference example. [Diagram 5] FIG. 5 is a diagram showing an example of a DC signal in this embodiment. [Figure 6] FIG. 6 is a diagram showing an example of an experimental result in this embodiment and a reference example. [Figure 7]FIG. 7 is a diagram showing an example of a shape control model in this embodiment and a reference example. [Figure 8] FIG. 8 is a diagram showing an example of a selectivity improvement model in this embodiment and a reference example. [Figure 9] FIG. 9 is a diagram showing an example of the etching amount in each phase. [Figure 10] FIG. 10 is a diagram showing an example of the emission intensity in each phase. [Figure 11] FIG. 11 is a diagram showing an example of a comparison of the total etching amount between this embodiment and a reference example. [Figure 12] FIG. 12 is a diagram showing an example of one cycle of an RF signal in the modified example. [Figure 13] FIG. 13 is a diagram showing an example of an experimental result when the RF power allocation of LF is changed. [Figure 14] FIG. 14 is an example of a graph showing trend data when the RF power allocation of LF is changed. [Figure 15] FIG. 15 is a diagram showing an example of a shape control model in the modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Hereinafter, embodiments of the disclosed plasma processing apparatus and RF system will be described in detail with reference to the drawings. Note that the disclosed technology is not limited to the following embodiments.

[0009] In a high aspect ratio etching process, for example, when high frequency power is supplied in CW (Continuous Wave), the shape of the bottom of the groove formed in the film to be etched (bottom shape) becomes rectangular and the processing time is short, but etching failure occurs (reduced removability) and the selectivity decreases. Here, the selectivity is the etching rate of the film to be etched / etching rate of the mask. On the other hand, when ALE is used, the removability and selectivity improve, but the bottom shape becomes tapered and the processing time becomes long. In other words, there is a trade-off between the improvement of removability and selectivity and the improvement of shape controllability and the reduction of processing time. Therefore, it is expected to perform etching that can eliminate such a trade-off relationship and achieve both the improvement of the selectivity, removability, and shape controllability and the reduction of processing time.

[0010] [Configuration of plasma processing system] An example of the configuration of a plasma processing system will be described below. FIG. 1 is a diagram showing an example of a plasma processing system according to an embodiment of the present disclosure. As shown in FIG. 1, the plasma processing system includes a capacitively coupled plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing apparatus. The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support unit 11 and a gas introduction unit. The gas introduction unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas introduction unit includes a shower head 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The shower head 13 is disposed above the substrate support unit 11. In an embodiment, the shower head 13 constitutes at least a part of a ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space 10s and at least one gas exhaust port for exhausting gas from the plasma processing space. The sidewall 10a is grounded. The shower head 13 and the substrate support 11 are electrically insulated from the plasma processing chamber 10 housing.

[0011] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region (substrate support surface) 111a for supporting a substrate (wafer) W, and an annular region (ring support surface) 111b for supporting the ring assembly 112. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. In one embodiment, the main body 111 includes a base and an electrostatic chuck. The base includes a conductive member. The conductive member of the base functions as a lower electrode. The electrostatic chuck is disposed on the base. The upper surface of the electrostatic chuck has a substrate support surface 111a. The ring assembly 112 includes one or more annular members. At least one of the one or more annular members is an edge ring. Although not shown, the substrate support 11 may include a temperature adjustment module configured to adjust at least one of the electrostatic chuck, the ring assembly 112, and the substrate W to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow path, or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path. The substrate support 11 may also include a heat transfer gas supply unit configured to supply a heat transfer gas between the back surface of the substrate W and the substrate support surface 111a.

[0012] The shower head 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The shower head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The processing gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The shower head 13 also includes a conductive member. The conductive member of the shower head 13 functions as an upper electrode. In addition to the shower head 13, the gas introduction unit may include one or more side gas injectors (SGIs) attached to one or more openings formed in the side wall 10a.

[0013] The gas supply 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply 20 is configured to supply at least one process gas from a respective gas source 21 through a respective flow controller 22 to the showerhead 13. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply 20 may include one or more flow modulation devices to modulate or pulse a flow rate of the at least one process gas.

[0014] The power source 30 includes an RF power source 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power source 31 is configured to supply at least one RF signal (RF power), such as a source RF signal and a bias RF signal, to a conductive member of the substrate support 11 and / or a conductive member of the showerhead 13. This causes a plasma to be formed from at least one processing gas supplied to the plasma processing space 10s. Thus, the RF power source 31 can function as at least a part of a plasma generating unit configured to generate a plasma from one or more processing gases in the plasma processing chamber 10. In addition, by supplying a bias RF signal to the conductive member of the substrate support 11, a bias potential is generated on the substrate W, and ion components in the formed plasma can be attracted to the substrate W.

[0015] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to the conductive member of the substrate support 11 and / or the conductive member of the shower head 13 via at least one impedance matching circuit, and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 13 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate a plurality of source RF signals having different frequencies. The generated one or more source RF signals are supplied to the conductive member of the substrate support 11 and / or the conductive member of the shower head 13. The second RF generating unit 31b is coupled to the conductive member of the substrate support 11 via at least one impedance matching circuit, and is configured to generate a bias RF signal (bias RF power). In one embodiment, the bias RF signal has a lower frequency than the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 400 kHz to 13.56 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated bias RF signal or signals are provided to the conductive members of the substrate support 11. Also, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0016] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to a conductive member of the substrate support 11 and configured to generate a first DC signal. The generated first bias DC signal is provided to the conductive member of the substrate support 11. In one embodiment, the first DC signal may be provided to another electrode, such as an electrode in an electrostatic chuck. In one embodiment, the second DC generator 32b is connected to a conductive member of the showerhead 13 and configured to generate a second DC signal. The generated second DC signal is provided to the conductive member of the showerhead 13. In various embodiments, at least one of the first and second DC signals may be pulsed. The first and second DC generating units 32a, 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided in place of the second RF generating unit 31b.

[0017] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is adjusted by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0018] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform various steps described in the present disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform various steps described herein. In one embodiment, a part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include, for example, a computer 2a. The computer 2a may include, for example, a processing unit (CPU: Central Processing Unit) 2a1, a storage unit 2a2, and a communication interface 2a3. The processing unit 2a1 may be configured to perform various control operations based on a program stored in the storage unit 2a2. The storage unit 2a2 may include a random access memory (RAM), a read only memory (ROM), a hard disk drive (HDD), a solid state drive (SSD), or a combination thereof. The communication interface 2a3 may communicate with the plasma processing apparatus 1 via a communication line such as a local area network (LAN).

[0019] [Substrate to be processed] Next, a substrate to be etched will be described with reference to FIG. 2. FIG. 2 is a diagram showing an example of the structure of a substrate to be etched by the plasma processing apparatus according to this embodiment. FIG. 2 shows a substrate W in a state 50 before processing and a state 51 after processing. The substrate W has a silicon oxide film 53 and a mask 54 on a silicon substrate 52. The silicon oxide film 53 is a film to be etched. The mask 54 is a silicon nitride film and has a predetermined pattern of openings, for example, comb-shaped openings. The pitch between the openings is, for example, 25 to 30 nm or less, and the target value of the line CD (Critical Dimension) is, for example, 10 nm. In the etching according to this embodiment, as shown in state 51, the etching of the silicon oxide film 53 at the openings of the mask 54 is terminated before reaching the silicon substrate 52, and partial etching is performed so that the aspect ratio of the groove of the silicon oxide film 53 is 7 or more. At this time, it is required to improve the selectivity, which is the relationship between the etching depth 55 and the remaining amount 56 of the mask 54, and to improve the shape controllability of the shape 57 of the bottom of the groove. Therefore, in this embodiment, by controlling the power level of the bias RF signal among the supply patterns in which a source RF signal and a bias RF signal of high frequency power are supplied in pulses, the selectivity, removal property, and shape controllability are improved, and the processing time is shortened compared to the gas switching type ALE.

[0020] [RF signal supply pattern] Next, the supply pattern of the RF signal (high frequency power) in the etching process will be described in comparison with the reference example with reference to Figs. 3 and 4. Figs. 3 and 4 are diagrams showing an example of one cycle of the RF signal in the present embodiment and the reference example. Fig. 3(a) shows a supply pattern 60a in the reference example, and Fig. 3(b) shows a supply pattern 60b in the present embodiment. In the present embodiment, the deposition step and the etching step are repeated by repeating the supply pattern 60b. One cycle of the supply pattern 60b is repeated at, for example, 10000 μs (0.1 kHz). Note that one cycle of the supply pattern 60b may be any period of, for example, 100 ms (10 Hz) or less. For example, when one cycle of the supply pattern 60b is expressed as a repetition period in terms of a repetition frequency, the repetition period may have a repetition frequency within a range of 10 Hz to 100 kHz (100 ms to 10 μs). In the following description and figures, the source RF signal may be expressed as HF (High Frequency), the bias RF signal as LF (Low Frequency), and the second DC signal as DC. In addition, the supply of an RF signal may be expressed as "RF.PW," and the stop of an RF signal may be expressed as "RF Off."

[0021] The supply pattern 60a of the reference example is a case where the power level of the bias RF signal is not changed. The supply pattern 60a has one cycle of 10000 μs (0.1 kHz) like the supply pattern 60b, and is divided into three phases, starting from the beginning: HF supply for 2500 μs, HF and LF stopped for 2500 μs, and LF supply for 5000 μs. In contrast, the supply pattern 60b of the present embodiment is divided into four phases, starting from the beginning: HF supply for 2500 μs at a first power level, HF and LF stopped for 2500 μs, LF supply for 2500 μs at a second power level (RF.PW-1), and LF supply for 2500 μs at a third power level (RF.PW-2).

[0022] In Fig. 4, the power level and DC ON / OFF in each phase of the supply patterns 60a and 60b are shown. In the following description and in the figures, the phases of the supply pattern 60a are respectively represented as phases Ph1a, Ph2a, and Ph3a from the top, and the phases of the supply pattern 60b are respectively represented as phases Ph1b, Ph2b, Ph3b, and Ph4b from the top. The phases Ph1a and Ph1b correspond to the deposition step, and the phases Ph3a, Ph3b, and Ph4b correspond to the etching step. The phases Ph1b, Ph2b, Ph3b, and Ph4b are examples of the first state, the second state, the third state, and the fourth state in the repetition period, respectively.

[0023] In the supply pattern 60a shown in FIG. 4(a), HF is supplied at power level A1 in phase Ph1a, the supply of HF and LF is stopped in phase Ph2a, and LF is supplied at power level A2 in phase Ph3a. In addition, DC is supplied in phases Ph1a to Ph3a (represented as "ON" in FIG. 4(a)). On the other hand, in the supply pattern 60b shown in FIG. 4(b), HF is supplied at power level B1 (first power level) in phase Ph1b, the supply of HF and LF is stopped in phase Ph2b, LF is supplied at power level B2-1 (second power level) in phase Ph3b, and LF is supplied at power level B2-2 (third power level) in phase Ph4b. At this time, the power level B2-1 (second power level) is greater than the power level B2-2 (third power level). In addition, in phases Ph1b and Ph2b, DC is supplied (represented as "ON" in FIG. 4(b)), and in phases Ph3b and Ph4b, the supply of DC is stopped (represented as "OFF" in FIG. 4(b)). That is, in comparison with supply pattern 60a, in supply pattern 60b, the power level during LF supply is changed in two stages, and the supply of DC is stopped in the etch step. Note that the change in the power level during LF supply is not limited to two stages, and may be changed in three or more stages, or may be changed continuously.

[0024] Here, phases Ph1b to Ph4b in supply pattern 60b are an example of a repetition period as described above, and the ratio of phases Ph1b to Ph4b can be changed within the repetition period. In supply pattern 60b shown in FIG. 4(b), phases Ph1b to Ph4b are equally divided at 25% each. In this case, the period of phase Ph1b can be said to be the same as the period of phase Ph2b. Also, the period of phase Ph3b can be said to be the same as the period of phase Ph4b.

[0025] On the other hand, when changing the ratio of phases Ph1b to Ph4b, for example, the period of phase Ph1b may be longer or shorter than the period of phase Ph2b. Similarly, the period of phase Ph3b may be longer or shorter than the period of phase Ph4b. Moreover, the period of phase Ph2b is preferably 50% or less of the repetition period. Furthermore, the range of the ratio of phases Ph1b to Ph4b is preferably within a range of 5% to 90% of the repetition period. Moreover, both the length and the ratio of the repetition period may be changed, and in this case, the period of phases Ph1b to Ph4b is preferably within a range of 0.5 microseconds to 90 milliseconds (0.5 μs to 90 ms). The change in the length and the ratio of the periods of phases Ph1b to Ph4b may be combined with the modified example described later.

[0026] The relationship between the period of phase Ph1b and the period of phase Ph2b is such that, when the period of phase Ph2b is longer than the period of phase Ph1b, the plasma density decreases significantly and the radical / ion ratio increases. Also, when the period of phase Ph2b is longer than the period of phase Ph1b, the transport of radicals to the bottom of the trench is promoted, the etching progresses more easily, and the removal property is improved. On the other hand, when the period of phase Ph2b is shorter than the period of phase Ph1b, the amount of deposition on the mask 54 increases, and the selectivity can be improved.

[0027] When the period of phase Ph3b is the same as the period of phase Ph4b, the bottom shape of the trench can be controlled by controlling the power level B2-1 of phase Ph3b and the power level B2-2 of phase Ph4b. When the power level B2-1 of phase Ph3b is greater than the power level B2-2 of phase Ph4b, the bottom shape of the trench becomes tapered. On the other hand, when the power level B2-1 of phase Ph3b is less than the power level B2-2 of phase Ph4b (see the modified example described later), the bottom shape of the trench becomes rectangular (vertical). In this way, when the period of phase Ph3b is the same as the period of phase Ph4b, the bottom shape of the trench can be controlled by controlling the power level B2-1 of phase Ph3b and the power level B2-2 of phase Ph4b. Note that the experimental results are shown in FIG. 13 described later.

[0028] In addition, the relationship between the period of phase Ph3b and the period of phase Ph4b is such that if the period of phase Ph3b is longer than the period of phase Ph4b, the bottom shape of the trench becomes rectangular (vertical). On the other hand, if the period of phase Ph3b is shorter than the period of phase Ph4b, the bottom shape of the trench becomes tapered. In other words, the bottom shape of the trench can be controlled by controlling the period of phase Ph3b and the period of phase Ph4b.

[0029] Next, a second DC signal (hereinafter, simply referred to as a DC signal) supplied to the conductive member (upper electrode) of the shower head 13 will be described with reference to FIG. 5. FIG. 5 is a diagram showing an example of a DC signal in this embodiment. In one embodiment, the DC signal has a constant voltage level of negative polarity during the ON period as shown in FIG. 5(a). In one embodiment, the DC signal has a sequence of multiple pulses of negative polarity during the ON period as shown in FIG. 5(b). For example, in phase Ph1b, the sequence of multiple pulses of negative polarity is superimposed with HF at the upper electrode.

[0030] In the supply pattern 60b shown in FIG. 4(b), the DC signal has, for example, a first voltage level in phases Ph1b and Ph2b, and a second voltage level in phases Ph3b and Ph4b. At this time, the relationship between the first voltage level and the second voltage level is, for example, the absolute value of the first voltage level>the absolute value of the second voltage level. That is, the DC signal has a first voltage level having negative polarity during phases Ph1b and Ph2b, and has a second voltage level during phases Ph3b and Ph4b, and the absolute value of the second voltage level is smaller than the absolute value of the first voltage level.

[0031] In addition, in the supply pattern 60b shown in FIG. 4(b), the DC signal may have, for example, a first voltage level of −50V to −2500V and a second voltage level of 0V (zero voltage level). In this case, the first voltage level has a pulse frequency in the range of 1kHz to 100kHz. That is, the first voltage level has a sequence of negative DC pulses having a pulse frequency in the range of 1kHz to 100kHz. Note that the DC signal may be a signal of constant voltage level of negative polarity that is not a pulse in the phases Ph1b to Ph4b, for example.

[0032] In this way, by supplying a DC signal in phases Ph1b and Ph2b, the carbon composition ratio of the CF deposit, which is the reaction product (depot), can be increased, which contributes to improving the mask selectivity and the controllability of the CD.

[0033] [Experimental Results] Next, the experimental results will be described with reference to FIG. 6. FIG. 6 is a diagram showing an example of the experimental results in the present embodiment and the reference example. FIG. 6(a) shows the experimental results in the reference example corresponding to the supply pattern 60a and the example corresponding to the supply pattern 60b. FIG. 6(b) shows the measurement points of the etching depth d1, the mask remaining amount r1, and the bottom angle θ. In FIG. 6(b), a SiON layer 65, which is an oxide layer of the silicon nitride film, is formed around the mask (SiN). In addition, the following processing conditions were used. In FIG. 6, the power level of the LF is represented as the LF column (second power level) and the LF-2 column (third power level), and when the power level is one level, the LF-2 column is represented as 0. In addition, the LF effective power is set to be the same in the reference example and the example.

[0034] <Processing conditions> Pressure in plasma processing chamber 10: 25 mTorr (3.33 Pa) Temperature: 133℃ Source RF signal power (60MHz): 200W (pulse) Bias RF signal power (12.88MHz): Reference example: 175W (pulse) Example: 300W / 50W (pulse) Voltage of the second DC signal: -500V Pulse frequency: 0.1kHz Pulse duty: HF / LF / LF offset =25 / 50 / 50% Process gas (C4F6 / O2 / Ar) flow rate ratio: 0.5 / 0.47 / 100

[0035] As shown in FIG. 6, the etching depth d1 was 37.8 nm in the reference example and 40.9 nm in the example. The remaining mask amount r1 was 21.5 nm in the reference example and 24.9 nm in the example, and the mask selectivity was high. The etching time was 444.8 seconds in the reference example and 416.7 seconds in the example. The bottom angle θ was 87.5°, which is steeper than 86.2° in the reference example, and the bottom shape of the example is more rectangular than that of the reference example. Thus, the supply pattern according to this embodiment has higher selectivity than the supply pattern with a constant LF power level, the bottom shape is closer to a rectangle, and the processing time can be shortened.

[0036] [Analysis results] <Shape control model> Next, the shape control model will be described with reference to Fig. 7. Fig. 7 is a diagram showing an example of the shape control model in this embodiment and a reference example. Fig. 7(a) is a shape control model in phase Ph3a of the reference example. In phase Ph3a, Ar ions generated by the second plasma are attracted from the opening of the mask 54 to the bottom of the groove in the silicon oxide film 53 by the bias potential, and etching proceeds as shown in state 58.

[0037] 7(b) shows a shape control model in phases Ph3b and Ph4b of the experimental example. In phase Ph3b, Ar ions generated by the second plasma are attracted from the opening of the mask 54 to the bottom of the groove in the silicon oxide film 53 by the bias potential, and etching proceeds as shown in state 59a. In the following phase Ph4b, the power level of the bias RF signal is reduced, so that the ion energy of the Ar ions generated by the second plasma is reduced and the incidence angle is increased, so that the shape of the bottom of the groove in the silicon oxide film 53 (bottom shape) can be widened as shown in state 59b, and the bottom shape can be made rectangular (with vertical walls).

[0038] <Selectivity improvement model> Next, the selection ratio improvement model will be described with reference to FIG. 8. FIG. 8 is a diagram showing an example of the selection ratio improvement model in the present embodiment and the reference example. In FIG. 8, the relationship between the amount of CF, which is the reaction product (depo) adhering to the surface of the mask 54 during one cycle of the supply patterns 60a and 60b, and the etching amount of CF is shown respectively. The graph 61a shown in FIG. 8(a) shows the case of the supply pattern 60a of the reference example. In the phases Ph1a + Ph2a, the amount of CF represented by the graph 62a increases, and the etching amount shown by the graph 63a is zero. Next, in the phase Ph3a, as the etching amount increases, the amount of CF decreases, and at the timing 64a, the CF adhering to the surface of the mask 54 disappears, and the mask 54 is damaged.

[0039] The graph 61b shown in FIG. 8(b) shows the case of the supply pattern 60b of the embodiment. In the phases Ph1a + Ph2a, the amount of CF represented by the graph 62b increases, and the etching amount shown by the graph 63b is zero. Next, in the phase Ph3b, as the etching amount increases, the amount of CF decreases, but at the end of the phase Ph3b, CF remains slightly. Subsequently, in the phase Ph4b, since the power level of the bias RF signal decreases and the ion energy of Ar ions decreases, the decrease in the remaining amount of CF becomes gentle, and at the timing 64b, the CF adhering to the surface of the mask 54 disappears, and the mask 54 is damaged. Comparing the graph 61a and the graph 61b, it can be seen that the supply pattern 60b according to the present embodiment causes less damage to the mask 54 than the supply pattern 60a according to the reference example. That is, the supply pattern 60b of the present embodiment can improve the selection ratio more than the supply pattern 60a of the reference example.

[0040] <Behavior during RF signal supply> Next, the behavior of each phase of the supply pattern 60b of this embodiment will be described with reference to FIG. 9 and FIG. 10. FIG. 9 is a diagram showing an example of the etching amount in each phase. A graph 70 shown in FIG. 9 shows the etching amount of the silicon oxide film 53 in phases Ph1b, Ph3b, and Ph4b in which HF or LF is supplied in the supply pattern 60b. As shown in the graph 70, in phase Ph1b, etching of the silicon oxide film 53 does not progress, and it can be seen that the contribution of phase Ph1b to the etching is small. On the other hand, in phases Ph3b and Ph4b, etching of the silicon oxide film 53 progresses, and it can be seen that the contribution of phases Ph3b and Ph4b to the etching is large. It can also be seen that the etching amount of the silicon oxide film 53 is greater in phase Ph3b in which the power level of the bias RF signal is high than in phase Ph4b in which the power level is low.

[0041] Fig. 10 is a diagram showing an example of the emission intensity in each phase. Graph 71 shown in Fig. 10 shows the emission intensity in phases Ph1b, Ph3b, and Ph4b in which HF or LF is supplied in supply pattern 60b. As shown in region 72 of graph 71, in phase Ph1b, it can be seen that the CF emission is strong and contributes greatly to the generation of deposits. On the other hand, in phases Ph3b and Ph4b, it can be seen that the CF emission is weak and contributes little to the generation of deposits.

[0042] <Verification of etching speed> Next, the etching rate will be described with reference to FIG. 11. FIG. 11 is a diagram showing an example of a comparison of the total etching amount between the present embodiment and the reference example. As shown in FIG. 11, the LF effective power is the same in the reference example and the example according to the present embodiment, but the SiO etching amount differs depending on the LF power. In the reference example, when the LF power is 175 W (phase Ph3a), the SiO etching amount is 36.1 [nm / 2 min]. In contrast, in the example, when the LF power is 300 W (phase Ph3b), the SiO etching amount is 63.2 [nm / 2 min], and when the LF power is 50 W (phase Ph4b), the SiO etching amount is 15.2 [nm / 2 min]. When these are multiplied by the duty, which is the ratio (on / (on+off)) of the supply time of the LF power in one cycle, the SiO total etching amount is 18.1 [nm / duty%] in the reference example. On the other hand, in the embodiment, when the LF power is 300 W (phase Ph3b), the etching rate is 15.8 [nm / duty%], and when the LF power is 50 W (phase Ph4b), the etching rate is 3.8 [nm / duty%], resulting in a total of 19.6 [nm / duty%]. Therefore, the embodiment in which processing is performed at multiple power levels has a faster etching rate than the reference example.

[0043] [Variations] In the above embodiment, in the supply pattern 60b, the power level of the bias RF signal is high in phase Ph3b and the power level of phase Ph4b is lower than that of phase Ph3b, but the relationship between the power levels of phase Ph3b and phase Ph4b may be changed. In other words, the distribution of LF RF power (LF power) may be changed.

[0044] Fig. 12 is a diagram showing an example of one cycle of an RF signal in a modified example. In the supply pattern 60c shown in Fig. 12, HF is supplied at a power level B1 (first power level) in phase Ph1b, and the supply of HF and LF is stopped in phase Ph2b. Also, LF is supplied at a power level B2-1 (second power level) in phase Ph3b, and LF is supplied at a power level B2-2 (third power level) in phase Ph4b, but the power level B2-2 is higher than the power level B2-1. That is, the supply pattern 60c is a supply pattern in which the magnitudes of the power levels B2-1 and B2-2 are swapped with respect to the supply pattern 60b shown in Fig. 4(b). That is, the power level B2-1 (second power level) is lower than the power level B2-2 (third power level).

[0045] [Experimental results for modified examples] Next, the experimental results of the modified example will be described with reference to FIG. 13. FIG. 13(a) is a diagram showing an example of the experimental results when the RF power distribution of LF is changed. FIG. 13(b) shows the measurement points of the etching depth d1, the mask remaining amount r1, the bottom angle θ, the TCD (Top Critical Dimension) and the BCD (Bottom Critical Dimension). In FIG. 13(b), a SiON layer 65, which is an oxide layer of a silicon nitride film, is formed around the mask (SiN). The processing conditions in FIG. 13 are the same as those in FIG. 6 of the above-mentioned embodiment except for the distribution of the LF power. FIG. 13 shows the experimental results when the distribution of the power levels B2-1 and B2-2 of phases Ph3b and Ph4b is changed from condition A to condition F. Condition A is the same condition as FIG. 6, that is, the power level B2-1 of phase Ph3b is 300 W and the power level B2-2 of phase Ph4b is 50 W. In FIG. 13, the LF power distribution column shows the power levels B2-1, B2-2 in that order in the format of 300W / 50W.

[0046] Conditions B to F are also shown in the same format, with power levels B2-1, B2-2, respectively. Condition B is 250W / 100W, condition C is 200W / 150W, condition D is 175W / 175W, condition E is 100W / 250W, and condition F is 50W / 300W. The LF effective power is the same at 87.5W from condition A to condition F.

[0047] The etching time was 416.7 seconds for condition A, 487.6 seconds for condition B, 515.8 seconds for condition C, 452.0 seconds for condition D, 558.8 seconds for condition E, and 556.1 seconds for condition F. The remaining mask amount r1 was 24.9 nm for condition A, 22.2 nm for condition B, 21.7 nm for condition C, 20.5 nm for condition D, 19.7 nm for condition E, and 22.4 nm for condition F. The etching depth d1 was 40.9 nm for condition A, 41.3 nm for condition B, 43.0 nm for condition C, 40.6 nm for condition D, 36.3 nm for condition E, and 32.3 nm for condition F.

[0048] The difference between the TCD and BCD (TCD-BCD) of the fin, ΔCD, was 3.5 nm for condition A, 2.6 nm for condition B, 2.5 nm for condition C, 2.5 nm for condition D, 1.5 nm for condition E, and 1.4 nm for condition F. The bottom angle θ of the cross section was 87.55° for condition A, 88.20° for condition B, 88.40° for condition C, 88.24° for condition D, 88.80° for condition E, and 88.75° for condition F. From the experimental results of FIG. 13, the shape controllability of making the bottom shape of the trench rectangular is the most vertical and excellent for condition F, but the etching time is long. On the other hand, the mask remaining amount r1 is the largest for condition A. Thus, the processing conditions can be appropriately applied from conditions A to F according to the required characteristics such as shape controllability and the aspect ratio of the trench.

[0049] FIG. 14 is an example of a graph showing trend data when the RF power distribution of the LF is changed. Graph 73 shown in FIG. 14 is a graph of the etching depth d1 and the bottom angle θ of the experimental results shown in FIG. 13(a). As shown in graph 73, it can be seen that there is a trend of the bottom angle θ becoming vertical from condition A to condition F depending on the LF power distribution. On the other hand, it can be seen that the etching depth d1 is slightly shallower under conditions E and F than under conditions A to D, but there is not as much of a trend as the bottom angle θ. From this, it can be seen that the shape controllability is improved with a supply pattern in which the power level of phase Ph4b is higher than the power level of phase Ph3b, as in conditions E and F.

[0050] FIG. 15 is a diagram showing an example of a shape control model in the modified example. FIG. 15 shows a shape control model in phases Ph3b and Ph4b in the modified example. In phase Ph3b, Ar ions generated by the second plasma are attracted from the opening of the mask 54 to the bottom of the groove in the silicon oxide film 53 by the bias potential, and etching proceeds as shown in state 74a. At this time, in phase Ph3b, the power level of the bias RF signal is low, so that the ion energy of the Ar ions generated by the second plasma is low, and the incidence angle is large, so that the shape of the bottom of the groove in the silicon oxide film 53 (bottom shape) is widened. In the following phase Ph4b, the power level of the bias RF signal increases, so that the ion energy of the Ar ions generated by the second plasma is also high, and the etching rate is faster than in phase Ph3b. In this case, as shown in state 74b, the shape controllability for making the shape of the bottom of the groove in the silicon oxide film 53 (bottom shape) rectangular is improved compared to the case of the supply pattern 60b shown in FIG. 7(b).

[0051] As described above, according to this embodiment, the plasma processing apparatus includes a chamber (plasma processing chamber 10), a substrate support 11 disposed within the chamber and including a lower electrode, an upper electrode disposed above the substrate support 11, a first RF power supply (first RF generating unit 31a) electrically connected to the upper electrode and configured to generate a first RF signal, the first RF signal having a first power level during a first state within a repetition period and having zero power levels during a second state, a third state, and a fourth state within the repetition period, a second RF power supply (second RF generating unit 31b) electrically connected to the lower electrode and configured to generate a second RF signal, the second RF signal having zero power level during the first state and the second state, a second power level during the third state, and a third power level during the fourth state, and a DC power supply (second DC generating unit 32b) electrically connected to the upper electrode and configured to generate a DC signal. As a result, etching can be performed that can improve the selectivity, removability, and shape controllability while shortening the processing time.

[0052] Moreover, according to this embodiment, the DC signal has a constant voltage level with negative polarity among the first state, the second state, the third state, and the fourth state. As a result, the carbon composition ratio of the CF deposit, which is the reaction product (depot), can be made higher.

[0053] Moreover, according to this embodiment, the DC signal has a first voltage level having a negative polarity between the first state and the second state, and has a second voltage level between the third state and the fourth state, and the absolute value of the second voltage level is smaller than the absolute value of the first voltage level. As a result, the carbon composition ratio of the CF deposit, which is the reaction product (depot), can be increased, and this can contribute to improving the mask selectivity and the controllability of the CD.

[0054] According to the present embodiment, the second voltage level has a zero voltage level, which results in a higher carbon composition ratio in the CF deposit, which is a reaction product (depot), and contributes to an improvement in the mask selectivity and CD controllability.

[0055] According to the present embodiment, the first voltage level has a sequence of negative DC pulses having a pulse frequency in the range of 1 kHz to 100 kHz, which results in a higher carbon composition ratio in the CF deposit, which is the reaction product (depot), and contributes to improved mask selectivity and CD controllability.

[0056] Furthermore, according to this embodiment, the second power level is greater than the third power level, which results in the bottom shape of the trench being tapered.

[0057] Furthermore, according to this embodiment, the second power level is lower than the third power level, so that the bottom shape of the trench can be made rectangular (vertical).

[0058] Furthermore, according to this embodiment, the repetition period is 100 milliseconds or less, which reduces damage to the mask and improves the selectivity.

[0059] Furthermore, according to this embodiment, the repetition period has a repetition frequency within the range of 10 Hz to 100 kHz, which results in reduced damage to the mask and improved selectivity.

[0060] Moreover, according to this embodiment, the period of the second state is 50% or less of the repetition period, which results in improved selectivity and release properties.

[0061] Moreover, according to this embodiment, the period of the first state is the same as the period of the second state, so that the radical / ion ratio can be controlled to a medium range, and the amount of deposits generated and the selectivity can be controlled.

[0062] Moreover, according to this embodiment, the period of the first state is longer than the period of the second state, so that the radical / ion ratio can be controlled within a narrow range, and the amount of deposits generated and the selectivity can be controlled.

[0063] Moreover, according to this embodiment, the period of the first state is shorter than the period of the second state, and as a result, the radical / ion ratio can be controlled within a wide range, and the amount of deposits generated and the selectivity can be controlled.

[0064] According to this embodiment, the second power level is higher than the third power level, and the period of the third state is the same as the period of the fourth state. As a result, the amount of etching in the depth direction can be increased, and the amount of etching in the lateral direction at the bottom can be suppressed. Also, the bottom shape can be tapered.

[0065] According to the present embodiment, the second power level is higher than the third power level, and the period of the third state is longer than the period of the fourth state. As a result, the amount of etching in the depth direction is increased, and the amount of etching in the lateral direction at the bottom is suppressed. Also, the bottom shape can be tapered.

[0066] According to this embodiment, the second power level is higher than the third power level, and the period of the third state is shorter than the period of the fourth state. As a result, the amount of etching in the depth direction can be suppressed, and the amount of etching in the lateral direction at the bottom can be increased. Also, the bottom shape can be made rectangular (vertical).

[0067] According to this embodiment, the second power level is lower than the third power level, and the period of the third state is the same as the period of the fourth state. As a result, the amount of etching in the depth direction can be suppressed, and the amount of etching in the lateral direction at the bottom can be increased. Also, the bottom shape can be made rectangular (vertical).

[0068] According to this embodiment, the second power level is lower than the third power level, and the period of the third state is longer than the period of the fourth state. As a result, the amount of etching in the depth direction can be suppressed, and the amount of etching in the lateral direction at the bottom can be increased. Also, the bottom shape can be made rectangular (vertical).

[0069] According to this embodiment, the second power level is lower than the third power level, and the period of the third state is shorter than the period of the fourth state. As a result, the amount of etching in the depth direction can be increased, and the amount of etching in the lateral direction at the bottom can be suppressed. Also, the bottom shape can be tapered.

[0070] According to the present embodiment, the period of the first state and the period of the second state are within a range of 0.5 microseconds to 90 milliseconds, and as a result, the radical / ion ratio can be controlled, and the amount of deposits generated and the selectivity can be controlled.

[0071] Furthermore, according to this embodiment, the period of the third state and the period of the fourth state are within the range of 0.5 microseconds to 90 milliseconds, and as a result, the bottom shape of the trench can be controlled.

[0072] According to the present embodiment, the period of the first state and the period of the second state are within the range of 5% to 90% of the repetition period, and as a result, the radical / ion ratio can be controlled, and the amount of deposits generated and the selectivity can be controlled.

[0073] Furthermore, according to this embodiment, the period of the third state and the period of the fourth state are within the range of 5% to 90% of the repetition period, which makes it possible to control the bottom shape of the trench.

[0074] According to the present embodiment, the RF system (RF power supply 31) includes a first RF generator (first RF generating unit 31a) configured to generate a first RF signal, the first RF signal having a first power level during a first state in a repeating period and a zero power level during a second state, a third state, and a fourth state in the repeating period, and a second RF generator (second RF generating unit 31b) configured to generate a second RF signal, the second RF signal having a zero power level during the first state and the second state, a second power level during the third state, and a third power level during the fourth state. As a result, etching can be performed that can achieve both improved selectivity, removal, and shape controllability, and a shortened processing time.

[0075] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.

[0076] In the above embodiment, the capacitively coupled plasma processing apparatus 1 is used as an example to perform processing such as etching on the substrate W using capacitively coupled plasma as a plasma source, but the disclosed technology is not limited to this. As long as the apparatus performs processing on the substrate W using plasma, the plasma source is not limited to capacitively coupled plasma, and any plasma source such as inductively coupled plasma, microwave plasma, magnetron plasma, etc. can be used.

[0077] Furthermore, the above-described embodiments and modified examples can be appropriately combined as long as the configuration contents are not contradictory. [Explanation of symbols]

[0078] 1. Plasma processing equipment 2. Control section 10 Plasma Processing Chamber 11 Substrate support 20 Gas supply section 31 RF power supply 31a First RF generation unit 31b Second RF generation unit 40 Exhaust system 52 Silicon Substrate 53 Silicon oxide film 54 Mask W substrate

Claims

1. A chamber; a substrate support disposed within the chamber and including a lower electrode; an upper electrode disposed above the substrate support; a first RF power source electrically connected to the upper electrode and configured to generate a first RF signal, the first RF signal having a first power level during a first state within a repeating period and having zero power levels during a second state, a third state, and a fourth state within the repeating period; a second RF power source electrically connected to the lower electrode and configured to generate a second RF signal, the second RF signal having a zero power level during the first state and the second state, a second power level during the third state, and a third power level during the fourth state; a DC power supply electrically connected to the upper electrode and configured to generate a DC signal; A plasma processing apparatus comprising:

2. the DC signal has a constant voltage level with a negative polarity during the first state, the second state, the third state, and the fourth state. The plasma processing apparatus according to claim 1 .

3. the DC signal has a first voltage level having a negative polarity between the first state and the second state, and a second voltage level between the third state and the fourth state, the absolute value of the second voltage level being less than the absolute value of the first voltage level; The plasma processing apparatus according to claim 1 .

4. the second voltage level having a zero voltage level. The plasma processing apparatus according to claim 3 .

5. the first voltage level comprises a sequence of negative DC pulses having a pulse frequency in the range of 1 kHz to 100 kHz; The plasma processing apparatus according to claim 3 .

6. the second power level is greater than the third power level.

6. The plasma processing apparatus according to claim 1.

7. the second power level is less than the third power level.

6. The plasma processing apparatus according to claim 1.

8. The repetition period is 100 milliseconds or less.

6. The plasma processing apparatus according to claim 1.

9. The repetition period has a repetition frequency in the range of 10 Hz to 100 kHz.

6. The plasma processing apparatus according to claim 1.

10. The duration of the second state is 50% or less of the repeat period.

6. The plasma processing apparatus according to claim 1.

11. The duration of the first state is the same as the duration of the second state.

6. The plasma processing apparatus according to claim 1.

12. The duration of the first state is longer than the duration of the second state.

6. The plasma processing apparatus according to claim 1.

13. The duration of the first state is shorter than the duration of the second state.

6. The plasma processing apparatus according to claim 1.

14. The duration of the third state is the same as the duration of the fourth state. The plasma processing apparatus according to claim 6 .

15. The duration of the third state is longer than the duration of the fourth state. The plasma processing apparatus according to claim 6 .

16. The duration of the third state is shorter than the duration of the fourth state. The plasma processing apparatus according to claim 6 .

17. The duration of the third state is the same as the duration of the fourth state. The plasma processing apparatus according to claim 7 .

18. The duration of the third state is longer than the duration of the fourth state. The plasma processing apparatus according to claim 7 .

19. The duration of the third state is shorter than the duration of the fourth state. The plasma processing apparatus according to claim 7 .

20. The duration of the first state is in the range of 0.5 microseconds to 90 milliseconds.

6. The plasma processing apparatus according to claim 1.

21. The duration of the second state is in the range of 0.5 microseconds to 90 milliseconds. The plasma processing apparatus according to claim 20.

22. the duration of the third state is in the range of 0.5 microseconds to 90 milliseconds; The plasma processing apparatus of claim 21 .

23. the duration of the fourth state is in the range of 0.5 microseconds to 90 milliseconds; The plasma processing apparatus of claim 22.

24. The duration of the first state is within a range of 5% to 90% of the repeat period.

6. The plasma processing apparatus according to claim 1.

25. The duration of the second state is within a range of 5% to 90% of the repeat period. The plasma processing apparatus of claim 24.

26. The period of the third state is within a range of 5% to 90% of the repeat period. The plasma processing apparatus of claim 25.

27. The period of the fourth state is within a range of 5% to 90% of the repeat period. The plasma processing apparatus of claim 26.

28. a first RF generator configured to generate a first RF signal, the first RF signal having a first power level during a first state within a repeating period and having zero power levels during a second state, a third state, and a fourth state within the repeating period; a second RF generator configured to generate a second RF signal, the second RF signal having a zero power level during the first state and the second state, a second power level during the third state, and a third power level during the fourth state; An RF system comprising:

29. the second power level is greater than the third power level.

30. The RF system of claim 28.

30. the second power level is less than the third power level.

30. The RF system of claim 28.

31. The repetition period is 100 milliseconds or less. An RF system according to any one of claims 28 to 30.

32. The repetition period has a repetition frequency in the range of 10 Hz to 100 kHz. An RF system according to any one of claims 28 to 30.

33. The duration of the second state is 50% or less of the repeat period. An RF system according to any one of claims 28 to 30.

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