Semiconductor module and method for manufacturing semiconductor module

Abstract

To provide a semiconductor module capable of improving temperature detection accuracy.SOLUTION: A semiconductor module comprises: a semiconductor chip including a switching element and a diode for temperature detection; an integrated circuit including a correction circuit which corrects a reference voltage used to detect a forward voltage when a prescribed current is supplied to the diode at a prescribed temperature and a control circuit which controls switching of the switching element on the basis of the corrected reference voltage and a driving signal; and a mounting plate provided with the semiconductor chip and the integrated circuit. The mounting plate comprises a pad connected to the diode by a wiring. The pad is formed wider than the sum of a first area required for connection with the wiring and a second area required for contact with a probe of a measuring device for measuring the forward voltage.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a semiconductor module and a method for manufacturing a semiconductor module. [Background technology]

[0002] There is known a semiconductor module equipped with a semiconductor chip on which a switching element such as an IGBT and a diode for temperature detection are formed, and an integrated circuit (IC) that drives the switching element according to the temperature detection result. In such a semiconductor module, the temperature detection accuracy may decrease due to variations in the temperature characteristics of the diode. In view of this, a semiconductor module has been proposed that measures and corrects the temperature characteristics of the diode (see, for example, Patent Documents 1 to 3). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2006-105870 A [Patent Document 2] JP 2006-166860 A [Patent Document 3] Japanese Patent Application Publication No. 5-40533 Summary of the Invention [Problem to be solved by the invention]

[0004] In Patent Document 1, the temperature characteristics of the diode are measured and corrected before the semiconductor chip is mounted (in a wafer state). In this case, there is a risk that the temperature characteristics may change due to the influence of stress after the semiconductor chip is mounted. In Patent Documents 2 and 3, the correction is performed using a non-volatile memory such as an EEPROM, which is costly.

[0005] The present invention has been made in consideration of the above-mentioned problems in the conventional technology, and has an object to provide a conductor module and a method for manufacturing a semiconductor module that can improve the accuracy of temperature detection. [Means for solving the problem]

[0006] The semiconductor module of the present invention, which solves the above-mentioned problems, comprises a semiconductor chip having a switching element and a diode for temperature detection, an integrated circuit having a correction circuit that corrects a reference voltage used to detect a forward voltage when a predetermined current is supplied to the diode at a predetermined temperature, and a control circuit that controls the switching of the switching element based on the corrected reference voltage and a drive signal, and a mounting plate on which the semiconductor chip and the integrated circuit are mounted, the mounting plate having a pad connected to the diode by wiring, the pad being formed larger than the sum of a first area required for connection to the wiring and a second area required for contact with a probe of a measuring device that measures the forward voltage.

[0007] In addition, a manufacturing method for a semiconductor module of the present invention that solves the above-mentioned problems is a manufacturing method for a semiconductor module including an integrated circuit having a semiconductor chip having a switching element and a diode for temperature detection, a fuse circuit that corrects a reference voltage used to detect a forward voltage when a predetermined current is supplied to the diode, and a control circuit that controls the switching of the switching element based on the corrected reference voltage and a drive signal, and the method includes a first mounting step of mounting the semiconductor chip on a mounting plate, a bonding step of connecting a pad provided on the mounting plate and the diode of the semiconductor chip with wiring, a measurement step of supplying the predetermined current to the diode at a predetermined temperature and obtaining measurement data indicating the forward voltage, a trimming step of laser trimming the fuse circuit based on the measurement data, and a second mounting step of mounting the integrated circuit after the laser trimming on the mounting plate. Effect of the Invention

[0008] According to the present invention, it is possible to provide a semiconductor module capable of improving the accuracy of temperature detection. [Brief description of the drawings]

[0009] [Figure 1] 1 is an overall schematic diagram of a semiconductor module 10 according to the present embodiment. [Diagram 2] FIG. 2 is a detailed view of the area surrounded by the dashed line in FIG. [Diagram 3] FIG. 2 is a circuit diagram showing an example of the configuration of an IC30A. [Figure 4] 2 is a circuit diagram showing an example of the configuration of a fuse circuit 34. FIG. [Diagram 5] 5A to 5C are explanatory diagrams of the pad P1 of this embodiment. [Figure 6] 3 is a flow diagram showing an example of a method for manufacturing the semiconductor module 10. FIG. [Figure 7] FIG. 1 is a diagram showing a state in which semiconductor chips 20A to 20F are mounted on a substrate K1. [Figure 8] 13 is a diagram showing a connection state between pads P1, P2 of a substrate K2 and a diode 22. FIG. [Figure 9] FIG. 4 is an explanatory diagram of measurement of temperature characteristics of a diode 22. [Figure 10] 13 is an explanatory diagram of measurement of temperature characteristics of a diode 22 in a modified example. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] At least the following points will become apparent from the description of this specification and the accompanying drawings. ===== Implementation form ===== <<<Overview of Semiconductor Module 10>>>

[0011] Fig. 1 is a schematic overall view of a semiconductor module 10 according to the present embodiment, and Fig. 2 is a detailed view of a portion surrounded by a dashed line in Fig. 1.

[0012] The semiconductor module 10 of this embodiment is a power module that drives a load (not shown) such as a three-phase motor, and includes a base substrate K0, substrates K1 and K2, semiconductor chips 20A-20F, integrated circuits (hereinafter, ICs) 30A-30F, and wiring groups W1-W6. The base substrate K0 and the substrates K1 and K2 correspond to a "mounting plate."

[0013] The base substrate K0 is a metal plate made of, for example, aluminum, copper, or an alloy containing these, and has a rectangular shape in plan view, and has a smooth bonding surface on the upper surface to which the substrates K1 and K2 are bonded. The substrates K1 and K2 are attached to the base substrate K0 via a bonding material (such as solder) (not shown).

[0014] The substrate K1 is a substrate on which the semiconductor chips 20A to 20F are mounted, and corresponds to a "first substrate." The substrate K1 is a laminated substrate including an insulating layer made of ceramic or resin and a conductive layer formed thereon. The substrate K1 in this embodiment is a DCB (Direct Copper Bonding) substrate in which a copper conductive pattern is formed on a ceramic layer.

[0015] The board K2 is a board on which the ICs 30A to 30F are mounted, and corresponds to a "second board." The board K2 in this embodiment is a printed circuit board (PCB) made of glass epoxy, on which a conductor wiring pattern is formed, and on which electronic components are soldered. As shown in Fig. 2, the board K2 is provided with pads P1, P2, and P3 in the vicinity of the arrangement position of each IC (IC 30A in Fig. 2).

[0016] As shown in Fig. 1, the substrates K1 and K2 are provided on a base substrate K0 at a distance from each other. However, this is not limited thereto, and for example, in one substrate, a portion on which the semiconductor chips 20A-20F are mounted (a portion of the substrate K1) and a portion on which the ICs 30A-30F are mounted (a portion of the substrate K2) may be provided so as to be electrically insulated from each other. In this case, the one substrate corresponds to the "mounting plate".

[0017] Each of the semiconductor chips 20A to 20F includes a switching element 21 and a diode 22 within the same chip.

[0018] The switching element 21 is an element for supplying power to a load. In this embodiment, an IGBT (Insulated Gate Bipolar Transistor) is used as the switching element 21. In this embodiment, the semiconductor chips 20A to 20C are lower arm elements provided on the ground side of a bridge circuit (not shown), and the semiconductor chips 20D to 20F are upper arm elements provided on the power supply side. In this embodiment, an IGBT is used as the switching element 21, but it may be, for example, a bipolar transistor or a MOS transistor.

[0019] The diode 22 is a temperature detection diode for detecting the chip temperature (more specifically, the temperature of the switching element 21). The diode 22 has a negative temperature characteristic, and when the temperature rises, the forward voltage VF decreases, and when the temperature drops, the forward voltage VF increases. By measuring the relationship (temperature characteristic) between the forward voltage VF of the diode 22 and the temperature in advance, the temperature during driving of the switching element 21 can be detected from the forward voltage VF of the diode 22. The semiconductor module 10 of this embodiment has an overheat protection function, and performs an overheat protection operation to stop driving the switching element 21 based on the detected temperature, as described later. This makes it possible to prevent damage to the switching element 21 and the like. Note that the overheat protection is not limited to this, and for example, the driving ability of the switching element 21 may be changed depending on the temperature. In addition, in this embodiment, for the sake of simplification, one diode 22 is provided on one semiconductor chip, but this is not limited to this, and for example, multiple diodes 22 may be connected in series.

[0020] IC30A to IC30F are integrated circuits corresponding to semiconductor chips 20A to 20F respectively, and are provided on substrate K2. In FIG. 2, the configuration of IC30A is shown, but other ICs (IC30B to IC30F) have the same configuration. As shown in FIG. 2, IC30A includes a control circuit 31 and a fuse circuit 34. The control circuit 31 includes a detection circuit 32 and a drive circuit 33. Details of these circuits will be described later.

[0021] The wiring group W1 electrically connects the semiconductor chip 20A and the IC30A. Similarly, the wiring groups W2 to W6 electrically connect the semiconductor chips 20B to 20F and the ICs 30B to 30F respectively. Note that "electrically connected" means being connected so as to be conductive using wiring or a bonding material (such as solder), and hereinafter will also be simply referred to as connected.

[0022] Also, as shown in FIG. 2, the wiring group W1 includes wirings W1A, W1B, and W1C. Each of these wirings is, for example, a bonding wire made of copper, aluminum, gold, or an alloy containing these.

[0023] The wiring W1A is connected between the pad P1 provided on the substrate K2 and the anode of the diode 22 on the substrate K1. Note that the cathode of the diode 22 is grounded.

[0024] The wiring W1B is connected between the pad P2 provided on the substrate K2 and the ground line on the substrate K1.

[0025] The wiring W1C is connected between the pad P3 provided on the substrate K2 and the gate of the switching element 21 on the substrate K1. Note that the emitter of the switching element 21 is grounded, and the collector is connected to an external element (load) via a terminal (not shown).

[0026] <<<Regarding the configuration of IC30A>>> Fig. 3 is a circuit diagram showing an example of the configuration of IC30A. For convenience, substrates (substrates K1, K2) and pads (pads P1, P2, P3) are omitted from Fig. 3. As described above, IC30A includes control circuit 31 and fuse circuit 34.

[0027] <<Control circuit 31>> The control circuit 31 is a circuit that controls the switching of the switching element 21 based on a reference voltage Vref corrected by a fuse circuit 34 described later and a drive signal S1 output from a microcomputer (not shown), and is composed of a detection circuit 32 and a drive circuit 33.

[0028] <Detection circuit 32> The detection circuit 32 is a circuit that detects the forward voltage VF of the diode 22, and thereby detects the temperature of the diode 22.

[0029] The detection circuit 32 shown in FIG. 3 includes a constant current source 321, a resistor 322, a capacitor 323, a comparator 325, and a logic circuit 326.

[0030] The constant current source 321 generates a predetermined constant current (predetermined current) from the power supply voltage VCC, and supplies it to the anode of the diode 22 via the wiring W1A.

[0031] The resistor 322 and the capacitor 323 configure a filter that removes noise. One end of the resistor 322 is connected to the anode of the diode 22, and the other end is connected to the inverting input terminal (- terminal) of the comparator 325.

[0032] One end of the capacitor 323 is connected between the negative terminal of the comparator 325 and the resistor 322, and the other end of the capacitor 323 is grounded.

[0033] The inverting input terminal (- terminal) of the comparator 325 is connected to the anode of the diode 22 via the resistor 322 described above. The non-inverting input terminal (+ terminal) of the comparator 325 is connected to a fuse circuit 34 (described later) and a corrected reference voltage Vref (described later) is applied to it. The comparator 325 compares the voltage at the + terminal with the voltage at the - terminal and outputs a signal according to the magnitude relationship between the two. Specifically, if the voltage at the + terminal is greater than the voltage at the - terminal, the comparator 325 outputs a high level (hereinafter, H level) signal, and if the voltage at the - terminal is greater than the voltage at the + terminal, the comparator 325 outputs a low level (hereinafter, L level) signal.

[0034] The logic circuit 326 is a circuit that controls the driving of the switching element 21 by the drive circuit 33 in response to the output of the comparator 325 (in other words, the temperature detection result). The operation of the logic circuit 326 will be described later.

[0035] <Drive circuit 33> The drive circuit 33 is a circuit that switches (turns on and off) the switching element 21 based on the drive signal S1.

[0036] As shown in FIG. 3, the drive circuit 33 includes an operational amplifier 331, NMOS transistors 332 to 334, a resistor 335, and PMOS transistors 336 and 337.

[0037] A reference voltage Vref2 is applied to a non-inverting input terminal (+ terminal) of the operational amplifier 331. An inverting input terminal (- terminal) of the operational amplifier 331 is connected to one end of a resistor 335 and the source of an NMOS transistor 332. The operational amplifier 331 controls the NMOS transistor 332 so that the voltage of the - terminal becomes the reference voltage Vref2 applied to the + terminal. More specifically, a voltage generated in the resistor 335 according to the value of the current flowing through the NMOS transistor 332 is applied to the - terminal of the operational amplifier 331, and the operational amplifier 331 controls the value of the current flowing through the NMOS transistor 332 so that the difference in voltage between the + terminal and the - terminal becomes zero. As a result, a current determined by the + terminal voltage and the resistance value of the resistor R335 flows through the NMOS transistor 332, and when the + terminal voltage increases, the current flowing through the NMOS transistor 332 increases in proportion to the magnitude of the voltage (voltage-current conversion).

[0038] The drain of the NMOS transistor 332 is connected to the drain of the PMOS transistor 336 , and the gate of the NMOS transistor 332 is connected to the drain of the NMOS transistor 334 .

[0039] The drain of the NMOS transistor 333 is connected to the drain of the PMOS transistor 337. A signal S2 output from the logic circuit 326 is applied to the gates of the NMOS transistors 333 and 334. In principle, the signal S2 is the same signal as the drive signal S1, but when overheating is detected by the detection circuit 32, the signal S2 is fixed to an H level (details will be described later). Furthermore, the sources of the NMOS transistors 333 and 334 and the other end of the resistor 335 are grounded.

[0040] The PMOS transistor 336 and the PMOS transistor 337 configure a current mirror circuit. The drain of the PMOS transistor 337 is connected to the gate of the switching element 21 via a wiring W1C.

[0041] As described above, the PMOS transistor 336 and the PMOS transistor 337 configure a current mirror circuit, so that a current of a magnitude corresponding to the current flowing through the PMOS transistor 336 and the NMOS transistor 332 flows through the PMOS transistor 337 .

[0042] <<Fuse circuit 34>> 4 is a circuit diagram showing an example of the configuration of the fuse circuit 34. The fuse circuit 34 is a circuit for correcting the reference voltage Vref applied to the positive terminal of the comparator 325, and corresponds to a "correction circuit."

[0043] The fuse circuit 34 shown in FIG. 4 includes fuses f1 to f7, resistors R1 to R7, and variable resistors including a resistor 342.

[0044] A reference voltage Vref is applied to one end of the resistor 342, and the other end is connected to the positive terminal of the comparator 325 and one end of the fuses f1 to f7, respectively. The reference voltage Vref is a voltage used for detecting a forward voltage VF when a predetermined current (here, a constant current from the constant current source 321) is supplied to the diode 22 at a predetermined temperature. Also, one end of the resistors R1 to R7 is connected to the other end of the fuses f1 to f, respectively, and the other ends of the resistors R1 to R7 are grounded.

[0045] The fuses f1 to f7 are, for example, polysilicon fuses made of polysilicon and can be selectively cut by laser trimming.

[0046] With the above configuration, by selectively cutting the fuses f1 to f7, it is possible to correct the reference voltage Vref applied to the + terminal of the comparator 325. For example, when only the fuse f4 is left and the other fuses are cut, a voltage obtained by dividing the reference voltage Vref by the resistors 342 and R4 is applied to the + terminal of the comparator 325.

[0047] The fuse circuit 34 is not limited to that of the present embodiment, and may be any circuit capable of forming a variable resistor. For example, a plurality of resistors may be connected in series, and a fuse may be provided in parallel to each resistor. Then, the fuses may be selectively laser trimmed.

[0048] Also, each fuse may be configured with a switch, and the on / off of the switch may be controlled using a non-volatile memory (such as an EEPROM). In this case, however, the provision of the non-volatile memory is costly. In contrast, in this embodiment, there is no need to provide a non-volatile memory, and therefore costs can be reduced.

[0049] <<<Operation of control circuit 31>>> First, the drive circuit 33 will be described.

[0050] When the signal S2 applied to the gates of the NMOS transistors 333 and 334 is at H level, the NMOS transistors 333 and 334 are turned on. This turns the NMOS transistor 332 off, and the PMOS transistors 336 and 337 that configure the current mirror circuit are also turned off. In addition, when the NMOS transistor 333 is turned on, charge is extracted from the gate of the switching element 21, so that the switching element 21 is turned off.

[0051] On the other hand, when the signal S2 applied to the gates of the NMOS transistors 333 and 334 is at L level, the NMOS transistors 333 and 334 are turned off. This turns the NMOS transistor 332 on, and the PMOS transistors 336 and 337 that configure the current mirror circuit are also turned on. Furthermore, with the NMOS transistor 333 turned off and the PMOS transistor 337 turned on, charge is supplied to the gate of the switching element 21, and the switching element 21 is turned on.

[0052] Next, the operation of the detection circuit 32 will be described.

[0053] The detection circuit 32 uses a comparator 325 to compare the reference voltage Vref corrected in the fuse circuit 34 with the forward voltage VF of the diode 22 to which a constant current is supplied by the constant current source 321. When the output of the comparator 325 is at an L level, the logic circuit 326 outputs a signal S2 having the same logical level as the drive signal S1 to the drive circuit 33. This causes the drive circuit 33 to drive the switching element 21 in response to the signal S2. On the other hand, when the output of the comparator 325 is at an H level, the logic circuit 326 controls the drive circuit 33 not to drive the switching element 21. Specifically, it fixes the signal S2 from the logic circuit 326 to an H level. This forces the switching element 21 to be turned off, preventing the switching element 21 from being destroyed by overheating (overheat protection).

[0054] In this embodiment, the logic circuit 326 in the IC performs the overheat protection operation, but this is not limited to this. For example, the detection result of the detection circuit 32 may be output to a microcomputer (not shown), and the drive signal S1 may be controlled on the microcomputer side. Alternatively, as in this embodiment, overheat protection may be performed in the IC, and a signal indicating that overheat protection has been performed may be output to the microcomputer.

[0055] As described above, in this embodiment, the temperature characteristics of the forward voltage VF of the diode 22 are measured in advance, and the fuse circuit 34 is laser trimmed based on the results (measurement data) to correct for variations in the forward voltage VF of the diode 22.

[0056] If the above characteristics were measured before the semiconductor chip was mounted on the substrate K1, the characteristics of the diode 22 after mounting may change. Also, the accuracy of the correction may be reduced due to variations in the length and thickness (i.e., wiring resistance) of the wiring W1A.

[0057] Furthermore, when measuring the characteristics of the semiconductor chips 20A-20F mounted on the substrate K1, the diode 22 is connected to the pad P1 of the substrate K2 via the wiring W1A, and then the probe of the measuring device is brought into contact with the pad P1 for measurement. However, in this case, the wiring W1A connected to the pad P1 may interfere with the probe, making the measurement difficult (inaccurate measurement may not be possible). Furthermore, if the pad P1 is damaged by contact with the probe during measurement, this may result in poor connection when the IC is mounted.

[0058] Therefore, in this embodiment, the accuracy of correction is improved by the configuration of the pad P1 and the manufacturing method of the semiconductor module 10. This improves the accuracy of temperature detection.

[0059] <<<About Pad P1>>> Figures 5A to 5C are explanatory diagrams of the pad P1 of the present embodiment shown in Figure 2. Figure 5A shows a first form, Figure 5B shows a second form, and Figure 5C shows a third form.

[0060] The pad P1 in FIG. 5A (first form) is formed in a rectangular shape in a plan view. The hatched area M1 of the pad P1 shown in the figure is an area required for connection to the wiring W1A and corresponds to the "first area." The area M1 is determined in consideration of the accuracy (variation) of the connection position of the wiring W1A, the thickness of the wiring W1A, etc.

[0061] Moreover, area M2 is an area required for contact with a probe of a measuring device (for example, probe 101 of measuring device 100 described later) and corresponds to a "second area." Area M2 is determined taking into consideration the size (thickness) of the tip of the probe, the strength of contact, positional deviation, etc. In FIG. 5A, area M2 is approximately the same size (width) as area M1, but is not limited to this and may be different in size from area M1.

[0062] 5A, the pad P1 of this embodiment is formed to be wider (larger) than the sum of the area M1 and the area M2. This makes it possible to reliably bring the probe of the measuring device into contact with the pad P1 even after the wiring W1A is connected to the pad P1, thereby improving the measurement accuracy.

[0063] 5B (second embodiment), the pad P1 is physically divided into an area RA and an area RB. The areas RA and RB are electrically connected to each other.

[0064] The region RA is a region to which the wiring W1A is connected, and is formed to a size corresponding to the area M1 in Fig. 5A. The region RA corresponds to the "first region."

[0065] The area RB is an area where the probe of the measuring device comes into contact, and is formed to a size excluding the area M1 in FIG. 5A. The area RB corresponds to the "second area." In this embodiment, the pad P1 is also formed to be larger than the sum of the areas M1 and M2.

[0066] 5B, the region RB is formed larger than the region RA, but this is not limited thereto, and it is sufficient that the region RA is equal to or larger than the area M1 and the region RB is equal to or larger than the area M2. For example, the region RA and the region RB may be the same size.

[0067] In this way, by dividing the pad P1 into the area RA and the area RB, it is possible to easily bring the probe of a measuring device into contact with the pad P1 during measurement.

[0068] 5C (third embodiment), the pad P1 is physically divided into an area RA, an area RB, and an area RC. The areas RA, RB, and RC are electrically connected to each other.

[0069] The area RA is the same as in FIG. 5B, and therefore the description will be omitted.

[0070] The area RB is an area where the probe of a measuring device comes into contact, similar to Fig. 5B, except that the area RB in Fig. 5C is formed to have the size of the area M2 in Fig. 5A.

[0071] Region RC is a region to which a lead frame of an IC (eg, IC30A) is connected, and corresponds to the "third region."

[0072] 5C, the regions RA, RB, and RC are formed to be the same size, but they may be formed to be different sizes. It is preferable that the region RA to which the wiring W1A is connected and the region RC to which the IC lead frame is connected are approximately the same size (area).

[0073] In this embodiment, the region RB and the region RC are partitioned, so that poor connection caused by connecting the IC lead frame to an area that has been scratched by touching (contacting) the probe during measurement can be reliably prevented.

[0074] The order of the regions RA, RB, and RC is not limited to that shown in the figure. For example, the regions RB and RC may be arranged so as to sandwich the region RA. In addition, the regions RA, RB, and RC are arranged in a straight line in FIG. 5C, but are not limited to this, and may be arranged in an L-shape, for example.

[0075] <<<About the manufacturing method of the semiconductor module 10>>> Fig. 6 is a flow diagram showing an example of a manufacturing method for the semiconductor module 10. Fig. 7 is a diagram showing a state in which the semiconductor chips 20A-20F are mounted on the substrate K1, and Fig. 8 is a diagram showing a connection state between the pads P1, P2 of the substrate K2 and the diode 22. Fig. 9 is an explanatory diagram of measurement of the temperature characteristics of the diode 22. Note that the pad P1 in Fig. 5B (second embodiment) is used here.

[0076] First, as shown in Fig. 7, the semiconductor chips 20A-20F are mounted on the substrate K1 (S101: first mounting step). In this state, the ICs 30A-30F have not yet been mounted on the substrate K2, and the wiring groups W1-W6 have not been connected. In Fig. 7, the positions (areas) on the substrate K2 where the ICs 30A-30F are mounted are indicated by dashed lines. Also, in Fig. 7, the pads P1-P3 provided on the substrate K2 are not shown. Below, the processing of the semiconductor chip 20A and the IC 30A (the area surrounded by the dashed line in Fig. 1) will be described, but the same applies to each combination of the semiconductor chips 20B-20F and the ICs 30B-30F.

[0077] Next, as shown in Fig. 8, the pad P1 (specifically, the region RA) of the substrate K2 and the anode 22A of the diode 22 of the semiconductor chip 20A of the substrate K1 are connected by a wire W1A (S102: bonding step). As shown in Fig. 8, the cathode 22C of the diode 22 is connected to a conductive pattern K1D on the upper surface of the substrate K1. The conductive pattern K1D is also connected to a ground line (not shown). This conductive pattern K1D (in other words, the cathode 22C of the diode 22) and the pad P2 are connected by a wire W1B. Although not shown, the gate of the switching element 21 and the pad P3 are also connected by a wire W1C.

[0078] Next, as shown in FIG. 9, while controlling the entire module to a predetermined temperature using a heater 110, a temperature sensor 120, etc., a constant current is passed through the diode 22 using the measuring device 100 (S103), and a forward voltage VF of the diode 22 is measured. Specifically, the probe 101 of the measuring device 100 is brought into contact with the region RB of the pad P1, and the probe 102 is brought into contact with an electrode pad (GND pad) of a ground potential. In FIG. 9, the probe 102 is brought into contact with the pad P2, but it is not necessarily required to bring it into contact with the pad P2. Since the wiring W1B is connected to the pad P2, it may be brought into contact with another GND pad (not shown). Then, a constant current is passed through the diode 22, and the forward voltage VF at that time is measured. In this way, measurement data showing the relationship between temperature and the forward voltage VF of the diode 22 is obtained (S104: measurement step). The region RB is partitioned from the region RA, and is larger than the area M2 required for contact with the probe 101 (see FIG. 5A and FIG. 5B), so that it is easy to measure.

[0079] Next, the fuse circuits 34 of the ICs 30A (in a wafer state) arranged corresponding to the measured semiconductor chips 20A are laser trimmed based on the measurement data (S105: trimming step).

[0080] Then, the trimmed IC30A is mounted on the substrate K2 (S106: second mounting step). When mounting the IC30A on the substrate K2, the lead frame of the IC30A is connected to the region RB. The same process is performed for the ICs 30B to 30F.

[0081] After that, other assembly steps are performed, such as covering the top surfaces of the semiconductor chips and ICs with a sealing gel, placing a cover over them, processing external terminals, and the like, to complete the semiconductor module 10.

[0082] In this embodiment, as described above, the fuse circuit 34 of the IC 30A is trimmed using the measurement data of the semiconductor chip 20A after the semiconductor chip 20A is mounted on the substrate K1 (after the wiring W1A is connected), so the effect of stress during mounting (change in temperature characteristics due to distortion of the diode 22) and the variation in wiring resistance are taken into consideration for correction. This makes it possible to improve the accuracy of correction, thereby improving the accuracy of temperature detection.

[0083] <<Modifications>> 10 is an explanatory diagram of measurement of temperature characteristics of diode 22 in a modified example. In this modified example, pad P1 shown in FIG. 5C (third embodiment) having areas RA, RB, and RC is used. Note that area RA is connected to wiring W1A in step S102.

[0084] In step S104 for acquiring measurement data of diode 22, probe 101 of measuring device 100 is brought into contact with region RB and measurement is performed in the same manner as in Fig. 9. Also, based on the measurement data, laser trimming is performed on fuse circuit 34 of an IC (e.g., IC 30A).

[0085] Then, in step S106 where the IC is mounted on the substrate K2, the lead frame of the IC is connected to the region RC. In the case of this modified example, even if the region RB is scratched during measurement, the lead frame of the IC is connected to the region RC, so that poor connection can be prevented.

[0086] 9 and 10, one probe 101 is brought into contact with the region RB of the pad P1, but two probes (one for supplying a current and one for measuring a voltage) may be used. In this case, the pad P1 (region RB) has a pad size that can contact the two probes 101 (area M2 is the size required for contact with the two probes 101).

[0087] =====Summary===== The semiconductor module 10 according to one embodiment of the present invention and the manufacturing method of the semiconductor module 10 have been described above. The semiconductor module 10 according to this embodiment includes the semiconductor chips 20A-20F, the ICs 30A-30F, and the mounting plate (substrates K1, K2, base substrate K0). As shown in FIG. 5A, the pad P1 connected to the diode 22 by the wiring W1A is formed to be larger than the sum of the area M1 required for connection to the wiring W1A and the area M2 required for contact with the probe 101 of the measuring device 100. This allows the probe 101 of the measuring device 100 to reliably contact the pad P1, improving the measurement accuracy and appropriately correcting the temperature characteristics of the diode 22. This improves the temperature detection accuracy.

[0088] In addition, the mounting plate of the semiconductor module 10 includes a substrate K1 on which the semiconductor chips 20A-20F are provided, a substrate K2 on which the ICs 30A-IC30F are provided, and a base substrate K0 on which the substrates K1 and K2 are provided, and the pad P1 is provided on the substrate K2. As a result, even if the substrate (substrate K1) on which the semiconductor chip is mounted and the substrate (substrate K2) on which the IC is mounted are different, the accuracy of correction can be improved, and the accuracy of temperature detection can be increased.

[0089] 5B is divided into an area RA to which the wiring W1A is connected and an area RB to which the probe 101 of the measuring device 100 comes into contact. This makes it easier to bring the probe 101 of the measuring device 100 into contact during measurement.

[0090] 5C is divided into an area RA to which the wiring W1A is connected, an area RB to which the probe 101 of the measuring device 100 is brought into contact, and an area RC to which an IC (such as IC 20A) is connected. This makes it possible to reliably prevent poor connection caused by connecting the lead frame of an IC to a portion that has been scratched by contacting the probe 101 during measurement.

[0091] Moreover, it is desirable that the areas RA and RC are approximately the same size, so that the wiring W1A and the lead frame of the IC 30A can be reliably connected.

[0092] The fuse circuit 34 includes a variable resistor that combines resistors R1 to R7 and fuses f1 to f7, and the reference voltage Vref is corrected by selectively laser trimming the fuses f1 to f7 based on the measurement data of the forward voltage VF of the diode 22. This can reduce costs compared to the case where a non-volatile memory or the like is used for correction.

[0093] The manufacturing method of the semiconductor module 10 includes step S101 of mounting a semiconductor chip (20A, etc.), step S102 of connecting the pad P1 and the diode 22 with a wiring W1A, step S104 of supplying a predetermined current to the diode 22 at a predetermined temperature (step S103) and acquiring measurement data indicating a forward voltage VF, step S105 of laser trimming the fuse circuit 34 based on the measurement data, and step S106 of mounting the laser-trimmed IC. This makes it possible to improve the accuracy of correction and thus the accuracy of temperature detection.

[0094] In step S101, a semiconductor chip (20A, etc.) is mounted on the substrate K1, in step S102, a pad P1 of the substrate K2 and a diode 22 of the substrate K1 are connected by a wire W1A, and in step S106, an IC that has been laser trimmed is mounted on the substrate K2. This makes it possible to improve the accuracy of correction and the accuracy of temperature detection even when the substrate (substrate K1) on which the semiconductor chip is mounted and the substrate (substrate K2) on which the IC is mounted are different.

[0095] 5B has an area RA and an area RB, and the area RA is connected to the wiring W1A in step S102, and the area RB comes into contact with the probe 101 of the measuring device 100 in step S104 and is connected to the lead frame of the IC in step S106. This makes the measurement easier and improves the accuracy of the measurement.

[0096] 5C has an area RA, an area RB, and an area RC. An interconnection W1A is connected to the area RA in step S102, the area RB comes into contact with a probe 101 of a measuring device in step S104, and the area RC is connected to a lead frame of an IC in step S106. As a result, even if the area RB is scratched during measurement, the lead frame of the IC is connected to the area RC, thereby preventing poor connection.

[0097] The above-mentioned embodiment is for the purpose of facilitating understanding of the present invention, and is not intended to limit the present invention. Furthermore, the present invention can be modified or improved without departing from the spirit of the present invention, and it goes without saying that the present invention includes equivalents thereof. [Explanation of symbols]

[0098] 10 Semiconductor Module 20A~20F Semiconductor chips 21 Switching element 22 Diode 22A Anode 22C cathode 30A~30F IC (Integrated Circuit) 31 Control circuit 32 Detection circuit 33 Drive circuit 34 Fuse Circuit 100 Measuring Equipment 101,102 Probe 110 Heater 120 Temperature Sensor 321 constant current source 322 Resistance 323 Capacitor 325 Comparator 326 Logic Circuits 331 Operational Amplifier 332,333,334 NMOS transistors 335 Resistance 336,337 PMOS transistors 342 Resistance K0 Base Board K1 Board K1D Conductive Pattern K2 Board W1~W6 Wiring group W1A, W1B, W1C wiring f1~f7 fuse R1~R7 resistance P1, P2, P3 Pads RA,RB,RC area S1 drive signal S2 signal

Claims

1. a semiconductor chip having a switching element and a diode for detecting temperature; an integrated circuit including: a correction circuit that corrects a reference voltage used for detecting a forward voltage when a predetermined current is supplied to the diode at a predetermined temperature; and a control circuit that controls switching of the switching element based on the corrected reference voltage and a drive signal; a mounting plate on which the semiconductor chip and the integrated circuit are provided; Equipped with the mounting plate has a pad connected to the diode by a wiring, the pad is formed to be larger than the sum of a first area required for connection to the wiring and a second area required for contact with a probe of a measuring device for measuring the forward voltage; Semiconductor module.

2. 2. The semiconductor module according to claim 1, The mounting plate is a first substrate on which the semiconductor chip is provided; a second substrate on which the integrated circuit is provided; a base substrate on which the first substrate and the second substrate are provided; Including, The pad is provided on the second substrate. Semiconductor module.

3. 3. The semiconductor module according to claim 1, The pad is a first region to which the wiring is connected; a second region for contacting a probe of the measuring device; It is divided into Semiconductor module.

4. 4. The semiconductor module according to claim 3, the pad is further partitioned into a third region connected to the integrated circuit; Semiconductor module.

5. 5. The semiconductor module according to claim 4, The first region and the third region are approximately the same size. Semiconductor module.

6. The semiconductor module according to any one of claims 1 to 5, the correction circuit includes a variable resistor that is a combination of a plurality of resistors and a plurality of fuses; the reference voltage is corrected by selectively laser-trimming the plurality of fuses based on measurement data of the forward voltages of the diodes; Semiconductor module.

7. a semiconductor chip having a switching element and a diode for detecting temperature; an integrated circuit including: a fuse circuit that corrects a reference voltage used for detecting a forward voltage when a predetermined current is supplied to the diode; and a control circuit that controls switching of the switching element based on the corrected reference voltage and a drive signal; A method for manufacturing a semiconductor module comprising: a first mounting step of mounting the semiconductor chip on a mounting board; a bonding step of connecting a pad provided on the mounting plate and the diode of the semiconductor chip with a wiring; a measuring step of supplying the predetermined current to the diode at a predetermined temperature and acquiring measurement data indicative of the forward voltage; a trimming step of performing laser trimming of the fuse circuit based on the measurement data; a second mounting step of mounting the integrated circuit that has been subjected to the laser trimming on the mounting board; A method for manufacturing a semiconductor module having the above structure.

8. A method for manufacturing a semiconductor module according to claim 7, comprising the steps of: The mounting plate includes a first substrate, a second substrate on which the pads are provided, and a base substrate on which the first substrate and the second substrate are provided. Including, In the first mounting step, the semiconductor chip is mounted on the first substrate; In the bonding step, the pad of the second substrate and the diode of the first substrate are connected by the wiring, In the second mounting step, the integrated circuit is mounted on the second substrate. A method for manufacturing a semiconductor module.

9. A method for manufacturing a semiconductor module according to claim 7 or 8, comprising the steps of: The pad has a first region and a second region; the first region is connected to the wiring in the bonding process; the second region is brought into contact with a probe of a measuring device in the measuring step and is connected to the integrated circuit in the second mounting step; A method for manufacturing a semiconductor module.

10. A method for manufacturing a semiconductor module according to claim 7 or 8, comprising the steps of: the pad has a first region, a second region, and a third region; the first region is connected to the wiring in the bonding process; the second region contacts a probe of a measuring device in the measuring step; the third region is connected to the integrated circuit in the second mounting step; A method for manufacturing a semiconductor module.

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