Digital control of plasma processing

JP7642079B2Active Publication Date: 2025-03-07APPLIED MATERIALS INC
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Patent Information

Application Number
JP2023544464
Authority / Receiving Office
JP · JP
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-01-29
Filing Date
2022-01-21
Publication Date
2025-03-07
Estimated Expiration
2042-01-21

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Abstract

A system including a control plate disposed within a processing chamber, the control plate including a set of plasma elements designed to independently expose a substrate disposed within the processing chamber to a plasma-related flux, the control plate designed to independently activate the set of plasma elements, the associated plurality of plasma elements being activated to expose the substrate to the plasma-related flux and the associated plurality of plasma elements being deactivated to not expose the substrate to the plasma-related flux, the control plate designed to effect individual time-dependent activation of the set of plasma elements to selectively expose the substrate to the plasma-related flux.
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Description

[Technical field]

[0001]

[0001] Some embodiments of the present disclosure relate generally to digital control of plasma processing. Some embodiments further relate to systems, devices, and methods for plasma delivery and / or plasma processing. [Background technology]

[0002]

[0002] Plasma processing is widely used in the semiconductor industry. Plasma can modify the chemistry of the process gas (e.g., generate ions, radicals, etc.), generate new nuclear species, and generate a flux of ions with energies from a fraction of an electron volt (eV) to several thousand eV at the wafer, without any limitations on the process temperature. There are many types of plasma sources (e.g., capacitively coupled plasma (CCP), inductively coupled plasma (ICP), microwave-generated plasma, electron cyclotron resonance (ECR), etc.) that cover a wide operating process range from a few mTorr to several Torr.

[0003]

[0003] Today, a common plasma process specification is high uniformity of process results (e.g., uniformity across the wafer to the edge). This criterion is often very difficult to achieve because it involves many factors, many of which interfere with others. Plasma uniformity, chamber design, wafer temperature distribution, bias electrode design, etc. are just a few of these factors. To meet these criteria, both RF antennas and processing chambers are designed to achieve the highest level of process uniformity. This often requires large chamber and generator (e.g., antenna, coil, electrodes, etc.) dimensions, large overall plasma volume, and other expensive measures such as complex temperature control, coil splitting, magnetic field screens, etc. Although common tool designs can adjust basic process uniformity to within a few percent, even these measures are often insufficient when uniformity criteria become more stringent. The chamber must then be equipped with elements that allow the chamber to be individually tuned for a specific process. In addition, a large plasma volume would be a challenge in itself for processes that require rapid chemical changes.

[0004]

[0004] A similarity can be seen between plasma processing and television. Originally, television was based on Cathode Ray Tube (CRT) technology, where an electron beam scans horizontally and vertically inside a vacuum tube, exciting phosphor dots on the front panel of the tube, creating about 25 frames per second. Each phosphor dot flashes briefly (for a fixed period of time), and the brightness of this flash is controlled by the electron beam current. A receptor (e.g., the eye) then briefly integrates and averages the brightness of the light from all the phosphor dots. The color of the dot is determined by the ratio of the average brightness of adjacent colored dots, and the brightness (brightness) is determined by the overall intensity of the light from these dots. The analog nature of the CRT's image control lies in the control of the intensity of the electron beam, or the peak brightness of all the light flashes. Challenges have been evident in CRTs and other analog systems, where it is difficult to maintain the specifications of a particular process (e.g., power requirements, chamber size, element specification limits, etc.) due to the strict specification requirements for running the process. Like CRTs, analog systems generally lack the flexibility required by modern innovations in the various areas of process control. For this reason, analog systems are often manufactured to specialized specifications to perform a specific narrow range of processes.

[0005]

[0005] The growing challenges of CRT technology were addressed by switching to digital technology, which of course required changes in both hardware and signal control. Obviously, switching from analog to digital technology in plasma processing would require changes in both hardware and control. Summary of the Invention

[0006] In an exemplary embodiment, a method includes receiving, by a processing device, data including a first set of plasma exposure values. The first set of plasma exposure values ​​are each associated with a respective plasma element of a plurality of plasma elements designed to generate a plasma-related flux. The processing device causes a plasma controller to activate the set of plasma elements based on the data to expose a substrate to the plasma-related flux generated by the set of plasma elements during a plasma process. Each plasma element of the set of plasma elements is activated for a duration based on a respective plasma exposure value from a first plurality of plasma exposure values ​​associated with the respective plasma element.

[0007]

[0007] In an exemplary embodiment, a method includes receiving, by a processing device, first data including a first set of plasma exposure durations. The first set of plasma exposure durations are each associated with a respective plasma element of a set of plasma elements designed to generate a plasma-related flux. The processing device receives a first thickness profile of a substrate. The first thickness profile includes a first set of thickness values ​​of the first substrate measured after exposing the first substrate to the plasma-related flux for the respective plasma exposure durations defined in the first data. The processing device determines that the first thickness values ​​include a first thickness value that deviates from a reference thickness value for a first position on the first substrate associated with a first plasma element of the plurality of plasma elements. In response to determining that the first thickness profile includes a first thickness value that deviates from the reference thickness value, the processing device modifies the first data by changing a first plasma exposure duration of a plurality of plasma exposure durations associated with the first plasma element.

[0008]

[0008] In an exemplary embodiment, a plasma processing system includes a process chamber and an actuator plate disposed within the process chamber. The actuator plate includes a set of plasma cells. The plasma processing system further includes a control unit coupled to the actuator plate. The control unit is adapted to control the actuator plate by independent activation or deactivation of the plurality of plasma cells. In response to being activated, the plasma cells are adapted to independently expose localized areas of a substrate disposed within the process chamber to a plasma-associated flux.

[0009]

[0009] In an exemplary embodiment, a system includes a process chamber and an actuator plate disposed within the process chamber. The actuator plate includes a set of plasma elements for independently exposing a substrate disposed within the process chamber to a plasma-related flux. The actuator plate independently activates the plurality of plasma elements. In response to being activated, the plasma elements are adapted to independently expose a localized area of ​​the substrate to the plasma-related flux. The actuator plate is adapted to perform individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux. In an exemplary embodiment, a plasma processing device includes a plasma source for generating a plasma. The plasma processing device further includes an actuator plate disposed within a path of the plasma. The actuator plate includes a plurality of plasma elements that are independently activated and deactivated. In response to being activated, the plurality of plasma elements expose the substrate to the plasma-related flux. The plasma processing device further includes a control unit. The control unit controls the actuator plate. The control unit performs individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux.

[0010]

[0010] The present disclosure is presented by way of example, and not by way of limitation, in the accompanying drawings, in which like reference numerals indicate similar elements. It should be noted that different references to "an" or "one" embodiment in the present disclosure are not necessarily to the same embodiment, and such references mean at least one. [Brief description of the drawings]

[0011] [Figure 1A]

[0012] 1A-1C illustrate digital imaging used within a digital process control system according to an embodiment of the present disclosure. [Figure 1B] 1A-1C illustrate digital imaging used within a digital process control system according to an embodiment of the present disclosure. [Figure 1C] 1A-1C illustrate digital imaging used within a digital process control system according to an embodiment of the present disclosure. [Figure 2A]

[0013] 2A-2C illustrate an embodiment of a plasma processing system according to an aspect of the present disclosure. [Figure 2B] 2A-2C illustrate an embodiment of a plasma processing system according to an aspect of the present disclosure. [Figure 2C] 2A-2C illustrate an embodiment of a plasma processing system according to an aspect of the present disclosure. [Figure 3A]

[0014] 3A-3B show a digitally controlled plasma element according to an embodiment of the present disclosure. [Figure 3B] 3A-3B show a digitally controlled plasma element according to an embodiment of the present disclosure. [Figure 4A]

[0015] 4A-4B show an addressable plasma element according to an embodiment of the present disclosure. [Figure 4B] 4A-4B show an addressable plasma element according to an embodiment of the present disclosure. [Diagram 5]

[0016] 1 illustrates a digital process control system according to an aspect of the present disclosure. [Figure 6A]

[0017] 6A-6E show various processed images according to an embodiment of the present disclosure. [Figure 6B] 6A-6E show various processed images according to an embodiment of the present disclosure. [Figure 6C] 6A-6E show various processed images according to an embodiment of the present disclosure. [Figure 6D] 6A-6E show various processed images according to an embodiment of the present disclosure. [Figure 6E] 6A-6E show various processed images according to an embodiment of the present disclosure. [Figure 7A]

[0018] 7A-7C illustrate a digitally controlled plasma processing device according to an embodiment of the present disclosure. [Figure 7B] 7A-7C illustrate a digitally controlled plasma processing device according to an embodiment of the present disclosure. [Figure 7C] 7A-7C illustrate a digitally controlled plasma processing device according to an embodiment of the present disclosure. [Figure 8]

[0019] 1 is a flow chart of a method for plasma delivery according to an aspect of the present disclosure. [Figure 9]

[0020] 1 is a flow chart of a method for tuning a plasma process according to an aspect of the present disclosure. [Figure 10]

[0021] 1 is a flow chart of a method for tuning a plasma process according to an aspect of the present disclosure. [Figure 11]

[0022] FIG. 1 illustrates an exemplary diagram of a training phase of a machine learning model, according to an aspect of the present disclosure. [Figure 12]

[0023] 1 is a flowchart of a method of using a machine learning model to modify a plasma exposure process, according to an aspect of the present disclosure. [Figure 13]

[0024] 1 illustrates a block diagram of an exemplary computing device capable of plasma delivery and / or processing, operating in accordance with one or more aspects of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012]

[0025] Today, a common plasma process parameter is high uniformity of process results (e.g., edge-to-edge uniformity across the wafer). This parameter is often very difficult to achieve because it involves many factors, many of which interfere with others. Plasma uniformity, chamber design, wafer temperature distribution, bias electrode design, etc. are just a few of these factors. Radio frequency (RF) antennas and processing chambers are manufactured and assembled to achieve the highest level of process uniformity. This often requires large chamber and generator (e.g., antennas, coils, electrodes, etc.) dimensions, large overall plasma volumes, and other expensive measures such as complex temperature control, coil splits, magnetic field screens, etc. Although common tool designs can adjust basic process uniformity to within a few percent, even these measures are insufficient for more stringent uniformity criteria. The chamber must then be equipped with elements that allow the chamber to be individually tuned for a specific process. In addition, a large plasma volume in itself would be a challenge for processes that require rapid chemical changes.

[0013]

[0026] Additionally, process development is challenging to meet both local process results (e.g., film properties) and uniformity criteria. Traditionally, when process tools are manufactured, only a few processes are tested and optimized. As more processes are developed, traditional tools have limited means to control the process results, e.g., by controlling antenna power, gas pressure, gas flow rate, gas flow rate distribution, wafer temperature, chamber walls, etc. Many of these control knobs affect multiple plasma parameters, which are often difficult to predict because they have global effects. For example, changing the power of one coil can affect plasma density everywhere, affect ion energy, etc. These difficulties, along with the lack of a clear (unambiguous) way to use these knobs, make process development very expensive. This can sometimes require hardware modifications and tool revalidation.

[0014]

[0027] These problems are mitigated and in some cases eliminated if analog process control is replaced by digital process control. As mentioned above, replacing analog process control with digital process control may require different hardware. The main difference between the hardware for analog and digital systems is that analog systems often have very few elements (1-2 coils, 1-2 zone ESCs, etc.) to globally control parameters, whereas digital systems are often configured for local control of small areas of the wafer and therefore usually have a large number of identical controlled elements / cells (e.g., 200-1000 zone ESCs, etc.) and a reasonable number of controlling elements. In contrast to analog systems where those few elements operate for the same amount of time but are energized to carefully tuned / controlled levels, in a digitally controlled system, all cells (e.g., pixels) are energized / activated (e.g., powered) to the same level, but the exposure time of each cell may be controlled. Because the dependencies between process parameters (e.g., thickness) and input parameters (e.g., exposure duration of a cell) are streamlined, users or process recipes can vary or change parameters without overhauling or extensive rebuilds of the equipment. Digital control also allows for consistent power input across the exposure source, often resulting in simpler electronic configurations and equipment settings capable of running multiple processes.

[0015]

[0028] To better understand how digital process control can be achieved, a comparison is made between analog and digital systems. Indeed, in plasma processing, the process result on the film (removal or deposition or treatment) scales with time and flux from plasma species to the substrate. That is, if the process result needs to be increased globally or locally, the flux or time needs to be increased. Ultimately, it is the fluence (integral of flux density over time) that affects the resulting process image. For example, in a television image, the brightness or color seen by the eye depends on the average brightness of this pixel over about 0.1 seconds, i.e. the fluence of photons in that time. In a CRT, every pixel emits light for the same amount of time, so by changing the flux density (electron beam current illuminating the pixel), the brightness over the entire screen could be varied. In digital processing (regardless of technology), each pixel emits light with a constant intensity, and the average brightness of each pixel during a frame (fluence over the frame) can be controlled by the percentage of the time frame that pixel is illuminated. Typically, a typical grayscale of any color pixel in a digital television can be 256 or 512 gray levels, which allows millions of colors. This grayscale and its consistency can be achieved by dividing every frame (image) into a set of subframes. Each subframe shows a different image for the time (sustain period) allotted to this subframe, and during every subframe, the illuminated pixels may emit light of the same constant intensity. However, some pixels are lit during one subframe and others during other subframes. Different combinations of pixels may be lit during any number of subframes. The human eye is not fast enough to recognize each subframe. The human eye sees the integral image of several frames, i.e. the image of the light fluence from all pixels. For example, if 8 subframes are used to achieve 256 levels of intensity, the time of each subframe is 2 m-1Since the contribution of each subframe to the fluence of the entire frame increases with the subframe number, the average brightness (fluence) of each pixel may have 256 steps of difference from 0 to 255.

[0016]

[0029] The following example shows how to split a 3x3 image (where the numbers indicate brightness levels) into several subframe images, where we assume that each subframe is twice as long as the previous one, so its contribution is 2 m-1 It increases like this. TIFF0007642079000001.tif36170

[0017]

[0030] To have a different image for each subframe, each subframe may include an address period preceding a sustain period. The address period may include erasing the previous image and placing a new image on the screen. This address update may include an addressable memory element assigned to each pixel, which may be addressed to an on or off state. The on or off state may affect the pixel behavior (e.g., to emit light or not) during the sustain period. Addressing may include circuitry for selecting the pixels and providing addressing signals to those pixels to perform the addressing process.

[0018]

[0031] In some embodiments, the methodology involves dividing the process time into several subfields and controlling the fluence of the plasma flux to the elements of the substrate by time rather than by flux density as is traditionally used in plasma processing. In some embodiments, the methodology is used to select and rapidly address thousands of plasma cells, thereby greatly reducing the number of controlling elements compared to the number of elements being controlled.

[0019]

[0032] Embodiments of the present disclosure provide plasma processing devices, methods, and systems that use digital process control. In particular, embodiments disclosed herein are directed to devices, systems, and processes for controlling plasma processes via individual time-dependent exposure of plasma-related fluxes by plasma elements. Embodiments are directed to performing plasma processes (e.g., semiconductor processing) by digitally controlling localized exposure of elements of a substrate to plasma-related fluxes. Embodiments are directed to generating and processing exposure data (e.g., exposure maps or exposure recipes) across a set of plasma elements to individually control exposure durations corresponding to individual plasma elements. Various embodiments may include or employ methods for tuning and / or refining the exposure data (e.g., exposure maps or recipes). Some embodiments incorporate the use of machine learning models and algorithms to generate, modify, and / or process exposure maps and / or recipes and plasma process modifications to achieve a target process output (e.g., meet target specifications such as thickness and / or process uniformity).

[0020]

[0033] In an exemplary embodiment, a method includes receiving, by a processing device, data including a first set of plasma exposure values, each of the first set of plasma exposure values ​​associated with a respective plasma element of a plurality of plasma elements designed to generate a plasma-related flux. The processing device causes a plasma controller to activate the set of plasma elements based on the data to expose the substrate to the plasma-related flux generated by the set of plasma elements during a plasma process. Each plasma element of the set of plasma elements is activated for a duration based on a respective plasma exposure value from a first plurality of plasma exposure values ​​associated with the respective plasma element.

[0021]

[0034] In an exemplary embodiment, a method includes receiving, by a processing device, first data including a first set of plasma exposure durations, each associated with a respective plasma element of a set of plasma elements designed to generate a plasma-related flux. The processing device receives a first film thickness (process result) profile for a substrate. The first thickness profile includes a first set of thickness values ​​for the first substrate measured after exposing the first substrate to the plasma-related flux for the respective plasma exposure durations defined in the first data. The processing device determines that the first thickness values ​​include a first thickness value that deviates from a reference thickness value for a first location on the first substrate associated with a first plasma element of the plurality of plasma elements. In response to determining that the first thickness profile includes a first thickness value that deviates from a reference thickness value, the processing device modifies the first data by changing a first plasma exposure duration of a plurality of plasma exposure durations associated with the first plasma element.

[0022]

[0035] In one exemplary embodiment, a plasma processing system includes a process chamber and an actuator plate disposed within the process chamber. The actuator plate includes a set of plasma cells. The plasma processing system further includes a control unit coupled to the actuator plate. The control unit is adapted to control the actuator plate by independent activation or deactivation of the plurality of plasma cells. In response to being activated, the plasma cells are adapted to independently expose localized areas of a substrate disposed within the process chamber to a plasma-associated flux.

[0023]

[0036] In an exemplary embodiment, a system includes a process chamber and an actuator plate disposed within the process chamber. The actuator plate includes a set of plasma elements for independently exposing a substrate disposed within the process chamber to a plasma-related flux. The actuator plate independently activates the plurality of plasma elements. In response to being activated, the plasma elements are adapted to independently expose a localized area of ​​the substrate to the plasma-related flux. The actuator plate is adapted to perform independent time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux. In an exemplary embodiment, a plasma processing device includes a plasma source for generating a plasma. The plasma processing device further includes an actuator plate disposed within a path of the plasma. The actuator plate includes a plurality of plasma elements that are independently activated and deactivated. In response to being activated, the plasma elements expose the substrate to the plasma-related flux. The plasma processing device further includes a control unit. The control unit controls the actuator plate. The control unit performs independent time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux.

[0024]

[0038] These and similar embodiments provide several advantages and improvements in the field of plasma processing and semiconductor processing. These advantages include, for example, improved process accuracy, improved process resolution, improved flexibility in equipment specifications, and improved flexibility in process applications. As previously discussed, traditional global process control using analog systems has difficulty meeting uniformity requirements. By using digital local process control systems, i.e., time-dependent local exposure control, it becomes much easier to adjust control parameters for different processes or target results. Furthermore, the level of accuracy and resolution can be adjusted by adjusting the exposure prescription commands for the digital process control system. For example, process distortions, process artifacts, and equipment size and shape limitations are overcome when the process control is not power-dependent as in most analog process control systems, but instead is time-dependent. Resolution can be controlled by the number of process sources without significant changes to peripheral equipment or changing the relative process uniformity.

[0025]

[0039] As mentioned above, the use of digital process control allows for more flexible system control. Because the dependencies between process parameters (e.g., film thickness change) and input parameters (e.g., cell exposure duration) are streamlined, operators can adjust process recipes (multiple exposure times) without needing to overhaul or rebuild equipment. Digital control also allows for consistent power input across exposure sources, often resulting in the use of simpler, less expensive, and more extensive electronic configurations and equipment settings capable of running multiple processes.

[0026]

[0040] 1A-1C illustrate digital imaging used within a digital process control system 100A according to aspects of the present disclosure. In particular, FIG. 1A illustrates the principle of generating an image (e.g., a collection of image frames 102) using sub-frames 104A-H as well as scanning techniques to address the controlled elements 106 of the digital process control system 100A. Plasma processing can operate with a large number of controlled elements 106 (e.g., pixels, cells, electrodes, etc.) that emit light or plasma, control plasma flux, etc. For example, a plasma processing system may operate with hundreds or thousands of plasma cells. In either case, a large number of controlled elements 106 may require advanced control to execute the digital process to meet desired output criteria (e.g., process uniformity requirements). For example, as shown in FIG. 1A, every frame 102 (e.g., 16.7 ms for television) may be divided into a series of sub-frames 104A-G (e.g., 8 sub-frames as seen in FIG. 1A). Each subframe may represent an activation (maintenance) period of the controlled element 106, and these periods are T m =T12 m-1 The number increases with the subfield number, like so:

[0027]

[0041] Each sustain period may be preceded by an address period. The address period includes erasing the previous state of all controlled elements 106 (e.g., to an OFF state) and addressing the newly selected controlled elements 106 (e.g., to an ON state). During the next sustain period, all elements selected to be ON are activated (e.g., emit light or plasma) with a certain intensity. Different levels of fluence result depending on the duration of emission by the pixels. Different combinations of addressed controlled elements 106 in different subfields 104A-G of a frame 102 may be used to generate different exposure images. For example, a controlled element 106 having light-emitting pixels may result in a fluence (e.g., brightness) with different levels of gray (e.g., 256 shades of gray associated with 8 subfields). This is in part because the human eye integrates (i.e., summarizes) the light from all pixels received during the selection of a frame (e.g., integrates over the subfields). For example, if a pixel with coordinates (y,z) equal to (6,2) emits a relative luminance of level 3, pixel (9,5) is at level 162, and pixel (9,9) is at level 104, then these pixels should be addressed ON for the appropriate subframes which, when summarized (e.g., integrated over a duration), result in the associated luminance levels (i.e., 3, 162, and 104), as shown in FIG. 1A.

[0028]

[0042] In some embodiments, improved addressing efficiency (e.g., reduced time to address a pixel) can be achieved through address scanning. Scanning is performed during the addressing period by disconnecting (e.g., tying to ground) all lines along the first axis (e.g., horizontal line 108) except one from the power supply (e.g., Y-scan electrode 110). The first line is addressed, but the disconnected line cannot be addressed (e.g., store or change charge) from the addressing signal. The addressing process is done line by line. In that case, the line of controlled elements 106 (e.g., pixels or cells) connected to the power supply is addressed. After the current line is addressed, it is disconnected from the power supply (e.g., Y-scan electrode 110) and the next line is connected to the power supply. After all lines are scanned, the address period ends and the sustain period begins. For example, FIG. 1A shows the addressing of line 108 number 9 for subframe SF6 104F. 1A, selected electrodes 3, 5, 6, 7, 9, and 10 are connected to address electrode Z 112. These selected electrodes on line 9 will be addressed and ultimately illuminated during processing of subframe 104F of SF6.

[0029]

[0043] Using one previous example (repeated below), an image may be represented by a 3x3 matrix, where each number indicates the emission duration of a controlled element. An exemplary division of the 3x3 image into several sub-frame images may include: TIFF0007642079000002.tif36170 In this example, scanning during SF1 may be processed in the following manner: 1) when Y1 is closed (e.g., connected to a power supply), the addressing signal (1, 0, 1) connects the first and third columns to the address driver; 2) when Y2 is closed, the addressing signal (0, 0, 1) connects the third column (e.g., Z3) to the address driver; and 3) when Y3 is closed, none of the Z electrodes are connected to the Z driver. A similar process occurs during each addressing period of each subfield. In some embodiments, some subfields may have no elements active (e.g., all elements in an off state). Returning to the example above, starting from SF4, none of the Z electrodes are connected to the Z driver, and therefore none of the cells are addressed and none of the controlled elements are activated (e.g., no light or plasma is generated during these subfields).

[0030]

[0044] During the sustain period, all scan (line) electrodes (Y) are connected together and may be connected to a power supply. The column electrodes (Z or X) are connected together and to a sustain driver of the power supply. In some embodiments, Z and X use the same electrode within a cell, while in other embodiments, X is a separate electrode common to all cells. During the sustain period, all cells are connected to the same sustain driver, but only the cells selected to be on during the address period are activated (e.g., emit light or plasma).

[0031]

[0045] The difference between digital television and digital plasma processing is that digital television may require maximum frame duration restrictions to meet image quality standards. For example, television frames are limited to less than 0.1 seconds to avoid flickering even for still images, and to about one-sixth (16.7 milliseconds) to avoid moving image artifacts. As a result, television images are often displayed over many 16.7 millisecond frames, as shown, for example, in FIG. 1B. This requires a large number of addressings, which take up a significant proportion of the 16.7 milliseconds and reduce the light efficiency of the television image.

[0032]

[0046] In some embodiments, the entire process time or process step time may be performed as a single frame 100C (e.g., addressing a single frame), as shown in FIG. 1C. The use of a single frame is possible as a result of there being no maximum frame duration limit, as discussed above in connection with television displays. For example, the addressing time for each frame may be on the order of one millisecond in duration, and the process time may be measured in seconds or even minutes. Longer process times may allow the number of addressing steps to be reduced, improving the efficiency of the overall process.

[0033]

[0047] In some embodiments, as shown in FIG. 1C, the change in frame duration may be related to the complexity of the image. For example, a television image may be relatively complex, so that pixels may have a full range of brightness from 0 to 255. However, in plasma processing, the main image has a constant brightness (e.g., no contrast), and the resulting process result only needs to meet a quality threshold (e.g., 5% non-uniformity) that is less accurate than a television image. As a result of this reduced image complexity requirement, one large subframe may be used for the bulk of the time (e.g., 90% of the total process time), and several small subfields (e.g., six subfields, as shown in FIG. 1C) may be used for the remaining process time (e.g., 10% of the total process time).

[0034]

[0048] In some embodiments, the subfields may be altered by a shared adjustment factor (e.g., all subfields are reduced by half). In some embodiments, by using longer subfields, the number of subfields required may be reduced, improving precision control. For example, with eight subfields, the brightness may be controlled to 0.4% (1 / 255) of the full brightness. However, by using longer subfields, the brightness may be controlled to 0.15% (1 / 663) of the full brightness with only seven subfields.

[0035]

[0049] In some embodiments, the plasma cell used for plasma processing can control the plasma flux for multiple conditions (e.g., different process gases, different pressures, etc.) and can control the energy emitted (e.g., ion energy, bias voltage). This may require different drive voltages for different process steps. All process uniformity control can be performed using the digital control described herein.

[0036]

[0050] In some embodiments, the number of subfields, the relative lengths of the subfields, the number of frame processes, and / or the length of the processes can be adjusted to meet the requirements of the plasma process (e.g., manufacturing recipe). For example, sustain and addressing voltages / signals can be modified and new gas mixtures can be introduced, providing flexibility in the process recipe.

[0037]

[0051] 2A-2C show an embodiment of a plasma processing system 200 according to aspects of the present disclosure. The plasma processing system may include a process chamber 220 and a plasma source 210. The plasma source comprises a wall 202 (e.g., for holding atmospheric pressure), a gas inlet 212, a gas supply space bounded by the wall, a plasma generation plate 204 including a plurality of controlled plasma cells 206, and a power supply 208 controlled by a control unit 205. In some embodiments, the control unit 205 is also responsible for selecting the plasma element 206 that generates plasma when the same voltage V(t) is applied to all cells of the panel 204. The process chamber 220 may be one or more of an etch chamber, a deposition chamber (including chambers for atomic layer etching / deposition, chemical vapor deposition, physical vapor deposition, or plasma-enhanced versions thereof), an anneal chamber, a photoresist strip chamber, and the like. The processing chamber 220 may include the features described in connection with the processing chamber in other embodiments, including a wall 211 that maintains an internal vacuum and provides support for the plasma source 210, a substrate support 216, and a gas outlet 214. The gas inlet 212 and the gas outlet 214 may provide a flow of a supply gas through the processing system under a process gas pressure. The supply gas may include any of air, O2, N2, Ar, NH3, He, and / or other suitable process gases. The plasma source 210 may include a gas expansion space of a gas injector (e.g., no plasma), which provides a uniform gas flow through the plasma generation plate 204. The uniform gas flow across the surface of the control plate may result in a common gas composition flowing through each of the gas supply lines associated with the discharge cells 206.

[0038]

[0052] In some embodiments, as shown in FIG. 2A, the plasma generating plate 204 may include a set of plasma elements with memory. The plasma elements 206 include individually addressable plasma sources or discharge cells capable of emitting a plasma-related flux. For example, the discharge cells may use Dielectric Barrier Discharge (DBD) technology to both generate the discharge and provide the memory function.

[0039]

[0053] In some embodiments, discharge cells may be disposed within the plasma generating plate 204. The discharge cells may be designed to be individually switchable between an on state and an off state. While in the on state, the discharge cells emit a plasma-associated flux in response to receiving a voltage (e.g., a sustain voltage).

[0040]

[0054] In some embodiments, the plasma generating plate 204 is designed to coordinate individual time-dependent transitions between on and off states for each discharge cell to selectively generate and emit a plasma-related flux across the plasma generating plate 204. For example, the plasma-related flux may be generated and emitted to contact a substrate 230 disposed within the process chamber 220.

[0041]

[0055] In some embodiments, the plasma source 210 may include an RF (e.g., low frequency, less than 100 kHz) generator 208, or alternatively an alternating current (AC) generator, which is designed to activate (e.g., power) the discharge cells 206. The plasma source 210 may further include a control unit to select the cells that receive power from the generator. For example, the discharge cells may include an addressable switch. The switch connects both cell electrodes to the RF bus electrode only when closed and disconnects the cells from the RF bus electrode when the switch is open. Application of an RF voltage to the associated discharge cell turns the associated discharge cell on and emits a plasma-associated flux. In a further example, the RF generator may be configured to apply an RF voltage to a first set of discharge cells for a first duration and to apply the same RF voltage to a second set of discharge cells for a different duration. In another embodiment, the RF generator may be designed to increase or decrease power to maintain a predetermined voltage regardless of the number of discharge cells that are activated or in an ON state and / or the number of discharge cells that are currently not activated or in an OFF state.

[0042]

[0056] In some embodiments utilizing DBD technology, the plasma source may include a control unit to select / address cells that receive a memory charge prior to plasma sustainment, and an AC (1-200 kHz) generator 208 with a constant voltage amplitude designed to initiate and sustain discharge in plasma elements (e.g., plasma cells) 206. When applying the same sustained waveform V(t) to all cells, only the selected plasma cells with memory charge will discharge. The initiated cells can generate plasma and emit plasma-related flux in a local area within the area of ​​this cell.

[0043]

[0057] 2B, the plasma generating plate 204 is an actuator plate designed to perform individual time-dependent opening and closing of a plurality of plasma shutters to selectively expose regions of the substrate 230 to a flux of ions and electrons flowing through individual elements 206 of the actuator plate. This embodiment, of course, includes a plasma source (an ICP source is shown) that generates a plasma above the actuator plate.

[0044]

[0058] In some embodiments, the plasma element 206 includes multiple electrode layers that perform opening and closing to allow or prevent a portion of the plasma-associated flux from flowing through the actuator plate. The plasma shutter 206 may include a first layer of electrodes (e.g., a grid facing the plasma) disposed proximate and / or to the side of the plasma source 210. The first layer of electrodes may be maintained at a floating potential. The plasma shutter 206 may include a second layer of electrodes including a first ring of electrodes. The first ring of electrodes is maintained at a floating potential when the associated plasma shutter is open and at a negative potential (reflects electrons) when the associated one of the plasma shutters is closed. The plasma shutter 206 may include a third layer of electrodes including a ring electrode. The ring electrode is maintained at a floating potential when the associated plasma shutter is open and at a positive potential (reflects ions) when the associated plasma shutter is closed.

[0045]

[0059] In some embodiments, as shown in FIG. 2C, the plasma generating plate 204 is an actuator plate embedded in the pedestal and activates the plasma elements 206. The plasma elements 206 may include multiple bias electrodes to control the fluence of energetic ions. The plasma is generated by a plasma source 210 (ICP is shown) and the electrodes are maintained by an RF power supply that can provide a constant amplitude RF signal. A voltage controller 205 may send a signal to a bias RF generator during the addressing period to modify the power for any subframe according to the number of activated electrodes (area) to provide the same bias voltage for all subframes, regardless of the number of elements selected.

[0046]

[0060] In some embodiments, the number of plasma elements 206 is large, e.g., (x i , y k ) or i,k coordinates are used to address (e.g., scan) line-by-line by the control plate. The plasma elements 206 may be addressed individually or in groups or regions, as will be described in further embodiments.

[0047]

[0061] 3A-3B show a set of digitally controlled plasma elements 300A-B according to embodiments of the present disclosure. The set of controlled plasma elements 300A-B may be associated with or used as part of a plasma generating plate (e.g., plate 204 in FIGS. 2A-2C). For example, control may be applied to local plasma generation above adjacent elements of the substrate. In another embodiment, a set of controlled plasma elements may be used in combination with a common plasma source (e.g., ICP), but digital control of the plasma elements is used to control the local fluence (integral of flux over time) of energetic ions to the substrate. For example, the set of plasma elements may include partial bias electrodes 302A-C. In an analog regime, the fluence may be controlled by changing the voltage to each of these electrodes (e.g., changing the flux or ion energy). In a digital regime, the voltage remains substantially constant, but biases are applied to each section at different times to vary the fluence. For example, instead of having a few zones, the bias electrode can be pixelated into many (hundreds) of small electrodes. The electrodes can be associated (e.g., connected) to several zones as in previous examples 304A-C to achieve the same results, or every single one of these small electrodes can be controlled to achieve greater process flexibility and control.

[0048]

[0062] The time that RF voltage (e.g., RF bias voltage) is applied to each electrode or each section of an electrode can be controlled. Note that the applied voltage to each electrode can be independent of the number of active (e.g., on) electrodes. In some embodiments, to achieve independent applied voltages, the RF generator 208 may operate in a constant output voltage mode. If the generator operates in a power control mode, a signal from the control unit can be provided to the RF generator to adjust the power according to the number of active electrodes.

[0049]

[0063] The time required to drive each of the plurality of discharge elements may be calculated and stored in an exposure duration map file (e.g., an "image" file). For example, in the case shown in FIGS. 3A - 3B having only three zones, the exposure file may include (t(a), t(b), t(c)) representing the exposure duration of each zone. As introduced above, an exemplary method of implementing an exposure file for a system having three zones is shown below. Assume that t(a) < t(b) < t(c). The entire panel (all three zones) operates for a duration of t(a), then zone A is turned off and only zones B and C operate for a duration of t(b) - t(a), then zone B is turned off and only zone C operates for the remaining time t(c) - t(b). By process control of the three zones, a process profile with good radial uniformity can be achieved. The radially low, high, or M - shaped or W - shaped profiles on the substrate can be mitigated by the three sections 302A - C or zones. When the requirements for the process results are more stringent (no local highs / lows, azimuthally uniform), the number of controlled elements required increases and this simple operation becomes inefficient. In this case, the digital control methodology as presented herein can provide a way to implement it. In some embodiments, all elements may operate in the same way (e.g., the same emission rate of plasma - related flux), but for an appropriate time (e.g., the exposure duration of plasma - related flux).

[0050]

[0064] In some embodiments, active (on) discharge cells are connected to an RF source and non - active (off) cells may be grounded or floating (i.e., not connected to anything). The plasma - related flux to the wafer of all nuclides (e.g., ions, electrons, radicals, etc.) is independent of the state of the discharge cells, except for high - energy ions. In some embodiments, high - energy ions may be present only above the active (on) electrodes.

[0051]

[0065] Alternatively, element 304 may represent a number of plasma shutters (as in FIG. 2B). A plasma source generating a plasma that emits a plasma-related flux may be disposed proximate to the plasma shutters. Each plasma shutter may be designed to switch between an open position and a closed position. While in the open position, the plasma shutter may allow the flux of ions and electrons of the plasma to pass through the control plate, and while in the closed position, the plasma shutter may prevent the plasma-related flux from passing through the control plate. For example, the plasma shutters may be individually addressed and controlled to selectively open and close to selectively expose the substrate to the plasma-related flux flowing through the plasma shutter.

[0052]

[0066] In some embodiments, the plasma shutter includes multiple electrode layers. The multiple electrode layers perform opening and closing to allow or prevent ions and electrons from flowing through the plasma shutter (e.g., through the control plate). The plasma shutter may include a first layer of electrodes (e.g., a grid facing the plasma) located proximate and / or to the side of the plasma source. The first layer of electrodes may be maintained at a floating potential. The plasma shutter may include a second layer of electrodes including a first ring of electrodes. The first ring of electrodes is maintained at a floating potential when the associated plasma shutter is open and at a negative potential (reflects electrons) when the associated one of the multiple plasma shutters is closed. The shutter may include a third layer of electrodes including a ring electrode. The ring electrode is maintained at a floating potential when the associated plasma shutter is open and at a positive potential (reflects ions) when the associated plasma shutter is closed.

[0053]

[0067] 4A-4B show a set of addressable plasma elements 400A-B according to embodiments of the present disclosure. The addressable plasma elements may use dielectric barrier discharge (DBD) technology, which allows for independent operation of each individual cell 402A-B (e.g., mini-source) using the selectability (addressability) of the cells 402A-B (e.g., DBD cells). Alternatively, the addressable plasma elements may include individually addressable shutters, as described above. The advantage of dielectric barrier discharge is that a common voltage waveform from a single power supply can be applied to all cells 402A-B simultaneously, but discharging will only occur in the previously selected (addressed) cells. Those cells may have a natural memory capability without the need for additional memory retention elements. The remaining cells 402A-B are in an idle state (no discharge). An AC voltage (±V s ) can generate a series of identical discharge pulses at a frequency of 2f in their selected cells. Each time a discharge pulse is generated with a change of polarity, the total amount of plasma-related particles (ions, electrons, radicals) generated in any cell is proportional to the number of pulses generated in that cell.

[0054]

[0068] A combination of several sub-images / sub-fields of different durations can be used to generate an exposure image (sum of sub-images). In some embodiments, the exposure image includes data with a set of exposure durations that are mapped to individual plasma elements. The plasma elements may be oriented in a grid with individual activation instructions stored in the exposure image file. As will be further explained in later embodiments, the exposure image may include exposure duration values ​​(e.g., amount of time, number of plasma pulses, etc.) in different formats that can be mapped to the cells 402A-B. Each cell 402A-B thereby allows the passage or generation of plasma-related components for the associated exposure duration. In some embodiments, for each sub-field, a control unit (e.g., control unit 205 of FIG. 2) applies the appropriate sub-image to a control plate (e.g., control plate 204) to address the selected cell. The selected cell is then activated for the duration of that sub-field.

[0055]

[0069] As shown in Figures 4A-B, the cells may be arranged in an organized structure (e.g., a grid, shape, etc.). Each cell 402A-B may be given an address in two-dimensional space (X,Y) or (Z,Y). The former uses a two-electrode structure, so that both electrodes are used for both addressing and sustaining. The latter uses three electrodes. In that case, an additional electrode is used along with the Y (scanning) electrode for addressing only, and the X and Y electrodes are used to sustain the discharge. Either addressing and sustaining scheme can be used to address the electrodes. For example, a cell may be assigned an address having an X address 404 (or Z address 408) and a Y address 406. In some embodiments, an exposure image (also known as an exposure map) is generated for a large array t ik Or N ik where N is the number of pulses and (i, k) is the (x i , k ) where the address identified in the exposure image corresponds to the address of a cell of a set of plasma elements 400A-B.i , y k ) coordinates. For example, an address in an image file may contain data indicating the duration that the associated addressable node (or cell) is active or exposure duration during a plasma process.

[0056]

[0070] In some embodiments, the exposure image t ik To convert to an addressable image, we use the process time t pr , color, or gray shade normalization can be used, i.e. t pr =max(t ik ) (Formula 1) τ ik =t ik / t pr (Formula 2)

[0057]

[0071] τ ik number of gray levels N G Multiplying by and taking the integer part of the result (mod 1) gives the gray level (GL). GL ik =(N G ·τ ik )mod1 (Formula 3)

[0058]

[0072] GL ik is the exposure image τ ik To use this for addressing, ik The value is N sf The number of bits can be converted to a number of bits, where each bit indicates whether the cell is addressed ON or OFF for a particular subfield. For example, in an 8 subfield addressing (N sf =8), each subfield starts at 1 and goes to 2 k-1Thus, the number 01010101 means level 170 (out of 255), and the cell is addressed ON during subfield numbers 2, 4, 6, 8 and OFF during the remaining subfields.

[0059]

[0073] FIG. 5 illustrates a digital process control system 500 according to aspects of the disclosure. The digital process control system 500 may be associated with or used as part of a plasma control plate (e.g., control plate 304 of FIG. 3). The digital process control system may control the power and / or voltage supply to digital process elements 508 (e.g., bias electrodes of FIG. 3). The digital process control system 500 may be designed to selectively turn on and off individual digital process elements 508. The digital process control system 500 may include an electrostatic chuck (ESC) 502, a switch controller 504 including a set of switches 510, and an RF generator (RFG) having a matching circuit (also known as a match) 506. The digital process control system 500 may control the activation time of the digital process elements 508. The activation time of the digital process elements 508 may be set to a particular time t independent of all other elements. k This involves energizing any digital process element k (or i, k in the two-dimensional (2D) case) through

[0060]

[0074] For example, at any time t k (or t for 2D arrays) ik ) for the total t k =t min +Δt k (or t ik =t min +Δt ik ), where t min is all t k (or t ik ) is the shortest, and 0≦Δt k ≦Δt max Here, Δt max =t max -t minThis division may allow for precise control of the total time independent of time. The time resolution is relatively short, Δt max Applies to Δt max is usually t max The precision with which this time is controlled, δt, is much smaller than any real t k It is convenient to choose the difference between N and N to be larger than δt. In this case, the potential number of greyscale levels, which defines the precision of the time control, is N G = Δt max / δt. Note that δt can also be used for short durations (e.g., milliseconds, or even shorter). This can be achieved by several embodiments below.

[0061]

[0075] In a system having bias electrodes (e.g., electrodes 302A-C and 304A-C of FIGS. 3A-C) where the bias electrodes are driven with a single constant bias voltage RF generator 506, the switch controller 504 may be configured to select time values ​​t1, t2, ..., t N may be stored with a resolution δt and when the time comes, the contacts (switches 510) between the RF generator 506 and the digital processing elements 508 may be turned off. If necessary, the switch controller 504 may send a signal to the RF generator indicating that the power should be reduced by a certain value related to the number of digital processing elements that are turned on or off at that time. Note that if the number of digital processing elements is large and the time required to turn off a switch 510 or group of switches is very short, all of the switches 510 may control a relatively small power / current.

[0062]

[0076] In another embodiment, in a system having a dielectric barrier discharge (DBD) based plasma source similar to the discharge cells described in connection with FIG. 2, all DBD cells can be driven with the exact same serpentine sustained voltage waveform, but discharge occurs only in the previously selected (addressed) cell. The time is Δt max =t max -t minFor example, the time length of each subfield can be Δt max / 2 m Then, m ∈ (1, M) is the number of subfields, and any time t can be expressed as δt = Δt by combining the time of the subfields. max / 2 M The image for any particular subfield can be created by erasing all the cells (e.g., turning them all off) and then addressing the cells between subfields. A full discharge takes time t min The whole image includes an “all on” image for t followed by M correction images. The whole image is then evaluated to determine the accuracy (t max -t min ) / 2 M Array t for generating a discharge in the array source ik For example, if the total process time is 100 seconds, the maximum correction required for the process is 10 seconds (10%), and there are only 6 subfields total (M=5), then the accuracy of the process control is 0.3 seconds, or 0.3%.

[0063]

[0077] In some embodiments, the exposure distribution image may be related to or correspond to the process result image h(k), where colors are assigned based on the relative change in film thickness, as will be described in connection with FIG.

[0064]

[0078] 6A-6E show various images illustrating the process flow according to several aspects of the present disclosure. For example, FIG. 6A shows the initial selection of a uniform exposure image to achieve a uniform target process image. This image has a number of elements equal to the number of controlled elements. Since it is expected to be large, we will call it a high-resolution (HR) exposure image. FIG. 6B shows an example of a non-uniform low-resolution (LR) process image obtained in the result of exposure image 6A and obtained using a metrology tool after the process is completed. A typical number of elements in this LR image is 49, and the values ​​between these measurement points are the result of interpolation. FIG. 6C shows the same LR process image (e.g., with 49 elements) converted to a high-resolution process image (e.g., 1000 elements), where each element has the coordinates of the controlled element. FIG. 6D shows a corrected exposure image obtained using the simple procedure described in this invention. FIG. 6E shows the resulting uniform HR process result image.

[0065]

[0079] As shown in FIG. 6B, a typical process result shows the change in a measured parameter (e.g., film thickness of a substrate) as a result of a process. The parameter may be measured over multiple points (e.g., 49 points). Alternatively, more or fewer points can be used to measure the parameter. The measured points and their locations may not be related to the location and number of controlled elements being addressed, as shown in FIG. 6A, FIG. 6C, and FIG. 6D. As seen in FIG. 6B, the raw process result image h raw (x, y)=h raw (k:k=1~49) is the source coordinate h ik =h(x i , y k ) to a processed image (e.g., FIG. 6C). To perform this conversion, the control unit may raw Interpolate (x, y) and convert this interpolation to the source coordinate (x i , yk ) related data ik Extract this array h ik =h(x i , y k ) is the process result image (e.g., FIG. 6C or the modified exposure image FIG. 6D). A processing unit (e.g., processing unit 207 in FIG. 2) processes the exposure image t ik =h(x i , y k ) (e.g., FIG. 6E). In some embodiments, the exposure image may include a 2D array image, any one of which may be expressed as a product of a maximum value (brightness) and a relative value, where the relative value is the ratio of the local value to the maximum value ("color" or "shade"). h ik =h max h ik / h max , …, t ik =t max ·t ik / t max (Formula 4) For example, the position (x i , y k ), you can illustrate or "paint" the data.

[0066]

[0080] In some embodiments, the exposure image can be tuned and improved through image processing. For example, the process can start with a process image obtained from any initial exposure distribution image (e.g., FIG. 6C), and then a standard procedure with simple numerical algorithms can be used to modify the elements of the exposure image array associated with the process image array. The modified image (e.g., FIG. 6D) can be applied to obtain a process image (e.g., FIG. 6E) that is closer to the desired process result (image) (DPI) than the initial image (e.g., FIG. 6B). This can be repeated until the difference between the desired process image (DPI) and the actual process image (PI) is satisfactory (e.g., meets a threshold or target thickness profile).

[0067]

[0081] FIG. 7 illustrates a digitally controlled plasma processing device according to the present disclosure. FIG. 7A illustrates an actuator plate 700A, FIG. 7B illustrates a selected plasma cell 700B, and FIG. 7C illustrates a control unit 700C of the digitally controlled plasma processing device. In an embodiment, the plasma processing device illustrated in FIG. 7A-7C may include any of the plasma processing systems disclosed in any of FIG. 1-6. Alternatively, the plasma processing device may be any other plasma processing device as described herein.

[0068]

[0082] As seen in FIG. 7A, the actuator plate 700A includes multiple interfaces 702A-C. For example, three interfaces (e.g., X-interface 702A, Y-interface 702B, and Z-interface 702C) may be used. Each interface may include a series of leads (e.g., wires) coupled to a set of plasma cells 706 arranged across the actuator plate 700A. Note that the relative orientation of each interface is exemplary, and the role played by each interface 702A-C may be interchangeable with other interfaces. In some embodiments, the first interface (e.g., Z-interface) carries addressing signals during an addressing period of the plasma process to address (e.g., digitally flag, electronically store data) selected plasma cells 706 to be activated during a future sustaining period of the plasma process. The second and third interfaces (e.g., X-interface 702A and Y-interface 702B) carry sustaining signals to each of the plasma cells 706 during a sustaining period of the plasma process. The addressing signals may be targeted to selected cells. In some embodiments, the sustain signals are delivered to each plasma cell 706 regardless of whether the plasma cell has been previously addressed, but in other embodiments, only selected cells (e.g., the addressed cells, the "on" cells) receive the sustain signals.

[0069]

[0083] As shown in FIG. 7B, the plasma cell 706 may include an addressable switch (i.e., an addressable actuator) 710, a memory element 712, and an emitter 714. In some embodiments, the memory element 712, which may correspond to any combination of volatile and / or non-volatile storage mechanisms, receives an addressing signal (e.g., from the Z interface 702C and the Y interface 702B) and stores in memory an indication that the cell has been addressed (e.g., during the addressing period of the plasma process). The plasma cell 706 may receive a sustain signal (e.g., from the X interface 702A and the Y interface 702B). If the plasma cell 706 was previously addressed by an addressing signal, the indication in the memory element 712 causes the addressable switch to close. Closing the addressable switch allows the sustain signal to activate the emitter 714. The emitter may include a light emitter, a plasma generator (e.g., a flux of ions or electrons), or a plasma shutter. For example, emitter 714, when activated, may generate and emit a plasma-related flux.

[0070]

[0084] As shown in FIG. 7C, the process of addressing and maintaining the plasma cell may be performed by a control unit 700C. The control unit 700C may include one or more processors, analyzers, and / or circuits that address and maintain the plasma cell 706. As seen in FIG. 7C, the control unit 700C includes a process step analyzer 720. The process step analyzer 720 receives configuration and / or parameter data for a process step in a plasma process. For example, the process step analyzer can receive gas information (e.g., gas type, gas flow rate, gas pressure, etc.), pressure of the processing chamber, total process time of the process step, energy requirements (e.g., ion energy for the bias electrode). The control unit also includes a generator 722. The generator 722 may include a DC generator and / or an RF generator. The generator 722, in conjunction with the process step analyzer 720, generates the necessary base signals with required amplitudes (e.g., auxiliary signals (e.g., control signals) required for control or addressing, and other voltage magnitudes and process times to perform the process steps). For example, the process analyzer 720 may determine the addressing voltages, sustain voltages, scan voltages, and how to divide the total process time into addressing duration, scan duration, and sustain duration. In some embodiments, a process step may be performed using multiple sub-fields, as described in detail in other embodiments. The duration of each sub-field may be determined by the process step analyzer 720 and performed by the generator 722.

[0071]

[0085] As shown in FIG. 7C, the control unit 700C includes processing elements (e.g., processors) for performing image processing functions 724 and process tuning functions 726, as will be described in subsequent embodiments (e.g., methods 800-1000 of FIGS. 8-10). In some embodiments, the image processing functions 724 may include generating and addressing an image and dividing the addressing image into a series of subfield images for performing a process step. In some embodiments, the process tuning functions 726 convert the actual measured image data (e.g., 49 measured points across the substrate) into a process image having coordinates of the plasma elements. The process tuning functions may further compare the desired process image to the process image and generate a new addressing image with new processing times and new subfield information (e.g., length of each subfield). This new addressing image and associated data may then be used for the next iteration of the process step.

[0072]

[0086] As shown in FIG. 7C, the control unit includes drivers 728, 730 and a synchronizer 732. The driver 728 is associated with powering the plasma cells during both the addressing and sustaining periods. The driver 730 is associated with powering selected plasma cells that are addressed based on the addressing image. The synchronizer 732 adjusts the signals generated from each of the drivers to perform the addressing, scanning, and sustaining of the plasma cells 206. As previously described, a number of interfaces 702A-C are used to send signals to the plasma cells 206 of the actuator plate 700A. It should be noted that the on state can be a first voltage level and the off state can be a second voltage level. For example, the first voltage level can be greater than the second voltage level. In another embodiment, the second voltage level can be grounded.

[0073]

[0087] 8-12 depict flow diagrams illustrating exemplary methods 800-1200 associated with digital plasma process control according to some embodiments of the present disclosure. For simplicity of explanation, the methods 800-1200 are depicted and described as a series of operations. However, operations according to the present disclosure may occur in various orders and / or simultaneously and with other operations not presented or described herein. Furthermore, not all illustrated operations may be performed to implement the methods 800-1200 in accordance with the subject matter of the present disclosure. In addition, one skilled in the art will understand and appreciate that the methods 800-1200 may alternatively be represented as a series of interrelated states via a state diagram or events. The methods 800-1200 may be performed, for example, by the plasma processing system 100 or 200 of FIGS. 1-2. At least some operations of the methods 800-1200 are controlled and / or performed by a process chamber controller, such as by the control unit 700C of FIG. 7C.

[0074]

[0088] 8 is a flow chart of a method 800 for plasma processing according to aspects of the present disclosure. Referring to FIG. 8, in block 801, processing logic receives exposure data associated with performing a plasma process using digital process control. The exposure data may be transmitted as an exposure map (e.g., an image file, or an exposure map as described in connection with FIGS. 6A-6B). Alternatively or in addition, the exposure data may include plasma process parameters such as sustain voltages, addressing voltages, total process time, and subfield structure (e.g., number and relative process times of subfields), among others.

[0075]

[0089] At block 802, processing logic generates a set of subfields associated with the exposure data. The subfields may include a plurality of plasma exposure values. Each plasma exposure value is associated with a respective plasma element of the set of plasma elements configured to generate a plasma-related flux. For example, the subfields, such as those described in connection with FIGS. 1A-1C, may be used to divide the overall process time into a plurality of frames and / or subframes.

[0076]

[0090] At block 803, processing logic addresses a selected plasma element associated with a first subfield of the set of subfields. In some embodiments, the selected plasma element may be addressed using addressing techniques such as those described in connection with Figures 7A-7C. For example, as described in connection with Figures 7A-7C, the plasma element may include a memory element (e.g., memory element 712 of Figure 7B) that can store data that can close a switch that activates an emitter in response to receiving a sustain voltage.

[0077]

[0091] In block 804, the processing logic applies power to the plasma elements for a sustain period corresponding to the first subfield. The sustain period may include a duration during which a constant voltage (e.g., a sustain voltage) is applied to each of the plasma elements. For example, as described in connection with FIG. 7B, during the sustain period, all of the plasma elements are supplied with the same sustain voltage, and those cells that were previously addressed (e.g., data stored in memory elements) drive and activate elements (e.g., light emitters, plasma emitters, plasma shutters, etc.). For example, the resulting process image generated from a selected plasma emitter increases "brightness" (e.g., thickness change) as the sustain duration increases.

[0078]

[0092] At block 805, processing logic removes (e.g., erases) the addressing associated with the first sub-field. All of the previously addressed plasma elements may be cleared of any addressable data (e.g., clearing any charge and / or data stored in memory elements 712).

[0079]

[0093] In block 806, processing logic addresses another selected plasma element associated with the next subfield. As previously described, addressing techniques can be used to address this next selected plasma element, similar to one implementation of the processing logic in block 803, as described in connection with Figures 7A-7C.

[0080]

[0094] In block 807, the processing logic applies power to the plasma elements for a sustain period corresponding to the subfield associated with the previously addressed plasma element. As previously described, the sustain period may include a duration during which a constant voltage (e.g., a sustain voltage) is applied to each of the plasma elements. For example, as described in connection with FIG. 7B, during the sustain period, all of the plasma elements are supplied with a sustain voltage, causing those cells that were previously addressed (e.g., had data stored in their memory elements) to drive and activate their elements (e.g., light emitters, plasma emitters, plasma shutters, etc.). For example, the resulting process image generated from the selected plasma emitter increases in "brightness" (e.g., thickness) as the sustain duration increases.

[0081]

[0095] At block 808, processing logic removes the addressing associated with the previously addressed selected plasma element. Similar to what was performed at block 805, all of the previously addressed plasma elements may be cleared of any addressable data (e.g., clearing any charge and / or data stored in memory element 712).

[0082]

[0096] At block 809, processing logic determines whether all subfields in the set of subfields have been processed. In response to determining that all subfields have been processed, processing logic proceeds along the YES path to block 810. In response to determining that all subfields in the set of subfields have not been processed, processing logic proceeds along the NO path to block 806 and continues by addressing the selected cell associated with the next subfield.

[0083]

[0097] At block 810, processing logic determines whether all frames have been processed. In response to determining that all frames have been processed, processing logic proceeds along the YES path and ends. In response to determining that all frames have not been processed, processing logic proceeds along the NO path to block 803 and continues by processing the next frame. In some embodiments, this process is repeated until all subfields have been processed, while in other embodiments, the process continues until an end condition for the plasma process is met (e.g., the process results meet a threshold criterion).

[0084]

[0098] In some embodiments, the method 800 is repeated a number of times (M) using frames to make the images (both the exposure image and the process image) progressively "brighter." Each frame is a representation of the same image (t1, τ ik ) and H ik This results in the same normalized process image as ik It is H ik The process time increases with the number of frames until it reaches T = Mt1, the total time to display a single frame t1. For example, for a uniform desired process image (DPI), H ik =H=constant, process image of a single frame h ik will also become uniform, resulting in increased "brightness" / thickness of the image over time.

[0085]

[0099] In another embodiment, the exposure image is displayed only once, but the overall process time is divided based on a suitable number of subfields, each of which is substantially M times longer than the suitable subfield in the previous embodiment. In this embodiment, some areas are exposed faster than the H ik , and then it stops, while other areas are still processed until the entire image reaches the desired brightness / thickness value. For example, ik With =H= constant, the image will not be uniform until the very end, as the areas stop one by one and change their brightness until the last one reaches the same value.

[0086]

[0100] FIG. 9 is a flow chart of a method 900 for tuning a plasma process according to aspects of the disclosure. Referring to FIG. 9, in block 901, processing logic receives data including a set of plasma exposure durations associated with a set of plasma elements. In some embodiments, the data is received in the form of an exposure image including a "brightness" value corresponding to the exposure duration for each of the plasma elements. For example, the plasma elements may be represented as nodes (i, k) indicating their relative positions with respect to one another. The exposure image may include values ​​(e.g., depicted as colors or various degrees of brightness) that are mapped to the individual plasma elements and correspond to the total exposure duration of each plasma element.

[0087]

[0101] At block 902, processing logic performs a process on a substrate using a set of plasma exposure durations with a set of plasma elements. The plasma elements may be configured to generate a plasma-related flux. In some embodiments, the set of plasma exposure durations may include an amount of time t that an associated plasma element exposes a first substrate to a plasma-related flux generated by the associated plasma element. ikIn other embodiments, the first data further includes a process duration indicating a total amount of time for performing a substrate process operation on the first substrate. Any of the set of plasma exposure durations may include a percentage value of the process duration. In some embodiments, the set of plasma exposure durations includes an amount N of plasma pulses that an associated plasma element (i, k) exposes the first substrate during the plasma process. ik In some embodiments, as described in detail in connection with other figures (e.g., FIG. 9), substrate processing may be performed in a single frame or multiple frames having various numbers of subfields.

[0088]

[0102] As mentioned above, in some embodiments, the first data is an image file (e.g., · ik ≡δh ik / δt). The set of plasma exposure durations may be stored as an array or map having at least one of brightness or color values ​​indicative of the exposure duration. Processing the data may include converting the image file into an addressing image. For example, a color map may indicate the general exposure converted into an addressing image or data mapped to indicate the individual exposure durations of the set of plasma elements. This data may be stored as an entire frame or may be divided into subfields and addressed, maintained, and erased (e.g., as described in method 800 of FIG. 8).

[0089]

[0103] In some embodiments, the received data takes the form of an exposure image t(x,y) on the substrate via an image file or exposure map. For example, in a digitally controlled multiple source / plasma device, the thickness of the resulting process (film grown, etch depth, etc.) is expressed as a function of space and time h(x,y). i , y k , t)≡h ik (t), where t = t(i, k) = t ikis the on-time of the source located at node (i, k). · ik ≡dh k Using the fact that / dt and (δ|h|) / δt>0, the exposure time t ik can be adjusted at all nodes (i, k) to achieve the process profile h0(x, y). ik is an exposure image that may comprise the data received in block 901.

[0090]

[0104] At block 903, processing logic receives data including a set of plasma exposure durations and an associated thickness profile of a substrate generated using the set of plasma exposure durations with a set of plasma elements. In some embodiments, the thickness profile may include film thicknesses taken at several points measured across the substrate (e.g., 49 locations across the substrate). The thickness profile may then be extrapolated to represent the thickness across the surface of the substrate in areas not located far from the measured locations. The thickness profile or on-wafer result image may be represented by the interpolated coordinates r of the positions of the plasma elements (e.g., plasma mini-sources). ik Function of h(r): h(r ik )=h(x i , y k )≡h ik Regardless of the location and number of actual measurement points, the dimensions and coordinates of the process image array are t(r ik )=t ik is the same as:

[0091]

[0105] The thickness h around the plasma element (also known as the node) ik (t) grows with the on-time (or number of pulses in the DBD) at that node (i, k) to achieve the desired process image (DPI) H(x, y). ik is an on-wafer image ik =H ikis the addressing image you are looking for to get.

[0092]

[0106] At block 904, processing logic determines an update to a set of plasma exposure durations based on a comparison between the associated thickness profile and the target thickness profile. For example, the comparison may ik =k(t ik ) and the target thickness profile or DPI H ik can be performed for various durations t ik or the amount of plasma pulses N ik can be updated for each individual plasma element (i, k).

[0093]

[0107] At block 905, processing logic performs the process on the new substrate using the updated set of plasma exposure durations with the set of plasma elements, in some embodiments, the process may be performed using the same equipment (e.g., plasma elements) with only the exposure durations changed.

[0094]

[0108] At block 906, processing logic receives data including an associated thickness profile of a new substrate generated using the updated set of exposure durations with the set of plasma elements. The thickness profile received at block 906 may include the same features as the thickness profile received at block 903.

[0095]

[0109] At block 907, processing logic determines whether the associated thickness profile of the new substrate meets the criteria. In response to determining that the associated thickness profile of the new substrate profile meets the criteria, processing logic proceeds along the YES path to block 908. In response to determining that the associated thickness profile of the new substrate profile does not meet the criteria, processing logic proceeds along the NO path to block 904. In some embodiments, the thickness profile h ik and the desired process image (DPI) (H ik) is within the threshold criterion, ik may satisfy a threshold criterion, for example, each thickness value in the profile may be within a predetermined difference limit, process control limit, and / or statistical bound.

[0096]

[0110] At block 908, processing logic saves the new image file (e.g., locally) and ends the process.

[0097]

[0111] In some embodiments, tuning is used to update the total time (e.g., brightness) of the same image, in some embodiments tuning is used to update the image and keep the total time the same, and in some embodiments both the total time and the image may be updated. For example, tuning the total time or updating the image may be used to update a partially developed or stable process. For example, updating a portion of the data (e.g., brightness or image file) may apply fine adjustments such as to account for slow process drift during normal manufacturing operations. In this embodiment, a test wafer may be used.

[0098]

[0112] In some embodiments, measurements of the substrate (e.g., determining the thickness profile received in blocks 903 and 905) may be performed after processing steps are completed. For example, process results (e.g., changes in the thickness profile) may be ascertained outside of the processing chamber or in proximity to the plasma source. However, in other embodiments, techniques for in-situ processing may be used to make on-demand adjustments to the manufacturing process. For example, specific locations on the substrate may be live monitored and any process updates may be dynamically determined to meet the desired results (e.g., process image) at the monitored portion of the substrate.

[0099]

[0113] In some embodiments, the initial addressing image is unknown, and therefore the total process time t pris unknown. pr ) may be used as a starting point (eg, in blocks 901 and 902).

[0100]

[0114] 10 is a flow chart of a method 1000 for tuning a plasma process according to aspects of the present disclosure. The method 1000 may generally include processing multiple wafers (e.g., two wafers at a time) using different durations, making a comparison between the resulting thicknesses, and determining a rate of change of thickness values ​​at one or more processing locations on a first substrate and a second substrate based on the comparison. Modifications to the processing instructions (e.g., image files) may be determined based on the rate of change of thickness values. For example, modification of the first data may be in response to determining that the rate of change of thickness values ​​at one or more processing locations meets a predetermined value.

[0101]

[0115] The following embodiment is an exemplary process of using method 1000 to tune a plasma exposure duration (e.g., an exposure image). In block 1001, processing logic reads an arbitrary initial image file t ik =t ik 0 In block 1002, processing logic processes two substrates (e.g., wafers), one at time t ik and the other is time t ik +δt. In some embodiments, the initial image t ik 0 can be a simple uniform image (e.g., a uniform gray image), in which case all elements are the same. Alternatively, the initial image t ik 0 δt (e.g., an update to a set of plasma exposure durations) can be the same for all nodes or can be updated for process t pr It should be a few percent of that.

[0102]

[0116] At block 1003, processing logic compares a first thickness profile associated with the first substrate to a second thickness profile associated with the second substrate. In some embodiments, the thickness profile may be generally represented as a process image (e.g., a mapping of thickness across each substrate). For example, the process images on these wafers may be represented as follows: h ik =h ik (t ik ) (Formula 5) and h ik (t ik +δt)=h ik +δh ik (Formula 6)

[0103]

[0117] At block 1004, processing logic determines a film growth rate (e.g., more generally, a rate of change of thickness value). The film growth rate may be related to the plasma elements (e.g., element properties, element type, process chamber parameters, etc.). For example, using Equation 5 and Equation 6, the following growth rate file (array) may be obtained using the following equations: h ik = δh ik / δt (Formula 7)

[0104]

[0118] Thickness profile h ik =h(t ik ) and the target thickness profile or DPI H ik A comparison may be made (eg, block 1003) between

[0105]

[0119] In block 1005, processing logic determines whether the first thickness profile of the associated substrate meets the criteria. In response to determining that the associated thickness profile of the new substrate profile meets the criteria, processing logic proceeds along the YES path to block 1007. In response to determining that the associated thickness profile of the new substrate profile does not meet the criteria, processing logic proceeds along the NO path to block 1006. In some embodiments, the thickness profile h ik and the desired process image (DPI) (H ik ) is within the threshold criterion, ik may satisfy a threshold criterion, for example, each thickness value in the profile may be within a predetermined difference limit, process control limit, and / or statistical bound.

[0106]

[0120] At block 1006, processing logic updates the image file based on the film growth rate. Updating the image file may include updating the set of plasma exposure durations. Updating the set of plasma exposure durations may include modifying the initial process image using the following formula: t ik →t ik +(H ik -h ik ) / h ik =t ik +(H ik -h ik ) / (δh ik ) δt (Formula 8)

[0107]

[0121] The image processing steps (e.g., blocks 1002, 1003, 1004) are repeated, i.e. t ik →h ik , h ik →Check →δt(i, k) →t(i, k) h ik and DPI(H ik ) falls within a threshold criterion (eg, at block 1005).

[0108]

[0122] At block 1007, processing logic saves the image file and / or the growth rate file and ends the process.

[0109]

[0123] FIG. 11 is an exemplary diagram of a training phase of a machine learning model according to aspects of the present disclosure. A system, such as a machine learning system, may use the method 1000 to at least one of train, validate, or test a machine learning model according to embodiments of the present disclosure. In some embodiments, one or more operations of the method 1000 may be performed by a data set generator of a computing device (e.g., computing device 730 of FIG. 7). It should be noted that components described with respect to FIGS. 1-7 may be used to illustrate aspects of FIG. 11. In some embodiments, machine learning is performed to identify interactions between plasma elements of a digital plasma system. A change in the time that a particular plasma element is active (or open) affects both the region of the substrate associated with the particular plasma element as well as the region of the substrate proximate to the region associated with the particular plasma element. For example, the on-time of a plasma element may most strongly affect the region of the substrate directly under the plasma element. However, the on-time of the plasma element may also affect the region around the region directly under the plasma element, but not directly under the plasma element. As a result, increasing or decreasing the on-time of a particular plasma element has an impact on multiple regions of the substrate. Thus, when the on-time of a first plasma element reduces the amount of plasma flux reaching a particular region, this may also reduce the amount of plasma flux reaching the surrounding regions, and therefore it may be appropriate to increase the on-time of one or more other plasma elements associated with the surrounding regions. However, such changes in those plasma elements may also increase the flux on still other regions, which may justify modifying the on-time of still other plasma elements associated with those regions. Thus, in some embodiments, a model is generated that can be used to determine what adjustments to make to a recipe running in a particular process chamber based on the thickness profile of a substrate being processed in the process chamber.

[0110]

[0124] Referring to FIG. 11, in some embodiments, at block 1101, processing logic performs method 1100 to initialize a training set T to an empty set.

[0111]

[0125] At block 1102, processing logic identifies a first data input (e.g., a first training input, a first validation input) that includes a thickness profile of a substrate. The first data input may include a thickness profile that includes one or more thickness values ​​of a film on the substrate measured at various locations across a surface of the substrate.

[0112]

[0126] At block 1103, processing logic identifies a first target output for one or more of the data inputs (e.g., a first data input). The first target output includes an exposure map (e.g., an image file or exposure duration data) that, when processed by the plasma delivery system, results in a thickness profile that is used as the first target input.

[0113]

[0127] At block 1104, processing logic optionally generates mapping data indicative of an input / output mapping. The input / output mapping (or mapping data) may refer to a data input (e.g., one or more of the data inputs described herein), a target output for the data input (e.g., one or more of the data inputs described herein), a target output for the data (e.g., the target output specifies an exposure map and / or an image), and an association between the data input(s) and the target output.

[0114]

[0128] At block 1105, processing logic adds the mapping data generated at block 1104 to the dataset T.

[0115]

[0129] At block 1106, processing logic branches based on whether dataset T is sufficient for at least one of training, validating, or testing a machine learning model. If so (the "yes" branch), execution proceeds to block 1107; if not (the "no" branch), execution continues back to block 1102. Note that in some embodiments, whether dataset T is sufficient may be determined simply based on the number of input / output mappings and / or the number of exposure maps labeled in the dataset, while in some other embodiments, whether dataset T is sufficient may be determined based on one or more other criteria (e.g., a measure of diversity of the data examples, accuracy, etc.) in addition to or instead of the number of input / output mappings.

[0116]

[0130] In block 1107, the processing logic provides a dataset T for training, validating, or testing the machine learning model. In some embodiments, the dataset T is a training set and is provided to a training engine to perform training. In some embodiments, the dataset T is a validation set and is provided to a validation engine to perform validation. In some embodiments, the dataset T is a test set and is provided to a test engine to perform testing. In the case of a neural network, for example, input values ​​of a given input / output mapping (e.g., numerical values ​​associated with data inputs) are input to the neural network, and output values ​​of the input / output mapping (e.g., numerical values ​​associated with target outputs) are stored in output nodes of the neural network. The connection weights in the neural network are then adjusted according to a learning algorithm (e.g., backpropagation, etc.), and the procedure is repeated for other input / output mappings in the dataset T. After block 1107, the machine learning model may be at least one of trained using a training engine, validated using a validation engine, or tested using a test engine. The trained machine learning model may be implemented by a control plate (eg, control plate 106, 204) and / or a computing device (eg, computing device 730 of FIG. 7) to identify an exposure map of a target thickness profile of the substrate.

[0117]

[0131] In some embodiments, the generated training data set (e.g., as generated according to method 1100) is used to train a machine learning model and / or a physics model. The model may be trained to receive as input a thickness profile or thickness map as measured from a substrate processed by a process chamber using a plasma process and / or an exposure map of exposure settings of the plasma elements of the process chamber used during the process that resulted in the generated thickness profile or thickness map. The model may output an exposure map (e.g., an updated exposure map) indicating exposure settings to use for each plasma element for future iterations of the process in the process chamber. In some embodiments, the model may be agnostic to the process chamber and / or process recipe. Thus, the model may be generated based on training data items generated based on a process performed in a first process chamber or a first set of process chambers, and then used for a second process chamber without performing any transfer learning to tune the model for the second process chamber. Once the model has been generated, any thickness profile and / or exposure map may be input into the model regardless of which particular process chamber was used to perform the process that resulted in the thickness profile. The model may output an exposure map that indicates which plasma element settings to use to produce a uniform plasma etch and / or uniform plasma enhanced deposition. The exposure map may be input into the process chamber along with the process recipe. The process chamber may execute the process recipe adjusted based on the exposure map. For example, the exposure map may indicate for each plasma element of the digital plasma source what percentage of the time the plasma element should be turned on or open during the process as defined in the recipe.

[0118]

[0132] In one embodiment, the trained machine learning model is a regression model trained using regression. Examples of regression models are regression models trained using linear regression and Gaussian regression. A regression model predicts a value of Y given known values ​​of X variables. A regression model may be trained using regression analysis, which may include interpolation and / or extrapolation. In one embodiment, parameters of the regression model are estimated using least squares. Alternatively, Bayesian linear regression, percentage regression, Riess absolute deviation, non-parametric regression, scenario optimization, and / or distance metric learning may be performed to train the regression model.

[0119]

[0133] In one embodiment, the trained machine learning model is a decision tree, a random forest model, a support vector machine, or other type of machine learning model.

[0120]

[0134] In one embodiment, the trained machine learning model is an artificial neural network (also referred to simply as a neural network). The artificial neural network may be, for example, a convolutional neural network (CNN) or a deep neural network. In one embodiment, the processing logic performs supervised machine learning to train the neural network.

[0121]

[0135] Artificial neural networks generally include a feature representation component with classifier or recurrent layers that map features to a target output space. For example, a convolutional neural network (CNN) hosts multiple layers of convolutional filters. Pooling may be performed and nonlinearities may be addressed in lower layers, on top of which a multi-layer perceptron is typically added to map the top layer features extracted by the convolutional layers to a decision (e.g., classification output). Neural networks may be deep networks with multiple hidden layers, or shallow networks with zero or a small number (e.g., one or two) of hidden layers. Deep learning is a class of machine learning algorithms that uses a cascade of multiple layers of nonlinear processing units for feature extraction and transformation. Each successive layer uses the output from the previous layer as input. Neural networks may learn in a supervised (e.g., classification) and / or unsupervised (e.g., pattern analysis) manner. Some neural networks (e.g., deep neural networks, etc.) include a hierarchy of layers, with different layers learning different levels of representations corresponding to different levels of abstraction. In deep learning, each level learns to transform the input data into a slightly more abstract and complex representation.

[0122]

[0136] Training of neural networks may be achieved in a supervised learning manner. This involves feeding a training dataset of labeled inputs through the network, observing its output, defining an error (by measuring the difference between the output and the label value), and tuning the weights of the network across all its layers and nodes such that the error is minimized using techniques such as deep gradient descent and backpropagation. In many applications, this process is repeated across many labeled inputs in the training dataset, resulting in a network that can generate the correct output even when presented with inputs that differ from those present in the training dataset. In high-dimensional settings such as large images, this generalization is achieved when a sufficiently large and diverse training dataset becomes available.

[0123]

[0137] The trained machine learning model may be periodically or continuously retrained to achieve continuous learning and improvement of the trained machine learning model. The model may generate an output based on the input, an action may be performed based on the output, and a result of the action may be measured. In some cases, the result of the action may be measured within a few seconds or minutes, and in some cases, it may take a longer time to measure the result of the action. For example, one or more further processes may be performed before the result of the action can be measured. The action and the result of the action may indicate whether the output was a correct output and / or the difference between what the output should have been and what the output was. Thus, the action and the result of the action may be used to determine a target output that may be used as a label for the sensor measurement. Once the result of the action has been determined, the input (e.g., thickness profile), the output of the trained machine learning model (e.g., exposure map), and the target result (e.g., target thickness profile) and the actual result (e.g., measured thickness profile) may be used to generate a new training data item. The new training data item may then be used to further train the trained machine learning model. This retraining process may be performed on-tool in the process chamber controller in several embodiments.

[0124]

[0138] In some embodiments, a database for predictive processing may be provided by training a machine learning model. For example, uniform addressing (t ik =t m →h ik (t m )) and addressing of a single (one cell) or several local profiles t ik =t+δt ik →δh ik (t) (at some level h ik δt around (i, k) on the background of (t) ik is localized), and t m is the training set.

[0125]

[0139] In some embodiments, a first set of uniform input images t1, t2, ... for a given condition is used to generate a set of suitable outputs and a set of suitable local growth rates δh ik / δt. These outputs can be tested to generate a selected target process image. If the addressing image is close enough to the target process image for the determined process range (e.g., block 1106), the processing logic may continue by generating other process conditions (e.g., other gases). The method 1100 may be repeated for multiple process conditions. If the generated process image is not close (e.g., if the process is non-linear and h ik h · ik , additional training time may be added between elements of the original set.

[0126]

[0140] In another embodiment, the previously measured thickness level h ik (t) is the local addressing δt ik Make.

[0127]

[0141] 12 is a flowchart of a method 1200 of using a machine learning model to modify a plasma exposure process according to aspects of the present disclosure. Referring to FIG. 12, in block 1201, processing logic performs a plasma process using an exposure image (e.g., an exposure map) to generate a substrate having a first thickness profile. The exposure image may include brightness or color values ​​indicative of exposure durations of a set of plasma elements to expose the substrate to plasma-related fluxes.

[0128]

[0142] In some embodiments, the exposure image is displayed (repeated) many times (M) using frames to make it progressively "brighter". Each frame contains the same image (t1, τ ik ) and the same normalized process image H ik But it brings about "brightness" h ik It is H ikThe process time increases with the number of frames until it reaches T = Mt1, the total time to display a single frame t1. For example, for a uniform desired process image (DPI), H ik =H=constant, process image of a single frame h ik will also become uniform, resulting in increased "brightness" / thickness of the image over time.

[0129]

[0143] In another embodiment, the exposure image is displayed only once, but the overall processing time is divided based on a suitable number of subfields, each of which is substantially M times longer than the suitable subfield in the previous embodiment. In this embodiment, some areas are displayed earlier than the H ik , and then it stops, while other areas are still processed until the entire image reaches the desired brightness / thickness value. For example, ik With =H= constant, the image will not be uniform until the very end, as the areas stop one by one and change their brightness until the last one reaches the same value.

[0130]

[0144] In another embodiment, every step of the plasma process may be characterized by a certain time. The time may be replaced by a link to an exposure image. This controls the process time of each cell or plasma element, which may have thousands of elements. The exposure image may be stored in a file, such as a homogeneous matrix (all elements are identical). This may be easily generated manually when no other files exist or very complex algorithms may be used to obtain a specific process image.

[0131]

[0145] At block 1202, processing logic provides the thickness profile as an input to a trained machine learning model associated with a target thickness profile. The first thickness associated with the process is an exposure image. The machine learning model may be configured to arrive at a desired target thickness profile. The target thickness profile may be associated with a specification or characteristic of the substrate.

[0132]

[0146] At block 1203, processing logic obtains output(s) from the machine learning model including modifications to the first exposure map. The machine learning model may receive the first exposure map in a variety of forms. For example, the exposure map may be received by the machine learning model as a map, array, matrix, set of values, etc., indicating plasma processing exposure prescription instructions.

[0133]

[0147] At block 1204, processing logic applies one or more of the modifications to the exposure map to generate a modified exposure map. In some embodiments, the modifications to the exposure map include changing one or more exposure duration values ​​of the exposure map.

[0134]

[0148] At block 1205, a substrate is processed using the modified exposure map to produce a substrate having a target thickness profile. In some embodiments, processing the first substrate using the modified exposure map produces a substrate having a target thickness profile. In other embodiments, processing the second substrate prior to the process using the first exposure map results in the second substrate having a target thickness profile.

[0135]

[0149] 13 illustrates a block diagram of an example computing device 1300 capable of plasma delivery and / or processing, operating in accordance with one or more aspects of the present disclosure. In various example embodiments, various components of the computing device 1300 may represent various components of a control plate (e.g., control plate 106, 204, 702 of FIGS. 1, 2, and 7), a computing device (e.g., computing device 730 of FIG. 7), a training engine, a validation engine, and / or a test engine described in connection with FIG.

[0136]

[0150] The exemplary computing device 1300 may be connected to other computing devices in a LAN, an intranet, an extranet, and / or the Internet. The computing device 1300 may operate to act as a server in a client-server network environment. The computing device 1300 may be a personal computer (PC), a set-top box (STB), a server, a network router, switch or bridge, or any device capable of executing a set of instructions (sequential or otherwise) that specify operations to be performed by the device. Furthermore, although only a single computing device is shown, the term "computer" should also be understood to include any collection of computers that individually or jointly execute a set (or sets) of instructions to perform any one or more of the methodologies described herein.

[0137]

[0151] The exemplary computing device 1300 may include a processing device 1302 (also referred to as a processor or CPU), a main memory 1304 (e.g., read only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM, etc.), a static memory 1306 (e.g., flash memory, static random access memory (SRAM), etc.), and a secondary memory (e.g., a data storage device 1318), which may communicate with each other via a bus 1330.

[0138]

[0152] The processing device 1302 represents one or more general-purpose processing devices, such as a microprocessor or a central processing unit. More specifically, the processing device 1302 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIM) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. The processing device 1302 may also be one or more special-purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, or the like. According to one or more aspects of the present disclosure, the processing device 1302 may be configured to execute instructions to implement the methods 800-1200 illustrated in FIGS. 8-12.

[0139]

[0153] The exemplary computing device 1300 may further include a network interface device 1308, which may be communicatively coupled to a network 1320. The exemplary computing device 1300 may further include a video display 1310 (e.g., a liquid crystal display (LCD), touch screen, or cathode ray tube (CRT)), an alphanumeric input device 1312 (e.g., a keyboard), a cursor control device 1314 (e.g., a mouse), and an audio signal generating device 1316 (e.g., a speaker).

[0140]

[0154] The data storage device 1318 may include a machine-readable storage medium (or, more specifically, a non-transitory machine-readable storage medium) 1328 that stores one or more sets of executable instructions 1322. According to one or more aspects of the present disclosure, the executable instructions 1322 may include executable instructions associated with performing the methods 800-1200 shown in FIGS.

[0141]

[0155] The executable instructions 1322 may also reside, completely or at least partially, within the main memory 1304 and / or within the processing device 1302 during execution thereof by the exemplary computing device 1300, with the main memory 1304 and the processing device 1302 also constituting computer-readable storage media. The executable instructions 1322 may further be transmitted or received over a network via the network interface device 1308.

[0142]

[0156] Although computer readable storage medium 1328 is illustrated in FIG. 13 as a single medium, the term "computer readable storage medium" should be understood to include a single medium or multiple media (e.g., a centralized or distributed database and / or associated caches and servers) that store one or more sets of operating instructions. The term "computer readable storage medium" should also be understood to include any medium capable of storing or encoding a set of instructions that are executed by a machine and cause the machine to perform any one or more of the methods described herein. Thus, the term "computer readable storage medium" should be taken to include, but is not limited to, solid-state memories, optical media, and magnetic media.

[0143]

[0157] Some portions of the preceding detailed descriptions are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their invention to others skilled in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

[0144]

[0158] It should be noted, however, that all of these and similar terms should be associated with the appropriate physical quantities and are merely convenient labels applied to such physical quantities. Unless otherwise noted below, throughout this description, descriptions utilizing terms such as "identifying," "determining," "storing," "adjusting," "causing," "returning," "comparing," "creating," "stopping," "loading," "copying," "throwing," "replacing," "performing," and the like, should be understood to refer to operations and processes of a computer system or similar electronic computing device, which manipulate and convert data represented as physical quantities (electrical quantities) in the registers and memory of the computer system to other data similarly represented as physical quantities in the memory or registers of the computer system, or other storage, transmission, or display devices for such information.

[0145]

[0159] Some embodiments of the present disclosure also relate to an apparatus for carrying out the methods described herein. This apparatus may be specially constructed for the required purposes or may be a general-purpose computer system selectively programmed by a computer program stored in the computer system. Such a computer program may be stored on a computer-readable storage medium, such as any type of disk, including but not limited to optical disks, compact disk read-only memories (CD-ROMs), and magneto-optical disks, read-only memories (ROMs), random access memories (RAMs), erasable programmable read-only memories (EPROMs), electrically erasable programmable read-only memories (EEPROMs), magnetic disk storage media, optical storage media, flash memory devices, other types of machine-accessible storage media, or any type of media suitable for storing electronic instructions, each of which is coupled to a computer system bus.

[0146]

[0160] The methods and displays presented herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may be used with programs in accordance with the teachings herein, or construction of more specialized apparatus to perform the required method steps may prove convenient. The required structure for a variety of these systems will appear as set forth in the description below. Additionally, the scope of the disclosure is not limited to any particular programming language. It will be understood that a variety of programming languages ​​may be used to implement the teachings of the disclosure.

[0147]

[0161] The foregoing description describes numerous specific details, such as examples of specific systems, components, methods, and the like, to provide a good understanding of some embodiments of the present disclosure. However, it will be apparent to those skilled in the art that at least some embodiments of the present disclosure can be practiced without these specific details. In other instances, well-known components or methods have not been described in detail or have been presented in simple block diagram form to avoid unnecessarily obscuring the present disclosure. Thus, the specific details described are merely exemplary. Certain implementations may differ from these exemplary details and still be considered to be within the scope of the present disclosure.

[0148]

[0162] Throughout this specification, a reference to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "in one embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. In addition, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". When the term "about" or "approximately" is used herein, it is intended to mean that the nominal value presented is accurate to within ±10%.

[0149]

[0163] Although the operations of the methods herein are illustrated and described in a particular order, the order of the operations of each method may be changed such that certain operations are performed in reverse order, and certain operations are performed at least partially concurrently with other operations. In another embodiment, instructions or sub-operations of separate operations may be intermittent and / or interleaved.

[0150]

[0164] It should be understood that the above description is intended to be illustrative, and not limiting. Many other embodiments will become apparent to those skilled in the art upon reading and understanding the above description. The scope of the disclosure should therefore be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. A processing chamber, an actuator plate disposed within the processing chamber, the actuator plate comprising a plurality of plasma elements; a control unit coupled to the actuator plate, the control unit configured to control the actuator plate by independent activation or deactivation of the plurality of plasma elements; and a power supply coupled to the actuator plate and to the control unit; 1. A plasma processing system comprising: a plasma element, in response to being activated, independently exposing a localized area of ​​a substrate disposed within the processing chamber to a plasma-associated flux; each plasma element of the plurality of plasma elements is configured to change a state of the plasma element; the power supply provides a sustain signal to the actuator plate to activate selected plasma elements for a duration; the control unit selects the plasma elements to receive power from the power supply and determines the duration of the selected plasma elements; The duration is configured to divide a total process time into a number of subfields; Each subfield includes an addressing period and a sustain period.

2. 2. The plasma processing system of claim 1, wherein each of the plurality of plasma elements comprises an addressable actuator configured to change the state of a corresponding plasma element between a first state (on) and a second state (off).

3. 3. The plasma processing system of claim 2, wherein each addressable actuator is configured to maintain the state of the corresponding plasma element in either the first state (on) or the second state (off) until receiving an addressing signal from the control unit.

4. 3. The plasma processing system of claim 2, wherein the control unit controls the duration for which the sustain signal is applied to the actuator plate, the sustain signal, when applied, actuating the selected plasma element to the first state (ON).

5. The power supply source is provided to the actuator plate, The plasma processing system of claim 2 , further configured to provide a first addressing signal for changing the state of the selected plasma element.

6. 10. The plasma processing system of claim 1, wherein the processing chamber comprises a gas inlet and a gas outlet for controlling a flow of a supply gas into and out of the processing chamber.

7. 10. The plasma processing system of claim 1, further comprising a plasma source disposed within said processing chamber, said plasma source generating said plasma-related flux.

8. A processing chamber, an actuator plate disposed within the processing chamber, the actuator plate comprising a plurality of plasma elements; a control unit coupled to the actuator plate, the control unit configured to control the actuator plate by independent activation or deactivation of the plurality of plasma elements; and a plasma source disposed within the processing chamber; 1. A plasma processing system comprising: a plasma element, in response to being activated, independently exposing a localized area of ​​a substrate disposed within the processing chamber to a plasma-associated flux; the plasma source generates the plasma-associated flux; the plurality of plasma elements comprises a plurality of plasma shutters; the plasma shutters switch between an open position and a closed position; a plasma shutter, while in the open position, permits the plasma associated flux of the plasma source to pass through an associated plasma element; The plasma shutter, while in the closed position, blocks a selected one of the plasma-related fluxes from passing through the associated plasma element.

9. 8. The plasma processing system of claim 7, further comprising an RF power supply, the plurality of plasma elements further comprising an RF bias electrode, the plurality of plasma elements responsive to being activated to expose the substrate to ions at a first energy level, and the plurality of plasma elements responsive to being deactivated to expose the substrate to ions at a second energy level lower than the first energy level.

10. A processing chamber, an actuator plate disposed within the processing chamber, the actuator plate comprising a plurality of plasma elements configured to independently expose a substrate disposed within the processing chamber to a plasma-related flux, the actuator plate configured to independently activate the plurality of plasma elements; and a control unit coupled to the actuator plate; A system comprising: a plasma element, in response to being activated, independently exposing a localized area of ​​the substrate to the plasma-associated flux; the actuator plate effects individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-associated flux; The control unit sends a signal to the actuator plate; the signal energizes selected plasma elements for selected durations; The duration is configured to divide a total process time into a number of subfields; Each subfield includes an addressing period and a sustain period.

11. The system of claim 10 , further comprising a plasma source disposed within the processing chamber, the plasma source generating the plasma-related flux.

12. A processing chamber, an actuator plate disposed within the processing chamber, the actuator plate comprising a plurality of plasma elements configured to independently expose a substrate disposed within the processing chamber to a plasma-related flux, the actuator plate configured to independently activate the plurality of plasma elements; and a plasma source disposed within the processing chamber; A system comprising: a plasma element, in response to being activated, independently exposing a localized area of ​​the substrate to the plasma-associated flux; the actuator plate effects individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-associated flux; the plurality of plasma elements comprises a plurality of plasma shutters; the plasma shutters are configured to independently switch between an open position and a closed position; a plasma shutter, while in the open position, permits the plasma associated flux of the plasma source to pass through an associated plasma element, and while in the closed position, the plasma shutter prevents the plasma associated flux from passing through the associated plasma element; The plasma source generates the plasma-associated flux.

13. 12. The system of claim 11, further comprising an RF power supply, the plurality of plasma elements further comprising RF bias electrodes, the plurality of plasma elements responsive to being activated to expose the substrate to ions at a first energy level, and the plurality of plasma elements responsive to being deactivated to expose the substrate to ions at a second energy level lower than the first energy level.

14. a plasma source for generating a plasma, said plasma generating a plasma-related flux; an actuator plate disposed in the path of the plasma, the actuator plate comprising a plurality of plasma elements configured to be independently activated and deactivated, the plasma elements exposing a substrate to the plasma-associated flux in response to being activated; a control unit configured to control the actuator plate, the control unit performing individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux; and power supply source, 1. A plasma processing device comprising: the power supply provides a sustain signal to the actuator plate configured to activate selected plasma elements for a duration; the control unit determines the duration of the selected plasma element; The duration is configured to divide a total process time into a number of subfields; Each subfield includes an addressing period and a sustain period.

15. The power supply source is provided to the actuator plate, The plasma processing device of claim 14 , further configured to provide a first addressing signal configured to change a state of the selected plasma element.

16. A plasma source for generating a plasma, the plasma generating a plasma-related flux. an actuator plate disposed in the path of the plasma, the actuator plate comprising a plurality of plasma elements configured to be independently activated and deactivated, the plasma elements exposing a substrate to the plasma-associated flux in response to being activated; and a control unit configured to control the actuator plate, the control unit performing individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux; 1. A plasma processing device comprising: A plasma processing device, wherein the plurality of plasma elements comprises a plurality of plasma shutters, the plurality of plasma shutters switching between an open position and a closed position, the plasma shutters allowing the plasma-related flux to pass through an associated plasma element of the actuator plate while in the open position, and the plasma shutters preventing selected of the plasma-related flux from passing through the associated plasma element while in the closed position.

17. 15. The plasma processing device of claim 14, further comprising an RF power supply, the plurality of plasma elements further comprising RF bias electrodes, the plurality of plasma elements responsive to being activated to expose the substrate to ions at a first energy level, and the plurality of plasma elements responsive to being deactivated to expose the substrate to ions at a second energy level lower than the first energy level.

Citation Information

Patent Citations

  • Film deposition device and film deposition method

    JP2014152348A

  • Method and apparatus for generating a reflection reduction layer on a substrate

    JP2014530297A

  • Plasma reactor for processing workpiece with array of plasma point sources

    JP2017069540A

  • Plasma uniformity control by arrays of unit cell plasmas

    US20160053376A1

  • Plasma Processing Apparatus and Method of Manufacturing Semiconductor Device Using the Same

    US20190122866A1