Distributed double balanced mixer

Abstract

This distributed double-balanced mixer includes unit cells (4a-1 to 4a-N), each of which outputs the following signals to transmission lines (CPW20pp, CPW20nn, CPW20np, CPW20pn) without synthesizing said signals: a signal (R++) obtained by synthesizing an in-phase LO signal (LO+) and an in-phase IF signal (IF+); a signal (RF--) obtained by synthesizing a reverse-phase LO signal (LO-) and a reverse-phase IF signal (IF-); a signal (RF-+) obtained by synthesizing the reverse-phase LO signal (LO-) and the in-phase IF signal (IF+); and a signal (RF+-) obtained by synthesizing the in-phase LO signal (LO+) and the reverse-phase IF signal (IF-).

Description

[Technical field]

[0001] The present invention relates to a distributed double balanced mixer using a Gilbert cell. [Background technology]

[0002] In the field of optical communications, mixers that convert the frequency of signals to expand the bandwidth of DACs (Digital to Analog converters) and ADCs (Analog-to-Digital Converters) are very important components (Non-Patent Document 1). Among mixers, double balanced mixers (DBMs) using Gilbert cells are used as they have a rejection function for IF (Intermediate Frequency) signals and LO (Local Oscillator) signals and have high conversion gain (Non-Patent Document 2).

[0003] In recent years, with the increasing speed of optical communication and wireless communication, there is a need for wider bandwidth mixers. As a technology for broadening the bandwidth of mixers, a distributed double balanced mixer as shown in FIG. 11 has been proposed (Non-Patent Document 1).

[0004] The distributed double balanced mixer includes transmission lines CPW10p, CPW10n for IF signal input, the input ends of which are connected to IF signal input terminals 1p, 1n, transmission lines CPW20p, CPW20n for RF signal output, the end of which is connected to RF (Radio Frequency) signal output terminals 2p, 2n, transmission lines CPW30p, CPW30n for LO signal input, the input end of which is connected to LO signal input terminals 3p, 3n, input termination resistors R1p, R1n connecting the end of the transmission lines CPW10p, CPW10n to ground, output termination resistors R2p, R2n connecting the input ends of the transmission lines CPW20p, CPW20n to ground, and The antenna is composed of termination resistors R3p, R3n that connect the end of CPW30n to ground, and a plurality of unit cells 4-1 to 4-N (N is an integer of 2 or more) that are arranged along transmission lines CPW10p, CPW10n, CPW20p, CPW20n, CPW30p, CPW30n and have IF input terminals connected to the transmission lines CPW10p, CPW10n, LO input terminals connected to the transmission lines CPW30p, CPW30n, and RF output terminals connected to the transmission lines CPW20p, CPW20n.

[0005] Each of the unit cells 4-1 to 4-N is configured as a Gilbert cell, which includes transistors Q1 to Q6 and a constant current source IS, as shown in FIG.

[0006] 11 and 12, impedance matching is performed with the parasitic capacitances of transistors Q1 to Q6 incorporated into the input / output transmission lines CPW10p, CPW10n, CPW20p, CPW20n, CPW30p, and CPW30n, and the propagation constants of the transmission lines CPW10p, CPW10n, CPW20p, CPW20n, CPW30p, and CPW30n are adjusted to enable frequency conversion of wideband signals. Hereinafter, to distinguish from normal transmission lines, the transmission lines to which the parasitic capacitances of transistors have been added are called pseudo-transmission lines.

[0007] The bandwidth of a distributed mixer is generally determined by the cutoff frequency of the artificial transmission line. The smaller the capacitance added to the transmission line per unit length, the higher the cutoff frequency becomes. However, in a distributed double balanced mixer using Gilbert cells for unit cells 4-1 to 4-N, the parasitic capacitance of two transistors is added to the output side transmission lines CPW20p and CPW20n, which causes problems such as a low cutoff frequency and narrow bandwidth. For example, in the configurations of Figures 11 and 12, the parasitic capacitance of transistors Q1 and Q3 is added to the transmission line CPW20p, and the parasitic capacitance of transistors Q2 and Q4 is added to the transmission line CPW20n. [Prior art documents] [Non-patent literature]

[0008] [Non-Patent Document 1] Teruo Jyo,et al.,“A DC to 194-GHz Distributed Mixer in 250-nm InP DHBT Technology”,2020 IEEE / MTT-S International Microwave Symposium (IMS),IEEE,2020 [Non-Patent Document 2] Chung-Ru Wu, Hsieh-Hung Hsieh, and Liang-Hung Lu, “An ultra-wideband distributed active mixer MMIC in 0.18-μm CMOS technology”, IEEE transactions on microwave theory and techniques, Vol. 55, No. 4, pp. 625-632, 2007 Summary of the Invention [Problem to be solved by the invention]

[0009] The present invention has been made to solve the above problems, and has an object to provide a distributed double balanced mixer having a wider band than conventional ones. [Means for solving the problem]

[0010] The distributed double balanced mixer of the present invention includes a first transmission line configured to receive a positive-phase IF signal at its input end, a second transmission line configured to receive a negative-phase IF signal at its input end, a third transmission line configured to receive a positive-phase LO signal at its input end, a fourth transmission line configured to receive a negative-phase LO signal at its input end, a fifth transmission line configured to output a signal obtained by multiplexing the positive-phase LO signal and the positive-phase IF signal, and a fifth transmission line configured to output a signal obtained by multiplexing the negative-phase LO signal and the negative-phase IF signal. a sixth transmission line configured as above, a seventh transmission line configured to output a signal obtained by multiplexing the negative phase LO signal and the positive phase IF signal, an eighth transmission line configured to output a signal obtained by multiplexing the positive phase LO signal and the negative phase IF signal, first and second termination resistors connected to terminals of the first and second transmission lines, respectively, third and fourth termination resistors connected to terminals of the third and fourth transmission lines, respectively, fifth to eighth termination resistors connected to input ends of the fifth to eighth transmission lines, and a plurality of unit cells arranged along a first transmission line to an eighth transmission line, each unit cell having an IF input terminal connected to the first and second transmission lines, an LO input terminal connected to the third and fourth transmission lines, and an RF output terminal connected to the fifth to eighth transmission lines, each unit cell including a first transistor having a base terminal connected to the third transmission line and a collector terminal connected to the fifth transmission line, a second transistor having a base terminal connected to the fourth transmission line and a collector terminal connected to the seventh transmission line, and a second transistor having a base terminal connected to the fourth transmission line and a collector terminal connected to the seventh transmission line. a third transistor having a base terminal connected to the sixth transmission line, a fourth transistor having a base terminal connected to the third transmission line and a collector terminal connected to the eighth transmission line, a fifth transistor having a base terminal connected to the first transmission line and a collector terminal connected to the emitter terminals of the first and second transistors, a sixth transistor having a base terminal connected to the second transmission line and a collector terminal connected to the emitter terminals of the third and fourth transistors, and one end connected to the emitter terminals of the fifth and sixth transistors;The other end of the constant current source is connected to ground.

[0011] Moreover, one configuration example of the distributed double balanced mixer of the present invention is characterized in that it further includes a first multiplexer configured to multiplex an output signal of the fifth transmission line and an output signal of the sixth transmission line to output a positive phase RF signal, and a second multiplexer configured to multiplex an output signal of the seventh transmission line and an output signal of the eighth transmission line to output a negative phase RF signal. In addition, one configuration example of the distributed double balanced mixer of the present invention is characterized in that a positive phase RF signal is output from a connection point between an end of the fifth transmission line and an end of the sixth transmission line, and a negative phase RF signal is output from a connection point between an end of the seventh transmission line and an end of the eighth transmission line. In one configuration example of the distributed double balanced mixer of the present invention, the fifth to eighth transmission lines have a characteristic impedance of 100Ω.

[0012] In one configuration example of the distributed double balanced mixer of the present invention, the first multiplexer is composed of a first passive multiplexer including a first resistor of 16.7 Ω, one end of which is connected to the terminal end of the fifth transmission line, a second resistor of 16.7 Ω, one end of which is connected to the terminal end of the sixth transmission line, and a third resistor of 16.7 Ω, one end of which is connected to the other end of the first and second resistors and configured to output a positive phase RF signal from the other end, and the second multiplexer is composed of a first passive multiplexer including a fourth resistor of 16.7 Ω, one end of which is connected to the terminal end of the seventh transmission line, a fifth resistor of 16.7 Ω, one end of which is connected to the terminal end of the eighth transmission line, and a sixth resistor of 16.7 Ω, one end of which is connected to the other end of the fourth and fifth resistors and configured to output a negative phase RF signal from the other end. In addition, in one configuration example of the distributed double balanced mixer of the present invention, the first multiplexer is composed of a first distributed amplifier having an output signal of the fifth transmission line as an input, a second distributed amplifier having an output signal of the sixth transmission line as an input, and a first passive multiplexer configured to multiplex the output signal of the first distributed amplifier and the output signal of the second distributed amplifier, and the second multiplexer is composed of a third distributed amplifier having an output signal of the seventh transmission line as an input, a fourth distributed amplifier having an output signal of the eighth transmission line as an input, and a second passive multiplexer configured to multiplex the output signal of the third distributed amplifier and the output signal of the fourth distributed amplifier.

[0013] In one configuration example of the distributed double balanced mixer of the present invention, the first distributed amplifier includes a ninth transmission line configured to receive an output signal of the fifth transmission line at an input end thereof, a tenth transmission line configured to output a signal from a terminal end thereof, a ninth termination resistor having one end connected to the terminal end of the ninth transmission line, a tenth termination resistor having one end connected to an input end of the tenth transmission line, and a resistor disposed along the ninth transmission line and the tenth transmission line, the input terminal being connected to the ninth transmission line and the output terminal being connected to the tenth transmission line. The second distributed amplifier is composed of an eleventh transmission line configured to receive an output signal of the sixth transmission line at an input end, a twelfth transmission line configured to output a signal from an end thereof, an eleventh termination resistor having one end connected to the end of the eleventh transmission line, a twelfth termination resistor having one end connected to an input end of the twelfth transmission line, and a plurality of second unit amplifiers arranged along the eleventh transmission line and the twelfth transmission line, with an input terminal connected to the eleventh transmission line and an output terminal connected to the twelfth transmission line. the third distributed amplifier is composed of a thirteenth transmission line configured to receive an output signal of the seventh transmission line at an input end, a fourteenth transmission line configured to output a signal from an end thereof, a thirteenth termination resistor having one end connected to the end of the thirteenth transmission line, a fourteenth termination resistor having one end connected to an input end of the fourteenth transmission line, and a plurality of third unit amplifiers arranged along the thirteenth transmission line and the fourteenth transmission line, the input terminal of which is connected to the thirteenth transmission line, and the output terminal of which is connected to the fourteenth transmission line; the fourth distributed amplifier is composed of a fifteenth transmission line configured to receive an output signal of the eighth transmission line at an input end, a sixteenth transmission line configured to output a signal from a terminal end, a fifteenth termination resistor having one end connected to the terminal end of the fifteenth transmission line, a sixteenth termination resistor having one end connected to an input end of the sixteenth transmission line, and a plurality of fourth unit amplifiers arranged along the fifteenth transmission line and the sixteenth transmission line, each having an input terminal connected to the fifteenth transmission line and an output terminal connected to the sixteenth transmission line;The characteristic impedance of the fifth to eighth transmission lines and the fifth to eighth termination resistors are higher than 50Ω, and the characteristic impedance of the ninth, eleventh, thirteenth and fifteenth transmission lines and the ninth, eleventh, thirteenth and fifteenth termination resistors are higher than 50Ω.

[0014] Moreover, one configuration example of the distributed double balanced mixer of the present invention is characterized in that it further includes a multiplexer configured to multiplex an output signal of the fifth transmission line and an output signal of the sixth transmission line to output an RF signal, and is arranged on a plane in the order of the seventh transmission line, the fifth transmission line, the sixth transmission line, and the eighth transmission line. Effect of the Invention

[0015] According to the present invention, each unit cell outputs the four output signals directly to the fifth to eighth transmission lines without combining them, thereby realizing a distributed double balanced mixer with a wider bandwidth than conventional ones. [Brief description of the drawings]

[0016] [Figure 1] FIG. 1 is a circuit diagram showing a configuration of a distributed double balanced mixer according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a circuit diagram showing a configuration of a unit cell of the distributed double balanced mixer according to the first embodiment of the present invention. [Diagram 3] FIG. 3 is a diagram showing a simulation result of the conversion gain of the conventional distributed double balanced mixer and the first embodiment of the present invention. [Figure 4] FIG. 4 is a circuit diagram showing a configuration of a distributed double balanced mixer according to a second embodiment of the present invention. [Diagram 5] FIG. 5 is a circuit diagram showing the configuration of a multiplexer according to a third embodiment of the present invention. [Figure 6] FIG. 6 is a circuit diagram showing the configuration of a multiplexer according to a fourth embodiment of the present invention. [Figure 7]FIG. 7 is a circuit diagram showing the configuration of a multiplexer according to a fourth embodiment of the present invention. [Figure 8] FIG. 8 is a circuit diagram showing the configuration of a unit cell of a distributed amplifier according to a fourth embodiment of the present invention. [Figure 9] FIG. 9 is a circuit diagram showing a configuration of a distributed double balanced mixer according to a fifth embodiment of the present invention. [Figure 10] FIG. 10 is a circuit diagram showing the configuration of a unit cell of a distributed double balanced mixer according to a fifth embodiment of the present invention. [Figure 11] FIG. 11 is a circuit diagram showing the configuration of a conventional distributed double balanced mixer. [Figure 12] FIG. 12 is a circuit diagram showing the configuration of a unit cell of a conventional distributed double balanced mixer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] [First Example] Hereinafter, embodiments of the present invention will be described with reference to the drawings. Fig. 1 is a circuit diagram showing the configuration of a distributed double balanced mixer according to a first embodiment of the present invention. The distributed double balanced mixer of this embodiment comprises transmission lines CPW10p, CPW10n (first and second transmission lines) for IF signal input, the input ends of which are connected to IF signal input terminals 1p, 1n, transmission lines CPW20pp, CPW20nn, CPW20np, CPW20pn (fifth to eighth transmission lines) for RF signal output, and a transmission line CPW30pp, CPW30nn, CPW30np, CPW30pn (fifth to eighth transmission lines) for LO signal input, the input ends of which are connected to LO signal input terminals 3p, 3n. 0p, CPW30n (third and fourth transmission lines), input termination resistors R1p, R1n connecting the ends of the transmission lines CPW10p, CPW10n to ground, output termination resistors R2pp, R2nn, R2np, R2pn connecting the input ends of the transmission lines CPW20pp, CPW20nn, CPW20np, CPW20pn to ground, and termination resistors R2pp, R2nn, R2np, R2pn connecting the input ends of the transmission lines CPW30p, CPW30n to ground. Resistors R3p and R3n are arranged along transmission lines CPW10p, CPW10n, CPW20pp, CPW20nn, CPW20np, CPW20pn, CPW30p, and CPW30n, with the IF input terminals connected to the transmission lines CPW10p and CPW10n, the LO input terminals connected to the transmission lines CPW30p and CPW30n, and the RF output terminals connected to the transmission lines CPW20pp, CPW20nn, CPW20np, CPW2 0pn, a multiplexer 5p that multiplexes the output signals of transmission lines CPW20pp and CPW20nn with equal amplitude and equal phase and outputs the multiplexed signal to RF signal output terminal 2p, and a multiplexer 5n that multiplexes the output signals of transmission lines CPW20np and CPW20pn with equal amplitude and equal phase and outputs the multiplexed signal to RF signal output terminal 2n.

[0018] In Figure 1, IF+ is the IF signal on the positive phase side, IF- is the IF signal on the negative phase side, LO+ is the LO signal on the positive phase side, LO- is the LO signal on the negative phase side, RF++ is a signal obtained by combining the LO signal on the positive phase side and the IF signal on the positive phase side, RF-- is a signal obtained by combining the LO signal on the negative phase side and the IF signal on the negative phase side, RF-+ is a signal obtained by combining the LO signal on the negative phase side and the IF signal on the positive phase side, RF+- is a signal obtained by combining the LO signal on the positive phase side and the IF signal on the negative phase side, RF+ is the RF signal on the positive phase side, and RF- is the RF signal on the negative phase side.

[0019] The transmission line CPW10p is configured by connecting multiple transmission lines CPW1p_a, CPW1p, and CPW1p_b in series. The transmission line CPW1p between the unit cells and the input-side transmission line CPW1p_a have different characteristic impedances. This is because the transmission line CPW1p_a needs to absorb the effects of the parasitic capacitance of the preceding circuit. Similarly, the transmission lines CPW1p and CPW1p_b have different characteristic impedances. This is because the transmission line CPW1p_b needs to absorb the effects of the parasitic capacitance of the input termination resistor R1p. Similar to the transmission line CPW10p, the transmission line CPW10n has a configuration in which a plurality of transmission lines CPW1n_a, CPW1n, and CPW1n_b are connected in series.

[0020] The transmission line CPW20pp is configured by connecting multiple transmission lines CPW2pp_a, CPW2pp, and CPW2pp_b in series. The characteristic impedance of the transmission line CPW2pp between the unit cells is different from that of the input-side transmission line CPW2pp_a. This is because, in the case of the transmission line CPW2pp_a, the effect of the parasitic capacitance of the output termination resistor R2pp must be absorbed by the transmission line CPW2pp_a. Similarly, the characteristic impedance of the transmission lines CPW2pp and CPW2pp_b is different. This is because, in the case of the transmission line CPW2pp_b, the effect of the parasitic capacitance of the subsequent circuit must be absorbed by the transmission line CPW2pp_b.

[0021] Similar to the transmission line CPW20pp, the transmission line CPW20pn is configured by connecting multiple transmission lines CPW2pn_a, CPW2pn, and CPW2pn_b in series. The transmission line CPW20np is configured by connecting multiple transmission lines CPW2np_a, CPW2np, and CPW2np_b in series. The transmission line CPW20nn is configured by connecting multiple transmission lines CPW2nn_a, CPW2nn, and CPW2nn_b in series.

[0022] The transmission line CPW30p is configured by connecting multiple transmission lines CPW3p_a, CPW3p, and CPW3p_b in series. The transmission line CPW3p between the unit cells and the transmission line CPW3p_a on the input side have different characteristic impedances. This is because the transmission line CPW3p_a needs to absorb the effect of the parasitic capacitance of the preceding circuit. Similarly, the transmission lines CPW3p and CPW3p_b have different characteristic impedances. This is because the transmission line CPW3p_b needs to absorb the effect of the parasitic capacitance of the termination resistor R3p. Similar to the transmission line CPW30p, the transmission line CPW30n has a configuration in which a plurality of transmission lines CPW3n_a, CPW3n, and CPW3n_b are connected in series.

[0023] As shown in FIG. 2, the unit cell 4a-N includes an NPN bipolar transistor Q1 having a base terminal connected to the transmission line CPW30p and a collector terminal connected to the transmission line CPW20pp, an NPN bipolar transistor Q2 having a base terminal connected to the transmission line CPW30n and a collector terminal connected to the transmission line CPW20np, an NPN bipolar transistor Q3 having a base terminal connected to the transmission line CPW30n and a collector terminal connected to the transmission line CPW20nn, and an NPN bipolar transistor Q4 having a base terminal connected to the transmission line CPW30p and a collector terminal connected to the transmission line CPW20nn. W20pn; an NPN bipolar transistor Q5 having a base terminal connected to the transmission line CPW10p and a collector terminal connected to the emitter terminals of transistors Q1 and Q2; an NPN bipolar transistor Q6 having a base terminal connected to the transmission line CPW10n and a collector terminal connected to the emitter terminals of transistors Q3 and Q4; and a constant current source IS having one end connected to the emitter terminals of transistors Q5 and Q6 and the other end connected to ground, for supplying a constant current to transistors Q5 and Q6.

[0024] In the example of FIG. 2, the unit cell 4a-N is taken as an example for explanation, but the unit cells 4a-1 to 4a-(N-1) have the same configuration as the unit cell 4a-N. As shown in FIG. 2, each of the unit cells 4a-1 to 4a-N outputs four output signals RF++, RF--, RF-+, RF+- to the transmission lines CPW20pp, CPW20nn, CPW20np, CPW20pn as is without synthesizing them.

[0025] The multiplexer 5p multiplexes the output signal RF++ of the transmission line CPW 20pp and the output signal RF-- of the transmission line CPW 20nn with equal amplitude and equal phase. The multiplexer 5n multiplexes the output signal RF-+ of the transmission line CPW 20np and the output signal RF+- of the transmission line CPW 20pn with equal amplitude and equal phase.

[0026] With the above-described configuration, in this embodiment, the parasitic capacitance of the transistor added per unit length of the transmission lines CPW20pp, CPW20nn, CPW20np, and CPW20pn can be reduced to that of one transistor, thereby improving the cutoff frequency of the pseudo-transmission line and realizing a wideband distributed double balanced mixer.

[0027] FIG. 3 is a diagram showing the results of simulating the conversion gain (ratio of output RF signal to input IF signal) of the conventional distributed double balanced mixer and the present embodiment. The frequency of the IF signal is 1 GHz to 99 GHz, and the frequency of the LO signal is 100 GHz. In FIG. 3, 30 indicates the conversion gain of the conventional distributed double balanced mixer, and 31 indicates the conversion gain of the distributed double balanced mixer of the present embodiment. The -3 dB band of the conventional distributed double balanced mixer is 180 GHz. On the other hand, in the present embodiment, the band can be extended to 200 GHz or more compared to the conventional one.

[0028] [Second Example] Next, a second embodiment of the present invention will be described. Fig. 4 is a circuit diagram showing the configuration of a distributed double balanced mixer according to the second embodiment of the present invention. The difference from the first embodiment is that in this embodiment, multiplexers 5p and 5n are not used, and the terminals of transmission lines CPW20pp and CPW20nn are connected to an RF signal output terminal 2p, and the terminals of transmission lines CPW20np and CPW20pn are connected to an RF signal output terminal 2n.

[0029] As a result, without using multiplexers 5p, 5n, the output signal RF++ of the transmission line CPW 20pp and the output signal RF-- of the transmission line CPW 20nn are multiplexed, and the output signal RF-+ of the transmission line CPW 20np and the output signal RF+- of the transmission line CPW 20pn are multiplexed.

[0030] In this embodiment, in addition to the same effects as those of the first embodiment, it is possible to realize a smaller circuit and easier circuit layout. Also, when the impedance of the external element to which the output of the mixer of this embodiment is connected is 50Ω, the same as that of a general high-frequency element, low reflection and low loss can be achieved by setting the characteristic impedance of the transmission lines CPW20pp, CPW20nn, CPW20np, and CPW20pn of this embodiment to 100Ω. The characteristic impedance of 100Ω is the critical point for reflection loss, and if it is larger or smaller than that, the reflection loss becomes large.

[0031] [Third Example] Next, a third embodiment of the present invention will be described. This embodiment describes a specific example of the multiplexers 5p and 5n of the first embodiment. The multiplexer 5p of this embodiment is a passive type multiplexer as shown in Fig. 5, and is composed of a 16.7Ω resistor R4pp having one end connected to the end of the transmission line CPW 20pp, a 16.7Ω resistor R4nn having one end connected to the end of the transmission line CPW 20nn, and a 16.7Ω resistor R5p having one end connected to the other end of the resistors R4pp and R4nn and the other end connected to the RF signal output terminal 2p.

[0032] Similarly, the multiplexer 5n is composed of a 16.7 Ω resistor R4np having one end connected to the terminal end of the transmission line CPW 20np, a 16.7 Ω resistor R4pn having one end connected to the terminal end of the transmission line CPW 20pn, and a 16.7 Ω resistor R5n having one end connected to the other end of the resistors R4np and R4pn and the other end connected to the RF signal output terminal 2n.

[0033] In this embodiment, by using a passive type multiplexer, in addition to the same effects as in the first embodiment, it is possible to realize a smaller circuit and a lower reflection of the output.

[0034] [Fourth Example] Next, a fourth embodiment of the present invention will be described. This embodiment describes another specific example of the multiplexers 5p and 5n of the first embodiment. The multiplexer 5p of this embodiment is composed of distributed amplifiers 6pp and 6nn and a passive multiplexer 7p, as shown in FIG.

[0035] The distributed amplifier 6pp is composed of an input transmission line CPW40pp (ninth transmission line) whose input end is connected to the end of the transmission line CPW20pp, an output transmission line CPW50pp (tenth transmission line), an input termination resistor R6pp that connects the end of the transmission line CPW40pp to ground, an output termination resistor R7pp that connects the input end of the transmission line CPW50pp to ground, and a plurality of unit amplifiers 8pp-1 to 8pp-7 that are arranged along the transmission lines CPW40pp, CPW50pp, and have input terminals connected to the transmission line CPW40pp and output terminals connected to the transmission line CPW50pp.

[0036] The distributed amplifier 6nn is composed of an input transmission line CPW40nn (eleventh transmission line) whose input end is connected to the end of the transmission line CPW20nn, an output transmission line CPW50nn (twelfth transmission line), an input termination resistor R6nn that connects the end of the transmission line CPW40nn to ground, an output termination resistor R7nn that connects the input end of the transmission line CPW50nn to ground, and a plurality of unit amplifiers 8nn-1 to 8nn-7 that are arranged along the transmission lines CPW40nn and CPW50nn, and have input terminals connected to the transmission line CPW40nn and output terminals connected to the transmission line CPW50nn.

[0037] The passive multiplexer 7p is composed of a 16.7 Ω resistor R8pp having one end connected to the end of the transmission line CPW50pp, a 16.7 Ω resistor R8nn having one end connected to the end of the transmission line CPW50nn, and a 16.7 Ω resistor R9p having one end connected to the other end of the resistors R8pp and R8nn and the other end connected to the RF signal output terminal 2p.

[0038] As shown in FIG. 7, the multiplexer 5n of this embodiment is composed of distributed amplifiers 6np and 6pn and a passive multiplexer 7n.

[0039] The distributed amplifier 6np is composed of an input transmission line CPW40np (thirteenth transmission line) whose input end is connected to the end of the transmission line CPW20np, an output transmission line CPW50np (fourteenth transmission line), an input termination resistor R6np that connects the end of the transmission line CPW40np to ground, an output termination resistor R7np that connects the input end of the transmission line CPW50np to ground, and a plurality of unit amplifiers 8np-1 to 8np-7 that are arranged along the transmission lines CPW40np, CPW50np, and have input terminals connected to the transmission line CPW40np and output terminals connected to the transmission line CPW50np.

[0040] The distributed amplifier 6pn is composed of an input transmission line CPW40pn (fifteenth transmission line) whose input end is connected to the end of the transmission line CPW20pn, an output transmission line CPW50pn (sixteenth transmission line), an input termination resistor R6pn that connects the end of the transmission line CPW40pn to ground, an output termination resistor R7pn that connects the input end of the transmission line CPW50pn to ground, and a plurality of unit amplifiers 8pn-1 to 8pn-7 that are arranged along the transmission lines CPW40pn, CPW50pn, and have input terminals connected to the transmission line CPW40pn and output terminals connected to the transmission line CPW50pn.

[0041] The passive multiplexer 7n is composed of a 16.7 Ω resistor R8np having one end connected to the end of the transmission line CPW50np, a 16.7 Ω resistor R8pn having one end connected to the end of the transmission line CPW50pn, and a 16.7 Ω resistor R9n having one end connected to the other end of the resistors R8np and R8pn and the other end connected to the RF signal output terminal 2n.

[0042] The transmission line CPW40pp of the distributed amplifier 6pp is configured by connecting multiple transmission lines CPW4pp_a, CPW4pp, and CPW4pp_b in series. The transmission line CPW4pp between the unit amplifiers and the transmission line CPW4pp_a on the input side have different characteristic impedances. This is because, in the case of the transmission line CPW4pp_a, the transmission line CPW4pp_a needs to absorb the influence of the parasitic capacitance of the preceding circuit. Similarly, the transmission lines CPW4pp and CPW4pp_b have different characteristic impedances. This is because, in the case of the transmission line CPW4pp_b, the transmission line CPW4pp_b needs to absorb the influence of the parasitic capacitance of the subsequent passive multiplexer 7p.

[0043] The transmission line CPW40pn of the distributed amplifier 6pn is configured by connecting multiple transmission lines CPW4pn_a, CPW4pn, and CPW4pn_b in series. The transmission line CPW40np of the distributed amplifier 6np is configured by connecting multiple transmission lines CPW4np_a, CPW4np, and CPW4np_b in series. The transmission line CPW40nn of the distributed amplifier 6nn is configured by connecting multiple transmission lines CPW4nn_a, CPW4nn, and CPW4nn_b in series.

[0044] The transmission line CPW50pp of the distributed amplifier 6pp is configured by connecting multiple transmission lines CPW5pp_a, CPW5pp, and CPW5pp_b in series. The transmission line CPW5pp between the unit amplifiers and the transmission line CPW5pp_a on the input side have different characteristic impedances. This is because, in the case of the transmission line CPW5pp_a, the transmission line CPW5pp_a needs to absorb the effect of the parasitic capacitance of the output termination resistor R7pp. Similarly, the transmission lines CPW5pp and CPW5pp_b have different characteristic impedances. This is because, in the case of the transmission line CPW5pp_b, the transmission line CPW5pp_b needs to absorb the effect of the parasitic capacitance of the downstream passive multiplexer 7p.

[0045] The transmission line CPW50pn of the distributed amplifier 6pn is configured by connecting multiple transmission lines CPW5pn_a, CPW5pn, and CPW5pn_b in series. The transmission line CPW50np of the distributed amplifier 6np is configured by connecting multiple transmission lines CPW5np_a, CPW5np, and CPW5np_b in series. The transmission line CPW50nn of the distributed amplifier 6nn is configured by connecting multiple transmission lines CPW5nn_a, CPW5nn, and CPW5nn_b in series.

[0046] As shown in Figure 8, each of the unit amplifiers 8pp-1 to 8pp-7 of the distributed amplifier 6pp is composed of a transistor Q80 having a base terminal connected to the transmission line CPW40pp, a transistor Q81 having a collector terminal connected to the transmission line CPW50pp and an emitter terminal connected to the collector terminal of the transistor Q80, an emitter resistor REE having one end connected to the emitter terminal of the transistor Q80 and the other end connected to the power supply voltage VEE, a resistor R80 having one end connected to the power supply voltage VEE and the other end connected to the base terminal of the transistor Q81, a resistor R81 having one end connected to the base terminal of the transistor Q81 and the other end connected to ground, and a capacitor C80 having one end connected to the base terminal of the transistor Q81 and the other end connected to ground.

[0047] In the example of Fig. 7, the unit amplifiers 8pp-1 to 8pp-7 have been described as an example, but in the case of the unit amplifiers 8pn-1 to 8pn-7 of the distributed amplifier 6pn, the base terminal of transistor Q80 may be connected to the transmission line CPW40pn and the collector terminal of transistor Q81 may be connected to the transmission line CPW50pn. In the case of the unit amplifiers 8np-1 to 8np-7 of the distributed amplifier 6np, the base terminal of transistor Q80 may be connected to the transmission line CPW40np and the collector terminal of transistor Q81 may be connected to the transmission line CPW50np. In the case of the unit amplifiers 8nn-1 to 8nn-7 of the distributed amplifier 6nn, the base terminal of transistor Q80 may be connected to the transmission line CPW40nn and the collector terminal of transistor Q81 may be connected to the transmission line CPW50nn.

[0048] In the examples of Figs. 6 and 7, the number of unit amplifiers 8pp-1 to 8pp-7, 8pn-1 to 8pn-7, 8np-1 to 8np-7, and 8nn-1 to 8nn-7 is seven, but it goes without saying that the number is not limited to seven.

[0049] As described above, in this embodiment, by using a distributed multiplexer consisting of a distributed amplifier and a passive multiplexer for multiplexers 5p and 5n, it is possible to achieve an improvement in conversion gain and a reduction in output reflection in addition to the same effects as in the first embodiment.

[0050] In addition, in this embodiment, the characteristic impedance of the transmission lines CPW20pp, CPW20nn, CPW20np, CPW20pn and the output termination resistors R2pp, R2nn, R2np, R2pn described in the first embodiment are made higher than 50 Ω, and further, the characteristic impedance of the transmission lines CPW40pp, CPW40nn, CPW40np, CPW40pn of the distributed multiplexer and the input termination resistors R6pp, R6nn, R6np, R6pn are made higher than 50 Ω, thereby making it possible to further improve the conversion gain.

[0051] [Fifth Example] In the first to fourth embodiments, a differential input / differential output type distributed double balanced mixer has been described, but if a single-phase output is sufficient for the mixer output, a configuration as shown in Fig. 9 can be used. The distributed double balanced mixer of this embodiment is arranged along transmission lines CPW10p, CPW10n for IF signal input, transmission lines CPW20pp, CPW20nn, CPW20np, CPW20pn for RF signal output, transmission lines CPW30p, CPW30n for LO signal input, input termination resistors R1p, R1n, output termination resistors R2pp, R2nn, R2np, R2pn, termination resistors R3p, R3n, and transmission lines CPW10p, CPW10n, CPW20pp, CPW20nn, CPW20np, CPW20pn, CPW30p, CPW30n, and an IF input terminal is connected to the transmission lines CPW10p, CPW10n, CPW20pp, CPW20nn, CPW20np, CPW20pn, CPW30p, CPW30n. the multiplexer 9 is configured to multiplex an output signal RF++ of the transmission line CPW20pp and an output signal RF-- of the transmission line CPW20nn with equal amplitude and equal phase and output the multiplexed signal to an RF signal output terminal 10.

[0052] In the first to fourth embodiments, the transmission lines CPW20pp, CPW20nn, CPW20np, and CPW20pn were arranged in this order. On the other hand, in this embodiment, the transmission lines CPW20np, CPW20pp, CPW20nn, and CPW20pn were arranged in this order. That is, the transmission lines CPW20pp and CPW20nn were arranged adjacent to each other, the transmission line CPW20np was arranged on the opposite side of the transmission line CPW20nn with the transmission line CPW20pp in between, and the transmission line CPW20pn was arranged on the opposite side of the transmission line CPW20pp with the transmission line CPW20nn in between.

[0053] As shown in FIG. 10, unit cell 4b-N includes an NPN bipolar transistor Q1b having a base terminal connected to transmission line CPW30p and a collector terminal connected to transmission line CPW20pp, an NPN bipolar transistor Q2b having a base terminal connected to transmission line CPW30n and a collector terminal connected to transmission line CPW20np, an NPN bipolar transistor Q3b having a base terminal connected to transmission line CPW30n and a collector terminal connected to transmission line CPW20nn, and an NPN bipolar transistor Q4b having a base terminal connected to transmission line CPW30p and a collector terminal connected to transmission line CPW20nn. 20pn, an NPN bipolar transistor Q5 having a base terminal connected to the transmission line CPW10p and a collector terminal connected to the emitter terminals of transistors Q1b and Q2b, an NPN bipolar transistor Q6 having a base terminal connected to the transmission line CPW10n and a collector terminal connected to the emitter terminals of transistors Q3b and Q4b, and a constant current source IS having one end connected to the emitter terminals of transistors Q5 and Q6 and the other end connected to ground, for supplying a constant current to transistors Q5 and Q6.

[0054] In the example of FIG. 10, the unit cell 4b-N is taken as an example for explanation, but the unit cells 4b-1 to 4b-(N-1) have the same configuration as the unit cell 4b-N. In this embodiment, unnecessary crossings on the circuit layout are not required, and it is possible to realize a wider band and a simpler circuit layout. [Industrial Applicability]

[0055] The present invention can be applied to a mixer circuit that performs frequency conversion of a signal. [Explanation of symbols]

[0056] 1p, 1n... IF signal input terminal, 2p, 2n, 10... RF signal output terminal, 3p, 3n... LO signal input terminal, 4a-1 to 4a-N, 4b-1 to 4b-N... unit cell, 5p, 5n, 9... multiplexer, 6pp, 6pn... distributed amplifier, 7p... passive multiplexer, 8pp-1 to 8pp-7, 8nn-1 to 8nn-7, 8np-1 to 8np-7, 8pn-1 to 8pn-7... unit amplifier, CPW1p, CPW1p_a, CPW1p_b, CPW1n, CPW1n_a, CPW1n_b, CPW2pp, CPW2pp_a, CPW2pp_b,CPW2pn,CPW2pn_a,CPW2pn_b,CPW2np,CPW2np_a,CPW2np_b,CPW2nn,CPW2nn_a,CPW2nn_b,CPW3p,CPW3p_a,CPW3p_b,CPW3n,C PW3n_a,CPW3n_b,CPW4pp,CPW4pp_a,CPW4pp_b,CPW4pn,CPW4pn_a,CPW4pn_b,CPW4np,CPW4np_a,CPW4np_b,CPW4nn,CPW4nn_a,CPW4nn_ b,CPW5pp,CPW5pp_a,CPW5pp_b,CPW5pn,CPW5pn_a,CPW5pn_b,CPW5np,CPW5np_a,CPW5np_b,CPW5nn,CPW5nn_a,CPW5nn_b,CPW10p,CPW1 0n,CPW20pp,CPW20nn,CPW20np,CPW20pn,CPW30p,CPW30n,CPW40pp,CPW40nn,CPW40np,CPW40pn,CPW50pp,CPW50nn,CPW50np,CPW50pn… Transmission line, Q1, Q1b, Q2, Q2b, Q3, Q3b, Q4, Q4b, Q5, Q6, Q80, Q81... transistors, R1p, R1n, R2pp, R2nn, R2np, R2pn, R3p, R3n, R4pp, R4pn, R4np, R4nn, R5p, R5n, R6pp, R6nn, R6np, R6pn, R7pp, R7pn, R7np, R7nn, R8pp, R8pn, R8np, R8nn, R9p, R9n, R10np, R10pn, R80, R81... resistors, C80... capacitor, IS... constant current source.

Claims

1. a first transmission line configured to receive a positive phase IF signal at an input end; A second transmission line configured so that a reverse phase IF signal is input to an input end thereof; a third transmission line configured to receive a positive phase LO signal at an input end; a fourth transmission line configured to receive a reverse phase LO signal at an input end; a fifth transmission line configured to output a signal obtained by multiplexing the positive phase side LO signal and the positive phase side IF signal; a sixth transmission line configured to output a signal obtained by multiplexing the negative phase side LO signal and the negative phase side IF signal; a seventh transmission line configured to output a signal obtained by multiplexing the negative phase side LO signal and the positive phase side IF signal; an eighth transmission line configured to output a signal obtained by multiplexing the positive phase LO signal and the negative phase IF signal; first and second termination resistors connected to the terminals of the first and second transmission lines, respectively; third and fourth termination resistors connected to the terminals of the third and fourth transmission lines, respectively; fifth to eighth termination resistors connected to input ends of the fifth to eighth transmission lines, respectively; a plurality of unit cells arranged along the first to eighth transmission lines, each unit cell having an IF input terminal connected to the first and second transmission lines, an LO input terminal connected to the third and fourth transmission lines, and an RF output terminal connected to the fifth to eighth transmission lines; The unit cell comprises: a first transistor having a base terminal connected to the third transmission line and a collector terminal connected to the fifth transmission line; a second transistor having a base terminal connected to the fourth transmission line and a collector terminal connected to the seventh transmission line; a third transistor having a base terminal connected to the fourth transmission line and a collector terminal connected to the sixth transmission line; a fourth transistor having a base terminal connected to the third transmission line and a collector terminal connected to the eighth transmission line; a fifth transistor having a base terminal connected to the first transmission line and a collector terminal connected to the emitter terminals of the first and second transistors; a sixth transistor having a base terminal connected to the second transmission line and a collector terminal connected to the emitter terminals of the third and fourth transistors; a constant current source having one end connected to the emitter terminals of the fifth and sixth transistors and the other end connected to ground.

2. 2. The distributed double balanced mixer according to claim 1, a first multiplexer configured to multiplex an output signal of the fifth transmission line and an output signal of the sixth transmission line to output a positive phase RF signal; a second multiplexer configured to multiplex an output signal of the seventh transmission line and an output signal of the eighth transmission line to output an RF signal of a reverse phase.

3. 2. The distributed double balanced mixer according to claim 1, outputting a positive phase RF signal from a connection point between an end of the fifth transmission line and an end of the sixth transmission line; a connection point between the end of the seventh transmission line and the end of the eighth transmission line, the connection point outputting an RF signal having a reverse phase;

4. 4. The distributed double balanced mixer according to claim 3, A distributed double balanced mixer, wherein the fifth to eighth transmission lines have a characteristic impedance of 100 Ω.

5. 3. The distributed double balanced mixer according to claim 2, The first multiplexer includes: a first resistor of 16.7 Ω, one end of which is connected to the end of the fifth transmission line; a second resistor of 16.7 Ω, one end of which is connected to the end of the sixth transmission line; a third resistor of 16.7 Ω, one end of which is connected to the other ends of the first and second resistors and the other end of which is configured to output a positive phase RF signal; The second multiplexer includes: a fourth resistor of 16.7 Ω, one end of which is connected to the end of the seventh transmission line; a fifth resistor of 16.7 Ω, one end of which is connected to the end of the eighth transmission line; and a sixth resistor of 16.7 Ω, one end of which is connected to the other ends of the fourth and fifth resistors and the other end of which is configured to output an RF signal of a reverse phase.

6. 3. The distributed double balanced mixer according to claim 2, The first multiplexer includes: a first distributed amplifier having an output signal from the fifth transmission line as an input; a second distributed amplifier having an output signal from the sixth transmission line as an input; a first passive multiplexer configured to multiplex an output signal of the first distributed amplifier and an output signal of the second distributed amplifier; The second multiplexer includes: a third distributed amplifier having an output signal from the seventh transmission line as an input; a fourth distributed amplifier having an output signal of the eighth transmission line as an input; a second passive multiplexer configured to multiplex an output signal of the third distributed amplifier and an output signal of the fourth distributed amplifier.

7. 7. The distributed double balanced mixer according to claim 6, The first distributed amplifier comprises: a ninth transmission line configured to receive the output signal of the fifth transmission line at an input end; a tenth transmission line configured to output a signal from a termination; a ninth termination resistor, one end of which is connected to the termination of the ninth transmission line; a tenth termination resistor, one end of which is connected to the input end of the tenth transmission line; a plurality of first unit amplifiers arranged along the ninth transmission line and the tenth transmission line, each having an input terminal connected to the ninth transmission line and an output terminal connected to the tenth transmission line; The second distributed amplifier comprises: an eleventh transmission line configured to receive the output signal of the sixth transmission line at an input end; a twelfth transmission line configured to output a signal from a termination; an eleventh termination resistor, one end of which is connected to the termination of the eleventh transmission line; a twelfth termination resistor, one end of which is connected to the input end of the twelfth transmission line; a plurality of second unit amplifiers arranged along the eleventh transmission line and the twelfth transmission line, each having an input terminal connected to the eleventh transmission line and an output terminal connected to the twelfth transmission line; The third distributed amplifier comprises: a thirteenth transmission line configured to receive the output signal of the seventh transmission line at an input end; a fourteenth transmission line configured to output a signal from a termination; a thirteenth termination resistor, one end of which is connected to the termination of the thirteenth transmission line; a fourteenth termination resistor, one end of which is connected to the input end of the fourteenth transmission line; a plurality of third unit amplifiers arranged along the thirteenth transmission line and the fourteenth transmission line, each having an input terminal connected to the thirteenth transmission line and an output terminal connected to the fourteenth transmission line; The fourth distributed amplifier comprises: a fifteenth transmission line configured to receive the output signal of the eighth transmission line at an input end; a sixteenth transmission line configured to output a signal from a termination; a fifteenth termination resistor, one end of which is connected to the termination of the fifteenth transmission line; a sixteenth termination resistor, one end of which is connected to the input end of the sixteenth transmission line; a plurality of fourth unit amplifiers arranged along the fifteenth transmission line and the sixteenth transmission line, each having an input terminal connected to the fifteenth transmission line and an output terminal connected to the sixteenth transmission line; A distributed double balanced mixer, characterized in that the characteristic impedances of the fifth to eighth transmission lines and the fifth to eighth termination resistors are higher than 50Ω, and the characteristic impedances of the ninth, eleventh, thirteenth, and fifteenth transmission lines and the ninth, eleventh, thirteenth, and fifteenth termination resistors are higher than 50Ω.

8. 2. The distributed double balanced mixer according to claim 1, a multiplexer configured to multiplex an output signal of the fifth transmission line and an output signal of the sixth transmission line to output an RF signal; A distributed double balanced mixer, characterized in that the seventh transmission line, the fifth transmission line, the sixth transmission line, and the eighth transmission line are arranged in this order on a plane.

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