Substrate for epitaxial growth, method for manufacturing optical semiconductor device, and optical semiconductor device

Abstract

To provide a substrate for epitaxial growth having a buffer laminate that does not cause cracks even when a support substrate is bonded or an initial growth substrate is removed. The substrate for epitaxial growth includes an initial growth substrate, an etching stop layer on the initial growth substrate, and a buffer stack on the etching stop layer, the buffer stack having N buffer layers each having a different lattice constant, and a pseudo substrate layer having a thickness of 300 nm or more on the N buffer layers, and the lattice constant of the initial growth substrate is a g The lattice constant of the pseudo substrate layer is a p In this case, the mismatch degree X of the pseudo substrate layer with respect to the initial growth substrate is p·g is 0.7% or more, N is a natural number of 3 or more, and the epitaxial growth substrate has three or more buffer layers having misfit dislocations on the initial growth substrate side of the buffer layer.

Description

[Technical field]

[0001] The present invention relates to a substrate for epitaxial growth, a method for manufacturing an optical semiconductor device, and an optical semiconductor device. [Background technology]

[0002] Optical semiconductor devices are often manufactured through a process of epitaxially growing a semiconductor laminate including an active layer on an initial growth substrate. Here, the ratio Δa / a of the difference (Δa) in the lattice constant between the initial growth substrate and the epitaxial layer formed by epitaxial growth to the lattice constant a of the initial growth substrate is called the lattice mismatch. If the lattice mismatch is small, epitaxial growth can be performed without defects, and even if the lattice mismatch is large, if the epitaxial layer is thin enough, the lattice of the epitaxial layer is distorted, allowing growth (coherent growth) while maintaining the continuity of the lattice at the interface. The upper limit of the film thickness at which coherent growth is possible even if the lattice mismatch is large is called the critical film thickness.

[0003] Growing a lattice-matched layer generally means epitaxially growing a layer with a lattice mismatch within ±0.1% and close to zero. Even when growing a layer that does not lattice match, it is common to epitaxially grow a layer with a lattice mismatch within ±0.3%, for example, within the range of coherent growth. On the other hand, when epitaxially growing a layer on an initial growth substrate with a lattice mismatch of more than 0.3% with respect to the lattice constant of the initial growth substrate, a method of growing the layer on the initial growth substrate via a buffer layer is known.

[0004] For example, Patent Document 1 proposes providing a buffer layer between the substrate and the light absorbing layer, the lattice constant of which changes gradually from that of the substrate to that of the absorbing layer. Specifically, each layer of the buffer layer is formed to have a thickness equal to or less than a critical thickness so as to suppress the occurrence of crystal defects.

[0005] In addition, in Patent Document 2, in order to reduce the lattice mismatch between InP and a GaInAs absorption layer, a GaInAs absorption layer having a lattice mismatch rate of 0.5% or more is formed by stacking InAs X P 1-X / InAs Y P 1-Y It has been proposed to form a strained superlattice layer having a combination of the above on a buffer layer inserted in multiple stages. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2001-102620 A [Patent Document 2] Japanese Patent Application Publication No. 6-188447 Summary of the Invention [Problem to be solved by the invention]

[0007] The present inventor pioneered a technology for improving light emission efficiency by removing the InP initial growth substrate and bonding a support substrate in the wavelength band of 1000 nm to 1700 nm (for example, 1300 nm), where it was previously considered that it was good for improving light extraction to use a thick InP initial growth substrate as it is without the need to remove the transparent initial growth substrate when an InP substrate was used as the initial growth substrate. Then, the inventor investigated whether such a technology could be applied to optical semiconductor elements having a wavelength range of more than 1700 nm and optical semiconductor elements having other wavelength ranges. In the case of an optical semiconductor element having a wavelength range of more than 1700 nm, for example, an optical semiconductor element having a wavelength range of 2000 to 3000 nm, it is not possible to select an initial growth substrate having a lattice constant close to that of a semiconductor laminate including an active layer required for the wavelength, so a layer having a large lattice mismatch with the initial growth substrate is epitaxially grown.

[0008] In a method of growing a layer with a large degree of lattice mismatch on an initial growth substrate via a buffer layer, the strained superlattice type buffer stack and compositionally graded buffer described in Patent Documents 1 and 2 are formed while suppressing the occurrence of crystal defects (dislocations), so even if the substrate is warped due to lattice mismatch with the initial growth substrate, or is thinned to prevent warping, large stress accumulates inside. If such internal stress accumulates, there is a risk of cracks occurring due to a sudden change in the balance of internal stress when bonding a support substrate using the above technology or removing the initial growth substrate.

[0009] The present invention aims to provide an epitaxial growth substrate having a buffer stack that does not cause cracks even when a support substrate is bonded or an initial growth substrate is removed, and to provide a method for manufacturing an optical semiconductor element in which a semiconductor stack including an active layer is formed on such an epitaxial growth substrate, and a support substrate is bonded or an initial growth substrate is removed, and to provide an optical semiconductor element. [Means for solving the problem]

[0010] The present inventors have found that, when a pseudo-substrate layer having a mismatch of 0.7% or more with respect to the initial growth substrate is provided on an initial growth substrate via multiple buffer layers, the pseudo-substrate layer is formed on the epitaxial growth substrate while generating specific dislocations without coherent growth so that the pseudo-substrate layer is in a relaxed state, thereby reducing the amount of warping when a semiconductor laminate is formed on the pseudo-substrate layer in the epitaxial growth substrate, and suppressing the occurrence of cracks in the semiconductor laminate formed on the pseudo-substrate layer when bonding a support substrate to the semiconductor laminate or removing the initial growth substrate, and have completed the present invention. Here, the relaxed state can be said to be a state in which the horizontal and vertical lattice distortions of the crystal lattice due to internal stress are small and the difference is within a specific range, and a method for determining this will be described later.

[0011] Specifically, the buffer stack of the present invention has N buffer layers (three or more), the lattice constant of the N buffer layers gradually increases overall from the buffer layer closest to the initial growth substrate to the buffer layer closest to the pseudo substrate layer, and N or less than N but not less than three of the N buffer layers have misfit dislocations in the portions that contact other layers having different lattice constants.

[0012] The gist and configuration of the present invention are as follows. [1] An initial growth substrate; an etching stop layer on the initial growth substrate; a buffer stack on the etch stop layer; A substrate for epitaxial growth, comprising: the buffer stack includes N buffer layers each having a different lattice constant, and a pseudo substrate layer having a thickness of 300 nm or more on the N buffer layers; The lattice constant of the initial growth substrate is a g The lattice constant of the pseudo substrate layer is a p In this case, the mismatch degree X of the pseudo substrate layer with respect to the initial growth substrate is p·g is 0.7% or more, The N is a natural number of 3 or more, The buffer layer has three or more buffer layers having misfit dislocations on the initial growth substrate side. Substrate for epitaxial growth. [2] The lattice constant in the vertical direction of the pseudo substrate layer calculated from the reciprocal space map is defined as q z , the horizontal lattice constant is q x In this case, the following formula (2): -0.0002≦q z -q x ≦0.0011 (2) [1] A substrate for epitaxial growth that satisfies the above requirements. [3] The substrate for epitaxial growth according to [1] or [2], in which a lattice-like pattern is observed in a top view of the surface of the pseudo substrate layer photographed with a metallurgical microscope. [4] The lattice constant of the nth buffer layer counting from the buffer layer located closest to the initial growth substrate is a n The lattice constant of the n+1th buffer layer is a n+1 In this case, the following formula (1): a n n+1 (1) Fulfilling In the above formula, n is 1 to N-1. When n is 1, the lattice constant a1 is g Bigger, Lattice constant a when n+1 is N N is the above a p Smaller, The degree of mismatch of each of the N buffer layers with respect to the layer adjacent to the initial growth substrate side is defined as the mismatch degree X p·g A substrate for epitaxial growth, any of [1] to [3], for which the value is less than or equal to the value obtained by dividing by N. [5] The substrate for epitaxial growth according to any one of [1] to [4], wherein each of the buffer layers is composed of a single layer or multiple buffer constituent layers, and each of the buffer layers has a thickness of 150 nm or more. [6] At least one buffer layer is composed of a plurality of buffer constituent layers; The buffer layer A located closest to the pseudo substrate layer in the buffer layer is thicker than the buffer layer B located closest to the initial growth substrate in the buffer layer; Here, the lattice constant of the buffer layer in formula (1) is that of the buffer layer A. The epitaxial growth substrate according to [4] or [5]. [7] The epitaxial growth substrate according to [6], wherein the buffer constituent layer A has a thickness of 100 nm or more, and the buffer constituent layer B has a thickness of half or less of the thickness of the buffer constituent layer A. [8] The epitaxial growth substrate according to any one of [1] to [7], wherein the initial growth substrate is an InP substrate, and the etching stop layer is an InGaAs layer. ​[9] The epitaxial growth substrate according to any one of [1] to [8], wherein the initial growth substrate is an InP substrate, the buffer stack is a stack of a plurality of InAsP layers, and the buffer stack further has an InP window layer in contact with the etching stop layer.

[10] [1]-[9] are formed on a pseudo-substrate layer of a substrate for epitaxial growth. forming a semiconductor laminate including an active layer; bonding a support substrate onto the semiconductor laminate via a reflective layer; and A method for manufacturing an optical semiconductor device, comprising the step of removing the initial growth substrate from the epitaxial growth substrate.

[11] The method for manufacturing an optical semiconductor element according to

[10] , wherein the SORI value of the front side of the semiconductor laminate on the pseudo substrate layer obtained by the step of forming the semiconductor laminate is less than 30 μm.

[12] An optical semiconductor element comprising, in this order, a support substrate, a reflective layer, a semiconductor laminate including an active layer, and a buffer laminate, the buffer stack includes a pseudo substrate layer having a thickness of 300 nm or more, N buffer layers, and a window layer, in this order, the window layer being on the light extraction side; The lattice constants of the pseudo substrate layer and the window layer are each a p and a t In this case, the degree of mismatch X of the pseudo substrate layer with respect to the window layer is p·t is 0.7% or more, The N is a natural number of 3 or more, The window layer side of the buffer layer has three or more buffer layers having misfit dislocations. Optical semiconductor element.

[13] Let a be the lattice constant of the nth buffer layer from the buffer layer closest to the window layer. n The lattice constant of the n+1th buffer layer is a n+1 In this case, the following formula (1): a n n+1 (1) Fulfilling In the above formula, n is 1 to N-1. When n is 1, the lattice constant a1 is​t Bigger, Lattice constant a when n+1 is N N is the above a p Smaller, The degree of mismatch of each of the N buffer layers with respect to the layer adjacent to the window layer side is defined as the mismatch degree X p·t An optical semiconductor element

[12] whose R is less than or equal to the value obtained by dividing R by N.

[14] The optical semiconductor element according to

[12] or

[13] , wherein the refractive index gradually decreases from the pseudo substrate layer to the window layer.

[15] The optical semiconductor element of any one of

[12] to

[14] , wherein the window layer is InP, the buffer stack is a stack of a plurality of InAsP layers, and the pseudo substrate layer is an InAsP layer.

[16] The optical semiconductor element of any one of

[12] to

[15] , wherein the central emission wavelength of the active layer in the semiconductor laminate is 2000 to 3000 nm.

[17] The active layer has a quantum well structure, and the lattice constant of the well layer is a w When The mismatch degree X of the well layer with respect to the pseudo substrate layer w·p The optical semiconductor element of any of

[12] to

[16] , wherein the optical conductivity is 0.1% or more and less than 1.2%.

[18] In the lattice constants of the semiconductor laminate and the buffer laminate, the lattice constant a of the well layer of the active layer is w The largest is the optical semiconductor element

[17] .

[19] Any of

[12] to

[18] , wherein each of the buffer layers is composed of a single layer or multiple buffer constituent layers, and each of the buffer layers has a thickness of 150 nm or more. An optical semiconductor element.

[20] At least one buffer layer is composed of a plurality of buffer constituent layers; The buffer layer A located closest to the pseudo substrate layer in the buffer layer is thicker than the buffer layer B located closest to the initial growth substrate in the buffer layer; Here, the lattice constant of the buffer layer in formula (1) is that of the buffer constituent layer A. The optical semiconductor element according to any one of

[13] to

[19] .

[21] The lattice constant of the barrier layer of the active layer is a b The mismatch of the barrier layer with respect to the pseudo-substrate layer is X b·p In this case, the mismatch degree X of the well layer with respect to the pseudo substrate layer is w·p and the mismatch degree X of the barrier layer with respect to the pseudo-substrate layer. b·p The optical semiconductor element of any of

[17] to

[20] , wherein the average thickness mismatch between the well layer and the barrier layer, calculated from the above formula, is within the range of -0.09% to 0.46%. Effect of the Invention

[0013] According to the present invention, it is possible to provide an epitaxial growth substrate having a buffer laminate that does not cause cracks even when a support substrate is bonded or an initial growth substrate is removed, and it is also possible to provide a method for manufacturing an optical semiconductor device in which a semiconductor laminate including an active layer is formed on such an epitaxial growth substrate, and then a support substrate is bonded or an initial growth substrate is removed, and an optical semiconductor device having a large PL intensity and advantageous for light extraction is also provided. [Brief description of the drawings]

[0014] [Figure 1] 1 is a schematic cross-sectional view of an example of an epitaxial growth substrate of the present invention, which illustrates the change in lattice constant, and the horizontal width of each layer relatively represents the magnitude of the lattice constant. [Diagram 2] 1 is a schematic cross-sectional view of an example of an epitaxial growth substrate in which all buffer layers in the buffer are buffer layers made of two buffer constituent layers. This schematic diagram, like FIG. 1, illustrates the change in lattice constant. [Diagram 3] 1A to 1C are schematic cross-sectional views of an example of a method for producing an optical semiconductor element of the present invention. [Figure 4] 1 is a schematic cross-sectional view of an example of an optical semiconductor element of the present invention. [Diagram 5] FIG. 2 is a schematic cross-sectional view of a substrate for explaining the definition of the amount of warpage (SORI). [Figure 6]FIG. 2 is a schematic cross-sectional view of a substrate for explaining the definition of (BOW). [Figure 7] 1 is a schematic cross-sectional view of an example of a buffer laminate and a semiconductor laminate in an optical semiconductor element of the present invention. This schematic diagram illustrates the change in lattice constant, and the horizontal width of each semiconductor layer relatively represents the magnitude of the lattice constant. [Figure 8] 1 is a TEM image of a cross section of the epitaxial growth substrate of Example 1. [Figure 9] 2 is a top view (3 mm square) of a pseudo substrate layer of the epitaxial growth substrate of Example 1, taken by a metallurgical microscope. [Figure 10] 1 is a chart showing the change in PL intensity (relative intensity) versus the degree of mismatch in the average combined thickness of well layers and barrier layers of an optical semiconductor device using the epitaxial growth substrate of Example 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Prior to describing the embodiments of the present invention, the following points will be explained in advance. In this specification, the symbol for the lattice constant calculated by Begaert's law based on the composition ratio (solid phase ratio) is a, and the lattice constant of which layer is represented by a subscript attached to a. For example, the lattice constant of the initial growth substrate is a g , the lattice constant of the pseudo substrate layer is a p The lattice mismatch Δa / a is represented by the symbol X, and the mismatch of which layer is represented by a subscript attached to X. For example, the mismatch of the pseudo substrate layer with respect to the initial growth substrate is represented by X p·g The formula is written as follows: <1> teeth (a p -a g ) / a g ×100... <1> In addition, the symbol for the lattice constant when it is determined by reciprocal lattice space measurement using X-rays, which will be described later, is set to q.

[0016] In this specification, the composition ratio (solid phase ratio) of each layer is a value obtained by SIMS analysis. In this specification, the composition ratio (solid phase ratio) of each layer of the buffer laminate is a value obtained by performing SIMS analysis (quadrupole type) in the thickness direction from the pseudo substrate layer in the epitaxial growth substrate. In the optical semiconductor device, the value obtained by performing SIMS analysis (quadrupole type) in the thickness direction from the window layer is used. Note that the SIMS analysis results are used as the average element concentration value in the half-thickness range of each layer at the center of each layer in the thickness direction. During production, the growth conditions that result in the desired composition ratio are determined by calculating the solid phase ratio using the lattice constant measured by XRD and the emission center wavelength measured by photoluminescence (PL) measured, converted into Eg (i.e., band gap) for the single film grown, and then a layer having the desired composition ratio is laminated using these growth conditions.

[0017] In this specification, unless otherwise specified, the lattice constant is a value calculated according to Begaert's law based on the composition ratio. First, the simple lattice constant of the mixed crystal is calculated according to Begaert's law. InGaAsP (general formula: (In a Ga b )(P x As y )) as an example, the physical constant A abxy (Begart's lattice constant) is the physical constant B of the four binary alloys that are the basis of the pseudo-quaternary alloy when the composition ratio (solid phase ratio) is known. ax ,B bx ,B ay ,B by Based on the lattice constants (reference values ​​in Table 1 below), the following formula is used: <2> It is calculated as follows: A abxy = a × x × B ax +b×x×B bx +a×y×B ay +b x y x B by ... <2>

[0018] [Table 1]

[0019] In the case of pseudo-ternary mixed crystals, the general formula is: (In a Ga b Al c For example, the following formula is used: <3> , <4> From this, the band gap Eg and the lattice constant a can be calculated using Begaert's law.

number

[0020] In addition, even if the III-V compound semiconductor is a ternary, quinary, or hexanary system, the composition wavelength and lattice constant can be obtained by modifying the formula in the same manner as above. For binary systems, the values ​​described in the above literature can be used.

[0021] In this specification, when the term "InGaAsP" is used without specifying the composition ratio, it means any compound in which the chemical composition ratio of group III elements (the sum of In and Ga) and group V elements (As and P) is 1:1, and the ratio of group III elements In and Ga and the ratio of group V elements As and P are indefinite. In this case, it includes the case where the group III elements do not contain either In or Ga, and also includes the case where the group V elements do not contain either As or P. In addition, when the term "InGaP" is used, it means that the "InGaAsP" does not contain As except for the inevitable mixing in the manufacturing process, and when the term "InGaAs" is used, it means that the "InGaAsP" does not contain P except for the inevitable mixing in the manufacturing process. Similarly, when the term "InAsP" is used, it means that the "InGaAsP" does not contain Ga except for the inevitable mixing in the manufacturing process, and when the term "GaAsP" is used, it means that the "InGaAsP" does not contain In except for the inevitable mixing in the manufacturing process. In addition, when written as "InP", it means that the above "InGaAsP" does not contain Ga and As, except for unavoidable contamination during manufacturing. The composition ratio of each component such as InGaAsP and InGaAs can be measured by photoluminescence measurement and X-ray diffraction measurement. In addition, "unavoidable contamination during manufacturing" here means unavoidable contamination in the manufacturing equipment using the raw material gas, as well as the diffusion phenomenon of atoms at the interface between layers during crystal growth and subsequent heat treatment.

[0022] In this specification, a layer that functions electrically as a p-type is referred to as a p-type layer, and a layer that functions electrically as an n-type is referred to as an n-type layer. On the other hand, the term "undoped" refers to a layer in which specific impurities such as Zn, S, Sn, etc. are not intentionally added. An undoped InGaAsP layer may contain unavoidable impurities during the manufacturing process. Specifically, the layer has a small carrier density (e.g., 4×10 16 / cm 3 In this specification, if the impurity concentration is less than 100%, the impurity concentration is determined by SIMS analysis.

[0023] In this specification, the total thickness of each layer formed can be measured using an optical interference film thickness meter. Furthermore, the thickness of each layer can be calculated from cross-sectional observation of the grown layer using an optical interference film thickness meter and a transmission electron microscope. In addition, when the thickness of each layer is small, such as in a superlattice structure, the thickness can be measured using TEM-EDS. In addition, in the cross-sectional view, when a certain layer has an inclined surface, the thickness of that layer is determined by the maximum height from the flat surface of the layer immediately below that layer.

[0024] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In principle, the same reference numerals are used for the same components, and duplicated explanations will be omitted. In each figure, for convenience of explanation, the aspect ratio of the substrate and each layer is exaggerated regardless of the actual thickness, and the electrodes, intermediate electrode portion, and mesa shape are also simplified. However, in Figures 1, 2, and 7, the horizontal width of each layer relatively represents the size of the lattice constant.

[0025] <Epitaxial growth substrate> Hereinafter, the epitaxial growth substrate of the present invention will be described with reference to FIG. 1, however, the epitaxial growth substrate of the present invention is not limited thereto. Here, Fig. 1 is a schematic diagram of an example of an epitaxial growth substrate of the present invention. In this example, each of the N buffer layers is a single layer. This schematic diagram illustrates the change in lattice constant, and the horizontal width of each layer relatively represents the size of the lattice constant. The epitaxial growth substrate 1 of the present invention comprises, in this order, an initial growth substrate 11, an etching stop layer 12, a buffer layer 13, and a pseudo substrate layer 14 having a thickness of 300 nm or more.

[0026] (Substrate for initial growth) The initial growth substrate 11 is not particularly limited, and may be an InP substrate, a GaAs substrate, a GaSb substrate, an InAs substrate, an InSb substrate, or other compound semiconductor substrate, preferably an InP substrate, depending on the composition of the active layer of the optical semiconductor device to be manufactured using the epitaxial growth substrate. These substrates may be undoped or may be either n-type or p-type.

[0027] The diameter of the substrate can be selected between 2 inches and 6 inches. The thickness of the substrate for initial growth can be 100 μm or more, and is preferably 300 μm or more, depending on the substrate diameter. It is preferable to use a substrate for initial growth based on the SEMI standard.

[0028] (Etching stop layer) The epitaxial growth substrate of the present invention has an etching stop layer 12 on an initial growth substrate 11. An initial layer that is lattice-matched to the initial growth substrate 11 may be formed on the initial growth substrate 11, and then the etching stop layer may be formed.

[0029] The epitaxial growth substrate of the present invention is a substrate that assumes that the above-mentioned initial growth substrate 11 will be removed later. The etching stop layer 12 is a layer that stops the etching when only the initial growth substrate 11 is removed and prevents the semiconductor laminate including the buffer laminate and active layer from being etched away when the initial growth substrate 11 is removed by etching in the manufacture of an optical semiconductor device using the epitaxial growth substrate of the present invention. The etching stop layer 12 is preferably a layer that has a different main group V element from that of the initial growth substrate 11 so as to have etching selectivity such that it is difficult to etch with the etching solution used to remove the initial growth substrate 11. For example, when the initial growth substrate 11 is an InP substrate, it is preferably an InGaAs layer. The etching stop layer 12 is preferably a layer that is lattice-matched with the initial growth substrate 11. For example, when forming an InGaAs layer on an InP substrate, it is preferable that the In composition (0.532) matches the lattice constant of the InP substrate, and in the thickness range described below, the In composition can be 0.47 to 0.60 to achieve defect-free growth. The material of the etching stop layer 12 can be appropriately selected according to the material of the initial growth substrate 11 used so as to satisfy the above conditions.

[0030] The thickness of the etching stop layer 12 may be as thin as possible so long as the etching can be stopped when the initial growth substrate 11 is removed, and may be 100 nm or less, preferably 50 nm or less, and more preferably 30 nm or less. The thickness of the etching stop layer 12 is preferably 1 nm or more, and more preferably 5 nm or more. The etching stop layer 12 may be a single layer or a composite layer (e.g., an SLS layer).

[0031] After removing the initial growth substrate 11, a portion of the etching stop layer 12 may be completely removed using an etching solution different from the etching solution for the initial growth substrate 11, or a portion of the etching stop layer 12 may be left and used as a contact layer for an optical semiconductor element.

[0032] (Buffer laminate) The epitaxial growth substrate of the present invention has a buffer stack on an etching stop layer 12. The buffer stack has at least N buffer layers 13 and a pseudo substrate layer 14. Furthermore, the buffer stack may have a window layer 15 between the etching stop layer 12 and the N buffer layers 13, which is lattice-matched with the initial growth substrate 11.

[0033] Here, the window layer 15 is a layer that will be the uppermost layer on the light extraction side of the optical semiconductor element after removing the initial growth substrate 11 and the etching stop layer 12, and can be a layer to be roughened. For this reason, it is preferable to make the layer thick enough to be roughened, and the thickness can be 100 nm or more and 800 nm or less.

[0034] When an InP substrate is used, the buffer stack is preferably a stack of multiple InAsP layers so that the lattice constant difference with the InP substrate can be increased while the buffer stack is grown. In this case, the window layer that is lattice-matched with the InP substrate is, for example, an InP layer. When a GaSb substrate is used, it is also preferable to form a laminate of multiple InGaSb layers so that the lattice constant difference with the GaSb substrate can be increased during growth. In this case, the window layer that lattice matches the GaSb substrate is, for example, a GaSb layer.

[0035] In the N buffer layers 13, N is a natural number of 3 or more. If it is 2 or less, it is difficult to obtain the effect of relieving internal stress, and it is difficult to obtain the PL intensity of the semiconductor laminate formed thereon. The upper limit of N depends on the magnitude of the lattice mismatch between the initial growth substrate 11 and the pseudo substrate layer 14, but it is preferable to set the number of layers to an appropriate degree of lattice mismatch that can generate misfit dislocations, which will be described later, and is, for example, 9 or less.

[0036] The N buffer layers 13 are characterized in that they have three or more buffer layers having misfit dislocations on the initial growth substrate side. When a cross section of the N buffer layers 13 is observed with a transmission electron microscope (TEM), so long as the number of buffer layers in which misfit dislocations are observed at the interface on the initial growth substrate side is three or more, misfit dislocations may be observed in all of the N buffer layers, or the N buffer layers 13 may include a buffer layer in which misfit dislocations are not observed. Here, the initial growth substrate side of the buffer layer is preferably an interface with a layer adjacent to the initial growth substrate side (also referred to as a lower layer).

[0037] Misfit dislocations are dislocations caused by a difference in lattice constant in the in-plane direction of the substrate, and may occur at the interface between adjacent buffer layers, or at the interface between the buffer layer and the window layer. It is preferable that the dislocations do not propagate through the buffer layer, but remain within the buffer layer.

[0038] Misfit dislocations can be confirmed by exposing a cross section in the thickness direction of the epitaxial growth substrate of the present invention and observing the cross section with a transmission electron microscope (TEM). As shown in FIG. 8, dislocations are observed as black parts in the observation with a transmission electron microscope (TEM). The interface between adjacent buffer layers can be grasped by contrast, and the black parts observed parallel to the interface can be determined to be misfit dislocations, and the present invention is characterized by the presence of such misfit dislocations observed parallel to the interface. The black parts observed at an angle to the interface are dislocations propagating in the growth direction seen during stress relaxation growth starting from misfit dislocations generated at the interface, and are distinguished from the above-mentioned misfit dislocations.

[0039] The N buffer layers 13 are arranged such that the buffer layer closest to the initial growth substrate is the first buffer layer, and the nth buffer layer counting from the buffer layer closest to the initial growth substrate has a lattice constant of a n , the lattice constant of the n+1th buffer layer is a n+1 When this is set, the following formula (1) is satisfied. a n n+1 (1)

[0040] In the above formula, n is a natural number from 1 to N-1, and n+1 is a natural number from 2 to N. When n is 1, the lattice constant a1 is the lattice constant of the buffer layer located closest to the initial growth substrate, and the lattice constant a g When a window layer is included, the lattice constant a1 is the lattice constant of the window layer a t Greater than. And when n+1 is N, the lattice constant a N is the lattice constant a of the pseudo-substrate layer p Less than.

[0041] The thickness of each buffer layer is preferably set to a thickness that exceeds the critical thickness for the lattice constant difference between the layer adjacent to the initial growth substrate (hereinafter also referred to as the "lower layer") and can relax internal stress while generating misfit dislocations, and can be, for example, 150 nm or more, preferably 200 nm or more, or 1000 nm or less, preferably 800 nm or less, and more preferably 500 nm or less.

[0042] Here, each buffer layer may be a single layer or may be composed of multiple buffer constituent layers. From the viewpoint of reducing the amount of warping of the substrate, it is preferable that each buffer layer is a buffer layer including a buffer constituent layer. Each buffer layer may include both a single buffer layer and a buffer layer including a buffer constituent layer. ​The buffer layers in the buffer stack are divided into a single layer buffer layer and a buffer layer consisting of multiple buffer constituent layers. When the lattice constants of one layer and the layer on the initial growth substrate side adjacent to it are compared for each layer constituting the buffer stack, if they satisfy the above formula (1), they are considered to be single layer buffer layers. When the lattice constants of one layer and the layer on the initial growth substrate side adjacent to it are compared, if the layer on the initial growth substrate side has a larger lattice constant, contrary to the above formula (1), the one layer and the layer on the initial growth substrate side adjacent to it are considered to be buffer constituent layers. Then, multiple buffer constituent layers in which the layer on the initial growth substrate side has a larger lattice constant are collectively considered to be one buffer layer. Then, the layer closest to the pseudo substrate side is called buffer constituent layer A, and the layer closest to the initial growth substrate side is called buffer constituent layer B.

[0043] -When the buffer layer is a single layer- When the buffer layer is a single layer, the lattice constant a of the nth buffer layer is n is of course the lattice constant of the single layer.

[0044] The multiple buffer layers in the N buffer layers 13 have a lattice constant that gradually increases overall from the buffer layer closest to the initial growth substrate to the buffer layer closest to the pseudo substrate layer. A schematic diagram of a single buffer layer is shown in Figure 1. The schematic diagram illustrates the change in lattice constant, and the horizontal width of each layer relatively represents the magnitude of the lattice constant.

[0045] The thickness of the single buffer layer can be, for example, 150 nm or more, as described above.

[0046] In order to form misfit dislocations while preventing threading dislocations, the degree of mismatch of the lattice constant of each of the N buffer layers with respect to the layer (lower layer) adjacent to the initial growth substrate side is set to a mismatch degree X p·g It is also preferable to set the inconsistency X to be equal to or less than the value divided by N. p·gIt is also preferable to set the value so that it can be equal to or greater than the value obtained by dividing by 4 N. For example, it is preferable that the mismatch of each buffer layer with respect to the layer below be within a range of 0.15% to 0.35%.

[0047] -When the buffer layer consists of multiple buffer constituent layers- When the buffer layer is composed of a plurality of buffer constituent layers, the adjacent buffer constituent layers have different lattice constants, and the lattice constant a of the nth buffer layer is n is the lattice constant of the buffer constituent layer (buffer constituent layer A) located closest to the pseudo substrate layer in the buffer layer, and the lattice constant satisfies the above-mentioned formula (1) and other lattice constant relationships with the (n+1)th buffer layer.

[0048] The buffer layer including the buffer constituent layer is preferably composed of two buffer constituent layers with different lattice constants. A schematic diagram of the case where the buffer layer is composed of two layers, a buffer constituent layer (buffer constituent layer A) located on the pseudo-substrate layer side and a buffer constituent layer (buffer constituent layer B) located on the growth substrate side, is shown in Figure 2. The schematic diagram illustrates the change in lattice constant, and the horizontal width of each layer relatively represents the size of the lattice constant.

[0049] As shown in FIG. 2, when the lattice constant of buffer component layer A is a and the lattice constant of buffer component layer B is b, the lattice constant b n is the lattice constant a of the buffer layer A n If the n+1-th buffer layer also consists of two buffer constituent layers, the lattice constant b n+1 is the lattice constant a n+1 is larger than 1, and further based on equation (1), n+1 is a n Bigger, b n+1 HA n Greater than.

[0050] The buffer layer A is thicker than the buffer layer B.

[0051] When all of the N buffer layers 13 are made up of two buffer constituent layers and each buffer layer satisfies the above relationship, as shown in FIG. 2, the lattice constant a n and b n While repeatedly increasing and decreasing, as a whole, it gradually increases as n increases from 1 to N-1 (and N in the n+1th buffer layer). As a result, it becomes easier to generate misfit dislocations in the buffer constituent layer B than in the case of Fig. 1, and since the buffer constituent layer A receives a tensile stress from the buffer constituent layer B while a compressive stress is applied overall, the effect of alleviating the internal stress due to the thickness of the buffer constituent layer A can be increased.

[0052] In the buffer layer including the buffer constituent layer, the thickness of the buffer constituent layer A located closest to the pseudo substrate layer is preferably a thickness capable of relaxing the internal stress, and may be 100 nm or more, preferably 200 nm or more, and may be 1000 nm or less, preferably 800 nm or less, more preferably 500 nm or less.

[0053] In the buffer layer including the buffer constituent layer, the thickness of the buffer constituent layer B located closest to the initial growth substrate is preferably half or less than the thickness of the buffer constituent layer A, and is preferably set to a thickness that generates misfit dislocations with respect to the layer (lower layer) adjacent to the initial growth substrate side. For example, it may be 10 nm or more, preferably 30 nm or more. It may also be 200 nm or less, preferably 100 nm or less.

[0054] The thickness of the buffer constituent layer A is preferably at least twice as thick as the buffer constituent layer B, and more preferably at least three times as thick.

[0055] In order to form misfit dislocations while preventing threading dislocations, the lattice constant of each layer in each of the N buffer layers (in the case of a buffer layer including a buffer constituent layer, the lattice constant b n) with respect to the layer adjacent to the initial growth substrate (lower layer), the mismatch degree is X p·g It is also preferable to set the inconsistency X to be equal to or less than the value divided by N. p·g It is more preferable to set it so that it is equal to or greater than the value obtained by dividing by 4 N. For example, it is preferable that the mismatch degree of the buffer layer B with respect to the layer below it is within the range of 0.15% to 0.35%.

[0056] In addition, the lattice constant b n is the lattice constant a of the buffer layer A n Since the mismatch of the buffer layer A with respect to the lower layer (buffer layer B) is negative, the absolute value of the mismatch is n It is preferable that the absolute value of the mismatch degree with respect to the lower layer is smaller than that of the lower layer.

[0057] (Pseudo substrate layer) The buffer stack in the epitaxial growth substrate of the present invention has a pseudo substrate layer 14 having a thickness of 300 nm or more on the Nth buffer layer, counting from the buffer layer that is located closest to the initial growth substrate side, of the N buffer layers 13.

[0058] Here, the pseudo substrate layer 14 is a layer that serves as a substrate for epitaxially growing layers, such as a semiconductor laminate including an active layer 30, in the manufacture of an optical semiconductor device. The semiconductor laminate can be grown so as to be lattice-matched with the pseudo substrate layer. The thickness of the pseudo substrate layer 14 is 300 nm or more, preferably 500 nm or more, in order to suppress warping that occurs when the balance of internal stresses suddenly changes during bonding of the support substrate or removal of the initial growth substrate, and is preferably 10 μm or less in order to avoid excessively long growth times.

[0059] The material of the pseudo substrate layer 14 is selected based on the degree of mismatch X between the pseudo substrate layer 14 and the initial growth substrate 11. p·g It can be appropriately selected so that the content of 0.7% or more. Here, the inconsistency X p·gare the lattice constants of the pseudo-substrate layer and the initial growth substrate, respectively. p and a g In this case, (a p -a g ) / a g It is expressed as x100. p·g is 0.7% or more, and from the viewpoint of increasing the wavelength range that can be designed in the semiconductor laminate to be formed, it is preferably 1.0% or more.

[0060] The material of the pseudo substrate layer 14 can be appropriately selected so as to satisfy the above conditions.

[0061] Since the pseudo substrate layer 14 is provided on the above-mentioned N buffer layers 13, the pseudo substrate layer 14 can be in a relaxed state. Here, the relaxed state refers to a state where the pseudo substrate layer 14 is subjected to X-ray diffraction (XRD) and the vertical lattice constant q calculated by reciprocal lattice mapping measurement (RSM) is 0.01 to 0.01. z (nm) and the horizontal lattice constant q x This means that the difference (nm) in the optical properties (nm) satisfies the following formula (2). -0.0002≦q z -q x ≦0.0011 (2) Vertical lattice constant q z and the horizontal lattice constant q x When the difference between these two is zero, the lattice is theoretically in a state where it is not distorted at all. The closer the value of formula (2) is to zero, the greater the effect of reducing warpage, and it is more preferable for the difference to be 0.0005 nm or less.

[0062] The epitaxial growth substrate of the present invention has misfit dislocations in the portions of three to N of the N buffer layers 13 that contact other layers having different lattice constants. By intentionally generating misfit dislocations in the buffers, the pseudo substrate layer 14 can be put into a relaxed state, thereby reducing the amount of warping of the substrate. In addition, in a top view of the surface of the pseudo substrate layer photographed with a metallurgical microscope, a lattice pattern caused by the misfit dislocations in the N buffer layers 13 may be observed.

[0063] Here, the pseudo-substrate layer 14 may be a single layer or may be composed of multiple pseudo-substrate constituent layers. When composed of multiple pseudo-substrate constituent layers, the pseudo-substrate layer including the pseudo-substrate constituent layer is preferably composed of two pseudo-substrate constituent layers having different lattice constants, similar to the above-mentioned buffer constituent layer, and the lattice constant b of the pseudo-substrate constituent layer B located on the growth substrate side is larger than the lattice constant a of the pseudo-substrate constituent layer A located on the pseudo-substrate constituent layer B.

[0064] Furthermore, pseudo-substrate constituent layer A is thicker than pseudo-substrate constituent layer B. Since pseudo-substrate constituent layer A receives tensile stress from pseudo-substrate constituent layer B while an overall compressive stress is applied, the internal stress relaxation effect due to the thickness of pseudo-substrate constituent layer A can be increased.

[0065] In the pseudo-substrate layer including the pseudo-substrate constituent layers, the thickness of the pseudo-substrate constituent layer A is preferably 300 nm or more, and more preferably 400 nm or more.

[0066] In the pseudo-substrate layer including the pseudo-substrate constituent layers, the thickness of the pseudo-substrate constituent layer B located closest to the initial growth substrate side is preferably half or less of the thickness of the pseudo-substrate constituent layer A. For example, it is preferably 50 nm or more, and more preferably 100 nm or more.

[0067] <Method of manufacturing epitaxial growth substrate> The method for producing a substrate for epitaxial growth of the present invention includes the following steps. A step of forming an etching stop layer on the initial growth substrate. Forming a buffer stack on the etch stop layer. The preferred forms of the initial growth substrate, the etching stop layer and the buffer laminate are as described above. Methods for forming them will be described below.

[0068] (Etching stop layer formation process) The method for forming the etching stop layer 12 is not particularly limited as long as it can be epitaxially grown on the initial growth substrate, for example, a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy (MBE) method, a sputtering method, etc.

[0069] For example, when the initial growth substrate is an InP substrate and the etching stop layer 12 is an InGaAs layer, trimethylindium (TMIn) as an In source, trimethylgallium (TMGa) as a Ga source, and arsine (AsH3) as an As source are supplied into a growth furnace at a predetermined mixture ratio using a carrier gas, and then vapor-phase growth is performed on the substrate. In order to obtain an n-type or p-type, a dopant source gas may be further used as appropriate.

[0070] The lattice constant a calculated from the composition ratio of the etching stop layer 12 can be adjusted by changing the mixture ratio of the In source, Ga source, and As source contained in the source gas to control the composition ratio of the etching stop layer 12. The thickness of the etching stop layer 12 can be adjusted by the ratio of the amount of Group III source gas to the amount of Group V source gas, the growth temperature, and the growth time.

[0071] (Buffer laminate formation process) In the method for forming the buffer stack, at least the above-mentioned N number of buffer layers 13 and the pseudo substrate layer 14 are formed on the etching stop layer 12. Before the N number of buffer layers 13 are formed, a window layer 15 may be formed on the etching stop layer 12.

[0072] There are no particular limitations on the method for forming these layers as long as they can be epitaxially grown on the etching stop layer 12, and the methods described above can be used.

[0073] For example, when each buffer layer and pseudo substrate layer is an InAsP layer, it can be formed by supplying trimethylindium (TMIn) as an In source, arsine (AsH3) as an As source, and phosphine (PH3) as a P source into a growth furnace at a predetermined mixture ratio using a carrier gas, and growing them in a vapor phase on the etching stop layer 12. When making it an n-type or p-type, a dopant source gas may be further used as appropriate.

[0074] The lattice constant a calculated from the composition ratio of each layer can be adjusted by changing the mixture ratio of the source gases to control the composition ratio. The thickness of each layer can be adjusted by the ratio of the amount of Group III source gas to the amount of Group V source gas, the growth temperature, and the growth time.

[0075] As described above, during manufacturing, the growth conditions that will result in the desired composition ratio can be determined by calculating the solid phase ratio using the lattice constant measured by XRD measurement and the central wavelength of light emission measured by photoluminescence (PL) measurement converted into Eg for the single film grown, and layers having the desired composition ratio can be laminated using the growth conditions. The composition ratio of each layer obtained can also be determined by measurement using SIMS analysis, and the lattice constant a of each layer can be determined by the composition ratio (InAs y P 1-y In the case of the layer, it is calculated by Vegard's law using the solid phase ratio of As (y).

[0076] <Method of manufacturing optical semiconductor element> The epitaxial growth substrate of the present invention can be used for manufacturing an optical semiconductor device. Hereinafter, a method for manufacturing an optical semiconductor device using the epitaxial growth substrate of the present invention will be described, and through this, the details of each component of the optical semiconductor device of the present invention will be described. However, the manufacturing method of an optical semiconductor device and the optical semiconductor device of the present invention are not limited thereto.

[0077] Fig. 3 is a schematic diagram of an example of a method for manufacturing an optical semiconductor element using the epitaxial growth substrate of the present invention, and Fig. 4 shows an example of an optical semiconductor element obtained through the manufacturing method of Fig. 3. In this example, each of the N buffer layers 13 is a single buffer layer. Also, the active layer 30 has a multiple quantum well (MQW) structure. The optical semiconductor element may be either a light emitting element or a light receiving element, but the following description will mainly be given taking a light emitting element as an example. In addition, in FIGS. 3 and 4, the aspect ratios of the substrate and each layer are exaggerated from the actual ratios, but they do not illustrate the change in lattice constant as in FIGS.

[0078] A method for producing an optical semiconductor element of the present invention includes the following steps. A step of forming a semiconductor laminate including an active layer on the pseudo substrate layer of the epitaxial growth substrate of the present invention (semiconductor laminate formation step); A step of bonding a support substrate onto the semiconductor laminate via a reflective layer (support substrate bonding step); and A step of removing the initial growth substrate from the epitaxial growth substrate (initial growth substrate removing step).

[0079] (Semiconductor laminate formation process) In this step, first, as shown in Fig. 3A, an epitaxial growth substrate 1 having the above-mentioned N buffer layers 13 and pseudo substrate layer 14 is prepared. Next, a semiconductor laminate including an active layer 30 is formed on the pseudo substrate layer 14 of the epitaxial growth substrate 1. Fig. 3B is a view after the semiconductor laminate has been formed.

[0080] The semiconductor laminate is preferably formed so that the active layer 30 is sandwiched between an n-type layer and a p-type layer 37, and the active layer 30 is preferably configured with a multiple quantum well (MQW) structure. The MQW structure is advantageous in terms of improving the optical output by suppressing crystal defects. In FIG. 3B, the active layer 30 is configured with an MQW structure having a structure in which well layers 35W and barrier layers 35B are alternately repeated. Also, in this figure, the pseudo substrate layer 14 is n-type (e.g., Si-doped) and also serves as an n-type layer, and forms a semiconductor laminate structure including the active layer 30 together with the p-type layer 37. However, the manufacturing method of the optical semiconductor element of the present invention is not limited to such an embodiment, and other n-type layers may be formed on the pseudo substrate layer 14, and known semiconductor layers applied to optical semiconductor elements may be added. For example, in order to suppress impurity diffusion, an undoped spacer layer may be provided between the n-type layer and the active layer 30 or between the p-type layer 37 and the active layer 30, or a co-doped layer may be provided. The n-type layer and p-type layer 37 may have layers that function as a blocking layer, a cladding layer, or a contact layer.

[0081] The active layer 30 can have a composition selected according to the central emission wavelength. For example, the central emission wavelength can be 2000 to 3000 nm. In this case, the composition of the well layer 35W of the multiple quantum well (MQW) structure can be formed of a III-V compound semiconductor that is a combination of a total of 2 to 6 elements selected from group III elements (Al, Ga, In) and group V elements (P, As, Sb), and can be, for example, InGaAs. It may also be InAs, InGaAlAs, or InGaAsP. According to the present invention, even if the growth substrate is GaAs, a longer wavelength range than the wavelength range possible in a GaAs lattice matching system can be selected as the central emission wavelength by using the buffer stack 13 and the pseudo substrate layer 14, and even if the growth substrate is InP, a longer wavelength range than the wavelength range possible in an InP lattice matching system can be selected as the central emission wavelength by using the buffer stack 13 and the pseudo substrate layer 14. Even if the growth substrate is InAs or GaSb, a longer wavelength range than the wavelength range possible in a lattice matching system of InAs and GaSb can also be selected as the central emission wavelength by using the buffer stack 13 and the pseudo substrate layer 14.

[0082] The band gap of the barrier layer 35B is larger than the band gap of the well layer 35W. The composition of the barrier layer 35B can be made of a III-V compound semiconductor that is a combination of a total of 2 to 6 elements selected from the group III elements (Al, Ga, In) and the group V elements (P, As, Sb). For example, when the well layer 35W is InGaAs, the barrier layer 35B can be InAsP. It may also be InGaAlAs or InGaAsP.

[0083] The central emission wavelength can also be adjusted by adjusting the composition difference between the well layer 35W and the barrier layer 35B to impart strain to the well layer 35W.

[0084] The barrier layer 35B is preferably a layer that is lattice-matched with the pseudo substrate layer 14. For example, when the pseudo substrate layer 14 is an n-type InAsP layer, the barrier layer 35B is preferably an InAsP layer. In this case, the p-type layer 37 is more preferably a p-type InAsP layer. In addition, the lattice constant (a b ) is the lattice constant (a p ) so that it is subjected to tensile stress with respect to the pseudo substrate layer 14.

[0085] The lattice constant of the well layer 35W (a w ) is the lattice constant (a p ) is preferable. This applies a compressive strain to the well layer 35W. Applying a compressive strain to the well layer 35W is preferable because it improves the luminous efficiency more than applying a tensile strain.

[0086] The total thickness of the semiconductor laminate including the active layer 30 is not particularly limited and may be, for example, 2 to 15 μm. The thickness of the active layer 30 is also not particularly limited and may be, for example, 100 to 1000 nm.

[0087] The active layer 30 has an MQW structure, the well layers 35W may be 3-15 nm thick, the barrier layers 35B may be 5-15 nm thick, and the number of pairs of the well layers 35W and the barrier layers 35B may be 3-50.

[0088] After providing a semiconductor laminate including the active layer 30 on the pseudo substrate layer 14, the surface of the laminate preferably has an SORI value of less than 30 μm, more preferably less than 24 μm. This enables bonding to a support substrate and reduces defects such as poor bonding and cracks. The SORI value is the value when the initial growth substrate has a diameter of 3 inches. Here, the SORI value is the SORI (μm) specified in SEMI M1-0302, and is the difference between the maximum and minimum values ​​of all measurement point data in non-adsorption when measurement is performed in a non-forced state. As shown in Figure 5, if the reference plane is a virtual plane obtained by the least squares method, the SORI value is expressed as the sum of the absolute values ​​of maximum value A and minimum value B.

[0089] After providing a semiconductor laminate including an active layer 30 on the pseudo substrate layer 14, the surface of the laminate preferably has a BOW value of less than 40 μm, more preferably less than 30 μm. This enables bonding to a support substrate, and reduces defects such as poor bonding and cracks. The BOW value is the value when the initial growth substrate has a diameter of 3 inches. Here, the BOW value is the maximum absolute value of the measurement value at the center of the workpiece (measurement surface) without adsorption, with the opposite sign to the measurement values ​​other than the center, and the sum of the absolute values ​​is given the sign of the center measurement value, as shown in Fig. 6.

[0090] The thickness of the p-type layer 37 is not particularly limited, but is preferably 100 to 9000 nm, and more preferably 400 to 4000 nm.

[0091] A spacer layer may be provided between the active layer 30 and the pseudo substrate layer 14 or between the active layer 30 and the p-type layer 37. By providing the spacer layer, it is possible to prevent diffusion of the dopant. The thickness of the spacer layer is not particularly limited and may be, for example, 50 to 400 nm. When the pseudo substrate layer 14 is an n-type InAsP layer and the p-type layer is a p-type InAsP layer, the spacer layer may be, for example, an i-type InAsP layer, which is preferably lattice-matched to the pseudo substrate layer.

[0092] The p-type layer 37 may have a p-type contact layer. The thickness of the p-type contact layer is not particularly limited and may be, for example, 50 to 400 nm.

[0093] Each layer of the semiconductor laminate including the active layer 30 can be formed by epitaxial growth. The above description can be applied to the epitaxial growth. These laminate formation steps are an example in this embodiment, and the manufacturing method of the optical semiconductor element of the present invention is not limited to such an embodiment.

[0094] (Support board bonding process) Next, a support substrate 16 is bonded via a reflective layer onto the semiconductor laminate including the active layer 30 of the epitaxial growth substrate 1. When parts of the etching stop layer are left as island-shaped contact layers on the semiconductor laminate including the active layer 30, the support substrate 16 is bonded onto them via a reflective layer 17.

[0095] Except in the case where the reflective layer 17 has a transparent electrode such as ITO and also functions as an intermediate electrode, an island-shaped intermediate electrode portion 38 and a dielectric layer 39 surrounding the intermediate electrode portion 38 in the horizontal direction can be provided between the semiconductor laminate including the active layer 30 and the reflective layer 17. In FIG. 3C, the epitaxial growth substrate 1 comprises a p-type layer 37 on a semiconductor laminate including an active layer 30, and comprises an island-shaped intermediate electrode portion 38 on the p-type layer 37 and a dielectric layer 39 surrounding the intermediate electrode portion 38 in the horizontal direction, with a reflective layer 17 formed thereon.

[0096] The reflective layer 17 is a layer that reflects light emitted from a semiconductor laminate including the active layer 30. The reflective layer 17 is not particularly limited, but it is preferable to use a metal reflective layer. Metals used for the metal reflective layer include Au, Pt, Ti, Ag, etc., and Au is particularly preferable. The thickness of the reflective layer 17 is not particularly limited, and can be, for example, 400 to 2000 nm. The method for forming the reflective layer 17 is not particularly limited, and examples thereof include a vapor deposition method and a sputtering method.

[0097] The support substrate 16 is not particularly limited as long as it is a substrate of a different type from the initial growth substrate 11 in the epitaxial growth substrate 1, and examples of the support substrate 16 include a submount substrate using a semiconductor substrate such as Si or Ge, a metal substrate such as Mo or Cu-W, or a ceramic substrate such as AlN. The thickness of the support substrate 16 can be 100 μm or more and 500 μm or less.

[0098] A metal bonding layer 18 may be provided on one surface of the support substrate 16. The support substrate 16 provided with the metal bonding layer 18 can be aligned via the reflective layer 17 on the semiconductor laminate including the active layer 30 of the epitaxial growth substrate 1 to ensure reliable bonding. In this case, the metal reflective layer and the metal bonding layer can be placed opposite each other and bonded together to perform thermal compression bonding. The above support substrate bonding step is an example of this embodiment, and the method for manufacturing an optical semiconductor element of the present invention is not limited to this embodiment.

[0099] (Initial growth substrate removal process) Next, as shown in Fig. 3D, the initial growth substrate 11 is removed. For example, when the initial growth substrate 11 is an InP growth substrate, it can be removed by wet etching using hydrochloric acid. Since the epitaxial growth substrate 1 has an etching stop layer 12, etching can be terminated at the etching stop layer 12. The hydrochloric acid preferably has a concentration of 0.1 to 36%, and other chemicals may be mixed in the range that does not affect the etching selectivity.

[0100] The etching stop layer 12 can be removed by wet etching using an etching solution that corresponds to the component composition of the etching stop layer 12. For example, when the etching stop layer 12 is an n-type InGaAs layer, it can be removed using, for example, a sulfuric acid-hydrogen peroxide based etching solution.

[0101] 4 shows an example of an optical semiconductor element in which a part of the etching stop layer 12 of the epitaxial growth substrate 1 is left and used as a contact layer 12 for the upper electrode 40 of the optical semiconductor element. The etching stop layer 12 may be completely removed.

[0102] Furthermore, as shown in FIG. 4, a roughening treatment may be performed to provide irregularities on the light extraction surface of window layer 15 of the optical semiconductor element.

[0103] In this manner, an optical semiconductor element can be obtained. As shown in Fig. 4, an upper electrode 40 can be formed on the contact layer 12 of the optical semiconductor element, and a back electrode 50 can be formed on the back surface of the support substrate 16. The method for forming the upper electrode 40 and the back electrode 50 is not particularly limited, and for example, a sputtering method, a vapor deposition method, a resistance heating method, or the like can be used.

[0104] In the method for manufacturing an optical semiconductor device of the present invention, a buffer is formed in the epitaxial growth substrate used in the manufacturing so that the pseudo-substrate layer is in a relaxed state, and thus the amount of warping of the initial growth substrate is reduced. Therefore, when bonding the support substrate to the epitaxial growth substrate or removing the initial growth substrate after bonding, the occurrence of cracks in the laminate is suppressed. The above-mentioned initial growth substrate removal process is an example of this embodiment, and the method for manufacturing an optical semiconductor device of the present invention is not limited to such an embodiment.

[0105] <Optical semiconductor element> The optical semiconductor element of the present invention will be described below with reference to FIGS. 4 and 7, but the optical semiconductor element of the present invention is not limited thereto. Here, Fig. 7 is a schematic diagram of the semiconductor laminate and the buffer laminate in the example of the semiconductor light-emitting device of the present invention shown in Fig. 4. This schematic diagram illustrates the change in lattice constant with respect to the semiconductor layers, and the horizontal width of each semiconductor layer relatively represents the magnitude of the lattice constant.

[0106] The optical semiconductor device 2 shown in Fig. 4 includes a support substrate 16, a metal bonding layer 18, a reflective layer 17, an intermediate electrode portion 38, a dielectric layer 39, a p-type layer 37, an active layer 30, a pseudo substrate layer 14, N buffer layers 13, a window layer 15, and a contact layer 12, in this order. For each component, the same description of the components with the same reference numbers in the description of the epitaxial growth substrate and the manufacturing method thereof applies. In addition, the same description of the epitaxial growth substrate and the manufacturing method thereof applies to components not shown in the figure.

[0107] The window layer 15 of the optical semiconductor element 2 and the initial growth substrate 11 of the epitaxial growth substrate 1 are lattice-matched and have the same lattice constant, and therefore the relationship between the optical semiconductor element and other components is similar to the relationship between the initial growth substrate 11 and other components in the epitaxial growth substrate 1.

[0108] The lattice constants of the pseudo substrate layer 14 and the window layer 15 are a p and a t In this case, (a p -a t ) / a t The degree of mismatch X between the pseudo substrate layer 14 and the window layer 15, represented by x100 p·t In order to increase the wavelength range that can be designed in the semiconductor laminate to be formed, the ratio is preferably 1.0% or more. The N buffer layers 13 are characterized in that they include three or more buffer layers having misfit dislocations on the window layer 15 side of the buffer layer.

[0109] The lattice constant of the n-th buffer layer counting from the buffer layer located closest to the window layer 15 is a n , the lattice constant of the n+1th buffer layer is an+1 When this is set, the following formula (1) is satisfied. a n n+1 (1) Fulfilling In the above formula, n is 1 to N-1, and n+1 is a natural number from 2 to N. When n is 1, the lattice constant a1 is a t Greater than. When n+1 is N, a n+1 The corresponding lattice constant a N is the lattice constant a of the pseudo-substrate layer p Less than.

[0110] In order to form misfit dislocations while preventing threading dislocations, the degree of mismatch of the lattice constant of each of the N buffer layers with respect to the layer (lower layer) adjacent to the window layer 15 side is set to a mismatch degree X p·t It is also preferable to set the inconsistency X to be equal to or less than the value divided by N. p·t It is more preferable to set it so that it is equal to or greater than the value obtained by dividing by 4 N. For example, it is preferable that the mismatch of each buffer layer with respect to the layer below be within a range of 0.15% to 0.35%.

[0111] In the optical semiconductor element of the present invention, by having the buffer stack as described above, the refractive index can be gradually decreased from the pseudo substrate layer toward the window layer. The refractive index changes depending on the composition ratio of each layer in the N buffer layers 13. Therefore, by using a semiconductor (e.g., InAsP) for the N buffer layers 13, which has a large refractive index on the pseudo substrate layer side and a smallest refractive index on the window layer, which is the light extraction side, the refractive index can be decreased toward the light extraction side, thereby improving the light extraction efficiency.

[0112] As the constituent material of the optical semiconductor element, a compound semiconductor that satisfies the above-mentioned conditions may be selected. One example of such a configuration may be one in which the window layer is InP, the buffer stack is a stack of InAsP layers, and the pseudo-substrate layer is an InAsP layer.

[0113] ​In the optical semiconductor device of the present invention, the active layer 30 has a multiple quantum well (MQW) structure in which well layers 35W and barrier layers 35B are alternately stacked. The lattice constant of the well layer 35W is a w In this case, a w is the lattice constant a of the window layer 15 t It is preferable that the lattice constant a of the well layer 35W is larger than that of the semiconductor stack and the buffer stack. w It is preferable that the photoluminescence (output) is increased.

[0114] Furthermore, the mismatch degree X of the well layer with respect to the pseudo-substrate layer w·p However, it is preferable that the content of the luminescence component is 0.1% or more and less than 1.2%, and more preferable that the content of the luminescence component is 1.1% or less. By keeping the content within this range, the effect of improving the photoluminescence (output) can be increased.

[0115] Moreover, by doing as described above, compressive strain is applied to the well layer 35 W. Applying compressive strain to the well layer 35 W improves photoluminescence (output) and light emission efficiency more than applying tensile strain.

[0116] Furthermore, the mismatch degree X of the well layer with respect to the pseudo-substrate layer w·p and the thickness of the well layer and the mismatch degree X of the barrier layer with respect to the pseudo-substrate layer. b·p and each value of the barrier layer thickness are used to calculate the following equation (3): (X w·p ×Well thickness +X b·p × barrier layer thickness) / (well layer thickness + barrier layer thickness) The average thickness mismatch of the well layer and the barrier layer combined with the pseudo substrate layer, calculated by the above formula, is preferably in the range of -0.09% to 0.46%, and more preferably in the range of -0.02% to 0.36%. By making the well layer receive a compressive stress from the pseudo substrate layer and making the barrier layer receive a tensile stress from the pseudo substrate layer, the stresses are partially offset, and the average thickness mismatch is adjusted to be within the range, thereby making it possible to increase the effect of improving photoluminescence (output). EXAMPLES

[0117] The present invention will be described in more detail below using examples, but the present invention is not limited to the following examples.

[0118] [First test] <Example 1> (Manufacture of epitaxial growth substrate 1) On the (100) surface of a Si-doped n-type InP substrate (3 inches, substrate thickness: 625 μm, lattice constant: 0.5869 nm), a Si-InP layer (initial growth layer), a Si-In 0.532 Ga 0.468 An As layer (etching stop layer) and a Si-InP layer (n-type window layer for roughening) were formed in this order by MOCVD to the thicknesses shown in Table 2. The composition of the etching stop layer is lattice-matched with InP.

[0119] Next, the Si-InAsP layer was grown by MOCVD using trimethylindium (TMIn) as an In source, arsine (AsH3) as an As source, and phosphine (PH3) as a P source as source gases while changing the amount of P relative to the total of As and P contained in the source gases (P vapor phase ratio) until the film thickness reached the thickness shown in Table 2, thereby forming buffer layers 1-1 to 1-7 and a pseudo substrate layer. Each of the buffer layers is composed of two buffer constituent layers (buffer constituent layers A1 to A7 and buffer constituent layers B1 to B7).

[0120] Each buffer layer and the pseudo-substrate layer are made of InAs. y P 1-y The As solid phase ratio y was determined by SIMS analysis after the buffer laminate was formed, and the lattice constant a was calculated from the As solid phase ratio. The film thickness was confirmed by TEM.

[0121] For the obtained epitaxial growth substrate 1, the refractive indexes of the buffer layers 1-1 to 1-7 were calculated based on Corona's "III-V Group Semiconductor Mixed Crystals" p. 88 (2.108). n·gThe mismatch degree with respect to the lower layer on the initial growth substrate side was calculated, and is shown in Table 2.

[0122] [Table 2]

[0123] The obtained epitaxial growth substrate 1 was subjected to XRD measurement, and the vertical lattice constant q calculated by reciprocal lattice mapping measurement (RSM) was z , the horizontal lattice constant q x It was confirmed that the pseudo-substrate layer was in a relaxed state. z , q x The results are shown in Table 6.

[0124] In addition, a cross section in the thickness direction of the obtained epitaxial growth substrate 1 was exposed, and the cross section was observed with a transmission electron microscope (TEM) (magnification 60k times, field of view 4.5 μm × 4.5 μm). FIG. 8 shows a photographed image of the cross section. In this figure, black lines indicating misfit dislocations were confirmed at the portion in contact with other layers having different lattice constants on the initial growth substrate side of the buffer layer 1-1, the initial growth substrate side of the buffer layer 1-2, the initial growth substrate side of the buffer layer 1-4, the initial growth substrate side of the buffer layer 1-5, the initial growth substrate side of the buffer layer 1-6, and the initial growth substrate side of the buffer layer 1-7, which are the interfaces between the roughening n-type window layer and the buffer layer 1-1. On the other hand, no dislocations penetrating the buffer layer were confirmed. Note that, within the field of view of FIG. 8, no black lines indicating misfit dislocations were confirmed on the initial growth substrate side of the buffer layer 1-3.

[0125] Furthermore, the surface of the pseudo substrate layer of the epitaxial growth substrate 1 was photographed with a metallurgical microscope (magnification 5x, field of view 3mm x 3mm). Figure 9 shows the photographed image as seen from above. In this image, a lattice pattern due to misfit dislocations was confirmed.

[0126] (Photoluminescence (PL) measurement and support substrate bonding test by manufacturing semiconductor laminate 1, and manufacturing of optical semiconductor element) First, in order to investigate what kind of epitaxial growth substrate is preferable, a semiconductor laminate 1 was formed on the epitaxial growth substrate 1, and evaluation was performed by PL measurement and SORI and support substrate bonding test. Table 3 shows an example of such a semiconductor laminate 1 formed on the epitaxial growth substrate 1 shown in Table 2.

[0127] [Table 3]

[0128] Then, a photoluminescence measuring device (RPM Blue manufactured by Onto Innovation) was used to measure the intensity and wavelength of the excited light by irradiating it with a laser beam with a wavelength of 980 nm and an output of 100 mW. In addition, the SORI (μm) specified in SEMI M1-0302 was determined. After that, an Au reflective layer was formed on the entire surface by sputtering, and an Au layer was formed on the upper surface of the support substrate as a metal bonding layer by sputtering in advance, and a test was also performed to see whether the support substrate could be bonded by Au-Au bonding by heating at 315°C and applying pressure. The results are shown in Table 6. The evaluation of the support substrate bonding process in Table 6 is as follows. A: The rate at which bonding can be performed without cracking is 90% or more (almost 100%). B: In some cases, bonding can be achieved without cracks, but this rate is less than 90%. C: Cannot be joined without cracking

[0129] (Manufacture of optical semiconductor element 1) Next, a test was performed to obtain an optical semiconductor element 1 through a manufacturing method for an optical semiconductor element. Table 3 also shows an example of a semiconductor laminate 1 for forming an optical semiconductor element 1 on an epitaxial growth substrate shown in Table 2. Table 3 also shows the state after the initial growth substrate removal step, with the bottom of the table being the light extraction direction.

[0130] Specifically, after forming the semiconductor laminate shown in Table 3, an intermediate electrode layer (AuZn) was formed by sputtering on the p-type second contact layer shown in Table 3, and a pattern was formed by photolithography to form an intermediate electrode part consisting of an island-shaped p-type second contact layer and an intermediate electrode layer. Furthermore, after the pattern was formed by photolithography, a dielectric layer made of SiO2 was formed by plasma CVD, and only the dielectric layer at the position covering the intermediate electrode part was removed, and an Au reflective layer was formed on the entire surface thereof by sputtering. An Au layer was formed in advance as a metal bonding layer on the upper surface of the support substrate by sputtering, and the support substrate was bonded by Au-Au bonding by heating at 315°C and applying pressure. Thereafter, the initial growth substrate was etched away using a hydrochloric acid-based etching solution, and then the etching stop layer other than the region where the upper electrode was to be formed was removed using a pattern formed by photolithography and a phosphoric acid-hydrogen peroxide-based etching solution, and the remaining island-shaped etching stop layer was used as a contact layer to form an upper electrode (AuGe) on the contact layer. The buffer laminate and the semiconductor laminate were etched along the planned cutting lines to form a mesa shape, and then the support substrate was cut to obtain the optical semiconductor element 1 of Example 1.

[0131] When the epitaxial growth substrate 1 in Example 1 was used, no bonding failure or cracks occurred in the support substrate bonding step, and no cracks occurred in the subsequent step of removing the initial growth substrate.

[0132] The lattice constant a of the window layer of the obtained optical semiconductor element 1 t is 0.5869 nm, and the lattice constant a w was 0.5977 nm.

[0133] <Example 2> In Example 1, N=7 buffer layers consisting of single-layer buffer layers 2-1 to 2-7 were used instead of N=7 buffer layers consisting of buffer layers 1-1 to 1-7, and the pseudo substrate layer was formed under the conditions shown in Table 4. In the same manner as in Example 1, except that, an epitaxial growth substrate 2 was produced, and a semiconductor laminate 1 was formed on the epitaxial growth substrate, and PL measurement and an evaluation of SORI and support substrate bonding test were performed. The results are shown in Table 6.

[0134] In Table 6, the PL excitation light intensity in Example 1 is set to 1.00, and the excitation light intensities of the other Examples and Comparative Examples are shown as relative values ​​to Example 1.

[0135] The buffer layers 2-1 to 2-7 were grown by MOCVD using the In source, P source, and As source described in Example 1, with the P vapor ratio set to the value shown in Table 4, until the thicknesses shown in Table 4 were reached.

[0136] Vertical lattice constant q calculated by reciprocal lattice mapping measurement (RSM) z , the horizontal lattice constant q x It was confirmed that the pseudo-substrate layer was in a relaxed state. In cross-sectional TEM observation, black lines indicating misfit dislocations were confirmed between the roughening n-type window layer and buffer layer 2-1, and between each buffer layer. In other words, black lines indicating misfit dislocations were confirmed in the portions of each of the N=7 buffer layers that contacted other layers with different lattice constants on the initial growth substrate side. On the other hand, no dislocations penetrating the buffer layers were confirmed. In this example, the SORI was larger than in Example 1, but the support substrate was well bonded and the occurrence of cracks in the laminate was suppressed, so that the subsequent production of optical semiconductor elements was also possible.

[0137] [Table 4]

[0138] <Example 3> In Example 1, the buffer consisting of buffer layers 3-1 to 3-4, which are single layers, was used instead of the buffer consisting of buffer layers 1-1 to 1-7, and the pseudo substrate layer was formed under the conditions shown in Table 5. In addition, the epitaxial growth substrate 3 was produced in the same manner as in Example 1, and the semiconductor laminate 1 was formed on the epitaxial growth substrate, and PL measurement and evaluation of SORI and support substrate bonding tests were performed. The results are shown in Table 6.

[0139] Buffer layers 3-1 to 3-4 were grown by MOCVD using the In source, P source, and As source described in Example 1, with the P vapor ratio set to the value shown in Table 5, until the film thicknesses shown in Table 5 were reached.

[0140] Vertical lattice constant q calculated by reciprocal lattice mapping measurement (RSM) z , the horizontal lattice constant q x It was confirmed that the pseudo-substrate layer was in a relaxed state. In cross-sectional TEM observation, black lines indicating misfit dislocations were confirmed between the roughening n-type window layer and buffer layer 3-1, and between each buffer layer. In other words, black lines indicating misfit dislocations were confirmed in the portions where the N=4 buffer layers contacted other layers with different lattice constants on the initial growth substrate side. In this example, the SORI was larger than in Example 1, but the support substrate was well bonded and the occurrence of cracks in the laminate was suppressed. Therefore, the subsequent production of optical semiconductor elements was also It was possible to do so.

[0141] [Table 5]

[0142] <Comparative Example 1> An epitaxial growth substrate 1' was obtained in the same manner as in Example 1, except that N buffer layers were not formed. Since cracks were visually observed in the pseudo-substrate layer, reciprocal lattice mapping measurement and cross-sectional observation with a TEM were not performed. A semiconductor laminate 1 was formed on the epitaxial growth substrate and evaluated. In this example, the SORI was too large to measure, and bonding of the support substrate was impossible. In addition, cracks were observed in the semiconductor laminate 1, and PL was non-luminous, so the manufacture of an optical semiconductor element was not performed. The results are shown in Table 6.

[0143] <Comparative Example 2> In Example 2, instead of the buffer consisting of buffer layers 2-1 to 2-7, a source gas was supplied so that the P vapor phase ratio changed continuously from the initial growth substrate side toward the pseudo substrate layer side to form a buffer with a film thickness of 1645 nm, and the pseudo substrate layer was formed under the same conditions as in Table 4. Except for this, an epitaxial growth substrate 2' was obtained in the same manner as in Example 2. A semiconductor laminate 1 was formed on the epitaxial growth substrate, and PL measurement and SORI and support substrate bonding test evaluation were performed in the same manner as in Example 2. The results are shown in Table 6.

[0144] Vertical lattice constant q calculated by reciprocal lattice mapping measurement (RSM) z , the horizontal lattice constant q x was obtained, and the lattice constant difference was larger than in Examples 1 to 3. In cross-sectional TEM observation, no black lines indicating misfit dislocations were observed, since there were no layer boundaries. On the other hand, dislocations penetrating the entire buffer were observed. In this example, the SORI was significantly increased compared to Example 1, and bonding failures were observed in about half of the bonding of the support substrate. Therefore, the manufacture of an optical semiconductor element was not carried out.

[0145] [Table 6]

[0146] [Second Test] In the first test described above, in order to find a substrate for epitaxial growth that allows bonding to a support substrate or removal of the substrate, the composition ratio of the pseudo substrate was fixed and the N buffer layers were changed. In the second test below, the epitaxial growth substrate of Example 1 was used as a reference, and the semiconductor laminate 2 shown in Table 7 was grown on the epitaxial growth substrate to measure the PL intensity, and the number of N and the composition ratio of the pseudo substrate were changed to investigate the relationship between the pseudo substrate and the well layer in the semiconductor laminate. Table 8 shows an example of how to change the number of N and the composition ratio of the pseudo substrate, and Table 9 shows the results of an investigation into the influence of the degree of mismatch due to the difference in lattice constant between the pseudo substrate and the well layer and the change in the type of stress received by the well layer on the SORI, BOW, and PL intensity. When N=3 or N=9, which are not shown in Table 8, the number of N and the composition ratio of the pseudo substrate were changed according to the method of changing the number of N and the composition ratio of the pseudo substrate shown in Table 8.

[0147] [Table 7]

[0148] [Table 8]

[0149] [Table 9]

[0150] Table 9 shows two types of test results, one for when the design wavelength of the well layer is 2100 nm and the other for when the design wavelength is 2300 nm. In both types of tests, the PL excitation light intensity when N=7 is set to 1.00, and the excitation light intensity when the other N numbers are shown as relative values. Table 9 shows that the SORI of the epitaxial growth substrate after the formation of the semiconductor laminate 2 is small in both cases, and the support substrate bonding process was rated A (the rate at which bonding can be performed without cracking is 90% or more (almost 100%)), but the PL intensity is small when the well layer is subjected to tensile stress. In addition, from the magnitude of the PL intensity, it is preferable for the well layer to be subjected to compressive stress, and further, the mismatch X of the well layer with respect to the pseudo substrate layer is small. w·p It was found that the content is preferably 0.1% or more and less than 1.2%, and more preferably 1.1% or less.

[0151] [Third Test] Next, the epitaxial growth substrate of Example 1 was used, and the semiconductor laminate 2 shown in Table 7 was investigated in the same manner as in the second test, except that the composition of the well layer was changed to change the design wavelength, and the As solid phase ratio and lattice constant of the barrier layer were changed to change the stress between the well layer and the barrier layer. In the semiconductor laminate 2 of Table 7, the barrier layer had the same composition as the pseudo substrate layer. In the third test, the composition of the well layer was changed according to the wavelength on the pseudo substrate layer shown in Table 7 where N=7, and a quantum well structure of 10.5 pairs was formed while changing the As solid phase ratio y of the barrier layer as shown in Table 10, and a p-type layer similar to that in Table 7 was formed thereon to form semiconductor laminates with wavelengths of 2450 nm, 2600 nm, and 2700 nm. At a wavelength of 2450 nm, the composition of the well layer was In. 0.90 Ga 0.10 At 2600 nm, the well layer composition is In. 0.92 Ga 0.08 At 2700 nm, the well layer composition is In. 0.94 Ga 0.06 Table 10 shows the results of measuring the PL intensity, SORI, and BOW to confirm the bondability with the support substrate, together with the lattice constants of the well and barrier layers formed and the degree of mismatch of these layers with the pseudo-substrate layer. The well layer thickness is 10 nm, and the barrier layer thickness is 10 nm.

[0152] [Table 10]

[0153] As shown in Table 10, the relative intensity of the PL intensity when there is no difference in lattice constant between the barrier layer and the pseudo-substrate layer (when the composition is the same) is taken as 1, and the mismatch degree X of the well layer with respect to the pseudo-substrate layer is w·p and the thickness of the well layer and the mismatch degree X of the barrier layer with respect to the pseudo-substrate layer. b·p and the barrier layer thicknesses are used to calculate the following equation (3): (X w·p ×Well thickness +X b·p × barrier layer thickness) / (well layer thickness + barrier layer thickness) It was found that the mismatch value of the average thickness of the well layer and the barrier layer with respect to the pseudo substrate layer, calculated by the following formula, is preferably in the range of -0.09% to 0.46%, and more preferably in the range of -0.02% to 0.36%. This is because, as shown in the results of Table 9, the mismatch value X w·p It is believed that by setting the lattice constant of the barrier layer to a value between 0.1% and 1.2% (compressive stress) and subjecting it to a tensile stress to offset the compressive stress applied to the well layer, the crystallinity within the quantum well structure was improved, resulting in a large PL intensity. FIG. 10 shows the change in PL intensity (relative intensity) versus the mismatch degree over the average thickness of the well and barrier layers combined. [Explanation of symbols]

[0154] 1. Substrate for epitaxial growth 2. Optical semiconductor elements 11 Initial growth substrate 12 Etching stop layer (contact layer) 13 N buffer layers 14 Pseudo substrate layer 15 Another layer (window layer) 16 Support substrate 17 Reflective layer 18 Metal bonding layer 30 Active layer 35B Barrier layer 35W well layer 37 p-type layer 38 Intermediate electrode section 39 Dielectric Layer 40 Upper electrode 50 Back electrode

Claims

1. An initial growth substrate; an etching stop layer on the initial growth substrate; a buffer stack on the etch stop layer; A substrate for epitaxial growth, comprising: the buffer stack includes N buffer layers each having a different lattice constant, and a pseudo substrate layer having a thickness of 300 nm or more on the N buffer layers; The lattice constant of the initial growth substrate is a ｇ , the lattice constant of the pseudo substrate layer is a ｐ In this case, the mismatch degree X of the pseudo substrate layer with respect to the initial growth substrate is ｐ・ｇ is 0.7% or more, The N is a natural number between 3 and 9, The buffer layer has three or more buffer layers having misfit dislocations on the initial growth substrate side. Substrate for epitaxial growth.

2. The lattice constant in the vertical direction of the pseudo substrate layer calculated from the reciprocal space map is defined as q ｚ , the horizontal lattice constant is q ｘ In this case, the following formula (2): -0.0002≦q ｚ -q ｘ ≦0.0011 (2) 2. The substrate for epitaxial growth according to claim 1, which satisfies the above.

3. 2. The substrate for epitaxial growth according to claim 1, wherein a lattice-like pattern is observed in a top view of the surface of the pseudo substrate layer photographed with a metallurgical microscope.

4. The lattice constant of the n-th buffer layer counting from the buffer layer located closest to the initial growth substrate is a ｎ The lattice constant of the (n+1)th buffer layer is a ｎ＋１ In this case, the following formula (1): a ｎ <a ｎ＋１ (1) Fulfilling In the above formula, n is 1 to N-1, Lattice constant a when n is 1 １ is the above-mentioned a ｇ Bigger, Lattice constant a when n+1 is N Ｎ is the above-mentioned a ｐ Smaller, The degree of mismatch of each of the N buffer layers with respect to the layer adjacent to the initial growth substrate side is defined as the mismatch degree X ｐ・ｇ 2. The substrate for epitaxial growth according to claim 1, wherein the value of is equal to or less than the value obtained by dividing by N.

5. 2. The substrate for epitaxial growth according to claim 1, wherein each of said buffer layers is composed of a single layer or a plurality of buffer constituent layers, and each of said buffer layers has a thickness of 150 nm or more.

6. At least one buffer layer is composed of a plurality of buffer constituent layers; The buffer layer A located closest to the pseudo substrate layer in the buffer layer is thicker than the buffer layer B located closest to the initial growth substrate in the buffer layer; 5. The substrate for epitaxial growth according to claim 4, wherein the lattice constant of the buffer layer in formula (1) is that of the buffer layer A.

7. 7. The substrate for epitaxial growth according to claim 6, wherein the thickness of said buffer constituent layer A is 100 nm or more, and the thickness of said buffer constituent layer B is half or less of the thickness of said buffer constituent layer A.

8. 2. The epitaxial growth substrate according to claim 1, wherein said initial growth substrate is an InP substrate, and said etching stop layer is an InGaAs layer.

9. 2. The epitaxial growth substrate according to claim 1, wherein the initial growth substrate is an InP substrate, the buffer stack is a stack of a plurality of InAsP layers, and the buffer stack further includes an InP window layer in contact with the etching stop layer.

10. On the pseudo substrate layer of the epitaxial growth substrate according to any one of claims 1 to 9, forming a semiconductor laminate including an active layer; Bonding a support substrate onto the semiconductor laminate via a reflective layer; and A method for manufacturing an optical semiconductor device, comprising the step of removing the initial growth substrate from the epitaxial growth substrate.

11. The method for manufacturing an optical semiconductor element according to claim 10 , wherein an SORI value of the front surface side of the semiconductor laminate on the pseudo substrate layer obtained by the step of forming the semiconductor laminate is less than 30 μm.

12. An optical semiconductor element including, in this order, a support substrate, a reflective layer, a semiconductor stack including an active layer, and a buffer stack, the buffer stack includes a pseudo substrate layer having a thickness of 300 nm or more, N buffer layers, and a window layer, in this order, the window layer being on the light extraction side; The lattice constants of the pseudo substrate layer and the window layer are respectively a ｐ and a ｔ In this case, the degree of mismatch X of the pseudo substrate layer with respect to the window layer is ｐ・ｔ is 0.7% or more, The N is a natural number between 3 and 9, The buffer layer has three or more buffer layers having misfit dislocations on the window layer side. Optical semiconductor element.

13. The lattice constant of the n-th buffer layer counting from the buffer layer located closest to the window layer is a ｎ The lattice constant of the (n+1)th buffer layer is a ｎ＋１ In this case, the following formula (1): a ｎ <a ｎ＋１ (1) Fulfilling In the above formula, n is 1 to N-1, Lattice constant a when n is 1 １ is the above-mentioned a ｔ Bigger, Lattice constant a when n+1 is N Ｎ is the above-mentioned a ｐ Smaller, The degree of mismatch of each of the N buffer layers with respect to the layer adjacent to the window layer side is defined as the mismatch degree X ｐ・ｔ The optical semiconductor device according to claim 12 , wherein the value is equal to or smaller than the value obtained by dividing by N.

14. The optical semiconductor device according to claim 12 , wherein the refractive index gradually decreases from the pseudo substrate layer to the window layer.

15. 13. The optical semiconductor device according to claim 12, wherein the window layer is InP, the buffer stack is a stack of a plurality of InAsP layers, and the pseudo substrate layer is an InAsP layer.

16. 13. The optical semiconductor device according to claim 12, wherein the central emission wavelength of the active layer in the semiconductor laminate is 2000 to 3000 nm.

17. The active layer has a quantum well structure, and the lattice constant of the well layer is a ｗ When The mismatch degree X of the well layer with respect to the pseudo substrate layer ｗ・ｐ The optical semiconductor element according to claim 12 , wherein the refractive index is equal to or greater than 0.1% and less than 1.2%.

18. In the lattice constants of the semiconductor laminate and the buffer laminate, the lattice constant a of the well layer of the active layer is ｗ The optical semiconductor element according to claim 17 , wherein

19. 13. The optical semiconductor device according to claim 12, wherein each of the buffer layers is composed of a single layer or a plurality of buffer constituent layers, and each of the buffer layers has a thickness of 150 nm or more.

20. At least one buffer layer is composed of a plurality of buffer constituent layers; The buffer layer A located closest to the pseudo substrate layer in the buffer layer is thicker than the buffer layer B located closest to the initial growth substrate in the buffer layer; 14. The optical semiconductor device according to claim 13, wherein the lattice constant of the buffer layer in formula (1) is that of the buffer layer A.

21. The lattice constant of the barrier layer of the active layer is a ｂ The mismatch of the barrier layer with respect to the pseudo-substrate layer is X ｂ・ｐ In this case, the mismatch degree X of the well layer with respect to the pseudo substrate layer is ｗ・ｐ and the mismatch degree X of the barrier layer with respect to the pseudo-substrate layer. ｂ・ｐ 18. The optical semiconductor device according to claim 17, wherein the average thickness mismatch between the well layer and the barrier layer, calculated from: is within a range of -0.09% to 0.46%.

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