Time synchronization error generating device and program

Abstract

To arbitrarily generate a time synchronization error between a master device and a slave device in a network that synchronizes time by PTP.SOLUTION: A setting unit 10 of a time synchronization error generation device 2-1 sets arbitrary retention times d1, d2, d3, d4 and time synchronization error Δt. A packet identification unit 12 identifies a Sync PTP packet received from the master side, and a delay unit 13 delays it by the time (d1-(dA+dB)). A residence time appending unit 15 appends a residence time D1 (=d1+Δt) to a correction area of the PTP packet. The packet identification unit 17 identifies the PTP packet of the Delay Request received from the slave side, and the delay unit 18 delays it by the time (d2-(dC+dD)). The residence time appending unit 20 appends the residence time D2 (=d2-Δt) to the correction area of the PTP packet.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a technique for performing time synchronization using PTP (Precision Time Protocol), and in particular to an apparatus and a program for generating a time synchronization error. [Background technology]

[0002] Conventionally, PTP is known as a standard for performing precise time synchronization on an IP (Internet Protocol) network (see, for example, Non-Patent Document 1). By performing time synchronization according to this PTP standard, it is possible to achieve precision on the order of nanoseconds.

[0003] For this reason, PTP can achieve accuracy more than 1,000 times higher than NTP (Network Time Protocol), which achieves accuracy on the order of milliseconds, and is therefore used by broadcasting stations in program production systems over IP networks.

[0004] 9 is a schematic diagram showing an example of the configuration of a program production system using IP. This program production system using IP is a system that transmits and receives video signals in accordance with the IP communication standard, and is configured with master device 201, slave devices 202-1, 202-2, 202-3, and network device 203.

[0005] The master device 201 is equipped with a master clock, and uses a Global Navigation Satellite System (GNSS) signal or a BB signal which is a reference synchronization signal of a broadcasting station, as a reference for the master clock.

[0006] Master device 201 generates a timestamp using the master clock, and transmits PTP packets including the timestamp to slave devices 202-1, 202-2, and 202-3 via network device 203. Master device 201 also receives PTP packets including the timestamp from slave devices 202-1, 202-2, and 202-3 via network device 203.

[0007] The slave devices 202-1, 202-2, and 202-3 are, for example, program production devices, and each includes a slave clock. The slave devices 202-1 and 202-2 are cameras, and the slave device 202-3 is a video switcher. The slave devices 202-1 and 202-2 transmit video signals to the slave device 202-3 via the network device 203, and the slave device 202-3 receives video signals from the slave devices 202-1 and 202-2 via the network device 203.

[0008] Slave devices 202-1, 202-2, and 202-3 receive a PTP packet including a time stamp from master device 201 via network device 203.

[0009] Furthermore, slave devices 202-1, 202-2, and 202-3 generate timestamps using the slave clocks, and transmit PTP packets including the timestamps to master device 201 via network device 203.

[0010] Slave devices 202-1, 202-2, and 202-3 adjust the slave clocks based on the timestamps included in the received PTP packets, the reception times of the PTP packets, and the like, to synchronize the time of the slave clocks with the time of the master clock.

[0011] As a result, by exchanging PTP packets including timestamps between master device 201 and slave devices 202-1, 202-2, and 202-3, the time of the slave clock can be adjusted to the time of the master clock, thereby achieving time synchronization.

[0012] Next, we will explain the mechanism of PTP time synchronization in the program production system using IP shown in Figure 9. There are two methods for transmitting and receiving PTP packets: the One Step method, which transmits and receives three types of PTP packets, and the Two Step method, which transmits and receives four types of PTP packets.

[0013] (PTP time synchronization mechanism / one-step method) First, the mechanism of time synchronization by PTP of the one-step method will be described. Fig. 10(1) is a diagram for explaining the sequence of time synchronization by PTP of the one-step method. The slave devices 202-1, 202-2, and 202-3 in Fig. 9 are collectively referred to as slave devices 202.

[0014] As mentioned above, the one-step method is a method for transmitting and receiving three types of PTP packets. The three types of PTP packets are a Sync PTP packet, a Delay Request PTP packet, and a Delay Response PTP packet, as shown in Fig. 10(1).

[0015] The master device 201 uses the master clock to identify time T1 at which to transmit a Sync PTP packet, generates a Sync PTP packet including time T1, and transmits the PTP packet to the slave device 202 via the network device 203.

[0016] The slave device 202 receives the Sync PTP packet including time T1 from the master device 201 via the network device 203, and identifies the time T2 at which the Sync PTP packet was received using the slave clock. The slave device 202 also extracts time T1 from the Sync PTP packet including time T1.

[0017] Then, the slave device 202 uses the slave clock to identify time T3 at which the Delay Request PTP packet is to be transmitted, and generates a Delay Request PTP packet including time T3. The slave device 202 transmits the PTP packet to the master device 201 via the network device 203.

[0018] Master device 201 receives a Delay Request PTP packet including time T3 from slave device 202 via network device 203, and uses the master clock to identify time T4 when the Delay Request PTP packet was received.

[0019] Then, the master device 201 generates a Delay Response PTP packet including time T4, and transmits this PTP packet to the slave device 202 via the network device 203.

[0020] The slave device 202 receives the Delay Response PTP packet including time T4 from the master device 201 via the network device 203, and extracts time T4 from the Delay Response PTP packet including time T4.

[0021] The slave device 202 calculates the one-way transmission delay and time offset using the following formulas, assuming that the transmission delay from the master side to the slave side and the transmission delay from the slave side to the master side are equal, using times T1, T2, T3, and T4. The slave device 202 adjusts the slave clock so that the time offset becomes 0. The time offset is the offset between the time of the slave clock and the time of the master clock. [Number 1] One-way transmission delay = {(T2-T1)+(T4-T3)} / 2 (1) [Number 2] Time difference = (T2-T1) - one-way transmission delay ={(T2-T1)-(T4-T3)} / 2 ···(2)

[0022] Here, time T1 is the time when the Sync PTP packet is transmitted by the master device 201, and time T2 is the time when the Sync PTP packet is received by the slave device 202. Time T3 is the time when the Delay Request PTP packet is transmitted by the slave device 202, and time T4 is the time when the Delay Request PTP packet is received by the master device 201.

[0023] In this way, by exchanging PTP packets including timestamps between the master device 201 and the slave device 202, the time offset is calculated and the slave clock is adjusted so that the time offset becomes 0. This allows the time of the slave clock to be synchronized with the time of the master clock, achieving time synchronization.

[0024] Figure 10(2) is a diagram explaining the sequence of time synchronization by PTP of the one-step method when there is a transmission delay fluctuation on an IP network. PTP has TC (Transparent Clock) as a mechanism to correct the transit time of the route of the IP network.

[0025] Using this TC mechanism, the residence time is added to the correction area of ​​the PTP packet by the network device 203. Here, adding the residence time to the correction area of ​​the PTP packet means that, assuming that there are multiple network devices 203, the residence time D1 is added to the residence time (accumulated value of residence time) already recorded in the correction area, and the new accumulated value of residence time, which is the addition result, is recorded in the correction area.

[0026] As a result, the slave device 202 can use the residence time when adjusting the slave clock to correct the effect of the residence time on the path on the IP network. In other words, if there is a transmission delay variation on the IP network, time synchronization that corresponds to this can be realized.

[0027] The master device 201 uses the master clock to identify time T1 at which to transmit a Sync PTP packet, generates a Sync PTP packet including time T1, and transmits the PTP packet to the network device 203.

[0028] The network device 203 receives the Sync PTP packet including the time T1 from the master device 201, and adds the residence time D1 to the correction area of ​​the Sync PTP packet. Here, the residence time D1 is the time from when the network device 203 receives the Sync PTP packet to when it transmits it, that is, the residence time of the Sync PTP packet in the network device 203.

[0029] The network device 203 transmits to the slave device 202 a Sync PTP packet including the time T1 and the residence time D1.

[0030] The slave device 202 receives the Sync PTP packet including the time T1 and the residence time D1 from the network device 203, and uses the slave clock to identify the time T2 at which the Sync PTP packet was received. The slave device 202 also extracts the time T1 from the Sync PTP packet, and extracts the residence time D1 from the correction area of ​​the Sync PTP packet.

[0031] Then, the slave device 202 uses the slave clock to identify time T3 at which the Delay Request PTP packet is to be transmitted, generates a Delay Request PTP packet including time T3, and transmits the PTP packet to the network device 203.

[0032] The network device 203 receives the Delay Request PTP packet including the time T3 from the slave device 202, and adds the residence time D2 to the correction area of ​​the Delay Request PTP packet. Here, the residence time D2 is the time from when the network device 203 receives the Delay Request PTP packet to when it transmits it, that is, the residence time of the Delay Request PTP packet in the network device 203.

[0033] Network device 203 transmits to master device 201 a Delay Request PTP packet including time T3 and residence time D2.

[0034] Master device 201 receives the Delay Request PTP packet including time T3 and residence time D2 from network device 203, and identifies time T4 at which the Delay Request PTP packet was received using the master clock. Master device 201 also extracts residence time D2 from the correction field of the Delay Request PTP packet.

[0035] Then, the master device 201 copies the residence time D2 to the correction field of the Delay Response PTP packet, and generates a Delay Response PTP packet including the time T4 and the residence time D2. The master device 201 transmits this PTP packet to the slave device 202 via the network device 203.

[0036] The slave device 202 receives the Delay Response PTP packet including time T4 and residence time D2 from the master device 201 via the network device 203. Then, the slave device 202 extracts the time T4 from the Delay Response PTP packet, and extracts the residence time D2 from the correction area of ​​the Delay Response PTP packet.

[0037] The slave device 202 calculates the one-way transmission delay and the time skew using the times T1, T2, T3, and T4 and the residence times D1 and D2, assuming that the transmission delay from the master side to the slave side and the transmission delay from the slave side to the master side are equal, and then adjusts the slave clock so that the time skew becomes zero. [Number 3] One-way transmission delay = {(T2-T1-D1) + (T4-T3-D2)} / 2 (3) [Number 4] Time difference = (T2-T1-D1) - one-way transmission delay ={(T2-T1-D1)-(T4-T3-D2)} / 2 ···(4)

[0038] As described above, the residence time D1 is the residence time of the Sync PTP packet in the network device 203, and the residence time D2 is the residence time of the Delay Request PTP packet in the network device 203.

[0039] In this way, by exchanging PTP packets including time stamps and residence times between the master device 201 and the slave device 202, the time offset is calculated and the slave clock is adjusted so that the time offset becomes 0. As a result, even if there is a transmission delay fluctuation on the IP network, the time of the slave clock can be adjusted to the time of the master clock, and time synchronization can be achieved.

[0040] (PTP time synchronization mechanism / two-step method) Next, the mechanism of time synchronization by the two-step PTP will be explained. Fig. 11(1) is a diagram for explaining the sequence of time synchronization by the two-step PTP.

[0041] As mentioned above, the two-step method is a method for transmitting and receiving four types of PTP packets. The four types of PTP packets are a Sync PTP packet, a Follow Up PTP packet, a Delay Request PTP packet, and a Delay Response PTP packet, as shown in Figure 11 (1). The four types of PTP packets in the two-step method are composed of the three types of PTP packets in the one-step method plus a Follow Up PTP packet.

[0042] When the master device 201 transmits a Sync PTP packet, it is technically difficult to record the transmission time, time T1, in the Sync PTP packet. Therefore, after transmitting the Sync PTP packet, the master device 201 records the transmission time, time T1, of the Sync PTP packet in the Follow Up PTP packet, and transmits the Follow Up PTP packet including time T1.

[0043] The master device 201 generates a Sync PTP packet and transmits the PTP packet to the slave device 202 via the network device 203, and uses the master clock to identify the time T1 at which the Sync PTP packet was transmitted. The master device 201 then generates a Follow Up PTP packet including the time T1, and transmits the PTP packet to the slave device 202 via the network device 203.

[0044] The slave device 202 receives the Sync PTP packet from the master device 201 via the network device 203, and uses the slave clock to identify the time T2 at which the Sync PTP packet was received.

[0045] The slave device 202 receives the Follow Up PTP packet including time T1 from the master device 201 via the network device 203, and extracts time T1 from the Follow Up PTP packet including time T1.

[0046] Then, the slave device 202 uses the slave clock to identify time T3 at which the Delay Request PTP packet is to be transmitted, and generates a Delay Request PTP packet including time T3. The slave device 202 transmits the PTP packet to the master device 201 via the network device 203.

[0047] Master device 201 receives a Delay Request PTP packet including time T3 from slave device 202 via network device 203, and uses the master clock to identify time T4 when the Delay Request PTP packet was received.

[0048] Then, the master device 201 generates a Delay Response PTP packet including time T4, and transmits this PTP packet to the slave device 202 via the network device 203.

[0049] The slave device 202 receives the Delay Response PTP packet including time T4 from the master device 201 via the network device 203, and extracts time T4 from the Delay Response PTP packet including time T4.

[0050] The slave device 202 calculates the one-way transmission delay and the time lag using the times T1, T2, T3, and T4 according to the formulas (1) and (2) assuming that the transmission delay from the master side to the slave side and the transmission delay from the slave side to the master side are equal. The slave device 202 adjusts the slave clock so that the time lag becomes zero.

[0051] This allows the time of the slave clock to be synchronized with the time of the master clock, as in the one-step method, and time synchronization can be achieved.

[0052] 11(2) is a diagram explaining the sequence of time synchronization by PTP of the two-step method when there is a transmission delay fluctuation on an IP network. As in the one-step method, the residence time is added to the correction area of ​​the PTP packet by the network device 203 using the above-mentioned TC mechanism.

[0053] The master device 201 generates a Sync PTP packet and transmits the PTP packet to the network device 203, and at the same time, identifies the time T1 at which the Sync PTP packet was transmitted, using the master clock. The master device 201 then generates a Follow Up PTP packet including the time T1, and transmits the PTP packet to the network device 203.

[0054] The network device 203 receives the Sync PTP packet from the master device 201 and sets the correction field of the Sync PTP packet to 0 (zero). The network device 203 then transmits the Sync PTP packet to the slave device 202.

[0055] The network device 203 receives the Follow Up PTP packet including the time T1 from the master device 201, and adds the residence time D1 to the correction area of ​​the Follow Up PTP packet. Here, the residence time D1 is the time from when the network device 203 receives the Follow Up PTP packet to when it transmits it, that is, the residence time of the Follow Up PTP packet in the network device 203.

[0056] The network device 203 transmits to the slave device 202 a Follow Up PTP packet including the time T1 and the residence time D1.

[0057] The slave device 202 receives the Sync PTP packet from the network device 203, and uses the slave clock to identify the time T2 at which the Sync PTP packet was received.

[0058] The slave device 202 receives a Follow Up PTP packet including time T1 and residence time D1 from the network device 203. Then, the slave device 202 extracts the time T1 from the Follow Up PTP packet and extracts the residence time D1 from the correction area of ​​the Follow Up PTP packet.

[0059] The slave device 202 uses the slave clock to identify time T3 at which the Delay Request PTP packet is to be transmitted, and generates a Delay Request PTP packet including time T3. The slave device 202 transmits the PTP packet to the network device 203.

[0060] The network device 203 receives the Delay Request PTP packet including the time T3 from the slave device 202, and adds the residence time D2 to the correction area of ​​the Delay Request PTP packet. Here, the residence time D2 is the time from when the network device 203 receives the Delay Request PTP packet to when it transmits it, that is, the residence time of the Delay Request PTP packet in the network device 203.

[0061] Then, network device 203 transmits to master device 201 a Delay Request PTP packet including time T3 and residence time D2.

[0062] Master device 201 receives the Delay Request PTP packet including time T3 and residence time D2 from network device 203, and identifies time T4 at which the Delay Request PTP packet was received using the master clock. Master device 201 also extracts residence time D2 from the correction field of the Delay Request PTP packet.

[0063] Then, the master device 201 copies the residence time D2 to the correction field of the Delay Response PTP packet, and generates a Delay Response PTP packet including the time T4 and the residence time D2. The master device 201 transmits this PTP packet to the slave device 202 via the network device 203.

[0064] The slave device 202 receives the Delay Response PTP packet including time T4 and residence time D2 from the master device 201 via the network device 203. Then, the slave device 202 extracts the time T4 from the Delay Response PTP packet, and extracts the residence time D2 from the correction area of ​​the Delay Response PTP packet.

[0065] The slave device 202 calculates the one-way transmission delay and the time lag using the times T1, T2, T3, and T4 and the residence times D1 and D2 according to the formulas (3) and (4) assuming that the transmission delay from the master side to the slave side and the transmission delay from the slave side to the master side are equal. Then, the slave device 202 adjusts the slave clock so that the time lag becomes zero.

[0066] As a result, just like the one-step method, even if there is a transmission delay fluctuation on the IP network, the time of the slave clock can be synchronized with the time of the master clock, thereby achieving time synchronization. [Prior art documents] [Non-patent literature]

[0067] [Non-Patent Document 1] IEEE Std, 1588-2008, “IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems”, (2008) Summary of the Invention [Problem to be solved by the invention]

[0068] However, in the program production system using IP shown in Fig. 9, which performs time synchronization by one-step or two-step PTP, there is a problem in that the allowable range of PTP time synchronization accuracy that allows the slave device 202, which is the program production device, to operate normally is unknown. In other words, the allowable time difference of the slave clock with respect to the master clock for the slave device 202 to operate normally is unknown.

[0069] According to the PTP profile for synchronization of audio and video equipment in a broadcasting environment (see the following non-patent document), the target value for the time synchronization accuracy of PTP in master clocks and slave clocks is specified to be 1 μs or less. [Non-patent literature] SMPTE ST 2059-2, “SMPTE Profile for Use of IEEE-1588 Precision Time Protocol in Professional Broadcast Applications”, (2015)

[0070] However, in the network environment of a program production system using IP as shown in Figure 9, the time synchronization accuracy may not be within 1 μs. For example, when a network device that does not support PTP is included in the IP network, such as a general Internet line, the residence time in the network device cannot be measured, and the above-mentioned TC, which is a mechanism for correcting the transit time of the path, cannot be applied.

[0071] The manufacturers of the slave devices 202, which are program production devices, guarantee that the slave devices 202 will operate normally if the time synchronization accuracy is 1 μs or less. Furthermore, the allowable error in the time synchronization accuracy of many slave devices 202 is not disclosed by the manufacturers, and has not been quantitatively verified.

[0072] In such a situation, it is desirable to arbitrarily generate a PTP time synchronization error in a slave clock with respect to a master clock. If the PTP time synchronization error can be arbitrarily generated, it is possible to grasp the allowable range of time synchronization error when the slave device 202 operates normally. In addition, when the PTP is interrupted and the slave clock runs independently, it is also possible to estimate the time during which the slave device 202 can operate normally. Furthermore, it is also possible to verify the allowable range of fluctuation when the transmission time of a PTP packet fluctuates.

[0073] The allowable range of time synchronization error, which is verified by arbitrarily generating PTP time synchronization error, the operating time when the slave clock is self-running, and the allowable range of transmission time fluctuations of PTP packets can be used as a reference for equipment selection and network design.

[0074] Although there are already network simulator devices that can arbitrarily vary the transmission delay of IP packets, there are no devices that can arbitrarily generate PTP time synchronization errors.

[0075] Therefore, the present invention has been made to solve the above-mentioned problems, and its object is to provide a time synchronization error generating device and program that can arbitrarily generate a time synchronization error between a master device and a slave device in a network that performs time synchronization using PTP. [Means for solving the problem]

[0076] In order to solve the above problem, the time synchronization error generating device of claim 1 includes a master device having a master clock and a slave clock, and according to a one-step PTP (Precision Time Protocol) for time synchronization, a residence time D1 included in a PTP packet of Sync transmitted from the master device, a time T1 at which the PTP packet of Sync is transmitted, a time T2 at which the PTP packet of Sync is received, a time T3 at which a PTP packet of Delay Request is transmitted, a residence time D2 included in a PTP packet of Delay Response transmitted from the master device, and a time T4 at which the PTP packet of Delay Response is received by the master device. A time synchronization error generating device in an IP network is configured with a slave device that performs the time synchronization to align the slave clock with the master clock based on a time T4 at which a PTP packet of Request is received, a network device that transmits IP data including the PTP packet between the master device and the slave device, and a time synchronization error generating device that transmits the IP data including the PTP packet between the master device and the slave device and generates the time synchronization error in the slave device, and the time synchronization error generating device is configured to generate the time synchronization error in the slave device, and the time synchronization error generating device is configured to generate the time synchronization error in the slave device based on a time T4 at which a PTP packet of Sync is received ...a setting unit that sets a residence time d2 when transmitting a PTP packet of Delay Request to the master device and sets the time synchronization error to be generated by the slave device as a time synchronization error Δt; a first packet identification unit that identifies the PTP packet of Sync transmitted from the master device; a first delay unit that delays the PTP packet of Sync identified by the first packet identification unit so that the PTP packet stays in the time synchronization error generation device for the residence time d1 set by the setting unit; a first residence time adding unit that obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit and adds the residence time D1 to a correction area of ​​the PTP packet of Sync delayed by the first delay unit; a second packet identification unit that identifies the PTP packet of Delay Request transmitted from the slave device; The delay time setting unit is characterized by comprising a second delay unit that delays the PTP packet of the Delay Request, and a second residence time adding unit that obtains the residence time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the residence time d2 set by the setting unit, and adds the residence time D2 to the correction area of ​​the PTP packet of the Delay Request delayed by the second delay unit.

[0077] A time synchronization error generating device according to claim 2 includes a master device having a master clock and a slave clock, and is configured to synchronize time in accordance with a two-step PTP (Precision Time Protocol), and measures a residence time D1 included in a Follow Up PTP packet transmitted from the master device, a time T1 at which a Sync PTP packet is transmitted, a time T2 at which the Sync PTP packet is received, a time T3 at which a Delay Request PTP packet is transmitted, a residence time D2 included in a Delay Response PTP packet transmitted from the master device, and a time T4 at which the master device receives the Delay Request PTP packet. a slave device that performs the time synchronization to synchronize the slave clock with the master clock based on a time T4 at which a Delay Request PTP packet is received; a network device that transmits IP data including the PTP packet between the master device and the slave device; and a time synchronization error generating device that transmits the IP data including the PTP packet between the master device and the slave device and generates the time synchronization error in the slave device, the time synchronization error generating device in an IP network configured to include a setting unit that sets a residence time d1 when transmitting the Sync PTP packet and the Follow Up PTP packet transmitted from the master device to the slave device and a residence time d2 when transmitting the Delay Request PTP packet transmitted from the slave device to the master device in accordance with a user's operation, and sets the time synchronization error to be generated in the slave device as a time synchronization error Δt; a first packet identification unit for identifying a PTP packet of "Up"; and a PTP packet of "Sync" identified by the first packet identification unit and a PTP packet of "Follow" so as to remain in the time synchronization error generating device for the residence time d1 set by the setting unit.a first delay unit that delays the Follow Up PTP packet; a first residence time adding unit that obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit, and adds the residence time D1 to a correction area of ​​the Follow Up PTP packet delayed by the first delay unit; a second packet identification unit that identifies the Delay Request PTP packet transmitted from the slave device; a second delay unit that delays the Delay Request PTP packet identified by the second packet identification unit so that the Delay Request packet remains in the time synchronization error generating device for the residence time d2 set by the setting unit; and a second residence time adding unit that obtains the residence time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the residence time d2 set by the setting unit, and adds the residence time D2 to a correction area of ​​the Delay Request PTP packet delayed by the second delay unit.

[0078] A time synchronization error generating device according to claim 3 includes a master device having a master clock and a slave clock, and is configured to synchronize time according to a one-step or two-step PTP (Precision Time Protocol), and measures a residence time D1 included in a Sync PTP packet or a Follow Up PTP packet transmitted from the master device, a time T1 at which the Sync PTP packet is transmitted, a time T2 at which the Sync PTP packet is received, a time T3 at which a Delay Request PTP packet is transmitted, a residence time D2 included in a Delay Response PTP packet transmitted from the master device, and a time T4 at which the master device receives the Delay Response PTP packet. a slave device that performs the time synchronization to synchronize the slave clock with the master clock based on a time T4 at which a Delay Request PTP packet is received; a network device that transmits IP data including the PTP packet between the master device and the slave device; and a time synchronization error generating device that transmits the IP data including the PTP packet between the master device and the slave device and generates the time synchronization error in the slave device, the time synchronization error generating device in an IP network configured to include a setting unit that sets a residence time d1 when transmitting the Sync PTP packet and the Follow Up PTP packet transmitted from the master device to the slave device and a residence time d2 when transmitting the Delay Request PTP packet transmitted from the slave device to the master device in accordance with a user's operation, and sets the time synchronization error to be generated in the slave device as a time synchronization error Δt; a first packet identification unit for identifying a PTP packet of "Up"; and a PTP packet of "Sync" identified by the first packet identification unit and a PTP packet of "Follow" so as to remain in the time synchronization error generating device for the residence time d1 set by the setting unit.a step identification and residence time adding unit that identifies whether a mechanism of PTP time synchronization in the Sync PTP packet delayed by the first delay unit is the one-step method or the two-step method, obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit, and adds the residence time D1 to a correction area of ​​the Sync PTP packet of the one-step method delayed by the first delay unit and a correction area of ​​the Follow Up PTP packet delayed by the first delay unit; a second packet identification unit that identifies the Delay Request PTP packet transmitted from the slave device; The delay time setting unit is characterized by comprising a second delay unit that delays the PTP packet of the Delay Request, and a second residence time adding unit that obtains the residence time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the residence time d2 set by the setting unit, and adds the residence time D2 to the correction area of ​​the PTP packet of the Delay Request delayed by the second delay unit.

[0079] In addition, the time synchronization error generating device of claim 4 is characterized in that, in the time synchronization error generating device described in claim 2 or 3, the correction area of ​​the PTP packet of Sync of the two-step method delayed by the first delay unit is set to zero.

[0080] Further, the program of claim 5 includes a master device having a master clock and a slave clock, and according to a one-step PTP (Precision Time Protocol) for time synchronization, a residence time D1 included in a PTP packet of Sync transmitted from the master device, a time T1 at which the PTP packet of Sync is transmitted, a time T2 at which the PTP packet of Sync is received, a time T3 at which a PTP packet of Delay Request is transmitted, a residence time D2 included in a PTP packet of Delay Response transmitted from the master device, and a time T4 at which the PTP packet of Delay Response is received by the master device, a slave device that performs the time synchronization to align the slave clock with the master clock based on the time T4 at which a PTP packet of Request is received; a network device that transmits IP data including the PTP packet between the master device and the slave device; and a time synchronization error generating device that transmits the IP data including the PTP packet between the master device and the slave device and generates the time synchronization error for the slave device. A computer constituting the time synchronization error generating device in an IP network is configured to calculate a residence time d1 when the PTP packet of Sync transmitted from the master device is transmitted to the slave device in accordance with a user's operation, and a delay time d2 when the PTP packet of Sync transmitted from the slave device is transmitted to the slave device, and a delay time d3 when the PTP packet of Sync transmitted from the slave device is transmitted to the slave device in accordance with a user's operation.a setting unit which sets a residence time d2 when transmitting a PTP packet of Delay Request to the master device and sets the time synchronization error to be generated by the slave device as a time synchronization error Δt; a first packet identification unit which identifies the PTP packet of Sync transmitted from the master device; a first delay unit which delays the PTP packet of Sync identified by the first packet identification unit so that the PTP packet stays in the time synchronization error generation device for the residence time d1 set by the setting unit; a first residence time adding unit which obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit and adds the residence time D1 to a correction area of ​​the PTP packet of Sync delayed by the first delay unit; a second packet identification unit which identifies the PTP packet of Delay Request transmitted from the slave device; The present invention is characterized in that it functions as a second delay unit that delays the PTP packet of the Delay Request, and a second residence time adding unit that obtains the residence time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the residence time d2 set by the setting unit, and adds the residence time D2 to the correction area of ​​the PTP packet of the Delay Request delayed by the second delay unit. Effect of the Invention

[0081] As described above, according to the present invention, in a network where time synchronization is performed by PTP, it is possible to generate an arbitrary time synchronization error between a master device and a slave device. [Brief description of the drawings]

[0082] [Figure 1] FIG. 1 is a diagram for explaining an overview of the present invention. [Diagram 2] 1 is a schematic diagram illustrating an example of the overall configuration of an IP network including a time synchronization error generating device according to first and second embodiments. [Diagram 3]1 is a block diagram showing an example of the configuration of a time synchronization error generating device according to a first embodiment. [Figure 4] 6 is a flowchart showing an example of a transmission delay process from the master side to the slave side in the time synchronization error generating device of the first embodiment. [Diagram 5] 6 is a flowchart showing an example of a transmission delay process from the slave side to the master side in the time synchronization error generating device of the first embodiment. [Figure 6] FIG. 11 is a block diagram showing an example of the configuration of a time synchronization error generating device according to a second embodiment. [Figure 7] 13 is a block diagram showing a configuration example of a step identification and residence time adding unit. FIG. [Figure 8] 11 is a flowchart showing an example of a transmission delay process from the master side to the slave side in the time synchronization error generating device of the second embodiment. [Figure 9] FIG. 1 is a schematic diagram showing an example of the configuration of a program production system using IP. [Figure 10] (1) is a diagram for explaining the sequence of time synchronization by PTP of the one-step method, and (2) is a diagram for explaining the sequence of time synchronization by PTP of the one-step method when there is a transmission delay fluctuation on an IP network. [Figure 11] (1) is a diagram for explaining the sequence of time synchronization by PTP of the two-step method, and (2) is a diagram for explaining the sequence of time synchronization by PTP of the two-step method when there is a transmission delay fluctuation on an IP network. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0083] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. Summary of the Invention First, an overview of the present invention, which generates a PTP time synchronization error arbitrarily, will be described. Fig. 1 is a diagram for explaining the overview of the present invention. It is assumed that the program production system using IP shown in Fig. 9 includes a master device 201, a time synchronization error generation device 2, and a slave device 202. The master device 201 and the time synchronization error generation device 2, and the time synchronization error generation device 2 and the slave device 202 are connected by an IP network.

[0084] The time synchronization error generating device 2 adds residence times D1 and D2 reflecting an arbitrary time Δt to the correction area of ​​the PTP packet, thereby causing the slave device 202 to generate a PTP time synchronization error (i.e., Δt) in the slave clock relative to the master clock. In other words, the time synchronization error generating device 2 adds residence times D1 and D2 for generating a PTP time synchronization error to the correction area of ​​the PTP packet.

[0085] The following description will be given taking one-step PTP as an example. The master device 201 transmits a Sync PTP packet including time T1 to the slave device 202 via the time synchronization error generation device 2. At this time, the time synchronization error generation device 2 receives the Sync PTP packet from the master device 201. The time T1 is the transmission time of the Sync PTP packet determined using the master clock of the master device 201.

[0086] 1, the time synchronization error generation device 2 calculates a residence time D1 by adding an arbitrary time Δt set by a user to an actual residence time d1 in the time synchronization error generation device 2, which is a PTP-compatible network device. Then, the time synchronization error generation device 2 adds the residence time D1 to the correction area of ​​the PTP packet of Sync, and transmits the PTP packet of Sync to the slave device 202.

[0087] The slave device 202 receives the Sync PTP packet from the time synchronization error generating device 2. Time T2 is the reception time of the Sync PTP packet specified by the slave clock of the slave device 202.

[0088] The slave device 202 transmits a Delay Request PTP packet including time T3 to the master device 201 via the time synchronization error generation device 2. At this time, the time synchronization error generation device 2 receives the Delay Request PTP packet from the slave device 202. Time T3 is the transmission time of the Delay Request PTP packet identified using the slave clock of the slave device 202.

[0089] 1, the time synchronization error generation device 2 calculates the residence time D2 by subtracting an arbitrary time Δt set by the user from the actual residence time d2 in the time synchronization error generation device 2, which is a PTP-compatible network device. Then, the time synchronization error generation device 2 adds the residence time D2 to the correction field of the PTP packet of the Delay Request, and transmits the PTP packet of the Delay Request to the master device 201.

[0090] The master device 201 receives the PTP packet of Delay Request from the time synchronization error generation device 2. Time T4 is the reception time of the PTP packet of Delay Request specified by the master clock of the master device 201.

[0091] The residence times D1 and D2 are expressed by the following formula. [Number 5] D1=d1+Δt D2 = d2 - Δt (5) d1, d2 are the actual dwell times. Δt is an arbitrary time set by the user and can be positive or negative. If Δt is positive, the slave clock lags the master clock by |Δt|, but if Δt is negative, the slave clock leads the master clock by |Δt|.

[0092] The calculated value ΔD and the measured value ΔD′ of the one-way transmission delay are expressed by the following formula. [Number 6] ΔD={(T2-T1-D1)+(T4-T3-D2)} / 2 ={(T2-T1-d1-Δt)+(T4-T3-d2+Δt)} / 2 ={(T2-T1-d1)+(T4-T3-d2)} / 2 ΔD'={(T2-T1-d1)+(T4-T3-d2)} / 2 ···(6) Therefore, ΔD=ΔD', and the calculated one-way transmission delay value ΔD and the actually measured value ΔD' are the same.

[0093] On the other hand, the calculated value ΔT and the measured value ΔT′ of the time difference are expressed by the following formula. [Number 7] ΔT={(T2-T1-D1)-(T4-T3-D2)} / 2 ={(T2-T1-d1-Δt)-(T4-T3-d2+Δt)} / 2 ={(T2-T1-d1)+(T4-T3-d2)} / 2-Δt ΔT'={(T2-T1-d1)+(T4-T3-d2)} / 2 ···(7) Therefore, ΔT=ΔT'-Δt, and the calculated time difference ΔT and the actually measured time difference ΔT' are different.

[0094] When the slave device 202 adjusts the slave clock so that the calculated value ΔT becomes 0, ΔT'=Δt, and the slave clock deviates from the master clock by the time Δt. Therefore, by changing the time Δt, it is possible to generate an arbitrary error in the time synchronization of PTP between the master device 201 and the slave device 202. Since the time Δt is a time synchronization error, the following description will be given assuming that the time Δt is the time synchronization error Δt.

[0095] [IP Network] Next, a description will be given of an example of the overall configuration of an IP network including a time synchronization error generating device 2 according to the first and second embodiments described below. Fig. 2 is a schematic diagram showing an example of the overall configuration of an IP network including the time synchronization error generating device according to the first and second embodiments.

[0096] This IP network 1 is configured to include a master device 201, slave devices 202-1, 202-2, and 202-3, a network device 203, and a time synchronization error generating device 2. The IP network 1 uses the TC mechanism of PTP to perform time synchronization between a master clock provided in the master device 201 and slave clocks provided in each of the slave devices 202-1, 202-2, and 202-3.

[0097] The master device 201 and the network device 203, the network device 203 and the time synchronization error generation device 2, and the time synchronization error generation device 2 and the slave device 202-1 are connected by an IP network. The network device 203 and the slave devices 202-2 and 202-3 are also connected by an IP network.

[0098] Network device 203 transmits IP data including PTP packets between master device 201 and slave devices 202 (202-1, 202-2, 202-3).

[0099] The time synchronization error generation device 2 transmits IP data including PTP packets between the master device 201 and the slave device 202-1. The time synchronization error generation device 2 is installed between the network device 203 and the slave device 202-1, and a time synchronization error Δt is set in the time synchronization error generation device 2 by a user operation. Then, the time synchronization error generation device 2 performs the process explained in the above outline of the invention. This makes it possible to generate a time synchronization error Δt between the slave clock of the slave device 202-1 and the master clock provided in the master device 201.

[0100] By installing the time synchronization error generation device 2 between the network device 203 and the slave device 202-2, it is possible to generate a time synchronization error Δt between the slave clock of the slave device 202-2 and the master clock. Similarly, by installing the time synchronization error generation device 2 between the network device 203 and the slave device 202-3, it is possible to generate a time synchronization error Δt between the slave clock of the slave device 202-3 and the master clock.

[0101] In the IP network 1 shown in Fig. 1, the time synchronization error generating device 2 inputs a time synchronization error Δt that changes in various ways, for example, according to a user's operation. This allows the user to verify the allowable range of the time synchronization error Δt when the slave device 202-1 operates normally by determining whether the slave device 202-1 operates normally. In addition, it is possible to verify the time during which the slave device 202-1 operates normally when the slave clock runs independently due to a PTP interruption.

[0102] Similarly, the time synchronization error generating device 2 inputs variously changing residence times d1 and d2 in accordance with, for example, a user's operation. This allows the user to verify the allowable range of the transmission time fluctuation of the PTP packet by determining whether the slave device 202-1 operates normally.

[0103] Example 1 Next, the time synchronization error generating device 2 shown in Fig. 2 will be described in detail. The time synchronization error generating device 2 of the first embodiment is a device applied to the PTP of the one-step method. Fig. 3 is a block diagram showing an example of the configuration of the time synchronization error generating device 2 of the first embodiment.

[0104] This time synchronization error generating device 2-1 includes a setting unit 10, input / output IFs 11 and 16, packet identification units 12 and 17, delay units 13, 14, 18 and 19, and residence time appending units 15 and 20.

[0105] The setting unit 10 sets the residence times d1, d2, d3, and d4 and the time synchronization error Δt in advance according to a direct input operation by a user to the time synchronization error generating device 2-1 or an input operation via a Web GUI or the like.

[0106] The setting unit 10 outputs the residence time d1 to the delay unit 13, the residence time d2 to the delay unit 18, the residence time d3 to the delay unit 14, and the residence time d4 to the delay unit 19. The setting unit 10 also outputs the residence time d1 and the time synchronization error Δt to the residence time appending unit 15, and outputs the residence time d2 and the time synchronization error Δt to the residence time appending unit 20.

[0107] Here, the residence time d1 is the time that the Sync PTP packet resides in the time synchronization error generation device 2-1 when it is transmitted from the master side to the slave side, i.e., the delay time. The residence time d3 is the time that (IP packets) other than the Sync PTP packet reside in the time synchronization error generation device 2-1 when it is transmitted from the master side to the slave side, i.e., the delay time.

[0108] The residence time d2 is the time that the PTP packet of the Delay Request remains in the time synchronization error generation device 2-1 when it is transmitted from the slave side to the master side, i.e., the delay time. The residence time d4 is the time that (IP packets) other than the PTP packet of the Delay Request remain in the time synchronization error generation device 2-1 when it is transmitted from the slave side to the master side, i.e., the delay time.

[0109] The master side refers to the network device 203 and master device 201 side as viewed from the time synchronization error generating device 2-1 in FIG. 2, and the slave side refers to the slave device 202-1 side.

[0110] The time synchronization error Δt is the time synchronization error of the slave clock in the slave device 202-1 relative to the master clock in the master device 201, that is, the time synchronization error generated in the slave device 202-1 by the time synchronization error generating device 2-1.

[0111] The user can set these retention times d1, d2, d3, and d4 and the time synchronization error Δt to any value. The upper limit of retention times d1 and d2 is the maximum value that retention times D1 (= d1 + Δt) and retention times D2 (d2 - Δt) can be added to the correction area of ​​the PTP packet. However, retention times D1 and D2 only need to be D1, D2 > 0, and an unrealistic value such as 1 hour is not set as retention times d1 and d2.

[0112] By changing the residence times d1, d2 and the time synchronization error Δt through user operation, it is possible to simulate the fluctuations in the time synchronization error and the transmission delay of PTP packets in the actual IP network 1.

[0113] In Fig. 3, the residence time for (IP packets of) packets other than the Sync PTP packet is set to residence time d3, but it may be set to residence time d1. Also, the residence time for (IP packets of) packets other than the Delay Request PTP packet is set to residence time d4, but it may be set to residence time d2. The same applies to the time synchronization error generating device 2-2 shown in Fig. 6, which will be described later.

[0114] The time synchronization error generating device 2-1 may receive IP packets other than PTP packets, perform a transmission delay process described later, and transmit the IP packets after the transmission delay process. The same applies to the time synchronization error generating device 2-2 shown in FIG. 6 described later.

[0115] 4 is a flowchart showing an example of a transmission delay process from the master side to the slave side in the time synchronization error generation device 2-1 of Example 1. The transmission delay process from the master side to the slave side is performed by the input / output IFs 11 and 16, the packet identification unit 12, the delay units 13 and 14, and the residence time appending unit 15.

[0116] The input / output IF 11 receives IP data made up of a plurality of IP packets from the master network device 203 (step S 401 ), and outputs the IP data to the packet classifier 12 .

[0117] The packet identification unit 12 receives the IP data from the input / output IF 11, and identifies whether the IP data is a Sync PTP packet or another IP packet based on the IP header and the PTP header (step S402).

[0118] Specifically, the packet identification unit 12 determines that the PTP packet is a PTP packet when the protocol number in the IP header is 17 (UDP) and the UDP port number is 319 (PTP event messages) or 320 (PTP general messages). Furthermore, when the messageType in the PTP header is 0, the packet identification unit 12 determines that the PTP packet is a Sync PTP packet, thereby identifying whether the packet is a Sync PTP packet or another IP packet.

[0119] When the packet identification unit 12 identifies the PTP packet as a Sync PTP packet in step S402 (step S402: Sync), the packet identification unit 12 outputs the Sync PTP packet to the delay unit 13, and proceeds to step S403.

[0120] On the other hand, if the packet classifier 12 identifies the IP packet as being other than a Sync PTP packet in step S402 (step S402: Other), it outputs the IP packet to the delay unit 14 and proceeds to step S404.

[0121] The delay unit 13 receives the residence time d1 from the setting unit 10, and also transitions from step S402 (Sync) to receive the Sync PTP packet from the packet identification unit 12.

[0122] The delay unit 13 adds a preset time dB to a preset time dA, subtracts the result of addition from the retention time d1, and delays the input Sync PTP packet by the subtraction result time (d1-(dA+dB)) (step S403), and proceeds to step S405. The delay unit 13 outputs the delayed Sync PTP packet to the retention time adding unit 15. In other words, the delay unit 13 delays the Sync PTP packet so that the Sync PTP packet is retained in the time synchronization error generation device 2-1 for the retention time d1.

[0123] Time dA is the processing time of packet classifier 12 (if the processing time of input / output IF 11 cannot be ignored, the processing time of input / output IF 11 and packet classifier 12). Time dB is the processing time of residence time appender 15 (if the processing time of input / output IF 16 cannot be ignored, the processing time of residence time appender 15 and input / output IF 16).

[0124] As a result, when the time synchronization error generation device 2-1 transmits the PTP packet of Sync received from the master side to the slave side, the PTP packet can be delayed by the residence time d1 in the time synchronization error generation device 2-1.

[0125] On the other hand, the delay unit 14 receives the residence time d3 from the setting unit 10, and transitions from step S402 (others) to receive the IP packets (other than the Sync PTP packets) from the packet classifier 12.

[0126] The delay unit 14 subtracts a preset time dA from the residence time d3, delays the input IP packet (other than the Sync PTP packet) by the subtraction result time (d3-dA) (step S404), and proceeds to step S407. The delay unit 14 outputs the delayed IP packet (other than the Sync PTP packet) to the input / output IF 16. In other words, the delay unit 14 delays the IP packet so that the IP packet resides in the time synchronization error generating device 2-1 for the residence time d3.

[0127] As a result, when the time synchronization error generation device 2-1 receives an IP packet other than the PTP packet of Sync from the master side and transmits it to the slave side, the packet can be delayed by the residence time d3 in the time synchronization error generation device 2-1.

[0128] The residence time appending unit 15 inputs the residence time d1 and the time synchronization error Δt from the setting unit 10, and also inputs the PTP packet of Sync from the delay unit 13, moving on from step S403.

[0129] The residence time adding unit 15 obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 (step S405). Then, the residence time adding unit 15 adds the residence time D1 to the correction area of ​​the Sync PTP packet (step S406), and proceeds to step S407.

[0130] As described above, adding the residence time D1 to the correction area means adding the residence time D1 to the residence time (cumulative residence time) already recorded in the correction area, and recording the residence time of the addition result in the correction area. In other words, the residence time adding unit 15 extracts the residence time (cumulative residence time) recorded in the correction area of ​​the Sync PTP packet, adds the residence time D1 to the residence time, and records the residence time of the addition result in the correction area.

[0131] The residence time adding unit 15 outputs the Sync PTP packet to which the residence time D1 has been added to the input / output IF 16.

[0132] The input / output IF 16 transitions from step S406 and inputs the Sync PTP packet to which the residence time D1 has been added from the residence time adding unit 15. The input / output IF 16 also transitions from step S404 and inputs the IP packet (other than the Sync PTP packet) from the delay unit 14. Then, the input / output IF 16 transmits the IP data to the slave device 202-1 on the slave side (step S407).

[0133] 5 is a flowchart showing an example of a transmission delay process from the slave side to the master side in the time synchronization error generation device 2-1 of Example 1. The transmission delay process from the slave side to the master side is performed by the input / output IFs 11 and 16, the packet identification unit 17, the delay units 18 and 19, and the residence time appending unit 20.

[0134] The input / output IF 16 receives IP data from the slave device 202-1 on the slave side (step S501), and outputs the IP data to the packet classifier 17.

[0135] The packet identification unit 17 receives the IP data from the input / output IF 16, and identifies whether the IP data is a PTP packet of a Delay Request or another IP packet based on the IP header and the PTP header (step S502).

[0136] Specifically, the packet identification unit 17 determines that the PTP packet is a PTP packet when the protocol number in the IP header is 17 (UDP) and the UDP port number is 319 (PTP event messages) or 320 (PTP general messages). Furthermore, when the messageType in the PTP header is 1, the packet identification unit 17 determines that the PTP packet is a PTP packet of a Delay Request, thereby identifying whether the packet is a PTP packet of a Delay Request or another IP packet.

[0137] When the packet identification unit 17 identifies the PTP packet as a Delay Request packet in step S502 (step S502: Delay Request), it outputs the PTP packet of the Delay Request to the delay unit 18 and proceeds to step S503.

[0138] On the other hand, if the packet classifier 17 determines in step S502 that the IP packet is not a PTP packet of a Delay Request (step S502: Other), it outputs the IP packet to the delay unit 19 and proceeds to step S504.

[0139] The delay unit 18 receives the residence time d2 from the setting unit 10, and also transitions from step S502 (Delay Request) to receive the PTP packet of Delay Request from the packet identification unit 17.

[0140] The delay unit 18 adds a preset time dD to a preset time dC, subtracts the result of addition from the retention time d2, and delays the input PTP packet of the Delay Request by the time (d2-(dC+dD)) of the subtraction result (step S503), and proceeds to step S505. The delay unit 18 outputs the delayed PTP packet of the Delay Request to the retention time adding unit 20. In other words, the delay unit 18 delays the PTP packet of the Delay Request so that the PTP packet of the Delay Request is retained in the time synchronization error generation device 2-1 for the retention time d2.

[0141] Time dC is the processing time of packet classifier 17 (if the processing time of input / output IF 16 cannot be ignored, the processing time of input / output IF 16 and packet classifier 17). Time dD is the processing time of residence time appender 20 (if the processing time of input / output IF 11 cannot be ignored, the processing time of residence time appender 20 and input / output IF 11).

[0142] As a result, when the time synchronization error generation device 2-1 transmits a PTP packet of a Delay Request received from the slave side to the master side, the PTP packet can be delayed by the residence time d2 in the time synchronization error generation device 2-1.

[0143] On the other hand, the delay unit 19 receives the residence time d4 from the setting unit 10, and transitions from step S502 (others) to receive the IP packet (other than the PTP packet of Delay Request) from the packet classifier 17.

[0144] The delay unit 19 subtracts a preset time dC from the residence time d4, delays the input IP packet (other than the PTP packet of the Delay Request) by the subtraction result time (d4-dC) (step S504), and proceeds to step S507. The delay unit 19 outputs the delayed IP packet (other than the PTP packet of the Delay Request) to the input / output IF 11. In other words, the delay unit 19 delays the IP packet so that the IP packet resides in the time synchronization error generation device 2-1 for the residence time d4.

[0145] As a result, when the time synchronization error generation device 2-1 transmits an IP packet (other than a PTP packet of a Delay Request) received from the slave side to the master side, the packet can be delayed by the residence time d4 in the time synchronization error generation device 2-1.

[0146] The residence time appending unit 20 inputs the residence time d2 and the time synchronization error Δt from the setting unit 10, and also transitions from step S503 to input the PTP packet of Delay Request from the delay unit .

[0147] The stay time adding unit 20 obtains the stay time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the stay time d2 (step S505). Then, the stay time adding unit 20 adds the stay time D2 to the correction area of ​​the PTP packet of the Delay Request (step S506) and proceeds to step S507. Specifically, the stay time adding unit 20 adds the stay time D2 to the stay time (accumulated stay time) recorded in the correction area of ​​the PTP packet of the Delay Request, and records the stay time resulting from the addition in the correction area.

[0148] The residence time adding unit 20 outputs the PTP packet of the Delay Request to which the residence time D2 has been added, to the input / output IF 11.

[0149] The input / output IF 11 proceeds from step S506 and inputs the PTP packet of Delay Request to which the residence time D2 has been added from the residence time adding unit 20. The input / output IF 11 also proceeds from step S504 and inputs an IP packet (other than the PTP packet of Delay Request) from the delay unit 19. Then, the input / output IF 11 transmits the IP data to the master-side network device 203 (step S507).

[0150] As described above, according to the time synchronization error generating device 2-1 of the first embodiment, the setting unit 10 presets arbitrary residence times d1, d2, d3, and d4 and a time synchronization error Δt in accordance with an input operation by a user.

[0151] The packet identification unit 12 identifies whether the IP data received from the master side is a Sync PTP packet or another IP packet, and the delay unit 13 delays the Sync PTP packet by a time (d1-(dA+dB)) if it is a Sync PTP packet.

[0152] The residence time adding unit 15 obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1, and adds the residence time D1 to the correction area of ​​the PTP packet of Sync.

[0153] On the other hand, if the IP packet is other than a Sync PTP packet, the delay unit 14 delays the IP packet by a time (d3-dA).

[0154] Then, the Sync PTP packet with the residence time D1 added to the correction area and IP packets other than the Sync PTP packet (for example, the Delay Response PTP packet, and IP packets such as video and audio) are transmitted to the slave device 202-1 on the slave side.

[0155] This allows the Sync PTP packet received from the master side to be delayed by the residence time d1 when transmitted to the slave side. Also, the IP packet other than the Sync PTP packet received from the master side to be delayed by the residence time d3 when transmitted to the slave side.

[0156] Furthermore, the packet identification unit 17 identifies whether the IP data received from the slave device 202-1 on the slave side is a PTP packet of Delay Request or another IP packet. If the received IP data is a PTP packet of Delay Request, the delay unit 18 delays the PTP packet of Delay Request by the time (d2-(dC+dD)).

[0157] The residence time adding unit 20 obtains the residence time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the residence time d2, and adds the residence time D2 to the correction area of ​​the PTP packet of the Delay Request.

[0158] On the other hand, if the IP packet is other than a Delay Request PTP packet, the delay unit 19 delays the IP packet by the time (d4-dC).

[0159] Then, the PTP packet of the Delay Request with the residence time D2 added to the correction area and IP packets other than the PTP packet of the Delay Request are transmitted to the master side.

[0160] This allows the PTP packet of the Delay Request received from the slave side to be delayed by the residence time d2 when transmitted to the master side. Also, the IP packet other than the PTP packet of the Delay Request received from the slave side to be delayed by the residence time d4 when transmitted to the master side.

[0161] Here, the slave device 202-1 extracts time T1 and residence time D1 (=d1+Δt) from the Sync PTP packet included in the IP data received from the time synchronization error generation device 2-1, and specifies time T2 at which the Sync PTP packet was received using the slave clock. The slave device 202-1 then specifies time T3 at which the Delay Request PTP packet is to be transmitted using the slave clock, and transmits the Delay Request PTP packet including time T3 to the time synchronization error generation device 2-1.

[0162] The time synchronization error generation device 2-1 adds the residence time D2 to the Delay Request PTP packet and transmits it to the master device 201. Then, the master device 201 transmits a Delay Response PTP packet including the time T4 when the Delay Request PTP packet was received and the residence time D2.

[0163] The slave device 202-1 extracts the time T4 and the residence time D2 (=d2-Δt) from the PTP packet of the Delay Response received from the time synchronization error generation device 2-1.

[0164] The slave device 202-1 uses the times T1, T2, T3, and T4 and the residence times D1 and D2 to calculate the calculated time shift ΔT shown in equation (7) above, and adjusts the slave clock so that the calculated time shift ΔT becomes zero.

[0165] As a result, the slave clock will deviate from the master clock by a time synchronization error Δt.

[0166] Therefore, since the time synchronization error Δt preset by the setting unit 10 becomes the time synchronization error between the master device 201 and the slave device 202-1, in the IP network 1 that performs time synchronization by PTP, it is possible to generate the time synchronization error arbitrarily without making any changes to the PTP standard according to the above-mentioned non-patent document 1.

[0167] Since the time synchronization error Δt between the master device 201 and the slave device 202-1 is generated arbitrarily in accordance with an input operation by the user, it is possible to verify the allowable range of the time synchronization error Δt within which the slave device 202-1, which is a program production device, operates normally. In other words, the user changes the time synchronization error Δt, determines whether the slave device 202-1 operates normally, and identifies the maximum time synchronization error Δt within which the slave device 202-1 can operate normally, thereby making it possible to verify the allowable range of the time synchronization error Δt within which the slave device 202-1 operates normally.

[0168] In addition, since the residence times d1 and d2 can be arbitrarily changed according to the user's input operation, it is possible to verify the allowable range of the transmission time fluctuation of the PTP packet. For example, if the user changes the residence times d1 and d2 according to an arbitrary rule (for example, normal distribution of the mean and variance, random distribution), it is possible to verify the time synchronization accuracy of the slave clock of the slave device 202-1, and to verify whether the slave device 202-1 operates normally.

[0169] In addition, when the PTP is interrupted and the slave clock starts running on its own, it can be verified how long the slave device 202-1 can operate normally. In general, when the PTP is interrupted and the slave clock starts running on its own, the time error of the slave clock with respect to the master clock gradually increases. For example, by keeping the residence times d1 and d2 constant and gradually changing the time synchronization error Δt, it is possible to generate a time error of the slave clock in any direction (leading or lagging with respect to the master clock) and at any speed. This makes it possible to verify how much time error, in what direction, can occur before the slave device 202-1 operates normally.

[0170] Example 2 Next, the time synchronization error generating device 2 of the second embodiment will be described in detail. The time synchronization error generating device 2 of the second embodiment is a device applied to the two-step PTP. Fig. 6 is a block diagram showing an example of the configuration of the time synchronization error generating device 2 of the second embodiment.

[0171] This time synchronization error generating device 2-2 includes a setting unit 10, input / output IFs 11 and 16, packet identification units 21 and 17, delay units 13, 14, 18 and 19, a step identification and residence time adding unit 22, and a residence time adding unit 20.

[0172] 3, both the time synchronization error generation devices 2-1 and 2-2 of the first embodiment are common in that they include a setting unit 10, input / output IFs 11 and 16, delay units 13, 14, 18 and 19, a packet identification unit 17 and a residence time appending unit 20. On the other hand, the time synchronization error generation device 2-2 differs from the time synchronization error generation device 2-1 that includes the packet identification unit 12 and the residence time appending unit 15 in that it includes a packet identification unit 21 and a step identification and residence time appending unit 22.

[0173] The setting unit 10 is similar to the setting unit 10 provided in the time synchronization error generating device 2-1 of the first embodiment shown in FIG. 3, and therefore a detailed description thereof will be omitted.

[0174] The setting unit 10 outputs the residence time d1 to the delay unit 13, the residence time d2 to the delay unit 18, the residence time d3 to the delay unit 14, and the residence time d4 to the delay unit 19. The setting unit 10 also outputs the residence time d1 and the time synchronization error Δt to the step identification and residence time appending unit 22, and outputs the residence time d2 and the time synchronization error Δt to the residence time appending unit 20.

[0175] Fig. 7 is a block diagram showing an example of the configuration of the step identification and residence time adding unit 22 shown in Fig. 6. This step identification and residence time adding unit 22 includes a step identification unit 30, residence time adding units 31 and 34, a packet identification unit 32, and a correction area zero setting unit 33.

[0176] 8 is a flowchart showing an example of a transmission delay process from the master side to the slave side in the time synchronization error generation device 2-2 of the embodiment 2. The transmission delay process from the master side to the slave side is performed by the input / output IFs 11 and 16, the packet identification unit 21, the delay units 13 and 14, and the step identification and residence time adding unit 22.

[0177] The input / output IF 11 receives IP data from the master network device 203 (step S801), and outputs the IP data to the packet classifier .

[0178] The packet identification unit 21 receives the IP data from the input / output IF 11, and identifies whether the IP data is a Sync PTP packet, a Follow Up PTP packet, or another IP packet based on the IP header and the PTP header (step S802).

[0179] Specifically, the packet identification unit 21 determines that the PTP packet is a PTP packet when the protocol number in the IP header is 17 (UDP) and the UDP port number is 319 (PTP event messages) or 320 (PTP general messages). Furthermore, the packet identification unit 21 determines that the PTP packet is a Sync PTP packet when the messageType in the PTP header is 0, and determines that the PTP packet is a Follow Up PTP packet when the messageType in the PTP header is 8, thereby determining that the PTP packet is a Sync or Follow Up PTP packet.

[0180] If the packet identification unit 21 identifies the PTP packet as a Sync or Follow Up PTP packet in step S802 (step S802: Sync, Follow Up), it outputs the Sync or Follow Up PTP packet to the delay unit 13 and proceeds to step S803.

[0181] On the other hand, if the packet identification unit 21 identifies an IP packet that is neither a Sync PTP packet nor a Follow Up PTP packet in step S802 (step S802: Other), it outputs the IP packet to the delay unit 14 and proceeds to step S804.

[0182] The delay unit 13 receives the residence time d1 from the setting unit 10, and also transitions from step S802 (Sync or Follow Up) to receive the Sync or Follow Up PTP packet from the packet identification unit .

[0183] The delay unit 13 adds a preset time dB' to a preset time dA, subtracts the result of addition from the residence time d1, and delays the input Sync or Follow Up PTP packet by the subtraction result (d1-(dA+dB')) (step S803), and proceeds to step S805. The delay unit 13 outputs the delayed Sync or Follow Up PTP packet to the step identification and residence time adding unit 22.

[0184] Time dA is the processing time of packet classification unit 21 (if the processing time of input / output IF 11 cannot be ignored, the processing time of input / output IF 11 and packet classification unit 21). Time dB' is the processing time of step identification and residence time appending unit 22 (if the processing time of input / output IF 16 cannot be ignored, the processing time of step identification and residence time appending unit 22 and input / output IF 16).

[0185] As a result, when the time synchronization error generation device 2-2 transmits a Sync or Follow Up PTP packet received from the master side to the slave side, the packet can be delayed by the residence time d1 in the time synchronization error generation device 2-2.

[0186] On the other hand, the delay unit 14 inputs the residence time d3 from the setting unit 10, and transitions from step S802 (other) to input other IP packets that are neither Sync PTP packets nor Follow Up PTP packets (hereinafter referred to as "IP packets (other than Sync or Follow Up PTP packets)") from the packet identification unit 21.

[0187] The delay unit 14 subtracts a preset time dA from the residence time d3, and delays the input IP packet (other than the Sync or Follow Up PTP packet) by the subtraction result time (d3-dA) (step S804), and proceeds to step S810. The delay unit 14 outputs the delayed IP packet (other than the Sync or Follow Up PTP packet) to the input / output IF 16.

[0188] As a result, when the time synchronization error generation device 2-2 transmits an IP packet (other than a Sync or Follow Up PTP packet) received from the master side to the slave side, the packet can be delayed by the residence time d3 in the time synchronization error generation device 2-2.

[0189] The step identification unit 30 of the step identification and residence time adding unit 22 proceeds from step S803 and inputs a Sync or Follow Up PTP packet from the delay unit 13. Then, the step identification unit 30 identifies whether the PTP time synchronization mechanism is a one-step method or a two-step method based on the PTP header (step S805).

[0190] Specifically, if the twoStepFlag in the flagField in the PTP header is FALSE, the step identification unit 30 determines that the PTP time synchronization mechanism is the one-step method. Also, if the twoStepFlag in the flagField in the PTP header is TRUE, the step identification unit 30 determines that the PTP time synchronization mechanism is the two-step method.

[0191] In addition, in step S805, the step identification unit 30 may identify whether the mechanism of PTP time synchronization for the Sync PTP packet is the one-step method or the two-step method.

[0192] If the step identification unit 30 identifies in step S805 that the PTP time synchronization mechanism is the one-step method (step S805: One-Step / Sync), it outputs a one-step method PTP packet (Sync PTP packet) to the residence time adding unit 31 and proceeds to step S806.

[0193] On the other hand, if the step identification unit 30 identifies in step S805 that the PTP time synchronization mechanism is the two-step method (step S805: Two-Step / Sync, Follow Up), it outputs a two-step method PTP packet (a Sync or Follow Up PTP packet) to the packet identification unit 32 and proceeds to step S808.

[0194] The residence time appending unit 31 inputs the residence time d1 and the time synchronization error Δt from the setting unit 10, and also transitions from step S805 (One-Step / Sync) to input the PTP packet of Sync of the one-step method from the step identification unit 30.

[0195] The residence time adding unit 31 obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 (step S806). Then, the residence time adding unit 31 adds the residence time D1 to the correction area of ​​the PTP packet of Sync in the one-step method (step S807), and proceeds to step S810.

[0196] The residence time adding unit 31 outputs the one-step method Sync PTP packet to which the residence time D1 has been added to the input / output IF 16.

[0197] The packet identification unit 32 transitions from step S805 (two-step / Sync, Follow Up) and inputs a two-step method Sync or Follow Up PTP packet from the step identification unit 30.

[0198] The packet identification unit 32 identifies whether the PTP packet is a Sync PTP packet or a Follow Up PTP packet based on the PTP header (step S808).

[0199] Specifically, the packet identification unit 32 determines that the PTP packet is a Sync PTP packet when the messageType in the PTP header is 0. Also, the packet identification unit 32 determines that the PTP packet is a Follow Up PTP packet when the messageType in the PTP header is 8.

[0200] If the packet identification unit 32 identifies the IP packet as a Sync PTP packet in step S808 (step S808: Sync), it outputs the IP packet (a two-step method Sync PTP packet) to the correction area zero setting unit 33 and proceeds to step S809.

[0201] On the other hand, if the packet identification unit 32 identifies the IP packet as a Follow Up PTP packet in step S808 (step S808: Follow Up), it outputs the IP packet (Follow Up PTP packet) to the residence time adding unit 34 and proceeds to step S806.

[0202] The zero correction area setting unit 33 proceeds from step S808 (Sync) and inputs an IP packet (a two-step Sync PTP packet) from the packet identification unit 32. Then, the zero correction area setting unit 33 sets the correction area of ​​the two-step Sync PTP packet to zero (step S809), and proceeds to step S810. Specifically, the zero correction area setting unit 33 clears the correction area by overwriting the data recorded in the correction area of ​​the two-step Sync PTP packet with zero.

[0203] The zero correction area setting unit 33 outputs a two-step Sync PTP packet in which the correction area is set to zero to the input / output IF 16.

[0204] The residence time appending unit 34 inputs the residence time d1 and the time synchronization error Δt from the setting unit 10, and also transitions from step S808 (Follow Up) to input the Follow Up PTP packet from the packet identifying unit 32.

[0205] The residence time adding unit 34 obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1, similar to the process of step S806 by the residence time adding unit 31. Then, the residence time adding unit 34 adds the residence time D1 to the correction area of ​​the Follow Up PTP packet, similar to the process of step S807 by the residence time adding unit 31, and proceeds to step S810.

[0206] The residence time appending unit 34 outputs the Follow Up PTP packet to which the residence time D1 has been appended to the input / output IF 16.

[0207] The input / output IF 16 transitions from step S807 to input a one-step Sync PTP packet to which the residence time D1 has been added from the residence time adding unit 31, or a Follow Up PTP packet to which the residence time D1 has been added from the residence time adding unit 34. The input / output IF 16 also transitions from step S809 to input a two-step Sync PTP packet in which the correction area is set to zero from the correction area zero setting unit 33. The input / output IF 16 also transitions from step S804 to input an IP packet (other than a Sync or Follow Up PTP packet) from the delay unit 14. The input / output IF 16 then transmits the IP data to the slave device 202-1 on the slave side (step S810).

[0208] The transmission delay process from the slave side to the master side in the time synchronization error generation device 2-2 of the second embodiment is similar to the transmission delay process from the slave side to the master side in the time synchronization error generation device 2-1 of the first embodiment shown in Fig. 5, so a description thereof will be omitted. The transmission delay process from the slave side to the master side is performed by the input / output IFs 11 and 16, the packet identification unit 17, the delay units 18 and 19, and the residence time appending unit 20.

[0209] As described above, according to the time synchronization error generating device 2-2 of the second embodiment, the setting unit 10 presets arbitrary residence times d1, d2, d3, and d4 and time synchronization error Δt in accordance with an input operation by a user.

[0210] The packet identification unit 21 identifies whether the IP data received from the master side is a Sync PTP packet, a Follow Up PTP packet, or another IP packet. If the PTP packet is a Sync or Follow Up PTP packet, the delay unit 13 delays the Sync or Follow Up PTP packet by a time (d1-(dA+dB')).

[0211] The step identification and residence time adding unit 22 identifies the step method of PTP time synchronization.

[0212] When the step identification and residence time adding unit 22 identifies the one-step method or Follow Up, it adds the time synchronization error Δt to the residence time d1 to obtain the residence time D1 (=d1+Δt), and adds the residence time D1 to the correction area of ​​the Sync PTP packet or the Follow Up PTP packet of the one-step method.

[0213] When the step identification and residence time adding unit 22 identifies a two-step Sync, it sets the correction area of ​​the PTP packet of the two-step Sync to zero.

[0214] On the other hand, the delay unit 14 delays IP packets (other than Sync or Follow Up PTP packets), that is, other IP packets that are neither Sync PTP packets nor Follow Up PTP packets, by a time (d3-dA).

[0215] Then, one-step Sync PTP packets or Follow Up PTP packets with a residence time D1 added to the correction area, two-step Sync PTP packets with the correction area set to zero, and other IP packets that are neither Sync PTP packets nor Follow Up PTP packets (for example, Delay Response PTP packets, and IP packets such as video and audio) are transmitted to slave device 202-1 on the slave side.

[0216] This allows a delay of d1 when transmitting a Sync or Follow Up PTP packet received from the master side to the slave side. Also, a delay of d3 when transmitting other IP packets received from the master side that are neither a Sync PTP packet nor a Follow Up PTP packet to the slave side.

[0217] Also, similarly to the first embodiment, the PTP packet of the Delay Request received from the slave side can be delayed by the residence time d2 when transmitted to the master side by the packet identification unit 17, the delay units 18 and 19, and the residence time appending unit 20. Also, the IP packet other than the PTP packet of the Delay Request received from the slave side can be delayed by the residence time d4 when transmitted to the master side.

[0218] Here, the slave device 202 extracts the time T1 and the residence time D1 (=d1+Δt) from the Follow Up PTP packet received from the time synchronization error generation device 2-2. In addition, the slave device 202 calculates the calculated time shift ΔT shown in the above formula (7) using the times T1, T2, T3, and T4 and the residence times D1 and D2 in the same process as in the first embodiment, and adjusts the slave clock so that the calculated time shift ΔT becomes 0.

[0219] As a result, the slave clock will deviate from the master clock by a time synchronization error Δt.

[0220] Therefore, the present invention can be applied to both the one-step method and the two-step method, and in a network where time synchronization is performed by PTP, the time synchronization error between the master device and the slave device can be generated arbitrarily, as in the first embodiment.

[0221] Also, similarly to the first embodiment, it is possible to verify the allowable range of the time synchronization error Δt for the slave device 202, which is the program production device, to operate normally, and the allowable range of the transmission time fluctuation of the PTP packet, and it is also possible to verify the time for which the slave device 202 operates normally when the PTP is interrupted and the slave clock runs free.

[0222] Although the present invention has been described above with reference to the first and second embodiments, the present invention is not limited to the first and second embodiments, and various modifications are possible without departing from the technical concept thereof.

[0223] For example, in the first embodiment, an example of application to a one-step PTP is shown, and in the second embodiment, an example of application to both one-step and two-step PTPs is shown, but as a modified example of the first embodiment, it may be applied only to a two-step PTP.

[0224] A time synchronization error generating device 2-1' according to a modification of the first embodiment includes a setting unit 10, input / output IFs 11 and 16, packet identification units 12 and 17, delay units 13, 14, 18 and 19, residence time appending units 15 and 20, and a correction region zero setting unit.

[0225] The setting unit 10 presets arbitrary residence times d1, d2, d3, and d4 and a time synchronization error Δt in accordance with an input operation by a user.

[0226] The input / output IF 11 receives IP data from the master-side network device 203. The packet identification unit 12 identifies whether the IP data received from the master side is a Sync PTP packet, a Follow Up PTP packet, or another IP packet. If the IP data is a Sync or Follow Up PTP packet, the delay unit 13 delays the Sync or Follow Up PTP packet by a time (d1-(dA+dB)).

[0227] The residence time adding unit 15 obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1, and adds the residence time D1 to the correction area of ​​the Follow Up PTP packet. In addition, the correction area zero setting unit sets the correction area of ​​the Sync PTP packet to zero.

[0228] On the other hand, the delay unit 14 delays other IP packets that are neither Sync PTP packets nor Follow Up PTP packets by the time (d3-dA).

[0229] The input / output IF16 transmits a Follow Up PTP packet with a residence time D1 added to the correction area, a Sync PTP packet with zero set to the correction area, and other IP packets (e.g., a Delay Response PTP packet, and IP packets such as video and audio) to the slave device 202-1 on the slave side.

[0230] The input / output IF 16 receives IP data from the slave device 202-1. The packet identification unit 17, delay units 18 and 19, and residence time adding unit 20 are the same as those shown in Fig. 3, so their explanation will be omitted. The input / output IF 11 transmits the IP data to the network device 203.

[0231] A normal computer can be used as the hardware configuration of the time synchronization error generating devices 2-1, 2-2, and 2-1' according to the first and second embodiments and the modified example of the first embodiment of the present invention. The time synchronization error generating devices 2-1, 2-2, and 2-1' are configured by a computer equipped with a CPU, a volatile storage medium such as a RAM, a non-volatile storage medium such as a ROM, and an interface.

[0232] The functions of the setting unit 10, input / output IFs 11, 16, packet identification units 12, 17, delay units 13, 14, 18, 19 and residence time appending units 15, 20 provided in the time synchronization error generation device 2-1 are each realized by causing a CPU to execute a program in which these functions are written.

[0233] In addition, the functions of the setting unit 10, input / output IFs 11, 16, packet identification units 21, 17, delay units 13, 14, 18, 19, step identification and residence time appending unit 22, and residence time appending unit 20 provided in the time synchronization error generation device 2-2 are each realized by having the CPU execute a program that describes these functions.

[0234] In addition, the functions of the setting unit 10, input / output IFs 11, 16, packet identification units 12, 17, delay units 13, 14, 18, 19, residence time appending units 15, 20 and correction area zero setting unit provided in the time synchronization error generation device 2-1' are also realized by having the CPU execute a program that describes these functions.

[0235] These programs are stored in the storage medium and are read and executed by the CPU. These programs can also be distributed by storing them in a storage medium such as a magnetic disk (floppy disk, hard disk, etc.), an optical disk (CD-ROM, DVD, etc.), or a semiconductor memory, and can also be transmitted and received via a network. [Explanation of symbols]

[0236] 1 IP Network 2 Time synchronization error generation device 10 Setting section 11,16 Input / Output IF (Interface) 12, 17, 21, 32 Packet Identification Section 13, 14, 18, 19 Delay section 15, 20, 31, 34 Residence time append section 22 Step identification and dwell time recording section 30 Step Identification Section 33 Correction area zero setting section 101 Synchronous signal generator 102-1, 102-2 Camera 103 Video Switcher 201 Master Equipment 202, 202-1, 202-2, 202-3 Slave devices 203 Network Equipment T1,T2,T3,T4 time D1,D2,d1,d2,d3,d4 Residence time Δt Time, time synchronization error ΔD Calculated one-way transmission delay ΔD' One-way transmission delay measured value ΔT Calculated time difference ΔT' Actual time difference

Claims

1. a master device having a master clock; and a slave device having a slave clock, which performs the time synchronization to align the slave clock with the master clock according to a one-step PTP (Precision Time Protocol) time synchronization mechanism based on a residence time D1 included in a Sync PTP packet transmitted from the master device, a time T1 at which the Sync PTP packet is transmitted, a time T2 at which the Sync PTP packet is received, a time T3 at which a Delay Request PTP packet is transmitted, and a residence time D2 included in a Delay Response PTP packet transmitted from the master device, and a time T4 at which the master device receives the Delay Request PTP packet; a network device which transmits IP data including the PTP packet between the master device and the slave device; and a time synchronization error generating device which transmits the IP data including the PTP packet between the master device and the slave device and generates a time synchronization error for the slave device, a setting unit which sets a residence time d1 when the PTP packet of Sync transmitted from the master device is transmitted to the slave device and a residence time d2 when the PTP packet of Delay Request transmitted from the slave device is transmitted to the master device in accordance with a user's operation, and sets the error of the time synchronization generated by the slave device as a time synchronization error Δt; a first packet identification unit for identifying the Sync PTP packet transmitted from the master device; A first delay unit that delays the PTP packet of Sync identified by the first packet identification unit so that the PTP packet stays in the time synchronization error generating device for the stay time d1 set by the setting unit; a first residence time adding unit that calculates the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit, and adds the residence time D1 to a correction area of ​​the Sync PTP packet delayed by the first delay unit; a second packet identification unit for identifying a PTP packet of the Delay Request transmitted from the slave device; A second delay unit that delays the PTP packet of the Delay Request identified by the second packet identification unit so that the PTP packet stays in the time synchronization error generating device for the stay time d2 set by the setting unit; a second retention time adding unit that obtains the retention time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the retention time d2 set by the setting unit, and adds the retention time D2 to a correction area of ​​the PTP packet of the Delay Request delayed by the second delay unit; A time synchronization error generating device comprising:

2. a master device having a master clock; and a slave device having a slave clock, which performs the time synchronization to align the slave clock with the master clock according to a two-step PTP (Precision Time Protocol) time synchronization mechanism based on a residence time D1 included in a Follow Up PTP packet transmitted from the master device, a time T1 at which a Sync PTP packet is transmitted, a time T2 at which the Sync PTP packet is received, a time T3 at which a Delay Request PTP packet is transmitted, and a residence time D2 included in a Delay Response PTP packet transmitted from the master device and a time T4 at which the master device receives the Delay Request PTP packet; a network device which transmits IP data including the PTP packets between the master device and the slave device; and a time synchronization error generating device which transmits the IP data including the PTP packets between the master device and the slave device and generates a time synchronization error for the slave device, a setting unit which, in accordance with a user's operation, sets a residence time d1 when the Sync PTP packet and the Follow Up PTP packet transmitted from the master device are transmitted to the slave device, and a residence time d2 when the Delay Request PTP packet transmitted from the slave device is transmitted to the master device, and sets the time synchronization error generated by the slave device as a time synchronization error Δt; a first packet identification unit that identifies the Sync PTP packet and the Follow Up PTP packet transmitted from the master device; A first delay unit that delays the Sync PTP packet and the Follow Up PTP packet identified by the first packet identification unit so that the PTP packets stay in the time synchronization error generating device for the stay time d1 set by the setting unit; a first residence time adding unit that calculates the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit, and adds the residence time D1 to a correction area of ​​the Follow Up PTP packet delayed by the first delay unit; a second packet identification unit for identifying a PTP packet of the Delay Request transmitted from the slave device; A second delay unit that delays the PTP packet of the Delay Request identified by the second packet identification unit so that the PTP packet stays in the time synchronization error generating device for the stay time d2 set by the setting unit; a second retention time adding unit that obtains the retention time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the retention time d2 set by the setting unit, and adds the retention time D2 to a correction area of ​​the PTP packet of the Delay Request delayed by the second delay unit; A time synchronization error generating device comprising:

3. A master device including a master clock and a slave clock, the mechanism of time synchronization being in accordance with a one-step or two-step PTP (Precision Time Protocol), and the device records a residence time D1 included in a Sync PTP packet or a Follow Up PTP packet transmitted from the master device, a time T1 at which the Sync PTP packet is transmitted, a time T2 at which the Sync PTP packet is received, a time T3 at which a Delay Request PTP packet is transmitted, a residence time D2 included in a Delay Response PTP packet transmitted from the master device, and a time T4 at which the master device receives the Delay Response PTP packet. a slave device that performs the time synchronization to align the slave clock with the master clock based on a time T4 at which a PTP packet of a Request is received; a network device that transmits IP data including the PTP packet between the master device and the slave device; and a time synchronization error generating device that transmits the IP data including the PTP packet between the master device and the slave device and generates a time synchronization error for the slave device, a setting unit which, in accordance with a user's operation, sets a residence time d1 when the Sync PTP packet and the Follow Up PTP packet transmitted from the master device are transmitted to the slave device, and a residence time d2 when the Delay Request PTP packet transmitted from the slave device is transmitted to the master device, and sets the time synchronization error generated by the slave device as a time synchronization error Δt; a first packet identification unit that identifies the Sync PTP packet and the Follow Up PTP packet transmitted from the master device; A first delay unit that delays the Sync PTP packet and the Follow Up PTP packet identified by the first packet identification unit so that the PTP packets stay in the time synchronization error generating device for the stay time d1 set by the setting unit; Identifying whether the PTP time synchronization mechanism in the PTP packet of Sync delayed by the first delay unit is the one-step method or the two-step method; a step identification and residence time adding unit which calculates the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit, and adds the residence time D1 to a correction area of ​​the Sync PTP packet of the one-step method delayed by the first delay unit and a correction area of ​​the Follow Up PTP packet delayed by the first delay unit; a second packet identification unit for identifying a PTP packet of the Delay Request transmitted from the slave device; A second delay unit that delays the PTP packet of the Delay Request identified by the second packet identification unit so that the PTP packet stays in the time synchronization error generating device for the stay time d2 set by the setting unit; a second retention time adding unit that obtains the retention time D2 (=d2-Δt) by subtracting the time synchronization error Δt from the retention time d2 set by the setting unit, and adds the retention time D2 to a correction area of ​​the PTP packet of the Delay Request delayed by the second delay unit; A time synchronization error generating device comprising:

4. 4. The time synchronization error generating device according to claim 2, A time synchronization error generating device, characterized in that a correction region of the Sync PTP packet of the two-step method delayed by the first delay unit is set to zero.

5. a master device having a master clock; a slave device having a slave clock, and performing the time synchronization to align the slave clock with the master clock according to a one-step PTP (Precision Time Protocol) time synchronization mechanism based on a residence time D1 included in a Sync PTP packet transmitted from the master device, a time T1 at which the Sync PTP packet is transmitted, a time T2 at which the Sync PTP packet is received, a time T3 at which a Delay Request PTP packet is transmitted, and a residence time D2 included in a Delay Response PTP packet transmitted from the master device, and a time T4 at which the master device receives the Delay Request PTP packet; a network device transmitting IP data including the PTP packets between the master device and the slave device; and a time synchronization error generating device transmitting the IP data including the PTP packets between the master device and the slave device and causing the slave device to generate the time synchronization error, a setting unit which sets a residence time d1 when the PTP packet of Sync transmitted from the master device is transmitted to the slave device and a residence time d2 when the PTP packet of Delay Request transmitted from the slave device is transmitted to the master device in accordance with a user's operation, and sets the error of the time synchronization to be generated by the slave device as a time synchronization error Δt; a first packet identification unit that identifies the Sync PTP packet transmitted from the master device; a first delay unit that delays the PTP packet of Sync identified by the first packet identification unit so that the PTP packet of Sync remains in the time synchronization error generating device for the residence time d1 set by the setting unit; a first residence time adding unit that obtains the residence time D1 (=d1+Δt) by adding the time synchronization error Δt to the residence time d1 set by the setting unit, and adds the residence time D1 to a correction area of ​​the PTP packet of Sync delayed by the first delay unit; a second packet identification unit that identifies a PTP packet of the Delay Request transmitted from the slave device; A second delay unit that delays the PTP packet of the Delay Request identified by the second packet identification unit so that the PTP packet stays in the time synchronization error generating device for the stay time d2 set by the setting unit; and A program for functioning as a second residence time appending unit that obtains the residence time D2 (= d2 - Δt) by subtracting the time synchronization error Δt from the residence time d2 set by the setting unit, and appends the residence time D2 to the correction area of ​​the PTP packet of the Delay Request delayed by the second delay unit.

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