Paste for forming resistive layer of chip resistor and chip resistor

Abstract

To provide a chip resistor and a paste for forming a resistive layer of a chip resistor.SOLUTION: A paste for forming a resistive layer 130 of a chip resistor 1000 includes: a copper-based alloy powder; and a nickel powder in an amount greater than 0 wt.% and less than or equal to 10 wt.% based on the weight of the copper-based alloy powder. The paste is free of glass.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a paste for forming a resistive layer of a chip resistor, and to a chip resistor. [Background technology]

[0002] In recent years, chip resistors have come to be widely used as electronic devices become more diverse in functionality. For example, chip resistors can be used to prevent overcharging of a battery and to detect the remaining charge of the battery.

[0003] For precise current detection, the resistive layer of a chip resistor is required to have low resistance and a low temperature coefficient of resistance (TCR).

[0004] Typically, the paste used to form the resistive layer of a chip resistor contains an alloy that is very sensitive to the oxidizing atmosphere during sintering, making adhesion to the substrate a problem. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Korean Patent Publication No. 10-2014-0023819 Summary of the Invention [Means for solving the problem]

[0006] According to one embodiment of the present invention, a chip resistor is provided having a resistive layer that maintains adhesion to a substrate even when thinned. [Brief description of the drawings]

[0007] [Figure 1] 5(a) to 5(d) are diagrams showing the interface between the resistive layer and the substrate according to the weight ratio (wt%) of nickel contained in the resistive layer forming paste of the chip resistor according to one embodiment of the present invention. [Diagram 2] 1 is a diagram illustrating a chip resistor according to an embodiment of the present invention; [Diagram 3] FIG. 3 is a cross-sectional view taken along line AA' in FIG. [Figure 4] 1 is a plan view illustrating a resistive layer, a first electrode, and a second electrode that are applied to a chip resistor according to an embodiment of the present invention. [Diagram 5] 1 is a plan view illustrating a resistive layer, a first electrode, and a second electrode that are applied to a chip resistor according to an embodiment of the present invention. [Figure 6] 13 is a diagram illustrating a chip resistor according to another embodiment of the present invention. FIG. [Figure 7] FIG. 7 is a diagram showing a cross section taken along line BB' in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] The terms used in this application are merely used to describe specific embodiments and are not intended to limit the present invention. Unless otherwise clearly stated in the text, singular expressions include plural expressions.

[0009] It should be understood that in this application, the terms "comprise" or "have" specify the presence of any feature, number, step, operation, component, part, or combination thereof described in the specification, but do not preclude the presence or possible addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0010] Furthermore, throughout the specification, "on" means located above or below the target portion, and does not necessarily mean located on the upper side with respect to the direction of gravity.

[0011] Furthermore, the term "bonding" does not only refer to the case where each component is in direct physical contact with the other components in the contact relationship between them, but is used as a concept that also encompasses the case where another component is interposed between the components and the components are in contact with the other component.

[0012] The size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, and the present invention is not necessarily limited thereto.

[0013] Hereinafter, embodiments of a paste for forming a resistive layer of a chip resistor and a chip resistor according to the present invention will be described in detail with reference to the accompanying drawings. In describing the embodiments with reference to the accompanying drawings, the same or corresponding components are denoted by the same reference numerals, and duplicate descriptions thereof will be omitted.

[0014] <Paste for forming the resistance layer of chip resistors>

[0015] The paste for forming a resistive layer of the chip resistor according to the embodiment of the present invention contains copper-based alloy powder and nickel (Ni) powder, but does not contain glass.

[0016] In this specification, a copper-based alloy means an alloy whose composition contains copper.

[0017] The copper-based alloy may include copper-manganese-tin (Cu-Mn-Sn), i.e., the copper-based alloy may be Zeranin, or the copper-based alloy may include copper-manganese-nickel (Cu-Mn-Ni), i.e., the copper-based alloy may be Manganin.

[0018] In the case of a typical chip resistor, in order to ensure the adhesive strength between the substrate and the resistive layer, a paste for forming a primary resistive layer containing glass and a paste for forming a secondary resistive layer not containing glass are used together.

[0019] That is, in the case of copper alloy, which is the electrically conductive component of the paste for forming the resistive layer, it is very sensitive to the oxidizing atmosphere during sintering, so it is necessary to work in the strongest reducing atmosphere, but in the case of glass, which is an inorganic adhesive, the fluidity is poor when sintered in a reducing atmosphere, so it is common to use the paste for forming the primary resistive layer and the paste for forming the secondary resistive layer in parallel. As a result, the resistive layer of a normal chip resistor includes a first resistive layer formed with the paste for forming the primary resistive layer, and a second resistive layer formed with the paste for forming the secondary resistive layer.

[0020] However, this increases the overall thickness of the resistive layer, complicating the process of forming the chip resistor.

[0021] When using the paste for forming the resistive layer of the chip resistor of this embodiment, the adhesive strength between the substrate and the resistive layer can be ensured even if the paste does not contain glass. This makes it possible to reduce the overall thickness of the resistive layer and simplify the process of forming the chip resistor.

[0022] The amount of nickel (Ni) powder added in this embodiment is more than 0 wt% and not more than 10 wt% relative to the copper-based alloy, and the diameter of the nickel (Ni) powder is 300 nm or less.

[0023] FIG. 1(a) to (d) are diagrams showing the interface between a resistive layer and a substrate according to the weight ratio (wt%) of nickel contained in a resistive layer-forming paste of a chip resistor.

[0024] FIG. 1(a) shows a case where the paste for forming the resistive layer of a chip resistor does not contain nickel.

[0025] FIG. 1(b) shows a case where the paste for forming the resistive layer of the chip resistor contains nickel at 3 wt % relative to the copper-based alloy.

[0026] FIG. 1(c) shows a case where the paste for forming the resistive layer of the chip resistor contains nickel at 5 wt % relative to the copper-based alloy.

[0027] FIG. 1(d) shows a case where the paste for forming the resistive layer of the chip resistor contains 7 wt % nickel relative to the copper-based alloy.

[0028] On the other hand, in the cases of (b) to (d) in FIG. 1, the diameter of the nickel powder contained in the paste for forming the resistive layer of the chip resistor is 180 nm.

[0029] 1(a) to (d) show that the adhesive strength at the interface between the resistive layer and the substrate increases as the weight ratio of nickel to copper-based alloy contained in the paste for forming the resistive layer of the chip resistor increases. That is, in the case of (a) of Fig. 1, voids exist at the interface between the resistive layer and the substrate, resulting in low adhesive strength, but from (b) to (d) of Fig. 1, the number of voids at the interface between the resistive layer and the substrate decreases, resulting in stronger adhesive strength.

[0030] When the weight ratio of nickel to copper alloy contained in the paste for forming the resistive layer of chip resistors exceeds 10wt%, the sheet resistance itself becomes low, but the temperature coefficient of resistance (TCR) becomes high.

[0031] If the diameter of the nickel powder is 300 nm or more, the sinterability of the resistor layer forming paste decreases, increasing the possibility of voids occurring at the interface between the resistor layer and the substrate.

[0032] <Chip resistors>

[0033] FIG. 2 is a diagram illustrating a chip resistor according to an embodiment of the present invention.

[0034] FIG. 3 is a cross-sectional view taken along line AA' in FIG.

[0035] 4 and 5 are plan views each showing a schematic diagram of a resistive layer, a first electrode, and a second electrode applied to a chip resistor according to an embodiment of the present invention.

[0036] 2 to 5, a chip resistor according to an embodiment of the present invention includes a substrate 110, a first electrode 121, a second electrode 122, a resistive layer 130, and a protective layer 140. As shown in FIG.

[0037] The substrate 110 can provide a space for mounting the electrodes and the resistive layer. For example, the substrate 110 can be an electrically insulating substrate made of a ceramic material. The ceramic material can be alumina (Al2O3), but is not particularly limited as long as it is a material that has excellent insulation properties, heat dissipation properties, and adhesion to the resistive layer.

[0038] The first electrode 121 is disposed on one surface of the substrate 110. The second electrode 122 is disposed on one surface of the substrate 110 so as to be separated from the first electrode 121. That is, the first electrode 121 and the second electrode 122 are each disposed on one surface of the substrate so as to be spaced apart from each other.

[0039] The first electrode 121 and the second electrode 122 may be implemented with low resistance by using copper or a copper alloy.

[0040] The resistive layer 130 is disposed on one surface of the substrate 110, and connects the first electrode 121 and the second electrode 122 to each other. That is, the first electrode 121 and the second electrode 122 are electrically connected to each other by the resistive layer 130.

[0041] The resistance layer 130 contains a copper-based alloy and nickel in an amount exceeding 0 wt % and not exceeding 10 wt % relative to the copper-based alloy, and does not contain glass.

[0042] The copper-based alloy may include copper-manganese-tin (Cu-Mn-Sn), i.e., the copper-based alloy may be Zeranin, or the copper-based alloy may include copper-manganese-nickel (Cu-Mn-Ni), i.e., the copper-based alloy may be Manganin.

[0043] A typical chip resistor is formed of a primary resistive layer that contains glass and a secondary resistive layer that does not contain glass in order to ensure adhesion between the substrate and the resistive layer.

[0044] That is, in the case of copper alloy, which is the electrically conductive component of the paste for forming the resistive layer, it is very sensitive to the oxidizing atmosphere during sintering, so it is necessary to work in the strongest reducing atmosphere, but in the case of glass, which is an inorganic adhesive, the fluidity is poor when sintered in a reducing atmosphere, so it is common to use the paste for forming the primary resistive layer and the paste for forming the secondary resistive layer in parallel. As a result, the resistive layer of a normal chip resistor includes a first resistive layer formed with the paste for forming the primary resistive layer, and a second resistive layer formed with the paste for forming the secondary resistive layer.

[0045] However, this increases the overall thickness of the resistive layer, complicating the process of forming the chip resistor.

[0046] The resistive layer 130 used in this embodiment differs from the resistive layer of a typical chip resistor in that it does not contain glass and can ensure adhesion to the substrate.

[0047] When the weight ratio of nickel to copper-based alloy contained in the resistive layer exceeds 10 wt %, the sheet resistance itself is reduced, but the temperature coefficient of resistance is increased.

[0048] 4 and 5, the resistance value of the resistive layer 130 can be finely adjusted by forming a groove R in the resistive layer 130. That is, the resistance value of the resistive layer 130 can be finely adjusted by a trimming operation.

[0049] The trimming operation refers to the operation of forming grooves R in the resistive layer 130 while simultaneously measuring the resistance value of the resistive layer 130, and adjusting the resistance value of the resistive layer 130 by interrupting the formation of the grooves R when the resistance value approaches the target resistance value.

[0050] The grooves R can be formed by a laser. The laser can form the grooves R from an end of the resistive layer 130 to the inside of the resistive layer 130. The longer the length of the grooves R, the greater the resistance value of the resistive layer 130 can be.

[0051] When the resistance value of the resistive layer 130 approaches the target resistance value, the laser can change its moving direction. As an example, the groove can be formed in an L-shape, as shown in FIG.

[0052] The rate of increase in the resistance value of the resistive layer 130 in response to the increase in the length of the groove R after the laser movement direction is changed may be lower than the rate of increase in the resistance value of the resistive layer 130 in response to the increase in the length of the groove R before the laser movement direction is changed. Therefore, the resistance value of the resistive layer 130 can be adjusted more precisely after the laser movement direction is changed.

[0053] The protective layer 140 is disposed on one side of the resistive layer 130 to protect the resistive layer 130 .

[0054] The protective layer 140 may include epoxy, phenolic resin, glass material, etc. The protective layer 140 may protect the chip resistor 1000 according to the present embodiment from the outside.

[0055] 3, the protective layer 140 may be formed on one surface of the resistive layer 130 and may extend onto at least a portion of each of the first electrode 121 and the second electrode 122, but is not limited thereto. When the protective layer 140 is formed on one surface of the resistive layer 130 and extended onto at least a portion of each of the first electrode 121 and the second electrode 122, the bonding force between the substrate 110 and the resistive layer 130 can be supplemented.

[0056] The chip resistor 1000 according to this embodiment may further include a third electrode 123, a fourth electrode 124, a first metal cover 161, and a second metal cover 162.

[0057] The third electrode 123 and the fourth electrode 124 can assist in the arrangement of the first and second electrodes 121, 122, respectively. For example, U-shaped first and second metal covers 161, 162 can be fitted to both side surfaces of the substrate 110. The first and second metal covers 161, 162 can press and fix the first and second electrodes 121, 122. At this time, the third and fourth electrodes 123, 124 are formed in advance on the other side of the substrate 110 and are pressed by the first and second metal covers 161, 162. As a result, the first and second electrodes 121, 122 can be stably fixed.

[0058] In addition, the third and fourth electrodes 123 and 124 increase the total area of ​​the electrodes 121, 122, 123, and 124, thereby further reducing the resistance of the first and second electrodes 121 and 122. As a result, the total resistance of the chip resistor according to an embodiment of the present invention can be further reduced.

[0059] FIG. 6 is a diagram illustrating a chip resistor according to another embodiment of the present invention.

[0060] FIG. 7 is a cross-sectional view taken along line BB' in FIG.

[0061] On the other hand, for convenience of explanation, the first and second metal covers 161, 162 in FIG. 6 are not shown in FIG.

[0062] 6 and 7, the chip resistor according to this embodiment is different from the chip resistor according to the embodiment of the present invention in terms of upper electrodes 151, 152 and protective layers 141, 142. Therefore, the following description will focus on the upper electrodes 151, 152 and protective layers 141, 142.

[0063] The first upper surface electrode 151 and the second upper surface electrode 152 are formed on the first electrode 121 and the second electrode 122, respectively. That is, the first upper surface electrode 151 is formed on the first electrode 121, and the second upper surface electrode 152 is formed on the second electrode 122.

[0064] The first and second upper electrodes 151 and 152 may function as wiring for transmitting current between the first and second electrodes 121 and 122 and the outside.

[0065] The first upper electrode 151 and the second upper electrode 152 may each include an intermediate portion c interposed between the first electrode 121 or the second electrode 122 and the resistive layer 130, and an extension portion d extending from the intermediate portion c to at least a portion of one surface of the resistive layer 130. That is, the first upper electrode 151 includes a first intermediate portion c interposed between the first electrode 121 and the resistive layer 130, and a first extension portion d extending from the first intermediate portion c to at least a portion of one surface of the resistive layer 130. The second upper electrode 152 includes a second intermediate portion c interposed between the second electrode 122 and the resistive layer 130, and a second extension portion d extending from the second intermediate portion c to at least a portion of one surface of the resistive layer 130.

[0066] In this case, the first and second upper electrodes 151, 152 are formed between the electrodes 121, 122 and the resistive layer 130, respectively, and extend onto at least a portion of one surface of the resistive layer 130, thereby further improving the bonding strength between the resistive layer 130 and the substrate 110. In addition, the first and second upper electrodes 151, 152 can efficiently dissipate heat generated in the resistive layer 130 by using high thermal conductivity, which is a property of metal.

[0067] The protective layer 140 may include a first protective layer 141 formed on one surface of the resistance layer 130 and the extension d, and a second protective layer 142 formed on the first protective layer 141.

[0068] Each of the first protective layer 141 and the second protective layer 142 may include epoxy, phenolic resin, glass material, etc. The protective layer 140 may protect the chip resistor 2000 according to the present embodiment from the outside.

[0069] Since a plurality of protective layers are formed and the upper electrodes are formed in a structure in which they are recessed into the protective layers, the chip resistor 2000 according to this embodiment can improve the bonding strength between each component.

[0070] While one embodiment of the present invention has been described above, a person having ordinary knowledge in the art may modify and change the present invention in various ways by adding, changing or deleting components, without departing from the concept of the present invention as described in the claims, and this also falls within the scope of the claims of the present invention. Here, examples of the invention according to this embodiment will be described as items. [Item 1] In a paste for forming a resistive layer of a chip resistor containing a copper-based alloy powder, The copper-based alloy powder further includes nickel powder in an amount of more than 0 wt% and not more than 10 wt%. A glass-free paste for forming the resistive layer of chip resistors. [Item 2] 2. The paste for forming a resistive layer of a chip resistor according to item 1, wherein the copper-based alloy contains copper-manganese-tin (Cu-Mn-Sn). [Item 3] 3. The paste for forming a resistance layer of a chip resistor according to item 1 or 2, wherein the nickel powder has a diameter of 300 nm or less. [Item 4] A substrate; A first electrode disposed on one surface of the substrate; a second electrode disposed on one surface of the substrate so as to be separated from the first electrode; a resistive layer disposed on one surface of the substrate so as to connect the first electrode and the second electrode to each other; a protective layer disposed on one surface of the resistive layer to protect the resistive layer; The resistive layer is A chip resistor comprising a copper-based alloy and nickel in an amount greater than 0 wt% and not more than 10 wt% relative to the copper-based alloy, and not containing glass. [Item 5] 5. The chip resistor according to item 4, wherein the copper-based alloy includes copper-manganese-tin (Cu-Mn-Sn). [Item 6] The protective layer is a first protective layer formed on one surface of the resistive layer; and a second protective layer formed on one surface of the first protective layer. [Item 7] 7. The chip resistor according to any one of claims 4 to 6, wherein the resistive layer has a groove. [Item 8] 7. The chip resistor according to any one of items 4 to 6, further comprising upper electrodes formed on the first electrode and the second electrode, respectively. [Item 9] Each of the top electrodes is an intervening portion interposed between the first electrode or the second electrode and the resistance layer; and an extension portion extending from the intermediate portion to at least a portion of one surface of the resistive layer. [Item 10] The protective layer is a first protective layer formed on one surface of the resistive layer and on the extension; 10. The chip resistor according to item 9, further comprising: a second protective layer formed on the first protective layer. [Explanation of symbols]

[0071] 110 Substrate 121 1st electrode 122 2nd electrode 123 3rd electrode 124 4th electrode 130 resistance layer 140 Protective layer 141 1st protective layer 142 Second protective layer 151 1st top electrode 152 2nd top electrode 161 First metal cover 162 Second metal cover c Interposition part d Extension R groove 1000, 2000 Chip Resistors

Claims

1. A substrate; A first electrode disposed on one surface of the substrate; a second electrode disposed on one surface of the substrate so as to be separated from the first electrode; a resistive layer disposed on one surface of the substrate so as to connect the first electrode and the second electrode to each other; a protective layer disposed on one surface of the resistive layer to protect the resistive layer; The resistive layer is A copper-based alloy and nickel in an amount of more than 0 wt % and not more than 10 wt % relative to the copper-based alloy, and does not contain glass; The copper-based alloy is copper-manganese-tin (Cu-Mn-Sn).

2. The protective layer is a first protective layer formed on one surface of the resistive layer; The chip resistor according to claim 1 , further comprising: a second protective layer formed on one surface of the first protective layer.

3. The chip resistor according to claim 1 or 2, wherein the resistive layer has a groove.

4. The chip resistor according to claim 1 , further comprising an upper surface electrode formed on each of the first electrode and the second electrode.

5. Each of the top electrodes is an intervening portion interposed between the first electrode or the second electrode and the resistance layer; The chip resistor according to claim 4 , further comprising: an extension portion extending from the intermediate portion to at least a portion of one surface of the resistive layer.

6. The protective layer is a first protective layer formed on one surface of the resistive layer and on the extension; The chip resistor according to claim 5 , further comprising: a second protective layer formed on the first protective layer.

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