Analysis of the operation of power semiconductor devices

Abstract

A method for analyzing the operation of power semiconductor devices PS1, PS2, PS3, the method including providing a set of reference voltages Vn, Vn+1, ... VN and corresponding reference currents In, In+1, ... IN to the devices PS1, PS2, PS3, and measuring on-state voltages Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe) and corresponding on-state currents Imeas(1), ... Imeas(k), ... Imeas(Nframe) of the devices PS1, PS2, PS3 within a predetermined time interval to obtain Nframe measurement points MP(1), ... MP(k), ... MP(Nframe), where Nframe is an integer greater than or equal to 2. The set of reference voltages V1, ... Vn, ... VN is fitted by performing at least one least-squares fit to the Nframe measurement points (MP(1), ... MP(k), ... MP(Nframe)). The adapted set of reference voltages V1, . . . Vn, . . . VN is used to analyze the operation of the power semiconductor devices PS1, PS2, PS3.

Description

[Technical field]

[0001] The present invention relates to a method and circuit for analysing the operation of a power semiconductor device, and to a power electronic system including such a circuit. [Background technology]

[0002] In power electronic systems, e.g. power converters, the junction temperature of power semiconductor devices is a variable that determines the limits on the system operation. Exceeding an absolute limit can be considered catastrophic and the thermal behavior over the life of the system will adversely affect the reliability and degradation rate. However, the devices themselves, e.g. Insulated Gate Bipolar Transistors (IGBTs), MOSFETs, thyristors or diodes, are electrically "live" and in an electrically high noise environment, so a direct measurement of the junction temperature is not feasible.

[0003] However, the junction temperature can be estimated based on the temperature sensitive electrical parameter (TSEP) for the semiconductor device. In conventional approaches, the junction temperature is estimated from the TSEP at very low currents, i.e., in the milliampere range. Typically, the very low currents are less than 1% of the rated current of the power electronics system. Therefore, such methods are not applicable to many applications of power electronics systems and may only be useful in certain laboratory equipment. In other approaches, the junction temperature is estimated at high currents, e.g., 10-100% of the rated current. In this case, a look-up table or equation must be fitted to pre-calibration data measured over a range of junction temperatures and on-currents (i.e., forward currents). However, such fitting requires careful and accurate calibration of each system before use. Such calibration is not practical for industrial applications. Summary of the Invention [Problem to be solved by the invention]

[0004] It is therefore an object of the present invention to provide an improved concept for analysing the operation of power semiconductor devices, which is applicable at on-currents up to at least the rated current and does not require prior calibration. [Means for solving the problem]

[0005] This problem is solved by the categories defined in the independent claims. Further configurations and embodiments are defined in the dependent claims.

[0006] The improved concept is based on the idea of ​​utilizing the on-voltage of a power semiconductor device as the TSEP, effectively eliminating the dependence of the on-voltage on the on-current, and leaving only the dependence on the junction temperature. This idea is achieved by assigning a number of measurement points to a number of predefined bins, and performing a least squares fit to the predefined number of measurement points. As a result, the calibration is effectively performed online during normal operation, without the user having to actually perform the calibration before use.

[0007] According to the improved concept, a method for analyzing the operation of a power semiconductor device is provided. A set of N reference voltages of the device and a corresponding set of N reference currents of the device are provided, where N is an integer equal to or greater than 2. Nframe on-voltages and on-currents of the device are measured within a predetermined time interval. The measured voltages and measured currents represent Nframe measurement points, where Nframe is an integer equal to or greater than 2. The set of reference voltages is adapted by performing a least squares fitting on the Nframe measurement points, in particular on the Nframe measured on-voltages for these measurement points. While primarily any least squares method can be used for the fitting, an incremental least squares method is more preferred. The adapted set of reference voltages is then used to analyze the operation of the power semiconductor device.

[0008] The method according to the improved concept is well applicable for on-currents at least up to the rated current, and pre-calibration can be avoided. The method offers a beneficial trade-off between accuracy and computational load. Because a large amount of data is used, errors can be significantly reduced. The method can handle DC currents or AC currents with very low frequencies, which many known approaches cannot.

[0009] According to some configurations of the method, analyzing the operation of the power semiconductor device includes evaluating a junction temperature of the device based on the adapted set of reference voltages.

[0010] According to some configurations, analyzing the operation of the power semiconductor device includes determining a shift in an on-voltage with respect to time.

[0011] The shift in the on-state voltage indicates electrical degradation of the power semiconductor device. These steps are particularly suitable when a temperature invariant point exists in the current-voltage characteristic curve of the power semiconductor device, and one of the reference currents corresponds to this invariant point.

[0012] According to some configurations, for the least squares fit, a piecewise linear approximation is performed between each two adjacent measurement points, in particular between each two adjacent measured on-currents for a number of measurement points. Compared to other approaches in which a continuous voltage-current approximation is performed, errors can be reduced to a minimum by the piecewise linear approximation of the present invention while maintaining low computational complexity.

[0013] According to some configurations, the least squares fit includes determining an approximation factor for each reference current, where the approximation factor indicates how close the measured on-current in the current domain is to the respective reference current. In general, the approximation of multiple measurement points to the respective reference currents and corresponding reference potentials provides an indication of how close or matched a particular measurement point, in particular a particular on-current, is to a particular reference current, as indicated by the approximation factor. The approximation factor thus indicates a weighting factor that can be used to weight the measured on-voltages according to their respective degree of approximation or match. Determining the approximation factor may include, for example, providing one or more equations for calculating the approximation factor or providing a diagram or look-up table for reading the approximation factor.

[0014] Preferably, the least squares fitting further comprises determining a set of approximation ratios for each measurement point, in particular for each on-current. As a result, a set of Nframe approximation ratios is generated. Determining the set of approximation ratios may include, for example, calculating the approximation ratios by one or more equations, or retrieving the approximation ratios from a diagram or a look-up table.

[0015] According to some configurations, for a measurement point within a predetermined time interval, a plurality of approximation ratios are defined such that when the measured on-current is equal to a particular reference current, the approximation ratio corresponding to the particular reference current is equal to 1, while when the measured on-current is equal to an adjacent reference current, the approximation ratio corresponding to the particular reference current is equal to 0. Preferably, when the measured on-current of the corresponding measurement point is between the reference current and the adjacent reference current, the approximation ratio corresponding to the particular reference current is a value between 1 and 0. Preferably, the approximation ratio decreases linearly from a given reference current to the adjacent reference current.

[0016] According to some configurations, for a measurement point within the predefined time interval, the approximation ratio may be defined or calculated by the following set of equations:

[0017]

number

[0018] According to some configurations, the adapted set of reference voltages is represented by a vector V Equation for

[0019]

number

[0020] According to some configurations, calculation of the adapted set of reference voltages may proceed by (a) recording all Nframe measurement points within the time interval and then performing all least squares matrix calculations at the end of the time interval, or (b) calculating intermediate matrices for each measurement point and then performing a final matrix calculation at the end of the time interval (interval-wise least squares).

[0021] According to some configurations, the step of evaluating the junction temperature includes determining a set of average approximation ratios based on the approximation ratios of the Nframe set, and evaluating the junction temperature based on the set of average approximation ratios.

[0022] According to some configurations, determining the set of average approximation ratios (W1(av), ... Wn(av), ... WN(av)) is preferably performed according to the following equation:

[0023]

number

[0024] The average approximation factor Wn(av) corresponding to a particular reference voltage Vn within a time interval effectively provides an indication of confidence in the accuracy of the reference voltage estimate, which may be used by a calibration algorithm to determine how to use that reference voltage in verifying electrical and thermal properties.

[0025] According to some configurations, the step of evaluating the junction temperature includes calculating an estimated value for the junction temperature based on an assumed linear relationship between the estimated value for the junction temperature and the matched set of reference voltages.

[0026] According to some configurations, the step of evaluating the junction temperature includes calculating evaluated values ​​for the junction temperature based on an assumed linear relationship between each evaluated value for the junction temperature and a reference voltage of the matched set of reference voltages. Each evaluated junction temperature is weighted according to a respective average approximation ratio of the set of average approximation ratios. The weighted evaluation values ​​for the junction temperature are then summed, e.g., normalized, to obtain a final evaluation for the junction temperature.

[0027] According to the improved concept, a circuit for analyzing the operation of a power semiconductor device is also provided. The circuit includes a measurement device, a storage device, and an evaluation device. The measurement device is configured to measure the on-voltage and the corresponding on-current of the device within a predetermined time interval, where Nframe is an integer equal to or greater than 1, to obtain Nframe measurement points. The storage device is configured to store a set of reference voltages of the device and a corresponding set of reference currents of the device. The storage device may also be configured to store a look-up table, diagram, or algorithm for determining the approximation ratio. The evaluation device is configured to fit the set of reference voltages by performing a least squares fit on the Nframe measurement points, in particular on the Nframe measured on-voltages for these measurement points. Furthermore, the evaluation device is configured to analyze the operation of the power semiconductor device based on the fitted set of reference voltages.

[0028] According to the improved concept there is also provided a power electronics system comprising a circuit according to the improved concept and a power semiconductor device.

[0029] According to some configurations, the power semiconductor device comprises a diode, in particular a PIN diode or a Schottky diode or a thyristor or a field effect transistor, such as a MOSFET, a JFET or a HEMT or a bipolar transistor, such as an IGBT or a BJT.

[0030] According to some configurations of the power electronics system, the power electronics system includes a power converter, the power converter including the power semiconductor device.

[0031] Further configurations of the circuit according to the improved concept are readily derived from various configurations of the method according to the improved concept, and further configurations of the method according to the improved concept are readily derived from various configurations of the circuit according to the improved concept. Further configurations of the power electronic system according to the improved concept are readily derived from various configurations of the method according to the improved concept, and further configurations of the method according to the improved concept are readily derived from various configurations of the power electronic system according to the improved concept.

[0032] The present invention will now be described in detail with reference to the drawings, in which: FIG. [Brief description of the drawings]

[0033] [Figure 1a] 1 shows the on-state current versus on-state voltage at two different junction temperatures of a power semiconductor device. [Figure 1b] 1 shows the on-state voltage versus junction temperature at different on-state currents of a power semiconductor device. [Diagram 2] 1 is a flow chart of exemplary steps of a method according to an improved concept. [Diagram 3] 1 is an IV characteristic graph showing some of the representative steps of a method according to an improved concept. [Figure 4] 1 is a diagram showing approximation factors W1-W9 for reference currents I1-I9 depending on the measured on-current Imeas. [Diagram 5] is a lookup table containing values ​​for approximation factors W1-W9 for the reference currents I1-I9 that depend on the measured current Imeas. [Figure 6] FIG. 1 is a block diagram of a representative configuration of a power electronics system according to an improved concept. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] FIG. 1a shows representative curves of on-current Io versus on-voltage Vo at two different junction temperatures Tj of a power semiconductor device, 25° C. and 125° C. These curves intersect at a cross point CP. A set of six discrete currents I1, I2, ..., I6 and corresponding voltages V1(25), V2(25), ..., V6(25) at Tj=25° C. are shown. Of course, the number of six currents is an arbitrary example and may be any number greater than or equal to two.

[0035] Figure 1b shows the dependence of voltages V1(25), ..., V6(25) on Tj. It can be seen that the voltages below the node CP exhibit a negative temperature coefficient that decreases with increasing Tj at constant current, while the voltages above the node CP exhibit a positive temperature coefficient that increases with increasing Tj at constant current.

[0036] The node CP does not exhibit Tj dependence. For some power semiconductor devices, such as some PIN diodes, the node CP may be close to or above the rated current. For other power semiconductor devices, such as insulated gate bipolar transistors (IGBTs), the node may be below 10% of the rated current. Still other power semiconductor devices may not have a single node CP, for example due to the nonlinear temperature dependence of the on-voltage.

[0037] Due to the temperature dependence described above, the analysis of the operation of a power semiconductor device based on the forward voltage is complicated. Nevertheless, according to the improved concepts described above and below, a meaningful analysis can be performed without conventional calibration and without significantly limiting the applicable current range.

[0038] Representative embodiments of methods according to the improved concept are described below with reference to FIGS.

[0039] 2, a set of reference voltages Vn, Vn+1, ... IN, in particular reference on-voltages, and a set of corresponding reference currents In, In+1, ... IN, in particular on-currents, of a power semiconductor device are determined. For example, the reference voltages and the reference currents of the power semiconductor device for a predefined junction temperature may be quantitatively predefined, for example, in a data sheet. Or, the reference voltages and the reference currents may be predetermined for a given junction temperature by quantitative measurement.

[0040] In step 200, Nframe on-voltages Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe) and corresponding Nframe on-currents Imeas(1), ... Imeas(k), ... Imeas(Nframe) of the power semiconductor device, which indicate Nframe measurement points MP(1), ... MP(k), ... MP(Nframe), are measured within a predefined time interval. Nframe is an integer equal to or greater than 2, while k is a specific number of repetitions of current measurements for the on-voltage that generate the corresponding measurement point MP(k).

[0041] FIG. 3 illustrates several measurement points and five reference voltages V1-V5 and corresponding reference currents I1-I5. The reference currents I1-I5 are equally spaced from each other, and the reference voltages V1-V5 are voltages corresponding to the reference currents I1-I5. FIG. 3 also illustrates linearly approximated IV curves for each section between two adjacent reference currents I1-I5 and the corresponding reference voltages V1-V5.

[0042] In step 300, a set of reference voltages V1, ... Vn, ... VN is fitted by performing a least squares fit on Nframe measured on-state voltages Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe) for measurement points MP(1), ... MP(k), ... MP(Nframe). As shown in Fig. 3, the least squares fit is based on the assumption of piecewise linear approximation between two measured on-state currents Imeas(1), ... Imeas(k), ... Imeas(Nframe) for measurement points MP(1), ... MP(k), ... MP(Nframe).

[0043] The least squares fit requires the definition of one approximation factor W1, ... Wn, ... WN for each reference current I1, ... In, ... IN, which indicates how close the measured on-currents Imeas(1), ... Imeas(k), ... Imeas(Nframe) in the current domain are to the respective reference currents I1, ... In, ... IN, and thus how close the measured on-currents Imeas(1), ... Imeas(k), ... Imeas(Nframe) are to the given reference currents I1, ... In, ... IN.

[0044] The approximation ratios W1(k), ...Wn(k), ...WN(k) for each measurement point MP(k) within a predetermined time interval are defined such that when the measured on-current Imeas(k) of the corresponding measurement point MP(k) is equal to a specific reference current (I1, ...In, ...IN), one approximation ratio W1(k), ...Wn(k), ...WN(k) corresponding to the one reference current I1, ...In, ...IN is equal to 1, while when the measured on-current Imeas(k) of the corresponding measurement point MP(k) is equal to an adjacent reference current I2, ...In+1, ...IN-1, the approximation ratio W1(k), ...Wn(k), ...WN(k) corresponding to the one reference current I1, ...In, ...IN is equal to 0. Between these reference currents I1, ...In, ...IN, the approximation factors W1(k), ...Wn(k), ...WN(k) decrease linearly from the reached reference current I1, ...In, ...IN to the adjacent reference currents I2, ...In+1, ...IN-1.

[0045] This definition can be expressed, for example, by the following set of equations:

[0046]

number

[0047] By using any of the above predefined values, a set of approximation ratios W1, ... Wn, ... WN is determined for each measurement point MP(1), ... MP(k), ... MP(Nframe), in particular for each measured on-current Imeas(1), ... Imeas(k), ... Imeas(Nframe), i.e., calculated by the above equation or read from the above diagram or table. As a result, the Nframe set of approximation ratios W1(1), ... Wn(k), ... WN(Nframe) is determined.

[0048] Then, an adapted set of reference voltages V1, ... Vn, ... VN is determined based on the determined W1(1), ... Wn(k), ... WN(Nframe) and the measured on-state voltages Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe). In particular, the adapted set of reference voltages (V1, ... Vn, ... VN) is determined based on the equation

[0049]

number

[0050] The adapted reference potentials V1, . . . Vn, . . . VN can be used as a current-independent estimate for the measured on-state voltage Vmeas.

[0051] In step 400, the average approximation rate Wn(av) is calculated at the end of the time interval according to the formula

[0052]

number

[0053] The average approximation rate Wn(av) to the specially adapted reference voltage Vn indicates the confidence in the accuracy of the voltage estimation.

[0054] The duration of the sample time interval may be selected, for example, as a compromise between a longer period, which improves the accuracy of the average value, and a shorter period, which assumes an approximately constant junction temperature Tj over the time interval.

[0055] In step 500, the adapted set of reference voltages V1, . . . Vn, . . . VN is used to analyze the operation of a power semiconductor device.

[0056] In particular, the analysis may include selecting a reference voltage Vn having a maximum average approximation ratio Wn(av) from a set of matched reference voltages V1, ... Vn, ... VN, and calculating an estimate value for the junction temperature Tj based on an assumed linear relationship between the junction temperature Tj and the selected reference voltage Vn.

[0057] For example, the analysis may include calculating respective estimates for the junction temperatures based on the assumed linear relationships for some or all of the fitted set of reference voltages V1, ... Vn, ... VN. A weighted average of the estimates for the junction temperatures Tj may then be determined. The weighting may be performed according to the respective average approximation factors W1(av), ... Wn(av), ... WN(av).

[0058] Fig. 6 is a block diagram of a representative configuration of a power electronics system according to the improved concept, in particular configured to perform the method according to the improved concept as described with reference to Figs.

[0059] The system consists of a circuit C according to the improved concept and a power electronic device, for example a power converter PC coupled to the circuit C. The power converter PC comprises one or more power semiconductor devices PS1, PS2, ..., PS6, for example IGBTs. The number of power semiconductor devices equal to six in Fig. 6 is only an example and may not be six. In the example of Fig. 6, the devices PS1, ..., PS6 are shown as part of a six-switch three-phase two-level inverter, which is a standard application for power converters. However, this inverter is only an example and the power semiconductor devices are not limited to this inverter, since the improved concept does not rely on such a configuration.

[0060] Although a circuit symbol for a depletion mode IGBT is shown in FIG. 6, this circuit symbol in no way limits the method, circuit or system according to the improved concept. In particular, the power semiconductor devices PS1, PS2, PS3 may comprise enhancement mode IGBTs, other transistors, thyristors or diodes. The power converter PC is also used only as an example. In particular, the power converter PC may be replaced by another power electronic device, such as a semiconductor circuit breaker, a semiconductor relay, a static var compensator or a switch-mode audio amplifier.

[0061] The power converter PC may for example comprise a drive control unit DCU for driving and / or controlling the power semiconductor devices PS1, PS2, PS3.

[0062] 6, the circuit C may be separate to the power converter PC. Alternatively, for example, the power converter PC or the drive control unit DCU may comprise the circuit C.

[0063] The circuit comprises a measuring device MU for repeatedly measuring the on-voltage and on-current of at least one of the semiconductor devices PS1, PS2, PS3 within a predetermined time interval and for communicating with the power converter PC. The measuring device MU may for example comprise one or more analog-to-digital converters and / or a field programmable gate array (FPGA). Alternatively, the measuring device MU may comprise a microcontroller unit.

[0064] The circuit C further comprises a memory device SU for storing the reference voltages and the reference currents. The memory device SU is also provided for storing the adapted reference voltages, the approximation ratios and the average approximation ratios. Also, equations, diagrams or look-up tables for determining said approximation ratios may be stored in the memory device SU.

[0065] In some configurations (not shown), the memory device SU may be coupled to the measurement device MU, for example within an FPGA or microcontroller unit of the measurement device MU.

[0066] The circuit C also comprises an evaluation device EU, e.g. a microprocessor, for adapting the reference voltages, storing the data in the memory device SU and optionally determining an evaluation value for the junction temperature. In particular, the evaluation device EU may be arranged to carry out all the calculation steps described with reference to figures 2 to 5. The evaluation device EU may also be coupled to the memory device SU and / or to the measuring device MU.

[0067] By means of the method, circuit or system according to the improved concept, the operation of a power semiconductor device can be analyzed without prior calibration up to at least the rated current of the power semiconductor device. This analysis is achieved within about 100 ms or about several hundred ms by effectively fitting the set of reference voltages to a number of measurement points using a least squares method. The least squares fitting allows for the calculation of an adapted voltage. The adapted voltage can be used to effectively perform a calibration while online, i.e. during normal operation of the power semiconductor device or a system comprising the device, e.g. a power converter.

[0068] The improved concept allows for a better trade-off of accuracy vs. computational load: for example, if simple binning is used, a large number of current bins are required, resulting in increased computational load or large errors in the resulting voltages when using the resulting data.

[0069] According to an improved concept, a high current measurement of the drop in the on-state voltage can be used, so that interference with the normal operation of the converter is avoided or a specific low current supply is required that is switched off.

[0070] Also, complex look-up tables may be omitted.

[0071] Because large data sets can be used, measurement errors can be significantly reduced.

[0072] The improved concept system or circuit can handle DC current or very low AC current. In such a case, only two reference currents have valid data within a certain time interval. In this case, the on-current is approximately constant.

[0073] Implementations of the improved concept may include junction temperature assessment that may enable several features of next generation "smart" power converters, including dynamic rating control (intelligent over-rate / derate), optimized parallel inverter stack current sharing, condition monitoring (wear-out and abnormal operation detection), predictive maintenance practices, temperature cycle counting, remaining useful life assessment, improved verification of inverter stack configurations during development and type testing, and improved over-temperature detection.

[0074] The resulting benefits to the manufacturer of the power converter may include a trade-off of optimized performance (e.g., rated current or current efficiency) versus cost (e.g., due to reduced margins). The benefits to the end user of the power converter may include earlier detection of abnormal operation and potentially reduced operating costs.

[0075] As above, the method may be applied to other TSEPs that are current dependent, including switching characteristics such as diode reverse recovery current peak, overshoot peak voltage, etc. Also, TSEPs do not apply to essentially all power semiconductor devices, but may be applied in a similar manner to, for example, gate threshold voltage or internal gate resistance. One important aspect is the removal of the operating point (e.g., current) dependency by converting a single measurement with operating point and temperature dependency into a separate set of measurements with only temperature dependency.

[0076] Furthermore, the concepts may be used to analyze the operation of electrical equipment other than power electronics, especially if certain hot spot temperatures of interest are difficult to measure due to the harsh environment, which may be the case, for example, of power transformers, in which case the hot spot temperature or winding temperature of the transformer may be of interest. The present application relates to the invention described in the claims, but may also include the following configurations as other aspects. 1. A method for analyzing the operation of a power semiconductor device (PS1, PS2, PS3), comprising: - providing a set of reference voltages (Vn, Vn+1, ... VN) and corresponding reference currents (In, In+1, ... IN) for said devices (PS1, PS2, PS3); - measuring the on-voltages (Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe)) and corresponding on-currents (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) of said devices (PS1, PS2, PS3) within a predetermined time interval, where Nframe is an integer equal to or greater than 1, to obtain Nframe measurement points (MP(1), ... MP(k), ... MP(Nframe)); - fitting the set of reference voltages (V1, ... Vn, ... VN) by performing at least one least squares fit for the Nframe measurement points (MP(1), ... MP(k), ... MP(Nframe)); - using the adapted set of reference voltages (V1, ... Vn, ... VN) to analyze the operation of the power semiconductor devices (PS1, PS2, PS3). 2. 2. The method of claim 1, wherein said analysis includes evaluating junction temperatures (Tj) of said devices (PS1, PS2, PS3) based on said adapted set of reference voltages (V1, . . . Vn, . . . VN). 3. 3. The method according to claim 1 or 2, wherein for the least squares fitting, a piecewise linear approximation between each two adjacent measurement points (MP(1), ...MP(k), ...MP(Nframe)) is performed. 4. The least squares fit is - defining one approximation ratio (W1, ... Wn, ... WN) for each reference current (I1, ... In, ... IN), the approximation ratio (W1, ... Wn, ... WN) indicating how close the measured on-state current (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) is to each of the reference currents (I1, ... In, ... IN); -Determining a set of approximation rates (W1, ... Wn, ... WN) for each measurement point (MP(1), ... MP(k), ... MP(Nframe)), thereby determining an Nframe set of approximation rates (Wn(1), ... Wn(k), ... WN(Nframe)). 5. The method according to claim 4, wherein a plurality of approximation ratios (W1, ... Wn, ... WN) are defined such that when the measured on-current (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) is equal to a specific reference current (I1, ... In, ... IN), one approximation ratio (W1, ... Wn, ... WN) corresponding to the specific reference current (I1, ... In, ... IN) is equal to 1, while when the measured on-current (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) is equal to an adjacent reference current (I2, ... In+1, ... IN-1), the approximation ratio (W1, ... Wn, ... WN) corresponding to the specific reference current (I1, ... In, ... IN) is equal to 0. 6. For each measurement point (MP(k)) in the predetermined time interval, the approximation factors (W1, ... Wn, ... WN) are calculated based on the following set of equations:

number

number

number

[0077] PC Power Converter DCU Drive control unit PS1, PS2, PS3 Power Semiconductor Devices C circuit EU evaluation equipment SU storage device MU measuring device Io On-state current Vo On voltage Tj junction temperature V1,…Vn,…VN Reference voltages, adapted reference voltages In,…In,…IN reference current Imeas Measured on-state current Vmeas Measurement on voltage MP measurement point W1,…Wn,…WN Approximation factor (validity factor) Wn(av),…Wn(av),…WN(av) average approximation rate

Claims

1. A method for analyzing the operation of a power semiconductor device (PS1, PS2, PS3), comprising: - providing a set of reference voltages (Vn, Vn+1, ... VN) and corresponding reference currents (In, In+1, ... IN) for said power semiconductor devices (PS1, PS2, PS3); - measuring on-voltages (Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe)) and corresponding on-currents (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) of the power semiconductor devices (PS1, PS2, PS3) within a predetermined time interval, where Nframe is an integer equal to or greater than 1, to obtain Nframe measurement points (MP(1), ... MP(k), ... MP(Nframe)); - adapting said set of reference voltages (V1, ... Vn, ... VN) by performing at least one least squares fit to said Nframe measurement points (MP(1), ... MP(k), ... MP(Nframe)); using the adapted set of reference voltages (V1, ... Vn, ... VN) to analyze the operation of the power semiconductor devices (PS1, PS2, PS3), For the least squares fit, a piecewise linear approximation between each two adjacent measurement points (MP(1), ...MP(k), ...MP(Nframe)) is performed.

2. 2. The method of claim 1, wherein the analysis includes evaluating junction temperatures (Tj) of the power semiconductor devices (PS1, PS2, PS3) based on the adapted set of reference voltages (V1, ... Vn, ... VN).

3. The least squares fit is - prescribing one approximation ratio (W1, ... Wn, ... WN) for each reference current (I1, ... In, ... IN), the approximation ratio (W1, ... Wn, ... WN) indicating how close the measured on-current (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) is to each of the reference currents (I1, ... In, ... IN); A method according to claim 1 or 2, comprising determining a set of approximation ratios (W1, ... Wn, ... WN) for each measurement point (MP(1), ... MP(k), ... MP(Nframe)), thereby determining an Nframe set of approximation ratios (Wn(1), ... Wn(k), ... WN(Nframe)).

4. 4. The method of claim 3, wherein the approximation ratios (W1, ... Wn, ... WN) are defined such that when the measured on-current (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) is equal to a specific reference current (I1, ... In, ... IN), one approximation ratio (W1, ... Wn, ... WN) corresponding to the specific reference current (I1, ... In, ... IN) is equal to 1, while when the measured on-current (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) is equal to an adjacent reference current (I2, ... In+1, ... IN-1), the approximation ratio (W1, ... Wn, ... WN) corresponding to the specific reference current (I1, ... In, ... IN) is equal to 0.

5. For the measurement points (MP(k)) within the predetermined time interval, the approximation ratios (W1, ... Wn, ... WN) are calculated by the following set of equations: [0010] 5. The method according to claim 3 or 4, wherein:

6. 6. The method according to claim 3, wherein an adapted set of reference voltages (V1, ... Vn, ... VN) is determined based on the defined plurality of approximation factors (W1(1), ... Wn(k), ... WN(Nframe)) and the measured on-state voltages (Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe)).

7. The set of matched reference voltages (V1, . . . Vn, . . . VN) is expressed by the equation [0025] 7. The method of claim 6, wherein the calculation is performed by solving

8. 8. The method according to claim 3, wherein the step of evaluating the junction temperature (Tj) includes determining a set of average approximation rates (W1(av), ... Wn(av), ... WN(av)) based on an Nframe set of the approximation rates (W1(1), ... Wn(k), ... WN(Nframe)), and evaluating the junction temperature (Tj) based on the set of average approximation rates (W1(av), ... Wn(av), ... WN(av)).

9. Determining the set of average approximation rates (W1(av), ... Wn(av), ... WN(av)) may be performed using the following equation: [0030] 9. The method of claim 8, further comprising determining respective time averages corresponding to a plurality of approximation ratios of the Nframe set of approximation ratios (W1(1), ... Wn(k), ... WN(Nframe)) by:

10. 10. The method according to claim 8 or 9, wherein the step of estimating the junction temperature (Tj) comprises calculating an estimated value for this junction temperature (Tj) based on an assumed linear relationship between the estimated value for this junction temperature (Tj) and the adapted set of reference voltages (V1, ... Vn, ... VN).

11. The step of evaluating the junction temperature (Tj) comprises: - calculating a plurality of estimated values ​​for the junction temperature (Tj) based on an assumed linear relationship between each estimated value for the junction temperature (Tj) and one of the set of adapted reference voltages (V1, ... Vn, ... VN); - weighting each evaluated junction temperature (Tj) according to its respective average approximation ratio of the set of average approximation ratios (W1(av), ... Wn(av), ... WN(av)).

12. A circuit for analyzing the operation of power semiconductor devices (PS1, PS2, PS3), a measurement unit (MU) configured to measure, within a predetermined time interval, on-voltages (Vmeas(1), ... Vmeas(k), ... Vmeas(Nframe)) and corresponding on-currents (Imeas(1), ... Imeas(k), ... Imeas(Nframe)) of the power semiconductor devices (PS1, PS2, PS3) to obtain Nframe measurement points (MP(1), ... MP(k), ... MP(Nframe)), where Nframe is an integer equal to or greater than 1; a memory device (SU) for storing a set of reference voltages (V1, ... Vn, ... VN) of said power semiconductor devices (PS1, PS2, PS3) and a corresponding set of reference currents (I1, ... In, ... IN) of said power semiconductor devices (PS1, PS2, PS3); - fitting the set of reference voltages (V1, ... Vn, ... VN) by performing a least squares fit on the Nframe measurement points (MP(1), ... MP(k), ... MP(Nframe)); and an evaluation unit (EU) configured to analyze the operation of the power semiconductor devices (PS1, PS2, PS3) based on the adapted set of reference voltages (V1, ... Vn, ... VN), For the least squares fit, a piecewise linear approximation between each two adjacent measurement points (MP(1), . . . MP(k), . . . MP(Nframe)) is performed in the circuit.

13. A power electronic system comprising a circuit (C) according to claim 12 and power semiconductor devices (PS1, PS2, PS3).

14. A power electronic system according to claim 13, comprising a power converter (PC), the power converter (PC) comprising power semiconductor devices (PS1, PS2, PS3).

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